ata.c revision 1.52 1 /* $NetBSD: ata.c,v 1.52 2004/08/20 22:17:06 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.52 2004/08/20 22:17:06 thorpej Exp $");
34
35 #ifndef ATADEBUG
36 #define ATADEBUG
37 #endif /* ATADEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/device.h>
44 #include <sys/conf.h>
45 #include <sys/fcntl.h>
46 #include <sys/proc.h>
47 #include <sys/pool.h>
48 #include <sys/kthread.h>
49 #include <sys/errno.h>
50 #include <sys/ataio.h>
51
52 #include <machine/intr.h>
53 #include <machine/bus.h>
54
55 #include <dev/ata/atareg.h>
56 #include <dev/ata/atavar.h>
57 #include <dev/ic/wdcreg.h>
58 #include <dev/ic/wdcvar.h>
59
60 #include "locators.h"
61
62 #include "atapibus.h"
63 #include "ataraid.h"
64
65 #if NATARAID > 0
66 #include <dev/ata/ata_raidvar.h>
67 #endif
68
69 #define DEBUG_FUNCS 0x08
70 #define DEBUG_PROBE 0x10
71 #define DEBUG_DETACH 0x20
72 #define DEBUG_XFERS 0x40
73 #ifdef ATADEBUG
74 int atadebug_mask = 0;
75 #define ATADEBUG_PRINT(args, level) \
76 if (atadebug_mask & (level)) \
77 printf args
78 #else
79 #define ATADEBUG_PRINT(args, level)
80 #endif
81
82 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL);
83
84 /*
85 * A queue of atabus instances, used to ensure the same bus probe order
86 * for a given hardware configuration at each boot.
87 */
88 struct atabus_initq_head atabus_initq_head =
89 TAILQ_HEAD_INITIALIZER(atabus_initq_head);
90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER;
91
92 /*****************************************************************************
93 * ATA bus layer.
94 *
95 * ATA controllers attach an atabus instance, which handles probing the bus
96 * for drives, etc.
97 *****************************************************************************/
98
99 dev_type_open(atabusopen);
100 dev_type_close(atabusclose);
101 dev_type_ioctl(atabusioctl);
102
103 const struct cdevsw atabus_cdevsw = {
104 atabusopen, atabusclose, noread, nowrite, atabusioctl,
105 nostop, notty, nopoll, nommap, nokqfilter,
106 };
107
108 extern struct cfdriver atabus_cd;
109
110
111 /*
112 * atabusprint:
113 *
114 * Autoconfiguration print routine used by ATA controllers when
115 * attaching an atabus instance.
116 */
117 int
118 atabusprint(void *aux, const char *pnp)
119 {
120 struct ata_channel *chan = aux;
121
122 if (pnp)
123 aprint_normal("atabus at %s", pnp);
124 aprint_normal(" channel %d", chan->ch_channel);
125
126 return (UNCONF);
127 }
128
129 /*
130 * ataprint:
131 *
132 * Autoconfiguration print routine.
133 */
134 int
135 ataprint(void *aux, const char *pnp)
136 {
137 struct ata_device *adev = aux;
138
139 if (pnp)
140 aprint_normal("wd at %s", pnp);
141 aprint_normal(" drive %d", adev->adev_drv_data->drive);
142
143 return (UNCONF);
144 }
145
146 /*
147 * ata_channel_attach:
148 *
149 * Common parts of attaching an atabus to an ATA controller channel.
150 */
151 void
152 ata_channel_attach(struct ata_channel *chp)
153 {
154
155 if (chp->ch_flags & ATACH_DISABLED)
156 return;
157
158 callout_init(&chp->ch_callout);
159
160 TAILQ_INIT(&chp->ch_queue->queue_xfer);
161 chp->ch_queue->queue_freeze = 0;
162 chp->ch_queue->active_xfer = NULL;
163
164 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint);
165 }
166
167 static void
168 atabusconfig(struct atabus_softc *atabus_sc)
169 {
170 struct ata_channel *chp = atabus_sc->sc_chan;
171 struct atac_softc *atac = chp->ch_atac;
172 int i;
173 struct atabus_initq *atabus_initq = NULL;
174
175 /* Probe for the drives. */
176 (*atac->atac_probe)(chp);
177
178 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n",
179 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
180 DEBUG_PROBE);
181
182 /* If no drives, abort here */
183 for (i = 0; i < chp->ch_ndrive; i++)
184 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0)
185 break;
186 if (i == chp->ch_ndrive)
187 goto out;
188
189 /* Shortcut in case we've been shutdown */
190 if (chp->ch_flags & ATACH_SHUTDOWN)
191 goto out;
192
193 /* Make sure the devices probe in atabus order to avoid jitter. */
194 simple_lock(&atabus_interlock);
195 while(1) {
196 atabus_initq = TAILQ_FIRST(&atabus_initq_head);
197 if (atabus_initq->atabus_sc == atabus_sc)
198 break;
199 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
200 &atabus_interlock);
201 }
202 simple_unlock(&atabus_interlock);
203
204 /*
205 * Attach an ATAPI bus, if needed.
206 */
207 for (i = 0; i < chp->ch_ndrive; i++) {
208 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) {
209 #if NATAPIBUS > 0
210 (*atac->atac_atapibus_attach)(atabus_sc);
211 #else
212 /*
213 * Fake the autoconfig "not configured" message
214 */
215 aprint_normal("atapibus at %s not configured\n",
216 atac->atac_dev.dv_xname);
217 chp->atapibus = NULL;
218 for (i = 0; i < chp->ch_ndrive; i++)
219 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI;
220 #endif
221 break;
222 }
223 }
224
225 for (i = 0; i < chp->ch_ndrive; i++) {
226 struct ata_device adev;
227 if ((chp->ch_drive[i].drive_flags &
228 (DRIVE_ATA | DRIVE_OLD)) == 0) {
229 continue;
230 }
231 memset(&adev, 0, sizeof(struct ata_device));
232 adev.adev_bustype = atac->atac_bustype_ata;
233 adev.adev_channel = chp->ch_channel;
234 adev.adev_openings = 1;
235 adev.adev_drv_data = &chp->ch_drive[i];
236 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev,
237 &adev, ataprint);
238 if (chp->ata_drives[i] != NULL)
239 ata_probe_caps(&chp->ch_drive[i]);
240 else
241 chp->ch_drive[i].drive_flags &=
242 ~(DRIVE_ATA | DRIVE_OLD);
243 }
244
245 /* now that we know the drives, the controller can set its modes */
246 if (atac->atac_set_modes) {
247 (*atac->atac_set_modes)(chp);
248 ata_print_modes(chp);
249 }
250 #if NATARAID > 0
251 if (atac->atac_cap & ATAC_CAP_RAID)
252 for (i = 0; i < chp->ch_ndrive; i++)
253 if (chp->ata_drives[i] != NULL)
254 ata_raid_check_component(chp->ata_drives[i]);
255 #endif /* NATARAID > 0 */
256
257 /*
258 * reset drive_flags for unattached devices, reset state for attached
259 * ones
260 */
261 for (i = 0; i < chp->ch_ndrive; i++) {
262 if (chp->ch_drive[i].drv_softc == NULL)
263 chp->ch_drive[i].drive_flags = 0;
264 else
265 chp->ch_drive[i].state = 0;
266 }
267
268 out:
269 if (atabus_initq == NULL) {
270 simple_lock(&atabus_interlock);
271 while(1) {
272 atabus_initq = TAILQ_FIRST(&atabus_initq_head);
273 if (atabus_initq->atabus_sc == atabus_sc)
274 break;
275 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
276 &atabus_interlock);
277 }
278 simple_unlock(&atabus_interlock);
279 }
280 simple_lock(&atabus_interlock);
281 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq);
282 simple_unlock(&atabus_interlock);
283
284 free(atabus_initq, M_DEVBUF);
285 wakeup(&atabus_initq_head);
286
287 ata_delref(chp);
288
289 config_pending_decr();
290 }
291
292 /*
293 * atabus_thread:
294 *
295 * Worker thread for the ATA bus.
296 */
297 static void
298 atabus_thread(void *arg)
299 {
300 struct atabus_softc *sc = arg;
301 struct ata_channel *chp = sc->sc_chan;
302 struct ata_xfer *xfer;
303 int i, s;
304
305 s = splbio();
306 chp->ch_flags |= ATACH_TH_RUN;
307
308 /*
309 * Probe the drives. Reset all flags to 0 to indicate to controllers
310 * that can re-probe that all drives must be probed..
311 *
312 * Note: ch_ndrive may be changed during the probe.
313 */
314 for (i = 0; i < ATA_MAXDRIVES; i++)
315 chp->ch_drive[i].drive_flags = 0;
316 splx(s);
317
318 /* Configure the devices on the bus. */
319 atabusconfig(sc);
320
321 for (;;) {
322 s = splbio();
323 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 &&
324 (chp->ch_queue->active_xfer == NULL ||
325 chp->ch_queue->queue_freeze == 0)) {
326 chp->ch_flags &= ~ATACH_TH_RUN;
327 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0);
328 chp->ch_flags |= ATACH_TH_RUN;
329 }
330 splx(s);
331 if (chp->ch_flags & ATACH_SHUTDOWN)
332 break;
333 s = splbio();
334 if (chp->ch_flags & ATACH_TH_RESET) {
335 /*
336 * wdc_reset_channel() will freeze 2 times, so
337 * unfreeze one time. Not a problem as we're at splbio
338 */
339 chp->ch_queue->queue_freeze--;
340 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags);
341 } else if (chp->ch_queue->active_xfer != NULL &&
342 chp->ch_queue->queue_freeze == 1) {
343 /*
344 * Caller has bumped queue_freeze, decrease it.
345 */
346 chp->ch_queue->queue_freeze--;
347 xfer = chp->ch_queue->active_xfer;
348 KASSERT(xfer != NULL);
349 (*xfer->c_start)(chp, xfer);
350 } else if (chp->ch_queue->queue_freeze > 1)
351 panic("ata_thread: queue_freeze");
352 splx(s);
353 }
354 chp->ch_thread = NULL;
355 wakeup((void *)&chp->ch_flags);
356 kthread_exit(0);
357 }
358
359 /*
360 * atabus_create_thread:
361 *
362 * Helper routine to create the ATA bus worker thread.
363 */
364 static void
365 atabus_create_thread(void *arg)
366 {
367 struct atabus_softc *sc = arg;
368 struct ata_channel *chp = sc->sc_chan;
369 int error;
370
371 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread,
372 "%s", sc->sc_dev.dv_xname)) != 0)
373 aprint_error("%s: unable to create kernel thread: error %d\n",
374 sc->sc_dev.dv_xname, error);
375 }
376
377 /*
378 * atabus_match:
379 *
380 * Autoconfiguration match routine.
381 */
382 static int
383 atabus_match(struct device *parent, struct cfdata *cf, void *aux)
384 {
385 struct ata_channel *chp = aux;
386
387 if (chp == NULL)
388 return (0);
389
390 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel &&
391 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT)
392 return (0);
393
394 return (1);
395 }
396
397 /*
398 * atabus_attach:
399 *
400 * Autoconfiguration attach routine.
401 */
402 static void
403 atabus_attach(struct device *parent, struct device *self, void *aux)
404 {
405 struct atabus_softc *sc = (void *) self;
406 struct ata_channel *chp = aux;
407 struct atabus_initq *initq;
408
409 sc->sc_chan = chp;
410
411 aprint_normal("\n");
412 aprint_naive("\n");
413
414 if (ata_addref(chp))
415 return;
416
417 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK);
418 initq->atabus_sc = sc;
419 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq);
420 config_pending_incr();
421 kthread_create(atabus_create_thread, sc);
422 }
423
424 /*
425 * atabus_activate:
426 *
427 * Autoconfiguration activation routine.
428 */
429 static int
430 atabus_activate(struct device *self, enum devact act)
431 {
432 struct atabus_softc *sc = (void *) self;
433 struct ata_channel *chp = sc->sc_chan;
434 struct device *dev = NULL;
435 int s, i, error = 0;
436
437 s = splbio();
438 switch (act) {
439 case DVACT_ACTIVATE:
440 error = EOPNOTSUPP;
441 break;
442
443 case DVACT_DEACTIVATE:
444 /*
445 * We might deactivate the children of atapibus twice
446 * (once bia atapibus, once directly), but since the
447 * generic autoconfiguration code maintains the DVF_ACTIVE
448 * flag, it's safe.
449 */
450 if ((dev = chp->atapibus) != NULL) {
451 error = config_deactivate(dev);
452 if (error)
453 goto out;
454 }
455
456 for (i = 0; i < chp->ch_ndrive; i++) {
457 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
458 ATADEBUG_PRINT(("atabus_activate: %s: "
459 "deactivating %s\n", sc->sc_dev.dv_xname,
460 dev->dv_xname),
461 DEBUG_DETACH);
462 error = config_deactivate(dev);
463 if (error)
464 goto out;
465 }
466 }
467 break;
468 }
469 out:
470 splx(s);
471
472 #ifdef ATADEBUG
473 if (dev != NULL && error != 0)
474 ATADEBUG_PRINT(("atabus_activate: %s: "
475 "error %d deactivating %s\n", sc->sc_dev.dv_xname,
476 error, dev->dv_xname), DEBUG_DETACH);
477 #endif /* ATADEBUG */
478
479 return (error);
480 }
481
482 /*
483 * atabus_detach:
484 *
485 * Autoconfiguration detach routine.
486 */
487 static int
488 atabus_detach(struct device *self, int flags)
489 {
490 struct atabus_softc *sc = (void *) self;
491 struct ata_channel *chp = sc->sc_chan;
492 struct device *dev = NULL;
493 int i, error = 0;
494
495 /* Shutdown the channel. */
496 /* XXX NEED AN INTERLOCK HERE. */
497 chp->ch_flags |= ATACH_SHUTDOWN;
498 wakeup(&chp->ch_thread);
499 while (chp->ch_thread != NULL)
500 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0);
501
502 /*
503 * Detach atapibus and its children.
504 */
505 if ((dev = chp->atapibus) != NULL) {
506 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
507 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH);
508 error = config_detach(dev, flags);
509 if (error)
510 goto out;
511 }
512
513 /*
514 * Detach our other children.
515 */
516 for (i = 0; i < chp->ch_ndrive; i++) {
517 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
518 continue;
519 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
520 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
521 sc->sc_dev.dv_xname, dev->dv_xname),
522 DEBUG_DETACH);
523 error = config_detach(dev, flags);
524 if (error)
525 goto out;
526 }
527 }
528
529 out:
530 #ifdef ATADEBUG
531 if (dev != NULL && error != 0)
532 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n",
533 sc->sc_dev.dv_xname, error, dev->dv_xname),
534 DEBUG_DETACH);
535 #endif /* ATADEBUG */
536
537 return (error);
538 }
539
540 CFATTACH_DECL(atabus, sizeof(struct atabus_softc),
541 atabus_match, atabus_attach, atabus_detach, atabus_activate);
542
543 /*****************************************************************************
544 * Common ATA bus operations.
545 *****************************************************************************/
546
547 /* Get the disk's parameters */
548 int
549 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags,
550 struct ataparams *prms)
551 {
552 char tb[DEV_BSIZE];
553 struct ata_command ata_c;
554 struct ata_channel *chp = drvp->chnl_softc;
555 struct atac_softc *atac = chp->ch_atac;
556
557 #if BYTE_ORDER == LITTLE_ENDIAN
558 int i;
559 u_int16_t *p;
560 #endif
561
562 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS);
563
564 memset(tb, 0, DEV_BSIZE);
565 memset(prms, 0, sizeof(struct ataparams));
566 memset(&ata_c, 0, sizeof(struct ata_command));
567
568 if (drvp->drive_flags & DRIVE_ATA) {
569 ata_c.r_command = WDCC_IDENTIFY;
570 ata_c.r_st_bmask = WDCS_DRDY;
571 ata_c.r_st_pmask = 0;
572 ata_c.timeout = 3000; /* 3s */
573 } else if (drvp->drive_flags & DRIVE_ATAPI) {
574 ata_c.r_command = ATAPI_IDENTIFY_DEVICE;
575 ata_c.r_st_bmask = 0;
576 ata_c.r_st_pmask = 0;
577 ata_c.timeout = 10000; /* 10s */
578 } else {
579 ATADEBUG_PRINT(("ata_get_parms: no disks\n"),
580 DEBUG_FUNCS|DEBUG_PROBE);
581 return CMD_ERR;
582 }
583 ata_c.flags = AT_READ | flags;
584 ata_c.data = tb;
585 ata_c.bcount = DEV_BSIZE;
586 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
587 &ata_c) != ATACMD_COMPLETE) {
588 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"),
589 DEBUG_FUNCS|DEBUG_PROBE);
590 return CMD_AGAIN;
591 }
592 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
593 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n",
594 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE);
595 return CMD_ERR;
596 } else {
597 /* if we didn't read any data something is wrong */
598 if ((ata_c.flags & AT_XFDONE) == 0)
599 return CMD_ERR;
600 /* Read in parameter block. */
601 memcpy(prms, tb, sizeof(struct ataparams));
602 #if BYTE_ORDER == LITTLE_ENDIAN
603 /*
604 * Shuffle string byte order.
605 * ATAPI Mitsumi and NEC drives don't need this.
606 */
607 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) ==
608 WDC_CFG_ATAPI &&
609 ((prms->atap_model[0] == 'N' &&
610 prms->atap_model[1] == 'E') ||
611 (prms->atap_model[0] == 'F' &&
612 prms->atap_model[1] == 'X')))
613 return 0;
614 for (i = 0; i < sizeof(prms->atap_model); i += 2) {
615 p = (u_short *)(prms->atap_model + i);
616 *p = ntohs(*p);
617 }
618 for (i = 0; i < sizeof(prms->atap_serial); i += 2) {
619 p = (u_short *)(prms->atap_serial + i);
620 *p = ntohs(*p);
621 }
622 for (i = 0; i < sizeof(prms->atap_revision); i += 2) {
623 p = (u_short *)(prms->atap_revision + i);
624 *p = ntohs(*p);
625 }
626 #endif
627 return CMD_OK;
628 }
629 }
630
631 int
632 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags)
633 {
634 struct ata_command ata_c;
635 struct ata_channel *chp = drvp->chnl_softc;
636 struct atac_softc *atac = chp->ch_atac;
637
638 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS);
639 memset(&ata_c, 0, sizeof(struct ata_command));
640
641 ata_c.r_command = SET_FEATURES;
642 ata_c.r_st_bmask = 0;
643 ata_c.r_st_pmask = 0;
644 ata_c.r_features = WDSF_SET_MODE;
645 ata_c.r_count = mode;
646 ata_c.flags = flags;
647 ata_c.timeout = 1000; /* 1s */
648 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
649 &ata_c) != ATACMD_COMPLETE)
650 return CMD_AGAIN;
651 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
652 return CMD_ERR;
653 }
654 return CMD_OK;
655 }
656
657 void
658 ata_dmaerr(struct ata_drive_datas *drvp, int flags)
659 {
660 /*
661 * Downgrade decision: if we get NERRS_MAX in NXFER.
662 * We start with n_dmaerrs set to NERRS_MAX-1 so that the
663 * first error within the first NXFER ops will immediatly trigger
664 * a downgrade.
665 * If we got an error and n_xfers is bigger than NXFER reset counters.
666 */
667 drvp->n_dmaerrs++;
668 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) {
669 ata_downgrade_mode(drvp, flags);
670 drvp->n_dmaerrs = NERRS_MAX-1;
671 drvp->n_xfers = 0;
672 return;
673 }
674 if (drvp->n_xfers > NXFER) {
675 drvp->n_dmaerrs = 1; /* just got an error */
676 drvp->n_xfers = 1; /* restart counting from this error */
677 }
678 }
679
680 /*
681 * Add a command to the queue and start controller. Must be called at splbio
682 */
683 void
684 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
685 {
686
687 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer,
688 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
689
690 /* complete xfer setup */
691 xfer->c_chp = chp;
692
693 /* insert at the end of command list */
694 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
695 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n",
696 chp->ch_flags), DEBUG_XFERS);
697 atastart(chp);
698 }
699
700 /*
701 * Start I/O on a controller, for the given channel.
702 * The first xfer may be not for our channel if the channel queues
703 * are shared.
704 */
705 void
706 atastart(struct ata_channel *chp)
707 {
708 struct atac_softc *atac = chp->ch_atac;
709 struct ata_xfer *xfer;
710
711 #ifdef WDC_DIAGNOSTIC
712 int spl1, spl2;
713
714 spl1 = splbio();
715 spl2 = splbio();
716 if (spl2 != spl1) {
717 printf("atastart: not at splbio()\n");
718 panic("atastart");
719 }
720 splx(spl2);
721 splx(spl1);
722 #endif /* WDC_DIAGNOSTIC */
723
724 /* is there a xfer ? */
725 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
726 return;
727
728 /* adjust chp, in case we have a shared queue */
729 chp = xfer->c_chp;
730
731 if (chp->ch_queue->active_xfer != NULL) {
732 return; /* channel aleady active */
733 }
734 if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
735 return; /* queue froozen */
736 }
737 #ifdef DIAGNOSTIC
738 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0)
739 panic("atastart: channel waiting for irq");
740 #endif
741 if (atac->atac_claim_hw)
742 if (!(*atac->atac_claim_hw)(chp, 0))
743 return;
744
745 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer,
746 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
747 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
748 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
749 chp->ch_drive[xfer->c_drive].state = 0;
750 }
751 chp->ch_queue->active_xfer = xfer;
752 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
753
754 if (atac->atac_cap & ATAC_CAP_NOIRQ)
755 KASSERT(xfer->c_flags & C_POLL);
756 xfer->c_start(chp, xfer);
757 }
758
759 struct ata_xfer *
760 ata_get_xfer(int flags)
761 {
762 struct ata_xfer *xfer;
763 int s;
764
765 s = splbio();
766 xfer = pool_get(&ata_xfer_pool,
767 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
768 splx(s);
769 if (xfer != NULL) {
770 memset(xfer, 0, sizeof(struct ata_xfer));
771 }
772 return xfer;
773 }
774
775 void
776 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
777 {
778 struct atac_softc *atac = chp->ch_atac;
779 int s;
780
781 if (atac->atac_free_hw)
782 (*atac->atac_free_hw)(chp);
783 s = splbio();
784 pool_put(&ata_xfer_pool, xfer);
785 splx(s);
786 }
787
788 /*
789 * Kill off all pending xfers for a ata_channel.
790 *
791 * Must be called at splbio().
792 */
793 void
794 ata_kill_pending(struct ata_drive_datas *drvp)
795 {
796 struct ata_channel *chp = drvp->chnl_softc;
797 struct ata_xfer *xfer, *next_xfer;
798 int s = splbio();
799
800 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
801 xfer != NULL; xfer = next_xfer) {
802 next_xfer = TAILQ_NEXT(xfer, c_xferchain);
803 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
804 continue;
805 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
806 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
807 }
808
809 while ((xfer = chp->ch_queue->active_xfer) != NULL) {
810 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
811 drvp->drive_flags |= DRIVE_WAITDRAIN;
812 (void) tsleep(&chp->ch_queue->active_xfer,
813 PRIBIO, "atdrn", 0);
814 } else {
815 /* no more xfer for us */
816 break;
817 }
818 }
819 splx(s);
820 }
821
822 int
823 ata_addref(struct ata_channel *chp)
824 {
825 struct atac_softc *atac = chp->ch_atac;
826 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
827 int s, error = 0;
828
829 s = splbio();
830 if (adapt->adapt_refcnt++ == 0 &&
831 adapt->adapt_enable != NULL) {
832 error = (*adapt->adapt_enable)(&atac->atac_dev, 1);
833 if (error)
834 adapt->adapt_refcnt--;
835 }
836 splx(s);
837 return (error);
838 }
839
840 void
841 ata_delref(struct ata_channel *chp)
842 {
843 struct atac_softc *atac = chp->ch_atac;
844 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
845 int s;
846
847 s = splbio();
848 if (adapt->adapt_refcnt-- == 1 &&
849 adapt->adapt_enable != NULL)
850 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0);
851 splx(s);
852 }
853
854 void
855 ata_print_modes(struct ata_channel *chp)
856 {
857 struct atac_softc *atac = chp->ch_atac;
858 int drive;
859 struct ata_drive_datas *drvp;
860
861 for (drive = 0; drive < 2; drive++) {
862 drvp = &chp->ch_drive[drive];
863 if ((drvp->drive_flags & DRIVE) == 0)
864 continue;
865 aprint_normal("%s(%s:%d:%d): using PIO mode %d",
866 drvp->drv_softc->dv_xname,
867 atac->atac_dev.dv_xname,
868 chp->ch_channel, drive, drvp->PIO_mode);
869 if (drvp->drive_flags & DRIVE_DMA)
870 aprint_normal(", DMA mode %d", drvp->DMA_mode);
871 if (drvp->drive_flags & DRIVE_UDMA) {
872 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
873 if (drvp->UDMA_mode == 2)
874 aprint_normal(" (Ultra/33)");
875 else if (drvp->UDMA_mode == 4)
876 aprint_normal(" (Ultra/66)");
877 else if (drvp->UDMA_mode == 5)
878 aprint_normal(" (Ultra/100)");
879 else if (drvp->UDMA_mode == 6)
880 aprint_normal(" (Ultra/133)");
881 }
882 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
883 aprint_normal(" (using DMA data transfers)");
884 aprint_normal("\n");
885 }
886 }
887
888 /*
889 * downgrade the transfer mode of a drive after an error. return 1 if
890 * downgrade was possible, 0 otherwise.
891 */
892 int
893 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags)
894 {
895 struct ata_channel *chp = drvp->chnl_softc;
896 struct atac_softc *atac = chp->ch_atac;
897 struct device *drv_dev = drvp->drv_softc;
898 int cf_flags = drv_dev->dv_cfdata->cf_flags;
899
900 /* if drive or controller don't know its mode, we can't do much */
901 if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
902 (atac->atac_set_modes == NULL))
903 return 0;
904 /* current drive mode was set by a config flag, let it this way */
905 if ((cf_flags & ATA_CONFIG_PIO_SET) ||
906 (cf_flags & ATA_CONFIG_DMA_SET) ||
907 (cf_flags & ATA_CONFIG_UDMA_SET))
908 return 0;
909
910 /*
911 * If we were using Ultra-DMA mode, downgrade to the next lower mode.
912 */
913 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
914 drvp->UDMA_mode--;
915 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
916 drv_dev->dv_xname, drvp->UDMA_mode);
917 }
918
919 /*
920 * If we were using ultra-DMA, don't downgrade to multiword DMA.
921 */
922 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
923 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
924 drvp->PIO_mode = drvp->PIO_cap;
925 printf("%s: transfer error, downgrading to PIO mode %d\n",
926 drv_dev->dv_xname, drvp->PIO_mode);
927 } else /* already using PIO, can't downgrade */
928 return 0;
929
930 (*atac->atac_set_modes)(chp);
931 ata_print_modes(chp);
932 /* reset the channel, which will shedule all drives for setup */
933 wdc_reset_channel(chp, flags | AT_RST_NOCMD);
934 return 1;
935 }
936
937 /*
938 * Probe drive's capabilities, for use by the controller later
939 * Assumes drvp points to an existing drive.
940 */
941 void
942 ata_probe_caps(struct ata_drive_datas *drvp)
943 {
944 struct ataparams params, params2;
945 struct ata_channel *chp = drvp->chnl_softc;
946 struct atac_softc *atac = chp->ch_atac;
947 struct device *drv_dev = drvp->drv_softc;
948 int i, printed;
949 char *sep = "";
950 int cf_flags;
951
952 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
953 /* IDENTIFY failed. Can't tell more about the device */
954 return;
955 }
956 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) ==
957 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) {
958 /*
959 * Controller claims 16 and 32 bit transfers.
960 * Re-do an IDENTIFY with 32-bit transfers,
961 * and compare results.
962 */
963 drvp->drive_flags |= DRIVE_CAP32;
964 ata_get_params(drvp, AT_WAIT, ¶ms2);
965 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
966 /* Not good. fall back to 16bits */
967 drvp->drive_flags &= ~DRIVE_CAP32;
968 } else {
969 aprint_normal("%s: 32-bit data port\n",
970 drv_dev->dv_xname);
971 }
972 }
973 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
974 if (params.atap_ata_major > 0x01 &&
975 params.atap_ata_major != 0xffff) {
976 for (i = 14; i > 0; i--) {
977 if (params.atap_ata_major & (1 << i)) {
978 aprint_normal("%s: ATA version %d\n",
979 drv_dev->dv_xname, i);
980 drvp->ata_vers = i;
981 break;
982 }
983 }
984 }
985 #endif
986
987 /* An ATAPI device is at last PIO mode 3 */
988 if (drvp->drive_flags & DRIVE_ATAPI)
989 drvp->PIO_mode = 3;
990
991 /*
992 * It's not in the specs, but it seems that some drive
993 * returns 0xffff in atap_extensions when this field is invalid
994 */
995 if (params.atap_extensions != 0xffff &&
996 (params.atap_extensions & WDC_EXT_MODES)) {
997 printed = 0;
998 /*
999 * XXX some drives report something wrong here (they claim to
1000 * support PIO mode 8 !). As mode is coded on 3 bits in
1001 * SET FEATURE, limit it to 7 (so limit i to 4).
1002 * If higher mode than 7 is found, abort.
1003 */
1004 for (i = 7; i >= 0; i--) {
1005 if ((params.atap_piomode_supp & (1 << i)) == 0)
1006 continue;
1007 if (i > 4)
1008 return;
1009 /*
1010 * See if mode is accepted.
1011 * If the controller can't set its PIO mode,
1012 * assume the defaults are good, so don't try
1013 * to set it
1014 */
1015 if (atac->atac_set_modes)
1016 /*
1017 * It's OK to pool here, it's fast enouth
1018 * to not bother waiting for interrupt
1019 */
1020 if (ata_set_mode(drvp, 0x08 | (i + 3),
1021 AT_WAIT) != CMD_OK)
1022 continue;
1023 if (!printed) {
1024 aprint_normal("%s: drive supports PIO mode %d",
1025 drv_dev->dv_xname, i + 3);
1026 sep = ",";
1027 printed = 1;
1028 }
1029 /*
1030 * If controller's driver can't set its PIO mode,
1031 * get the highter one for the drive.
1032 */
1033 if (atac->atac_set_modes == NULL ||
1034 atac->atac_pio_cap >= i + 3) {
1035 drvp->PIO_mode = i + 3;
1036 drvp->PIO_cap = i + 3;
1037 break;
1038 }
1039 }
1040 if (!printed) {
1041 /*
1042 * We didn't find a valid PIO mode.
1043 * Assume the values returned for DMA are buggy too
1044 */
1045 return;
1046 }
1047 drvp->drive_flags |= DRIVE_MODE;
1048 printed = 0;
1049 for (i = 7; i >= 0; i--) {
1050 if ((params.atap_dmamode_supp & (1 << i)) == 0)
1051 continue;
1052 if ((atac->atac_cap & ATAC_CAP_DMA) &&
1053 atac->atac_set_modes != NULL)
1054 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
1055 != CMD_OK)
1056 continue;
1057 if (!printed) {
1058 aprint_normal("%s DMA mode %d", sep, i);
1059 sep = ",";
1060 printed = 1;
1061 }
1062 if (atac->atac_cap & ATAC_CAP_DMA) {
1063 if (atac->atac_set_modes != NULL &&
1064 atac->atac_dma_cap < i)
1065 continue;
1066 drvp->DMA_mode = i;
1067 drvp->DMA_cap = i;
1068 drvp->drive_flags |= DRIVE_DMA;
1069 }
1070 break;
1071 }
1072 if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
1073 printed = 0;
1074 for (i = 7; i >= 0; i--) {
1075 if ((params.atap_udmamode_supp & (1 << i))
1076 == 0)
1077 continue;
1078 if (atac->atac_set_modes != NULL &&
1079 (atac->atac_cap & ATAC_CAP_UDMA))
1080 if (ata_set_mode(drvp, 0x40 | i,
1081 AT_WAIT) != CMD_OK)
1082 continue;
1083 if (!printed) {
1084 aprint_normal("%s Ultra-DMA mode %d",
1085 sep, i);
1086 if (i == 2)
1087 aprint_normal(" (Ultra/33)");
1088 else if (i == 4)
1089 aprint_normal(" (Ultra/66)");
1090 else if (i == 5)
1091 aprint_normal(" (Ultra/100)");
1092 else if (i == 6)
1093 aprint_normal(" (Ultra/133)");
1094 sep = ",";
1095 printed = 1;
1096 }
1097 if (atac->atac_cap & ATAC_CAP_UDMA) {
1098 if (atac->atac_set_modes != NULL &&
1099 atac->atac_udma_cap < i)
1100 continue;
1101 drvp->UDMA_mode = i;
1102 drvp->UDMA_cap = i;
1103 drvp->drive_flags |= DRIVE_UDMA;
1104 }
1105 break;
1106 }
1107 }
1108 aprint_normal("\n");
1109 }
1110
1111 drvp->drive_flags &= ~DRIVE_NOSTREAM;
1112 if (drvp->drive_flags & DRIVE_ATAPI) {
1113 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM)
1114 drvp->drive_flags |= DRIVE_NOSTREAM;
1115 } else {
1116 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM)
1117 drvp->drive_flags |= DRIVE_NOSTREAM;
1118 }
1119
1120 /* Try to guess ATA version here, if it didn't get reported */
1121 if (drvp->ata_vers == 0) {
1122 if (drvp->drive_flags & DRIVE_UDMA)
1123 drvp->ata_vers = 4; /* should be at last ATA-4 */
1124 else if (drvp->PIO_cap > 2)
1125 drvp->ata_vers = 2; /* should be at last ATA-2 */
1126 }
1127 cf_flags = drv_dev->dv_cfdata->cf_flags;
1128 if (cf_flags & ATA_CONFIG_PIO_SET) {
1129 drvp->PIO_mode =
1130 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
1131 drvp->drive_flags |= DRIVE_MODE;
1132 }
1133 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) {
1134 /* don't care about DMA modes */
1135 return;
1136 }
1137 if (cf_flags & ATA_CONFIG_DMA_SET) {
1138 if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
1139 ATA_CONFIG_DMA_DISABLE) {
1140 drvp->drive_flags &= ~DRIVE_DMA;
1141 } else {
1142 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
1143 ATA_CONFIG_DMA_OFF;
1144 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
1145 }
1146 }
1147 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) {
1148 /* don't care about UDMA modes */
1149 return;
1150 }
1151 if (cf_flags & ATA_CONFIG_UDMA_SET) {
1152 if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
1153 ATA_CONFIG_UDMA_DISABLE) {
1154 drvp->drive_flags &= ~DRIVE_UDMA;
1155 } else {
1156 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
1157 ATA_CONFIG_UDMA_OFF;
1158 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
1159 }
1160 }
1161 }
1162
1163 /* management of the /dev/atabus* devices */
1164 int atabusopen(dev, flag, fmt, p)
1165 dev_t dev;
1166 int flag, fmt;
1167 struct proc *p;
1168 {
1169 struct atabus_softc *sc;
1170 int error, unit = minor(dev);
1171
1172 if (unit >= atabus_cd.cd_ndevs ||
1173 (sc = atabus_cd.cd_devs[unit]) == NULL)
1174 return (ENXIO);
1175
1176 if (sc->sc_flags & ATABUSCF_OPEN)
1177 return (EBUSY);
1178
1179 if ((error = ata_addref(sc->sc_chan)) != 0)
1180 return (error);
1181
1182 sc->sc_flags |= ATABUSCF_OPEN;
1183
1184 return (0);
1185 }
1186
1187
1188 int
1189 atabusclose(dev, flag, fmt, p)
1190 dev_t dev;
1191 int flag, fmt;
1192 struct proc *p;
1193 {
1194 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1195
1196 ata_delref(sc->sc_chan);
1197
1198 sc->sc_flags &= ~ATABUSCF_OPEN;
1199
1200 return (0);
1201 }
1202
1203 int
1204 atabusioctl(dev, cmd, addr, flag, p)
1205 dev_t dev;
1206 u_long cmd;
1207 caddr_t addr;
1208 int flag;
1209 struct proc *p;
1210 {
1211 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1212 struct ata_channel *chp = sc->sc_chan;
1213 int min_drive, max_drive, drive;
1214 int error;
1215 int s;
1216
1217 /*
1218 * Enforce write permission for ioctls that change the
1219 * state of the bus. Host adapter specific ioctls must
1220 * be checked by the adapter driver.
1221 */
1222 switch (cmd) {
1223 case ATABUSIOSCAN:
1224 case ATABUSIODETACH:
1225 case ATABUSIORESET:
1226 if ((flag & FWRITE) == 0)
1227 return (EBADF);
1228 }
1229
1230 switch (cmd) {
1231 case ATABUSIORESET:
1232 s = splbio();
1233 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL);
1234 splx(s);
1235 error = 0;
1236 break;
1237 case ATABUSIOSCAN:
1238 {
1239 #if 0
1240 struct atabusioscan_args *a=
1241 (struct atabusioscan_args *)addr;
1242 #endif
1243 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1244 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1245 return (EOPNOTSUPP);
1246 return (EOPNOTSUPP);
1247 }
1248 case ATABUSIODETACH:
1249 {
1250 struct atabusioscan_args *a=
1251 (struct atabusioscan_args *)addr;
1252 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1253 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1254 return (EOPNOTSUPP);
1255 switch (a->at_dev) {
1256 case -1:
1257 min_drive = 0;
1258 max_drive = 1;
1259 break;
1260 case 0:
1261 case 1:
1262 min_drive = max_drive = a->at_dev;
1263 break;
1264 default:
1265 return (EINVAL);
1266 }
1267 for (drive = min_drive; drive <= max_drive; drive++) {
1268 if (chp->ch_drive[drive].drv_softc != NULL) {
1269 error = config_detach(
1270 chp->ch_drive[drive].drv_softc, 0);
1271 if (error)
1272 return (error);
1273 chp->ch_drive[drive].drv_softc = NULL;
1274 }
1275 }
1276 error = 0;
1277 break;
1278 }
1279 default:
1280 error = ENOTTY;
1281 }
1282 return (error);
1283 };
1284