ata.c revision 1.54 1 /* $NetBSD: ata.c,v 1.54 2004/08/20 22:26:23 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.54 2004/08/20 22:26:23 thorpej Exp $");
34
35 #ifndef ATADEBUG
36 #define ATADEBUG
37 #endif /* ATADEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/device.h>
44 #include <sys/conf.h>
45 #include <sys/fcntl.h>
46 #include <sys/proc.h>
47 #include <sys/pool.h>
48 #include <sys/kthread.h>
49 #include <sys/errno.h>
50 #include <sys/ataio.h>
51
52 #include <machine/intr.h>
53 #include <machine/bus.h>
54
55 #include <dev/ata/atareg.h>
56 #include <dev/ata/atavar.h>
57 #include <dev/ic/wdcvar.h>
58
59 #include "locators.h"
60
61 #include "atapibus.h"
62 #include "ataraid.h"
63
64 #if NATARAID > 0
65 #include <dev/ata/ata_raidvar.h>
66 #endif
67
68 #define DEBUG_FUNCS 0x08
69 #define DEBUG_PROBE 0x10
70 #define DEBUG_DETACH 0x20
71 #define DEBUG_XFERS 0x40
72 #ifdef ATADEBUG
73 int atadebug_mask = 0;
74 #define ATADEBUG_PRINT(args, level) \
75 if (atadebug_mask & (level)) \
76 printf args
77 #else
78 #define ATADEBUG_PRINT(args, level)
79 #endif
80
81 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL);
82
83 /*
84 * A queue of atabus instances, used to ensure the same bus probe order
85 * for a given hardware configuration at each boot.
86 */
87 struct atabus_initq_head atabus_initq_head =
88 TAILQ_HEAD_INITIALIZER(atabus_initq_head);
89 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER;
90
91 /*****************************************************************************
92 * ATA bus layer.
93 *
94 * ATA controllers attach an atabus instance, which handles probing the bus
95 * for drives, etc.
96 *****************************************************************************/
97
98 dev_type_open(atabusopen);
99 dev_type_close(atabusclose);
100 dev_type_ioctl(atabusioctl);
101
102 const struct cdevsw atabus_cdevsw = {
103 atabusopen, atabusclose, noread, nowrite, atabusioctl,
104 nostop, notty, nopoll, nommap, nokqfilter,
105 };
106
107 extern struct cfdriver atabus_cd;
108
109
110 /*
111 * atabusprint:
112 *
113 * Autoconfiguration print routine used by ATA controllers when
114 * attaching an atabus instance.
115 */
116 int
117 atabusprint(void *aux, const char *pnp)
118 {
119 struct ata_channel *chan = aux;
120
121 if (pnp)
122 aprint_normal("atabus at %s", pnp);
123 aprint_normal(" channel %d", chan->ch_channel);
124
125 return (UNCONF);
126 }
127
128 /*
129 * ataprint:
130 *
131 * Autoconfiguration print routine.
132 */
133 int
134 ataprint(void *aux, const char *pnp)
135 {
136 struct ata_device *adev = aux;
137
138 if (pnp)
139 aprint_normal("wd at %s", pnp);
140 aprint_normal(" drive %d", adev->adev_drv_data->drive);
141
142 return (UNCONF);
143 }
144
145 /*
146 * ata_channel_attach:
147 *
148 * Common parts of attaching an atabus to an ATA controller channel.
149 */
150 void
151 ata_channel_attach(struct ata_channel *chp)
152 {
153
154 if (chp->ch_flags & ATACH_DISABLED)
155 return;
156
157 callout_init(&chp->ch_callout);
158
159 TAILQ_INIT(&chp->ch_queue->queue_xfer);
160 chp->ch_queue->queue_freeze = 0;
161 chp->ch_queue->active_xfer = NULL;
162
163 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint);
164 }
165
166 static void
167 atabusconfig(struct atabus_softc *atabus_sc)
168 {
169 struct ata_channel *chp = atabus_sc->sc_chan;
170 struct atac_softc *atac = chp->ch_atac;
171 int i;
172 struct atabus_initq *atabus_initq = NULL;
173
174 /* Probe for the drives. */
175 (*atac->atac_probe)(chp);
176
177 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n",
178 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
179 DEBUG_PROBE);
180
181 /* If no drives, abort here */
182 for (i = 0; i < chp->ch_ndrive; i++)
183 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0)
184 break;
185 if (i == chp->ch_ndrive)
186 goto out;
187
188 /* Shortcut in case we've been shutdown */
189 if (chp->ch_flags & ATACH_SHUTDOWN)
190 goto out;
191
192 /* Make sure the devices probe in atabus order to avoid jitter. */
193 simple_lock(&atabus_interlock);
194 while(1) {
195 atabus_initq = TAILQ_FIRST(&atabus_initq_head);
196 if (atabus_initq->atabus_sc == atabus_sc)
197 break;
198 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
199 &atabus_interlock);
200 }
201 simple_unlock(&atabus_interlock);
202
203 /*
204 * Attach an ATAPI bus, if needed.
205 */
206 for (i = 0; i < chp->ch_ndrive; i++) {
207 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) {
208 #if NATAPIBUS > 0
209 (*atac->atac_atapibus_attach)(atabus_sc);
210 #else
211 /*
212 * Fake the autoconfig "not configured" message
213 */
214 aprint_normal("atapibus at %s not configured\n",
215 atac->atac_dev.dv_xname);
216 chp->atapibus = NULL;
217 for (i = 0; i < chp->ch_ndrive; i++)
218 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI;
219 #endif
220 break;
221 }
222 }
223
224 for (i = 0; i < chp->ch_ndrive; i++) {
225 struct ata_device adev;
226 if ((chp->ch_drive[i].drive_flags &
227 (DRIVE_ATA | DRIVE_OLD)) == 0) {
228 continue;
229 }
230 memset(&adev, 0, sizeof(struct ata_device));
231 adev.adev_bustype = atac->atac_bustype_ata;
232 adev.adev_channel = chp->ch_channel;
233 adev.adev_openings = 1;
234 adev.adev_drv_data = &chp->ch_drive[i];
235 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev,
236 &adev, ataprint);
237 if (chp->ata_drives[i] != NULL)
238 ata_probe_caps(&chp->ch_drive[i]);
239 else
240 chp->ch_drive[i].drive_flags &=
241 ~(DRIVE_ATA | DRIVE_OLD);
242 }
243
244 /* now that we know the drives, the controller can set its modes */
245 if (atac->atac_set_modes) {
246 (*atac->atac_set_modes)(chp);
247 ata_print_modes(chp);
248 }
249 #if NATARAID > 0
250 if (atac->atac_cap & ATAC_CAP_RAID)
251 for (i = 0; i < chp->ch_ndrive; i++)
252 if (chp->ata_drives[i] != NULL)
253 ata_raid_check_component(chp->ata_drives[i]);
254 #endif /* NATARAID > 0 */
255
256 /*
257 * reset drive_flags for unattached devices, reset state for attached
258 * ones
259 */
260 for (i = 0; i < chp->ch_ndrive; i++) {
261 if (chp->ch_drive[i].drv_softc == NULL)
262 chp->ch_drive[i].drive_flags = 0;
263 else
264 chp->ch_drive[i].state = 0;
265 }
266
267 out:
268 if (atabus_initq == NULL) {
269 simple_lock(&atabus_interlock);
270 while(1) {
271 atabus_initq = TAILQ_FIRST(&atabus_initq_head);
272 if (atabus_initq->atabus_sc == atabus_sc)
273 break;
274 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
275 &atabus_interlock);
276 }
277 simple_unlock(&atabus_interlock);
278 }
279 simple_lock(&atabus_interlock);
280 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq);
281 simple_unlock(&atabus_interlock);
282
283 free(atabus_initq, M_DEVBUF);
284 wakeup(&atabus_initq_head);
285
286 ata_delref(chp);
287
288 config_pending_decr();
289 }
290
291 /*
292 * atabus_thread:
293 *
294 * Worker thread for the ATA bus.
295 */
296 static void
297 atabus_thread(void *arg)
298 {
299 struct atabus_softc *sc = arg;
300 struct ata_channel *chp = sc->sc_chan;
301 struct ata_xfer *xfer;
302 int i, s;
303
304 s = splbio();
305 chp->ch_flags |= ATACH_TH_RUN;
306
307 /*
308 * Probe the drives. Reset all flags to 0 to indicate to controllers
309 * that can re-probe that all drives must be probed..
310 *
311 * Note: ch_ndrive may be changed during the probe.
312 */
313 for (i = 0; i < ATA_MAXDRIVES; i++)
314 chp->ch_drive[i].drive_flags = 0;
315 splx(s);
316
317 /* Configure the devices on the bus. */
318 atabusconfig(sc);
319
320 for (;;) {
321 s = splbio();
322 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 &&
323 (chp->ch_queue->active_xfer == NULL ||
324 chp->ch_queue->queue_freeze == 0)) {
325 chp->ch_flags &= ~ATACH_TH_RUN;
326 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0);
327 chp->ch_flags |= ATACH_TH_RUN;
328 }
329 splx(s);
330 if (chp->ch_flags & ATACH_SHUTDOWN)
331 break;
332 s = splbio();
333 if (chp->ch_flags & ATACH_TH_RESET) {
334 /*
335 * wdc_reset_channel() will freeze 2 times, so
336 * unfreeze one time. Not a problem as we're at splbio
337 */
338 chp->ch_queue->queue_freeze--;
339 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags);
340 } else if (chp->ch_queue->active_xfer != NULL &&
341 chp->ch_queue->queue_freeze == 1) {
342 /*
343 * Caller has bumped queue_freeze, decrease it.
344 */
345 chp->ch_queue->queue_freeze--;
346 xfer = chp->ch_queue->active_xfer;
347 KASSERT(xfer != NULL);
348 (*xfer->c_start)(chp, xfer);
349 } else if (chp->ch_queue->queue_freeze > 1)
350 panic("ata_thread: queue_freeze");
351 splx(s);
352 }
353 chp->ch_thread = NULL;
354 wakeup((void *)&chp->ch_flags);
355 kthread_exit(0);
356 }
357
358 /*
359 * atabus_create_thread:
360 *
361 * Helper routine to create the ATA bus worker thread.
362 */
363 static void
364 atabus_create_thread(void *arg)
365 {
366 struct atabus_softc *sc = arg;
367 struct ata_channel *chp = sc->sc_chan;
368 int error;
369
370 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread,
371 "%s", sc->sc_dev.dv_xname)) != 0)
372 aprint_error("%s: unable to create kernel thread: error %d\n",
373 sc->sc_dev.dv_xname, error);
374 }
375
376 /*
377 * atabus_match:
378 *
379 * Autoconfiguration match routine.
380 */
381 static int
382 atabus_match(struct device *parent, struct cfdata *cf, void *aux)
383 {
384 struct ata_channel *chp = aux;
385
386 if (chp == NULL)
387 return (0);
388
389 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel &&
390 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT)
391 return (0);
392
393 return (1);
394 }
395
396 /*
397 * atabus_attach:
398 *
399 * Autoconfiguration attach routine.
400 */
401 static void
402 atabus_attach(struct device *parent, struct device *self, void *aux)
403 {
404 struct atabus_softc *sc = (void *) self;
405 struct ata_channel *chp = aux;
406 struct atabus_initq *initq;
407
408 sc->sc_chan = chp;
409
410 aprint_normal("\n");
411 aprint_naive("\n");
412
413 if (ata_addref(chp))
414 return;
415
416 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK);
417 initq->atabus_sc = sc;
418 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq);
419 config_pending_incr();
420 kthread_create(atabus_create_thread, sc);
421 }
422
423 /*
424 * atabus_activate:
425 *
426 * Autoconfiguration activation routine.
427 */
428 static int
429 atabus_activate(struct device *self, enum devact act)
430 {
431 struct atabus_softc *sc = (void *) self;
432 struct ata_channel *chp = sc->sc_chan;
433 struct device *dev = NULL;
434 int s, i, error = 0;
435
436 s = splbio();
437 switch (act) {
438 case DVACT_ACTIVATE:
439 error = EOPNOTSUPP;
440 break;
441
442 case DVACT_DEACTIVATE:
443 /*
444 * We might deactivate the children of atapibus twice
445 * (once bia atapibus, once directly), but since the
446 * generic autoconfiguration code maintains the DVF_ACTIVE
447 * flag, it's safe.
448 */
449 if ((dev = chp->atapibus) != NULL) {
450 error = config_deactivate(dev);
451 if (error)
452 goto out;
453 }
454
455 for (i = 0; i < chp->ch_ndrive; i++) {
456 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
457 ATADEBUG_PRINT(("atabus_activate: %s: "
458 "deactivating %s\n", sc->sc_dev.dv_xname,
459 dev->dv_xname),
460 DEBUG_DETACH);
461 error = config_deactivate(dev);
462 if (error)
463 goto out;
464 }
465 }
466 break;
467 }
468 out:
469 splx(s);
470
471 #ifdef ATADEBUG
472 if (dev != NULL && error != 0)
473 ATADEBUG_PRINT(("atabus_activate: %s: "
474 "error %d deactivating %s\n", sc->sc_dev.dv_xname,
475 error, dev->dv_xname), DEBUG_DETACH);
476 #endif /* ATADEBUG */
477
478 return (error);
479 }
480
481 /*
482 * atabus_detach:
483 *
484 * Autoconfiguration detach routine.
485 */
486 static int
487 atabus_detach(struct device *self, int flags)
488 {
489 struct atabus_softc *sc = (void *) self;
490 struct ata_channel *chp = sc->sc_chan;
491 struct device *dev = NULL;
492 int i, error = 0;
493
494 /* Shutdown the channel. */
495 /* XXX NEED AN INTERLOCK HERE. */
496 chp->ch_flags |= ATACH_SHUTDOWN;
497 wakeup(&chp->ch_thread);
498 while (chp->ch_thread != NULL)
499 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0);
500
501 /*
502 * Detach atapibus and its children.
503 */
504 if ((dev = chp->atapibus) != NULL) {
505 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
506 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH);
507 error = config_detach(dev, flags);
508 if (error)
509 goto out;
510 }
511
512 /*
513 * Detach our other children.
514 */
515 for (i = 0; i < chp->ch_ndrive; i++) {
516 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
517 continue;
518 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
519 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
520 sc->sc_dev.dv_xname, dev->dv_xname),
521 DEBUG_DETACH);
522 error = config_detach(dev, flags);
523 if (error)
524 goto out;
525 }
526 }
527
528 out:
529 #ifdef ATADEBUG
530 if (dev != NULL && error != 0)
531 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n",
532 sc->sc_dev.dv_xname, error, dev->dv_xname),
533 DEBUG_DETACH);
534 #endif /* ATADEBUG */
535
536 return (error);
537 }
538
539 CFATTACH_DECL(atabus, sizeof(struct atabus_softc),
540 atabus_match, atabus_attach, atabus_detach, atabus_activate);
541
542 /*****************************************************************************
543 * Common ATA bus operations.
544 *****************************************************************************/
545
546 /* Get the disk's parameters */
547 int
548 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags,
549 struct ataparams *prms)
550 {
551 char tb[DEV_BSIZE];
552 struct ata_command ata_c;
553 struct ata_channel *chp = drvp->chnl_softc;
554 struct atac_softc *atac = chp->ch_atac;
555
556 #if BYTE_ORDER == LITTLE_ENDIAN
557 int i;
558 u_int16_t *p;
559 #endif
560
561 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS);
562
563 memset(tb, 0, DEV_BSIZE);
564 memset(prms, 0, sizeof(struct ataparams));
565 memset(&ata_c, 0, sizeof(struct ata_command));
566
567 if (drvp->drive_flags & DRIVE_ATA) {
568 ata_c.r_command = WDCC_IDENTIFY;
569 ata_c.r_st_bmask = WDCS_DRDY;
570 ata_c.r_st_pmask = 0;
571 ata_c.timeout = 3000; /* 3s */
572 } else if (drvp->drive_flags & DRIVE_ATAPI) {
573 ata_c.r_command = ATAPI_IDENTIFY_DEVICE;
574 ata_c.r_st_bmask = 0;
575 ata_c.r_st_pmask = 0;
576 ata_c.timeout = 10000; /* 10s */
577 } else {
578 ATADEBUG_PRINT(("ata_get_parms: no disks\n"),
579 DEBUG_FUNCS|DEBUG_PROBE);
580 return CMD_ERR;
581 }
582 ata_c.flags = AT_READ | flags;
583 ata_c.data = tb;
584 ata_c.bcount = DEV_BSIZE;
585 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
586 &ata_c) != ATACMD_COMPLETE) {
587 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"),
588 DEBUG_FUNCS|DEBUG_PROBE);
589 return CMD_AGAIN;
590 }
591 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
592 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n",
593 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE);
594 return CMD_ERR;
595 } else {
596 /* if we didn't read any data something is wrong */
597 if ((ata_c.flags & AT_XFDONE) == 0)
598 return CMD_ERR;
599 /* Read in parameter block. */
600 memcpy(prms, tb, sizeof(struct ataparams));
601 #if BYTE_ORDER == LITTLE_ENDIAN
602 /*
603 * Shuffle string byte order.
604 * ATAPI Mitsumi and NEC drives don't need this.
605 */
606 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) ==
607 WDC_CFG_ATAPI &&
608 ((prms->atap_model[0] == 'N' &&
609 prms->atap_model[1] == 'E') ||
610 (prms->atap_model[0] == 'F' &&
611 prms->atap_model[1] == 'X')))
612 return 0;
613 for (i = 0; i < sizeof(prms->atap_model); i += 2) {
614 p = (u_short *)(prms->atap_model + i);
615 *p = ntohs(*p);
616 }
617 for (i = 0; i < sizeof(prms->atap_serial); i += 2) {
618 p = (u_short *)(prms->atap_serial + i);
619 *p = ntohs(*p);
620 }
621 for (i = 0; i < sizeof(prms->atap_revision); i += 2) {
622 p = (u_short *)(prms->atap_revision + i);
623 *p = ntohs(*p);
624 }
625 #endif
626 return CMD_OK;
627 }
628 }
629
630 int
631 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags)
632 {
633 struct ata_command ata_c;
634 struct ata_channel *chp = drvp->chnl_softc;
635 struct atac_softc *atac = chp->ch_atac;
636
637 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS);
638 memset(&ata_c, 0, sizeof(struct ata_command));
639
640 ata_c.r_command = SET_FEATURES;
641 ata_c.r_st_bmask = 0;
642 ata_c.r_st_pmask = 0;
643 ata_c.r_features = WDSF_SET_MODE;
644 ata_c.r_count = mode;
645 ata_c.flags = flags;
646 ata_c.timeout = 1000; /* 1s */
647 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
648 &ata_c) != ATACMD_COMPLETE)
649 return CMD_AGAIN;
650 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
651 return CMD_ERR;
652 }
653 return CMD_OK;
654 }
655
656 void
657 ata_dmaerr(struct ata_drive_datas *drvp, int flags)
658 {
659 /*
660 * Downgrade decision: if we get NERRS_MAX in NXFER.
661 * We start with n_dmaerrs set to NERRS_MAX-1 so that the
662 * first error within the first NXFER ops will immediatly trigger
663 * a downgrade.
664 * If we got an error and n_xfers is bigger than NXFER reset counters.
665 */
666 drvp->n_dmaerrs++;
667 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) {
668 ata_downgrade_mode(drvp, flags);
669 drvp->n_dmaerrs = NERRS_MAX-1;
670 drvp->n_xfers = 0;
671 return;
672 }
673 if (drvp->n_xfers > NXFER) {
674 drvp->n_dmaerrs = 1; /* just got an error */
675 drvp->n_xfers = 1; /* restart counting from this error */
676 }
677 }
678
679 /*
680 * Add a command to the queue and start controller. Must be called at splbio
681 */
682 void
683 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
684 {
685
686 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer,
687 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
688
689 /* complete xfer setup */
690 xfer->c_chp = chp;
691
692 /* insert at the end of command list */
693 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
694 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n",
695 chp->ch_flags), DEBUG_XFERS);
696 atastart(chp);
697 }
698
699 /*
700 * Start I/O on a controller, for the given channel.
701 * The first xfer may be not for our channel if the channel queues
702 * are shared.
703 */
704 void
705 atastart(struct ata_channel *chp)
706 {
707 struct atac_softc *atac = chp->ch_atac;
708 struct ata_xfer *xfer;
709
710 #ifdef WDC_DIAGNOSTIC
711 int spl1, spl2;
712
713 spl1 = splbio();
714 spl2 = splbio();
715 if (spl2 != spl1) {
716 printf("atastart: not at splbio()\n");
717 panic("atastart");
718 }
719 splx(spl2);
720 splx(spl1);
721 #endif /* WDC_DIAGNOSTIC */
722
723 /* is there a xfer ? */
724 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
725 return;
726
727 /* adjust chp, in case we have a shared queue */
728 chp = xfer->c_chp;
729
730 if (chp->ch_queue->active_xfer != NULL) {
731 return; /* channel aleady active */
732 }
733 if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
734 return; /* queue froozen */
735 }
736 #ifdef DIAGNOSTIC
737 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0)
738 panic("atastart: channel waiting for irq");
739 #endif
740 if (atac->atac_claim_hw)
741 if (!(*atac->atac_claim_hw)(chp, 0))
742 return;
743
744 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer,
745 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
746 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
747 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
748 chp->ch_drive[xfer->c_drive].state = 0;
749 }
750 chp->ch_queue->active_xfer = xfer;
751 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
752
753 if (atac->atac_cap & ATAC_CAP_NOIRQ)
754 KASSERT(xfer->c_flags & C_POLL);
755 xfer->c_start(chp, xfer);
756 }
757
758 struct ata_xfer *
759 ata_get_xfer(int flags)
760 {
761 struct ata_xfer *xfer;
762 int s;
763
764 s = splbio();
765 xfer = pool_get(&ata_xfer_pool,
766 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
767 splx(s);
768 if (xfer != NULL) {
769 memset(xfer, 0, sizeof(struct ata_xfer));
770 }
771 return xfer;
772 }
773
774 void
775 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
776 {
777 struct atac_softc *atac = chp->ch_atac;
778 int s;
779
780 if (atac->atac_free_hw)
781 (*atac->atac_free_hw)(chp);
782 s = splbio();
783 pool_put(&ata_xfer_pool, xfer);
784 splx(s);
785 }
786
787 /*
788 * Kill off all pending xfers for a ata_channel.
789 *
790 * Must be called at splbio().
791 */
792 void
793 ata_kill_pending(struct ata_drive_datas *drvp)
794 {
795 struct ata_channel *chp = drvp->chnl_softc;
796 struct ata_xfer *xfer, *next_xfer;
797 int s = splbio();
798
799 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
800 xfer != NULL; xfer = next_xfer) {
801 next_xfer = TAILQ_NEXT(xfer, c_xferchain);
802 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
803 continue;
804 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
805 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
806 }
807
808 while ((xfer = chp->ch_queue->active_xfer) != NULL) {
809 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
810 drvp->drive_flags |= DRIVE_WAITDRAIN;
811 (void) tsleep(&chp->ch_queue->active_xfer,
812 PRIBIO, "atdrn", 0);
813 } else {
814 /* no more xfer for us */
815 break;
816 }
817 }
818 splx(s);
819 }
820
821 int
822 ata_addref(struct ata_channel *chp)
823 {
824 struct atac_softc *atac = chp->ch_atac;
825 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
826 int s, error = 0;
827
828 s = splbio();
829 if (adapt->adapt_refcnt++ == 0 &&
830 adapt->adapt_enable != NULL) {
831 error = (*adapt->adapt_enable)(&atac->atac_dev, 1);
832 if (error)
833 adapt->adapt_refcnt--;
834 }
835 splx(s);
836 return (error);
837 }
838
839 void
840 ata_delref(struct ata_channel *chp)
841 {
842 struct atac_softc *atac = chp->ch_atac;
843 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
844 int s;
845
846 s = splbio();
847 if (adapt->adapt_refcnt-- == 1 &&
848 adapt->adapt_enable != NULL)
849 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0);
850 splx(s);
851 }
852
853 void
854 ata_print_modes(struct ata_channel *chp)
855 {
856 struct atac_softc *atac = chp->ch_atac;
857 int drive;
858 struct ata_drive_datas *drvp;
859
860 for (drive = 0; drive < 2; drive++) {
861 drvp = &chp->ch_drive[drive];
862 if ((drvp->drive_flags & DRIVE) == 0)
863 continue;
864 aprint_normal("%s(%s:%d:%d): using PIO mode %d",
865 drvp->drv_softc->dv_xname,
866 atac->atac_dev.dv_xname,
867 chp->ch_channel, drive, drvp->PIO_mode);
868 if (drvp->drive_flags & DRIVE_DMA)
869 aprint_normal(", DMA mode %d", drvp->DMA_mode);
870 if (drvp->drive_flags & DRIVE_UDMA) {
871 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
872 if (drvp->UDMA_mode == 2)
873 aprint_normal(" (Ultra/33)");
874 else if (drvp->UDMA_mode == 4)
875 aprint_normal(" (Ultra/66)");
876 else if (drvp->UDMA_mode == 5)
877 aprint_normal(" (Ultra/100)");
878 else if (drvp->UDMA_mode == 6)
879 aprint_normal(" (Ultra/133)");
880 }
881 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
882 aprint_normal(" (using DMA data transfers)");
883 aprint_normal("\n");
884 }
885 }
886
887 /*
888 * downgrade the transfer mode of a drive after an error. return 1 if
889 * downgrade was possible, 0 otherwise.
890 */
891 int
892 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags)
893 {
894 struct ata_channel *chp = drvp->chnl_softc;
895 struct atac_softc *atac = chp->ch_atac;
896 struct device *drv_dev = drvp->drv_softc;
897 int cf_flags = drv_dev->dv_cfdata->cf_flags;
898
899 /* if drive or controller don't know its mode, we can't do much */
900 if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
901 (atac->atac_set_modes == NULL))
902 return 0;
903 /* current drive mode was set by a config flag, let it this way */
904 if ((cf_flags & ATA_CONFIG_PIO_SET) ||
905 (cf_flags & ATA_CONFIG_DMA_SET) ||
906 (cf_flags & ATA_CONFIG_UDMA_SET))
907 return 0;
908
909 /*
910 * If we were using Ultra-DMA mode, downgrade to the next lower mode.
911 */
912 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
913 drvp->UDMA_mode--;
914 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
915 drv_dev->dv_xname, drvp->UDMA_mode);
916 }
917
918 /*
919 * If we were using ultra-DMA, don't downgrade to multiword DMA.
920 */
921 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
922 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
923 drvp->PIO_mode = drvp->PIO_cap;
924 printf("%s: transfer error, downgrading to PIO mode %d\n",
925 drv_dev->dv_xname, drvp->PIO_mode);
926 } else /* already using PIO, can't downgrade */
927 return 0;
928
929 (*atac->atac_set_modes)(chp);
930 ata_print_modes(chp);
931 /* reset the channel, which will shedule all drives for setup */
932 wdc_reset_channel(chp, flags | AT_RST_NOCMD);
933 return 1;
934 }
935
936 /*
937 * Probe drive's capabilities, for use by the controller later
938 * Assumes drvp points to an existing drive.
939 */
940 void
941 ata_probe_caps(struct ata_drive_datas *drvp)
942 {
943 struct ataparams params, params2;
944 struct ata_channel *chp = drvp->chnl_softc;
945 struct atac_softc *atac = chp->ch_atac;
946 struct device *drv_dev = drvp->drv_softc;
947 int i, printed;
948 char *sep = "";
949 int cf_flags;
950
951 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
952 /* IDENTIFY failed. Can't tell more about the device */
953 return;
954 }
955 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) ==
956 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) {
957 /*
958 * Controller claims 16 and 32 bit transfers.
959 * Re-do an IDENTIFY with 32-bit transfers,
960 * and compare results.
961 */
962 drvp->drive_flags |= DRIVE_CAP32;
963 ata_get_params(drvp, AT_WAIT, ¶ms2);
964 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
965 /* Not good. fall back to 16bits */
966 drvp->drive_flags &= ~DRIVE_CAP32;
967 } else {
968 aprint_normal("%s: 32-bit data port\n",
969 drv_dev->dv_xname);
970 }
971 }
972 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
973 if (params.atap_ata_major > 0x01 &&
974 params.atap_ata_major != 0xffff) {
975 for (i = 14; i > 0; i--) {
976 if (params.atap_ata_major & (1 << i)) {
977 aprint_normal("%s: ATA version %d\n",
978 drv_dev->dv_xname, i);
979 drvp->ata_vers = i;
980 break;
981 }
982 }
983 }
984 #endif
985
986 /* An ATAPI device is at last PIO mode 3 */
987 if (drvp->drive_flags & DRIVE_ATAPI)
988 drvp->PIO_mode = 3;
989
990 /*
991 * It's not in the specs, but it seems that some drive
992 * returns 0xffff in atap_extensions when this field is invalid
993 */
994 if (params.atap_extensions != 0xffff &&
995 (params.atap_extensions & WDC_EXT_MODES)) {
996 printed = 0;
997 /*
998 * XXX some drives report something wrong here (they claim to
999 * support PIO mode 8 !). As mode is coded on 3 bits in
1000 * SET FEATURE, limit it to 7 (so limit i to 4).
1001 * If higher mode than 7 is found, abort.
1002 */
1003 for (i = 7; i >= 0; i--) {
1004 if ((params.atap_piomode_supp & (1 << i)) == 0)
1005 continue;
1006 if (i > 4)
1007 return;
1008 /*
1009 * See if mode is accepted.
1010 * If the controller can't set its PIO mode,
1011 * assume the defaults are good, so don't try
1012 * to set it
1013 */
1014 if (atac->atac_set_modes)
1015 /*
1016 * It's OK to pool here, it's fast enouth
1017 * to not bother waiting for interrupt
1018 */
1019 if (ata_set_mode(drvp, 0x08 | (i + 3),
1020 AT_WAIT) != CMD_OK)
1021 continue;
1022 if (!printed) {
1023 aprint_normal("%s: drive supports PIO mode %d",
1024 drv_dev->dv_xname, i + 3);
1025 sep = ",";
1026 printed = 1;
1027 }
1028 /*
1029 * If controller's driver can't set its PIO mode,
1030 * get the highter one for the drive.
1031 */
1032 if (atac->atac_set_modes == NULL ||
1033 atac->atac_pio_cap >= i + 3) {
1034 drvp->PIO_mode = i + 3;
1035 drvp->PIO_cap = i + 3;
1036 break;
1037 }
1038 }
1039 if (!printed) {
1040 /*
1041 * We didn't find a valid PIO mode.
1042 * Assume the values returned for DMA are buggy too
1043 */
1044 return;
1045 }
1046 drvp->drive_flags |= DRIVE_MODE;
1047 printed = 0;
1048 for (i = 7; i >= 0; i--) {
1049 if ((params.atap_dmamode_supp & (1 << i)) == 0)
1050 continue;
1051 if ((atac->atac_cap & ATAC_CAP_DMA) &&
1052 atac->atac_set_modes != NULL)
1053 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
1054 != CMD_OK)
1055 continue;
1056 if (!printed) {
1057 aprint_normal("%s DMA mode %d", sep, i);
1058 sep = ",";
1059 printed = 1;
1060 }
1061 if (atac->atac_cap & ATAC_CAP_DMA) {
1062 if (atac->atac_set_modes != NULL &&
1063 atac->atac_dma_cap < i)
1064 continue;
1065 drvp->DMA_mode = i;
1066 drvp->DMA_cap = i;
1067 drvp->drive_flags |= DRIVE_DMA;
1068 }
1069 break;
1070 }
1071 if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
1072 printed = 0;
1073 for (i = 7; i >= 0; i--) {
1074 if ((params.atap_udmamode_supp & (1 << i))
1075 == 0)
1076 continue;
1077 if (atac->atac_set_modes != NULL &&
1078 (atac->atac_cap & ATAC_CAP_UDMA))
1079 if (ata_set_mode(drvp, 0x40 | i,
1080 AT_WAIT) != CMD_OK)
1081 continue;
1082 if (!printed) {
1083 aprint_normal("%s Ultra-DMA mode %d",
1084 sep, i);
1085 if (i == 2)
1086 aprint_normal(" (Ultra/33)");
1087 else if (i == 4)
1088 aprint_normal(" (Ultra/66)");
1089 else if (i == 5)
1090 aprint_normal(" (Ultra/100)");
1091 else if (i == 6)
1092 aprint_normal(" (Ultra/133)");
1093 sep = ",";
1094 printed = 1;
1095 }
1096 if (atac->atac_cap & ATAC_CAP_UDMA) {
1097 if (atac->atac_set_modes != NULL &&
1098 atac->atac_udma_cap < i)
1099 continue;
1100 drvp->UDMA_mode = i;
1101 drvp->UDMA_cap = i;
1102 drvp->drive_flags |= DRIVE_UDMA;
1103 }
1104 break;
1105 }
1106 }
1107 aprint_normal("\n");
1108 }
1109
1110 drvp->drive_flags &= ~DRIVE_NOSTREAM;
1111 if (drvp->drive_flags & DRIVE_ATAPI) {
1112 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM)
1113 drvp->drive_flags |= DRIVE_NOSTREAM;
1114 } else {
1115 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM)
1116 drvp->drive_flags |= DRIVE_NOSTREAM;
1117 }
1118
1119 /* Try to guess ATA version here, if it didn't get reported */
1120 if (drvp->ata_vers == 0) {
1121 if (drvp->drive_flags & DRIVE_UDMA)
1122 drvp->ata_vers = 4; /* should be at last ATA-4 */
1123 else if (drvp->PIO_cap > 2)
1124 drvp->ata_vers = 2; /* should be at last ATA-2 */
1125 }
1126 cf_flags = drv_dev->dv_cfdata->cf_flags;
1127 if (cf_flags & ATA_CONFIG_PIO_SET) {
1128 drvp->PIO_mode =
1129 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
1130 drvp->drive_flags |= DRIVE_MODE;
1131 }
1132 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) {
1133 /* don't care about DMA modes */
1134 return;
1135 }
1136 if (cf_flags & ATA_CONFIG_DMA_SET) {
1137 if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
1138 ATA_CONFIG_DMA_DISABLE) {
1139 drvp->drive_flags &= ~DRIVE_DMA;
1140 } else {
1141 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
1142 ATA_CONFIG_DMA_OFF;
1143 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
1144 }
1145 }
1146 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) {
1147 /* don't care about UDMA modes */
1148 return;
1149 }
1150 if (cf_flags & ATA_CONFIG_UDMA_SET) {
1151 if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
1152 ATA_CONFIG_UDMA_DISABLE) {
1153 drvp->drive_flags &= ~DRIVE_UDMA;
1154 } else {
1155 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
1156 ATA_CONFIG_UDMA_OFF;
1157 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
1158 }
1159 }
1160 }
1161
1162 /* management of the /dev/atabus* devices */
1163 int
1164 atabusopen(dev_t dev, int flag, int fmt, struct proc *p)
1165 {
1166 struct atabus_softc *sc;
1167 int error, unit = minor(dev);
1168
1169 if (unit >= atabus_cd.cd_ndevs ||
1170 (sc = atabus_cd.cd_devs[unit]) == NULL)
1171 return (ENXIO);
1172
1173 if (sc->sc_flags & ATABUSCF_OPEN)
1174 return (EBUSY);
1175
1176 if ((error = ata_addref(sc->sc_chan)) != 0)
1177 return (error);
1178
1179 sc->sc_flags |= ATABUSCF_OPEN;
1180
1181 return (0);
1182 }
1183
1184
1185 int
1186 atabusclose(dev_t dev, int flag, int fmt, struct proc *p)
1187 {
1188 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1189
1190 ata_delref(sc->sc_chan);
1191
1192 sc->sc_flags &= ~ATABUSCF_OPEN;
1193
1194 return (0);
1195 }
1196
1197 int
1198 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p)
1199 {
1200 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1201 struct ata_channel *chp = sc->sc_chan;
1202 int min_drive, max_drive, drive;
1203 int error;
1204 int s;
1205
1206 /*
1207 * Enforce write permission for ioctls that change the
1208 * state of the bus. Host adapter specific ioctls must
1209 * be checked by the adapter driver.
1210 */
1211 switch (cmd) {
1212 case ATABUSIOSCAN:
1213 case ATABUSIODETACH:
1214 case ATABUSIORESET:
1215 if ((flag & FWRITE) == 0)
1216 return (EBADF);
1217 }
1218
1219 switch (cmd) {
1220 case ATABUSIORESET:
1221 s = splbio();
1222 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL);
1223 splx(s);
1224 error = 0;
1225 break;
1226 case ATABUSIOSCAN:
1227 {
1228 #if 0
1229 struct atabusioscan_args *a=
1230 (struct atabusioscan_args *)addr;
1231 #endif
1232 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1233 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1234 return (EOPNOTSUPP);
1235 return (EOPNOTSUPP);
1236 }
1237 case ATABUSIODETACH:
1238 {
1239 struct atabusioscan_args *a=
1240 (struct atabusioscan_args *)addr;
1241 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1242 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1243 return (EOPNOTSUPP);
1244 switch (a->at_dev) {
1245 case -1:
1246 min_drive = 0;
1247 max_drive = 1;
1248 break;
1249 case 0:
1250 case 1:
1251 min_drive = max_drive = a->at_dev;
1252 break;
1253 default:
1254 return (EINVAL);
1255 }
1256 for (drive = min_drive; drive <= max_drive; drive++) {
1257 if (chp->ch_drive[drive].drv_softc != NULL) {
1258 error = config_detach(
1259 chp->ch_drive[drive].drv_softc, 0);
1260 if (error)
1261 return (error);
1262 chp->ch_drive[drive].drv_softc = NULL;
1263 }
1264 }
1265 error = 0;
1266 break;
1267 }
1268 default:
1269 error = ENOTTY;
1270 }
1271 return (error);
1272 };
1273