ata.c revision 1.55
1 /* $NetBSD: ata.c,v 1.55 2004/08/20 23:26:53 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.55 2004/08/20 23:26:53 thorpej Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 81 82 /* 83 * A queue of atabus instances, used to ensure the same bus probe order 84 * for a given hardware configuration at each boot. 85 */ 86 struct atabus_initq_head atabus_initq_head = 87 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 88 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 89 90 /***************************************************************************** 91 * ATA bus layer. 92 * 93 * ATA controllers attach an atabus instance, which handles probing the bus 94 * for drives, etc. 95 *****************************************************************************/ 96 97 dev_type_open(atabusopen); 98 dev_type_close(atabusclose); 99 dev_type_ioctl(atabusioctl); 100 101 const struct cdevsw atabus_cdevsw = { 102 atabusopen, atabusclose, noread, nowrite, atabusioctl, 103 nostop, notty, nopoll, nommap, nokqfilter, 104 }; 105 106 extern struct cfdriver atabus_cd; 107 108 109 /* 110 * atabusprint: 111 * 112 * Autoconfiguration print routine used by ATA controllers when 113 * attaching an atabus instance. 114 */ 115 int 116 atabusprint(void *aux, const char *pnp) 117 { 118 struct ata_channel *chan = aux; 119 120 if (pnp) 121 aprint_normal("atabus at %s", pnp); 122 aprint_normal(" channel %d", chan->ch_channel); 123 124 return (UNCONF); 125 } 126 127 /* 128 * ataprint: 129 * 130 * Autoconfiguration print routine. 131 */ 132 int 133 ataprint(void *aux, const char *pnp) 134 { 135 struct ata_device *adev = aux; 136 137 if (pnp) 138 aprint_normal("wd at %s", pnp); 139 aprint_normal(" drive %d", adev->adev_drv_data->drive); 140 141 return (UNCONF); 142 } 143 144 /* 145 * ata_channel_attach: 146 * 147 * Common parts of attaching an atabus to an ATA controller channel. 148 */ 149 void 150 ata_channel_attach(struct ata_channel *chp) 151 { 152 153 if (chp->ch_flags & ATACH_DISABLED) 154 return; 155 156 callout_init(&chp->ch_callout); 157 158 TAILQ_INIT(&chp->ch_queue->queue_xfer); 159 chp->ch_queue->queue_freeze = 0; 160 chp->ch_queue->active_xfer = NULL; 161 162 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint); 163 } 164 165 static void 166 atabusconfig(struct atabus_softc *atabus_sc) 167 { 168 struct ata_channel *chp = atabus_sc->sc_chan; 169 struct atac_softc *atac = chp->ch_atac; 170 int i; 171 struct atabus_initq *atabus_initq = NULL; 172 173 /* Probe for the drives. */ 174 (*atac->atac_probe)(chp); 175 176 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 177 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 178 DEBUG_PROBE); 179 180 /* If no drives, abort here */ 181 for (i = 0; i < chp->ch_ndrive; i++) 182 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 183 break; 184 if (i == chp->ch_ndrive) 185 goto out; 186 187 /* Shortcut in case we've been shutdown */ 188 if (chp->ch_flags & ATACH_SHUTDOWN) 189 goto out; 190 191 /* Make sure the devices probe in atabus order to avoid jitter. */ 192 simple_lock(&atabus_interlock); 193 while(1) { 194 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 195 if (atabus_initq->atabus_sc == atabus_sc) 196 break; 197 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 198 &atabus_interlock); 199 } 200 simple_unlock(&atabus_interlock); 201 202 /* 203 * Attach an ATAPI bus, if needed. 204 */ 205 for (i = 0; i < chp->ch_ndrive; i++) { 206 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 207 #if NATAPIBUS > 0 208 (*atac->atac_atapibus_attach)(atabus_sc); 209 #else 210 /* 211 * Fake the autoconfig "not configured" message 212 */ 213 aprint_normal("atapibus at %s not configured\n", 214 atac->atac_dev.dv_xname); 215 chp->atapibus = NULL; 216 for (i = 0; i < chp->ch_ndrive; i++) 217 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 218 #endif 219 break; 220 } 221 } 222 223 for (i = 0; i < chp->ch_ndrive; i++) { 224 struct ata_device adev; 225 if ((chp->ch_drive[i].drive_flags & 226 (DRIVE_ATA | DRIVE_OLD)) == 0) { 227 continue; 228 } 229 memset(&adev, 0, sizeof(struct ata_device)); 230 adev.adev_bustype = atac->atac_bustype_ata; 231 adev.adev_channel = chp->ch_channel; 232 adev.adev_openings = 1; 233 adev.adev_drv_data = &chp->ch_drive[i]; 234 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev, 235 &adev, ataprint); 236 if (chp->ata_drives[i] != NULL) 237 ata_probe_caps(&chp->ch_drive[i]); 238 else 239 chp->ch_drive[i].drive_flags &= 240 ~(DRIVE_ATA | DRIVE_OLD); 241 } 242 243 /* now that we know the drives, the controller can set its modes */ 244 if (atac->atac_set_modes) { 245 (*atac->atac_set_modes)(chp); 246 ata_print_modes(chp); 247 } 248 #if NATARAID > 0 249 if (atac->atac_cap & ATAC_CAP_RAID) 250 for (i = 0; i < chp->ch_ndrive; i++) 251 if (chp->ata_drives[i] != NULL) 252 ata_raid_check_component(chp->ata_drives[i]); 253 #endif /* NATARAID > 0 */ 254 255 /* 256 * reset drive_flags for unattached devices, reset state for attached 257 * ones 258 */ 259 for (i = 0; i < chp->ch_ndrive; i++) { 260 if (chp->ch_drive[i].drv_softc == NULL) 261 chp->ch_drive[i].drive_flags = 0; 262 else 263 chp->ch_drive[i].state = 0; 264 } 265 266 out: 267 if (atabus_initq == NULL) { 268 simple_lock(&atabus_interlock); 269 while(1) { 270 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 271 if (atabus_initq->atabus_sc == atabus_sc) 272 break; 273 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 274 &atabus_interlock); 275 } 276 simple_unlock(&atabus_interlock); 277 } 278 simple_lock(&atabus_interlock); 279 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 280 simple_unlock(&atabus_interlock); 281 282 free(atabus_initq, M_DEVBUF); 283 wakeup(&atabus_initq_head); 284 285 ata_delref(chp); 286 287 config_pending_decr(); 288 } 289 290 /* 291 * atabus_thread: 292 * 293 * Worker thread for the ATA bus. 294 */ 295 static void 296 atabus_thread(void *arg) 297 { 298 struct atabus_softc *sc = arg; 299 struct ata_channel *chp = sc->sc_chan; 300 struct ata_xfer *xfer; 301 int i, s; 302 303 s = splbio(); 304 chp->ch_flags |= ATACH_TH_RUN; 305 306 /* 307 * Probe the drives. Reset all flags to 0 to indicate to controllers 308 * that can re-probe that all drives must be probed.. 309 * 310 * Note: ch_ndrive may be changed during the probe. 311 */ 312 for (i = 0; i < ATA_MAXDRIVES; i++) 313 chp->ch_drive[i].drive_flags = 0; 314 splx(s); 315 316 /* Configure the devices on the bus. */ 317 atabusconfig(sc); 318 319 for (;;) { 320 s = splbio(); 321 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 322 (chp->ch_queue->active_xfer == NULL || 323 chp->ch_queue->queue_freeze == 0)) { 324 chp->ch_flags &= ~ATACH_TH_RUN; 325 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 326 chp->ch_flags |= ATACH_TH_RUN; 327 } 328 splx(s); 329 if (chp->ch_flags & ATACH_SHUTDOWN) 330 break; 331 s = splbio(); 332 if (chp->ch_flags & ATACH_TH_RESET) { 333 /* 334 * ata_reset_channel() will freeze 2 times, so 335 * unfreeze one time. Not a problem as we're at splbio 336 */ 337 chp->ch_queue->queue_freeze--; 338 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 339 } else if (chp->ch_queue->active_xfer != NULL && 340 chp->ch_queue->queue_freeze == 1) { 341 /* 342 * Caller has bumped queue_freeze, decrease it. 343 */ 344 chp->ch_queue->queue_freeze--; 345 xfer = chp->ch_queue->active_xfer; 346 KASSERT(xfer != NULL); 347 (*xfer->c_start)(chp, xfer); 348 } else if (chp->ch_queue->queue_freeze > 1) 349 panic("ata_thread: queue_freeze"); 350 splx(s); 351 } 352 chp->ch_thread = NULL; 353 wakeup((void *)&chp->ch_flags); 354 kthread_exit(0); 355 } 356 357 /* 358 * atabus_create_thread: 359 * 360 * Helper routine to create the ATA bus worker thread. 361 */ 362 static void 363 atabus_create_thread(void *arg) 364 { 365 struct atabus_softc *sc = arg; 366 struct ata_channel *chp = sc->sc_chan; 367 int error; 368 369 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 370 "%s", sc->sc_dev.dv_xname)) != 0) 371 aprint_error("%s: unable to create kernel thread: error %d\n", 372 sc->sc_dev.dv_xname, error); 373 } 374 375 /* 376 * atabus_match: 377 * 378 * Autoconfiguration match routine. 379 */ 380 static int 381 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 382 { 383 struct ata_channel *chp = aux; 384 385 if (chp == NULL) 386 return (0); 387 388 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 389 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 390 return (0); 391 392 return (1); 393 } 394 395 /* 396 * atabus_attach: 397 * 398 * Autoconfiguration attach routine. 399 */ 400 static void 401 atabus_attach(struct device *parent, struct device *self, void *aux) 402 { 403 struct atabus_softc *sc = (void *) self; 404 struct ata_channel *chp = aux; 405 struct atabus_initq *initq; 406 407 sc->sc_chan = chp; 408 409 aprint_normal("\n"); 410 aprint_naive("\n"); 411 412 if (ata_addref(chp)) 413 return; 414 415 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 416 initq->atabus_sc = sc; 417 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 418 config_pending_incr(); 419 kthread_create(atabus_create_thread, sc); 420 } 421 422 /* 423 * atabus_activate: 424 * 425 * Autoconfiguration activation routine. 426 */ 427 static int 428 atabus_activate(struct device *self, enum devact act) 429 { 430 struct atabus_softc *sc = (void *) self; 431 struct ata_channel *chp = sc->sc_chan; 432 struct device *dev = NULL; 433 int s, i, error = 0; 434 435 s = splbio(); 436 switch (act) { 437 case DVACT_ACTIVATE: 438 error = EOPNOTSUPP; 439 break; 440 441 case DVACT_DEACTIVATE: 442 /* 443 * We might deactivate the children of atapibus twice 444 * (once bia atapibus, once directly), but since the 445 * generic autoconfiguration code maintains the DVF_ACTIVE 446 * flag, it's safe. 447 */ 448 if ((dev = chp->atapibus) != NULL) { 449 error = config_deactivate(dev); 450 if (error) 451 goto out; 452 } 453 454 for (i = 0; i < chp->ch_ndrive; i++) { 455 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 456 ATADEBUG_PRINT(("atabus_activate: %s: " 457 "deactivating %s\n", sc->sc_dev.dv_xname, 458 dev->dv_xname), 459 DEBUG_DETACH); 460 error = config_deactivate(dev); 461 if (error) 462 goto out; 463 } 464 } 465 break; 466 } 467 out: 468 splx(s); 469 470 #ifdef ATADEBUG 471 if (dev != NULL && error != 0) 472 ATADEBUG_PRINT(("atabus_activate: %s: " 473 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 474 error, dev->dv_xname), DEBUG_DETACH); 475 #endif /* ATADEBUG */ 476 477 return (error); 478 } 479 480 /* 481 * atabus_detach: 482 * 483 * Autoconfiguration detach routine. 484 */ 485 static int 486 atabus_detach(struct device *self, int flags) 487 { 488 struct atabus_softc *sc = (void *) self; 489 struct ata_channel *chp = sc->sc_chan; 490 struct device *dev = NULL; 491 int i, error = 0; 492 493 /* Shutdown the channel. */ 494 /* XXX NEED AN INTERLOCK HERE. */ 495 chp->ch_flags |= ATACH_SHUTDOWN; 496 wakeup(&chp->ch_thread); 497 while (chp->ch_thread != NULL) 498 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0); 499 500 /* 501 * Detach atapibus and its children. 502 */ 503 if ((dev = chp->atapibus) != NULL) { 504 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 505 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 506 error = config_detach(dev, flags); 507 if (error) 508 goto out; 509 } 510 511 /* 512 * Detach our other children. 513 */ 514 for (i = 0; i < chp->ch_ndrive; i++) { 515 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 516 continue; 517 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 518 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 519 sc->sc_dev.dv_xname, dev->dv_xname), 520 DEBUG_DETACH); 521 error = config_detach(dev, flags); 522 if (error) 523 goto out; 524 } 525 } 526 527 out: 528 #ifdef ATADEBUG 529 if (dev != NULL && error != 0) 530 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 531 sc->sc_dev.dv_xname, error, dev->dv_xname), 532 DEBUG_DETACH); 533 #endif /* ATADEBUG */ 534 535 return (error); 536 } 537 538 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 539 atabus_match, atabus_attach, atabus_detach, atabus_activate); 540 541 /***************************************************************************** 542 * Common ATA bus operations. 543 *****************************************************************************/ 544 545 /* Get the disk's parameters */ 546 int 547 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 548 struct ataparams *prms) 549 { 550 char tb[DEV_BSIZE]; 551 struct ata_command ata_c; 552 struct ata_channel *chp = drvp->chnl_softc; 553 struct atac_softc *atac = chp->ch_atac; 554 555 #if BYTE_ORDER == LITTLE_ENDIAN 556 int i; 557 u_int16_t *p; 558 #endif 559 560 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 561 562 memset(tb, 0, DEV_BSIZE); 563 memset(prms, 0, sizeof(struct ataparams)); 564 memset(&ata_c, 0, sizeof(struct ata_command)); 565 566 if (drvp->drive_flags & DRIVE_ATA) { 567 ata_c.r_command = WDCC_IDENTIFY; 568 ata_c.r_st_bmask = WDCS_DRDY; 569 ata_c.r_st_pmask = 0; 570 ata_c.timeout = 3000; /* 3s */ 571 } else if (drvp->drive_flags & DRIVE_ATAPI) { 572 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 573 ata_c.r_st_bmask = 0; 574 ata_c.r_st_pmask = 0; 575 ata_c.timeout = 10000; /* 10s */ 576 } else { 577 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 578 DEBUG_FUNCS|DEBUG_PROBE); 579 return CMD_ERR; 580 } 581 ata_c.flags = AT_READ | flags; 582 ata_c.data = tb; 583 ata_c.bcount = DEV_BSIZE; 584 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 585 &ata_c) != ATACMD_COMPLETE) { 586 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 587 DEBUG_FUNCS|DEBUG_PROBE); 588 return CMD_AGAIN; 589 } 590 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 591 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 592 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 593 return CMD_ERR; 594 } else { 595 /* if we didn't read any data something is wrong */ 596 if ((ata_c.flags & AT_XFDONE) == 0) 597 return CMD_ERR; 598 /* Read in parameter block. */ 599 memcpy(prms, tb, sizeof(struct ataparams)); 600 #if BYTE_ORDER == LITTLE_ENDIAN 601 /* 602 * Shuffle string byte order. 603 * ATAPI Mitsumi and NEC drives don't need this. 604 */ 605 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 606 WDC_CFG_ATAPI && 607 ((prms->atap_model[0] == 'N' && 608 prms->atap_model[1] == 'E') || 609 (prms->atap_model[0] == 'F' && 610 prms->atap_model[1] == 'X'))) 611 return 0; 612 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 613 p = (u_short *)(prms->atap_model + i); 614 *p = ntohs(*p); 615 } 616 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 617 p = (u_short *)(prms->atap_serial + i); 618 *p = ntohs(*p); 619 } 620 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 621 p = (u_short *)(prms->atap_revision + i); 622 *p = ntohs(*p); 623 } 624 #endif 625 return CMD_OK; 626 } 627 } 628 629 int 630 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 631 { 632 struct ata_command ata_c; 633 struct ata_channel *chp = drvp->chnl_softc; 634 struct atac_softc *atac = chp->ch_atac; 635 636 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 637 memset(&ata_c, 0, sizeof(struct ata_command)); 638 639 ata_c.r_command = SET_FEATURES; 640 ata_c.r_st_bmask = 0; 641 ata_c.r_st_pmask = 0; 642 ata_c.r_features = WDSF_SET_MODE; 643 ata_c.r_count = mode; 644 ata_c.flags = flags; 645 ata_c.timeout = 1000; /* 1s */ 646 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 647 &ata_c) != ATACMD_COMPLETE) 648 return CMD_AGAIN; 649 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 650 return CMD_ERR; 651 } 652 return CMD_OK; 653 } 654 655 void 656 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 657 { 658 /* 659 * Downgrade decision: if we get NERRS_MAX in NXFER. 660 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 661 * first error within the first NXFER ops will immediatly trigger 662 * a downgrade. 663 * If we got an error and n_xfers is bigger than NXFER reset counters. 664 */ 665 drvp->n_dmaerrs++; 666 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 667 ata_downgrade_mode(drvp, flags); 668 drvp->n_dmaerrs = NERRS_MAX-1; 669 drvp->n_xfers = 0; 670 return; 671 } 672 if (drvp->n_xfers > NXFER) { 673 drvp->n_dmaerrs = 1; /* just got an error */ 674 drvp->n_xfers = 1; /* restart counting from this error */ 675 } 676 } 677 678 /* 679 * Add a command to the queue and start controller. Must be called at splbio 680 */ 681 void 682 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 683 { 684 685 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 686 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 687 688 /* complete xfer setup */ 689 xfer->c_chp = chp; 690 691 /* insert at the end of command list */ 692 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 693 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 694 chp->ch_flags), DEBUG_XFERS); 695 atastart(chp); 696 } 697 698 /* 699 * Start I/O on a controller, for the given channel. 700 * The first xfer may be not for our channel if the channel queues 701 * are shared. 702 */ 703 void 704 atastart(struct ata_channel *chp) 705 { 706 struct atac_softc *atac = chp->ch_atac; 707 struct ata_xfer *xfer; 708 709 #ifdef WDC_DIAGNOSTIC 710 int spl1, spl2; 711 712 spl1 = splbio(); 713 spl2 = splbio(); 714 if (spl2 != spl1) { 715 printf("atastart: not at splbio()\n"); 716 panic("atastart"); 717 } 718 splx(spl2); 719 splx(spl1); 720 #endif /* WDC_DIAGNOSTIC */ 721 722 /* is there a xfer ? */ 723 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 724 return; 725 726 /* adjust chp, in case we have a shared queue */ 727 chp = xfer->c_chp; 728 729 if (chp->ch_queue->active_xfer != NULL) { 730 return; /* channel aleady active */ 731 } 732 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 733 return; /* queue froozen */ 734 } 735 #ifdef DIAGNOSTIC 736 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 737 panic("atastart: channel waiting for irq"); 738 #endif 739 if (atac->atac_claim_hw) 740 if (!(*atac->atac_claim_hw)(chp, 0)) 741 return; 742 743 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 744 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 745 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 746 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 747 chp->ch_drive[xfer->c_drive].state = 0; 748 } 749 chp->ch_queue->active_xfer = xfer; 750 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 751 752 if (atac->atac_cap & ATAC_CAP_NOIRQ) 753 KASSERT(xfer->c_flags & C_POLL); 754 xfer->c_start(chp, xfer); 755 } 756 757 struct ata_xfer * 758 ata_get_xfer(int flags) 759 { 760 struct ata_xfer *xfer; 761 int s; 762 763 s = splbio(); 764 xfer = pool_get(&ata_xfer_pool, 765 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 766 splx(s); 767 if (xfer != NULL) { 768 memset(xfer, 0, sizeof(struct ata_xfer)); 769 } 770 return xfer; 771 } 772 773 void 774 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 775 { 776 struct atac_softc *atac = chp->ch_atac; 777 int s; 778 779 if (atac->atac_free_hw) 780 (*atac->atac_free_hw)(chp); 781 s = splbio(); 782 pool_put(&ata_xfer_pool, xfer); 783 splx(s); 784 } 785 786 /* 787 * Kill off all pending xfers for a ata_channel. 788 * 789 * Must be called at splbio(). 790 */ 791 void 792 ata_kill_pending(struct ata_drive_datas *drvp) 793 { 794 struct ata_channel *chp = drvp->chnl_softc; 795 struct ata_xfer *xfer, *next_xfer; 796 int s = splbio(); 797 798 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 799 xfer != NULL; xfer = next_xfer) { 800 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 801 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 802 continue; 803 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 804 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 805 } 806 807 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 808 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 809 drvp->drive_flags |= DRIVE_WAITDRAIN; 810 (void) tsleep(&chp->ch_queue->active_xfer, 811 PRIBIO, "atdrn", 0); 812 } else { 813 /* no more xfer for us */ 814 break; 815 } 816 } 817 splx(s); 818 } 819 820 /* 821 * ata_reset_channel: 822 * 823 * Reset and ATA channel. 824 */ 825 void 826 ata_reset_channel(struct ata_channel *chp, int flags) 827 { 828 struct atac_softc *atac = chp->ch_atac; 829 int drive; 830 831 chp->ch_queue->queue_freeze++; 832 833 /* 834 * If we can poll or wait it's OK, otherwise wake up the 835 * kernel thread to do it for us. 836 */ 837 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 838 if (chp->ch_flags & ATACH_TH_RESET) { 839 /* No need to schedule a reset more than one time. */ 840 return; 841 } 842 chp->ch_flags |= ATACH_TH_RESET; 843 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 844 wakeup(&chp->ch_thread); 845 return; 846 } 847 848 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 849 850 for (drive = 0; drive < chp->ch_ndrive; drive++) 851 chp->ch_drive[drive].state = 0; 852 853 chp->ch_flags &= ~ATACH_TH_RESET; 854 if ((flags & AT_RST_EMERG) == 0) { 855 chp->ch_queue->queue_freeze--; 856 atastart(chp); 857 } else { 858 /* make sure that we can use polled commands */ 859 TAILQ_INIT(&chp->ch_queue->queue_xfer); 860 chp->ch_queue->queue_freeze = 0; 861 chp->ch_queue->active_xfer = NULL; 862 } 863 } 864 865 int 866 ata_addref(struct ata_channel *chp) 867 { 868 struct atac_softc *atac = chp->ch_atac; 869 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 870 int s, error = 0; 871 872 s = splbio(); 873 if (adapt->adapt_refcnt++ == 0 && 874 adapt->adapt_enable != NULL) { 875 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 876 if (error) 877 adapt->adapt_refcnt--; 878 } 879 splx(s); 880 return (error); 881 } 882 883 void 884 ata_delref(struct ata_channel *chp) 885 { 886 struct atac_softc *atac = chp->ch_atac; 887 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 888 int s; 889 890 s = splbio(); 891 if (adapt->adapt_refcnt-- == 1 && 892 adapt->adapt_enable != NULL) 893 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 894 splx(s); 895 } 896 897 void 898 ata_print_modes(struct ata_channel *chp) 899 { 900 struct atac_softc *atac = chp->ch_atac; 901 int drive; 902 struct ata_drive_datas *drvp; 903 904 for (drive = 0; drive < 2; drive++) { 905 drvp = &chp->ch_drive[drive]; 906 if ((drvp->drive_flags & DRIVE) == 0) 907 continue; 908 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 909 drvp->drv_softc->dv_xname, 910 atac->atac_dev.dv_xname, 911 chp->ch_channel, drive, drvp->PIO_mode); 912 if (drvp->drive_flags & DRIVE_DMA) 913 aprint_normal(", DMA mode %d", drvp->DMA_mode); 914 if (drvp->drive_flags & DRIVE_UDMA) { 915 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 916 if (drvp->UDMA_mode == 2) 917 aprint_normal(" (Ultra/33)"); 918 else if (drvp->UDMA_mode == 4) 919 aprint_normal(" (Ultra/66)"); 920 else if (drvp->UDMA_mode == 5) 921 aprint_normal(" (Ultra/100)"); 922 else if (drvp->UDMA_mode == 6) 923 aprint_normal(" (Ultra/133)"); 924 } 925 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 926 aprint_normal(" (using DMA data transfers)"); 927 aprint_normal("\n"); 928 } 929 } 930 931 /* 932 * downgrade the transfer mode of a drive after an error. return 1 if 933 * downgrade was possible, 0 otherwise. 934 */ 935 int 936 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 937 { 938 struct ata_channel *chp = drvp->chnl_softc; 939 struct atac_softc *atac = chp->ch_atac; 940 struct device *drv_dev = drvp->drv_softc; 941 int cf_flags = drv_dev->dv_cfdata->cf_flags; 942 943 /* if drive or controller don't know its mode, we can't do much */ 944 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 945 (atac->atac_set_modes == NULL)) 946 return 0; 947 /* current drive mode was set by a config flag, let it this way */ 948 if ((cf_flags & ATA_CONFIG_PIO_SET) || 949 (cf_flags & ATA_CONFIG_DMA_SET) || 950 (cf_flags & ATA_CONFIG_UDMA_SET)) 951 return 0; 952 953 /* 954 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 955 */ 956 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 957 drvp->UDMA_mode--; 958 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 959 drv_dev->dv_xname, drvp->UDMA_mode); 960 } 961 962 /* 963 * If we were using ultra-DMA, don't downgrade to multiword DMA. 964 */ 965 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 966 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 967 drvp->PIO_mode = drvp->PIO_cap; 968 printf("%s: transfer error, downgrading to PIO mode %d\n", 969 drv_dev->dv_xname, drvp->PIO_mode); 970 } else /* already using PIO, can't downgrade */ 971 return 0; 972 973 (*atac->atac_set_modes)(chp); 974 ata_print_modes(chp); 975 /* reset the channel, which will shedule all drives for setup */ 976 ata_reset_channel(chp, flags | AT_RST_NOCMD); 977 return 1; 978 } 979 980 /* 981 * Probe drive's capabilities, for use by the controller later 982 * Assumes drvp points to an existing drive. 983 */ 984 void 985 ata_probe_caps(struct ata_drive_datas *drvp) 986 { 987 struct ataparams params, params2; 988 struct ata_channel *chp = drvp->chnl_softc; 989 struct atac_softc *atac = chp->ch_atac; 990 struct device *drv_dev = drvp->drv_softc; 991 int i, printed; 992 char *sep = ""; 993 int cf_flags; 994 995 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 996 /* IDENTIFY failed. Can't tell more about the device */ 997 return; 998 } 999 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1000 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1001 /* 1002 * Controller claims 16 and 32 bit transfers. 1003 * Re-do an IDENTIFY with 32-bit transfers, 1004 * and compare results. 1005 */ 1006 drvp->drive_flags |= DRIVE_CAP32; 1007 ata_get_params(drvp, AT_WAIT, ¶ms2); 1008 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1009 /* Not good. fall back to 16bits */ 1010 drvp->drive_flags &= ~DRIVE_CAP32; 1011 } else { 1012 aprint_normal("%s: 32-bit data port\n", 1013 drv_dev->dv_xname); 1014 } 1015 } 1016 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1017 if (params.atap_ata_major > 0x01 && 1018 params.atap_ata_major != 0xffff) { 1019 for (i = 14; i > 0; i--) { 1020 if (params.atap_ata_major & (1 << i)) { 1021 aprint_normal("%s: ATA version %d\n", 1022 drv_dev->dv_xname, i); 1023 drvp->ata_vers = i; 1024 break; 1025 } 1026 } 1027 } 1028 #endif 1029 1030 /* An ATAPI device is at last PIO mode 3 */ 1031 if (drvp->drive_flags & DRIVE_ATAPI) 1032 drvp->PIO_mode = 3; 1033 1034 /* 1035 * It's not in the specs, but it seems that some drive 1036 * returns 0xffff in atap_extensions when this field is invalid 1037 */ 1038 if (params.atap_extensions != 0xffff && 1039 (params.atap_extensions & WDC_EXT_MODES)) { 1040 printed = 0; 1041 /* 1042 * XXX some drives report something wrong here (they claim to 1043 * support PIO mode 8 !). As mode is coded on 3 bits in 1044 * SET FEATURE, limit it to 7 (so limit i to 4). 1045 * If higher mode than 7 is found, abort. 1046 */ 1047 for (i = 7; i >= 0; i--) { 1048 if ((params.atap_piomode_supp & (1 << i)) == 0) 1049 continue; 1050 if (i > 4) 1051 return; 1052 /* 1053 * See if mode is accepted. 1054 * If the controller can't set its PIO mode, 1055 * assume the defaults are good, so don't try 1056 * to set it 1057 */ 1058 if (atac->atac_set_modes) 1059 /* 1060 * It's OK to pool here, it's fast enouth 1061 * to not bother waiting for interrupt 1062 */ 1063 if (ata_set_mode(drvp, 0x08 | (i + 3), 1064 AT_WAIT) != CMD_OK) 1065 continue; 1066 if (!printed) { 1067 aprint_normal("%s: drive supports PIO mode %d", 1068 drv_dev->dv_xname, i + 3); 1069 sep = ","; 1070 printed = 1; 1071 } 1072 /* 1073 * If controller's driver can't set its PIO mode, 1074 * get the highter one for the drive. 1075 */ 1076 if (atac->atac_set_modes == NULL || 1077 atac->atac_pio_cap >= i + 3) { 1078 drvp->PIO_mode = i + 3; 1079 drvp->PIO_cap = i + 3; 1080 break; 1081 } 1082 } 1083 if (!printed) { 1084 /* 1085 * We didn't find a valid PIO mode. 1086 * Assume the values returned for DMA are buggy too 1087 */ 1088 return; 1089 } 1090 drvp->drive_flags |= DRIVE_MODE; 1091 printed = 0; 1092 for (i = 7; i >= 0; i--) { 1093 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1094 continue; 1095 if ((atac->atac_cap & ATAC_CAP_DMA) && 1096 atac->atac_set_modes != NULL) 1097 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1098 != CMD_OK) 1099 continue; 1100 if (!printed) { 1101 aprint_normal("%s DMA mode %d", sep, i); 1102 sep = ","; 1103 printed = 1; 1104 } 1105 if (atac->atac_cap & ATAC_CAP_DMA) { 1106 if (atac->atac_set_modes != NULL && 1107 atac->atac_dma_cap < i) 1108 continue; 1109 drvp->DMA_mode = i; 1110 drvp->DMA_cap = i; 1111 drvp->drive_flags |= DRIVE_DMA; 1112 } 1113 break; 1114 } 1115 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1116 printed = 0; 1117 for (i = 7; i >= 0; i--) { 1118 if ((params.atap_udmamode_supp & (1 << i)) 1119 == 0) 1120 continue; 1121 if (atac->atac_set_modes != NULL && 1122 (atac->atac_cap & ATAC_CAP_UDMA)) 1123 if (ata_set_mode(drvp, 0x40 | i, 1124 AT_WAIT) != CMD_OK) 1125 continue; 1126 if (!printed) { 1127 aprint_normal("%s Ultra-DMA mode %d", 1128 sep, i); 1129 if (i == 2) 1130 aprint_normal(" (Ultra/33)"); 1131 else if (i == 4) 1132 aprint_normal(" (Ultra/66)"); 1133 else if (i == 5) 1134 aprint_normal(" (Ultra/100)"); 1135 else if (i == 6) 1136 aprint_normal(" (Ultra/133)"); 1137 sep = ","; 1138 printed = 1; 1139 } 1140 if (atac->atac_cap & ATAC_CAP_UDMA) { 1141 if (atac->atac_set_modes != NULL && 1142 atac->atac_udma_cap < i) 1143 continue; 1144 drvp->UDMA_mode = i; 1145 drvp->UDMA_cap = i; 1146 drvp->drive_flags |= DRIVE_UDMA; 1147 } 1148 break; 1149 } 1150 } 1151 aprint_normal("\n"); 1152 } 1153 1154 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1155 if (drvp->drive_flags & DRIVE_ATAPI) { 1156 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1157 drvp->drive_flags |= DRIVE_NOSTREAM; 1158 } else { 1159 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1160 drvp->drive_flags |= DRIVE_NOSTREAM; 1161 } 1162 1163 /* Try to guess ATA version here, if it didn't get reported */ 1164 if (drvp->ata_vers == 0) { 1165 if (drvp->drive_flags & DRIVE_UDMA) 1166 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1167 else if (drvp->PIO_cap > 2) 1168 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1169 } 1170 cf_flags = drv_dev->dv_cfdata->cf_flags; 1171 if (cf_flags & ATA_CONFIG_PIO_SET) { 1172 drvp->PIO_mode = 1173 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1174 drvp->drive_flags |= DRIVE_MODE; 1175 } 1176 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1177 /* don't care about DMA modes */ 1178 return; 1179 } 1180 if (cf_flags & ATA_CONFIG_DMA_SET) { 1181 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1182 ATA_CONFIG_DMA_DISABLE) { 1183 drvp->drive_flags &= ~DRIVE_DMA; 1184 } else { 1185 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1186 ATA_CONFIG_DMA_OFF; 1187 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1188 } 1189 } 1190 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1191 /* don't care about UDMA modes */ 1192 return; 1193 } 1194 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1195 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1196 ATA_CONFIG_UDMA_DISABLE) { 1197 drvp->drive_flags &= ~DRIVE_UDMA; 1198 } else { 1199 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1200 ATA_CONFIG_UDMA_OFF; 1201 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1202 } 1203 } 1204 } 1205 1206 /* management of the /dev/atabus* devices */ 1207 int 1208 atabusopen(dev_t dev, int flag, int fmt, struct proc *p) 1209 { 1210 struct atabus_softc *sc; 1211 int error, unit = minor(dev); 1212 1213 if (unit >= atabus_cd.cd_ndevs || 1214 (sc = atabus_cd.cd_devs[unit]) == NULL) 1215 return (ENXIO); 1216 1217 if (sc->sc_flags & ATABUSCF_OPEN) 1218 return (EBUSY); 1219 1220 if ((error = ata_addref(sc->sc_chan)) != 0) 1221 return (error); 1222 1223 sc->sc_flags |= ATABUSCF_OPEN; 1224 1225 return (0); 1226 } 1227 1228 1229 int 1230 atabusclose(dev_t dev, int flag, int fmt, struct proc *p) 1231 { 1232 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1233 1234 ata_delref(sc->sc_chan); 1235 1236 sc->sc_flags &= ~ATABUSCF_OPEN; 1237 1238 return (0); 1239 } 1240 1241 int 1242 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p) 1243 { 1244 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1245 struct ata_channel *chp = sc->sc_chan; 1246 int min_drive, max_drive, drive; 1247 int error; 1248 int s; 1249 1250 /* 1251 * Enforce write permission for ioctls that change the 1252 * state of the bus. Host adapter specific ioctls must 1253 * be checked by the adapter driver. 1254 */ 1255 switch (cmd) { 1256 case ATABUSIOSCAN: 1257 case ATABUSIODETACH: 1258 case ATABUSIORESET: 1259 if ((flag & FWRITE) == 0) 1260 return (EBADF); 1261 } 1262 1263 switch (cmd) { 1264 case ATABUSIORESET: 1265 s = splbio(); 1266 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1267 splx(s); 1268 error = 0; 1269 break; 1270 case ATABUSIOSCAN: 1271 { 1272 #if 0 1273 struct atabusioscan_args *a= 1274 (struct atabusioscan_args *)addr; 1275 #endif 1276 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1277 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1278 return (EOPNOTSUPP); 1279 return (EOPNOTSUPP); 1280 } 1281 case ATABUSIODETACH: 1282 { 1283 struct atabusioscan_args *a= 1284 (struct atabusioscan_args *)addr; 1285 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1286 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1287 return (EOPNOTSUPP); 1288 switch (a->at_dev) { 1289 case -1: 1290 min_drive = 0; 1291 max_drive = 1; 1292 break; 1293 case 0: 1294 case 1: 1295 min_drive = max_drive = a->at_dev; 1296 break; 1297 default: 1298 return (EINVAL); 1299 } 1300 for (drive = min_drive; drive <= max_drive; drive++) { 1301 if (chp->ch_drive[drive].drv_softc != NULL) { 1302 error = config_detach( 1303 chp->ch_drive[drive].drv_softc, 0); 1304 if (error) 1305 return (error); 1306 chp->ch_drive[drive].drv_softc = NULL; 1307 } 1308 } 1309 error = 0; 1310 break; 1311 } 1312 default: 1313 error = ENOTTY; 1314 } 1315 return (error); 1316 }; 1317
Indexes created Wed Sep 24 15:09:51 GMT 2025