ata.c revision 1.65
1 /* $NetBSD: ata.c,v 1.65 2005/02/27 00:26:58 perry Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.65 2005/02/27 00:26:58 perry Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 81 82 /* 83 * A queue of atabus instances, used to ensure the same bus probe order 84 * for a given hardware configuration at each boot. 85 */ 86 struct atabus_initq_head atabus_initq_head = 87 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 88 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 89 90 /***************************************************************************** 91 * ATA bus layer. 92 * 93 * ATA controllers attach an atabus instance, which handles probing the bus 94 * for drives, etc. 95 *****************************************************************************/ 96 97 dev_type_open(atabusopen); 98 dev_type_close(atabusclose); 99 dev_type_ioctl(atabusioctl); 100 101 const struct cdevsw atabus_cdevsw = { 102 atabusopen, atabusclose, noread, nowrite, atabusioctl, 103 nostop, notty, nopoll, nommap, nokqfilter, 104 }; 105 106 extern struct cfdriver atabus_cd; 107 108 static void atabus_powerhook(int, void *); 109 110 /* 111 * atabusprint: 112 * 113 * Autoconfiguration print routine used by ATA controllers when 114 * attaching an atabus instance. 115 */ 116 int 117 atabusprint(void *aux, const char *pnp) 118 { 119 struct ata_channel *chan = aux; 120 121 if (pnp) 122 aprint_normal("atabus at %s", pnp); 123 aprint_normal(" channel %d", chan->ch_channel); 124 125 return (UNCONF); 126 } 127 128 /* 129 * ataprint: 130 * 131 * Autoconfiguration print routine. 132 */ 133 int 134 ataprint(void *aux, const char *pnp) 135 { 136 struct ata_device *adev = aux; 137 138 if (pnp) 139 aprint_normal("wd at %s", pnp); 140 aprint_normal(" drive %d", adev->adev_drv_data->drive); 141 142 return (UNCONF); 143 } 144 145 /* 146 * ata_channel_attach: 147 * 148 * Common parts of attaching an atabus to an ATA controller channel. 149 */ 150 void 151 ata_channel_attach(struct ata_channel *chp) 152 { 153 154 if (chp->ch_flags & ATACH_DISABLED) 155 return; 156 157 callout_init(&chp->ch_callout); 158 159 TAILQ_INIT(&chp->ch_queue->queue_xfer); 160 chp->ch_queue->queue_freeze = 0; 161 chp->ch_queue->active_xfer = NULL; 162 163 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint); 164 } 165 166 static void 167 atabusconfig(struct atabus_softc *atabus_sc) 168 { 169 struct ata_channel *chp = atabus_sc->sc_chan; 170 struct atac_softc *atac = chp->ch_atac; 171 int i, s; 172 struct atabus_initq *atabus_initq = NULL; 173 174 /* Probe for the drives. */ 175 (*atac->atac_probe)(chp); 176 177 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 178 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 179 DEBUG_PROBE); 180 181 /* If no drives, abort here */ 182 for (i = 0; i < chp->ch_ndrive; i++) 183 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 184 break; 185 if (i == chp->ch_ndrive) 186 goto out; 187 188 /* Shortcut in case we've been shutdown */ 189 if (chp->ch_flags & ATACH_SHUTDOWN) 190 goto out; 191 192 /* Make sure the devices probe in atabus order to avoid jitter. */ 193 simple_lock(&atabus_interlock); 194 while(1) { 195 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 196 if (atabus_initq->atabus_sc == atabus_sc) 197 break; 198 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 199 &atabus_interlock); 200 } 201 simple_unlock(&atabus_interlock); 202 203 /* 204 * Attach an ATAPI bus, if needed. 205 */ 206 for (i = 0; i < chp->ch_ndrive; i++) { 207 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 208 #if NATAPIBUS > 0 209 (*atac->atac_atapibus_attach)(atabus_sc); 210 #else 211 /* 212 * Fake the autoconfig "not configured" message 213 */ 214 aprint_normal("atapibus at %s not configured\n", 215 atac->atac_dev.dv_xname); 216 chp->atapibus = NULL; 217 s = splbio(); 218 for (i = 0; i < chp->ch_ndrive; i++) 219 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 220 splx(s); 221 #endif 222 break; 223 } 224 } 225 226 for (i = 0; i < chp->ch_ndrive; i++) { 227 struct ata_device adev; 228 if ((chp->ch_drive[i].drive_flags & 229 (DRIVE_ATA | DRIVE_OLD)) == 0) { 230 continue; 231 } 232 memset(&adev, 0, sizeof(struct ata_device)); 233 adev.adev_bustype = atac->atac_bustype_ata; 234 adev.adev_channel = chp->ch_channel; 235 adev.adev_openings = 1; 236 adev.adev_drv_data = &chp->ch_drive[i]; 237 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev, 238 &adev, ataprint); 239 if (chp->ata_drives[i] != NULL) 240 ata_probe_caps(&chp->ch_drive[i]); 241 else { 242 s = splbio(); 243 chp->ch_drive[i].drive_flags &= 244 ~(DRIVE_ATA | DRIVE_OLD); 245 splx(s); 246 } 247 } 248 249 /* now that we know the drives, the controller can set its modes */ 250 if (atac->atac_set_modes) { 251 (*atac->atac_set_modes)(chp); 252 ata_print_modes(chp); 253 } 254 #if NATARAID > 0 255 if (atac->atac_cap & ATAC_CAP_RAID) 256 for (i = 0; i < chp->ch_ndrive; i++) 257 if (chp->ata_drives[i] != NULL) 258 ata_raid_check_component(chp->ata_drives[i]); 259 #endif /* NATARAID > 0 */ 260 261 /* 262 * reset drive_flags for unattached devices, reset state for attached 263 * ones 264 */ 265 s = splbio(); 266 for (i = 0; i < chp->ch_ndrive; i++) { 267 if (chp->ch_drive[i].drv_softc == NULL) 268 chp->ch_drive[i].drive_flags = 0; 269 else 270 chp->ch_drive[i].state = 0; 271 } 272 splx(s); 273 274 out: 275 if (atabus_initq == NULL) { 276 simple_lock(&atabus_interlock); 277 while(1) { 278 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 279 if (atabus_initq->atabus_sc == atabus_sc) 280 break; 281 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 282 &atabus_interlock); 283 } 284 simple_unlock(&atabus_interlock); 285 } 286 simple_lock(&atabus_interlock); 287 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 288 simple_unlock(&atabus_interlock); 289 290 free(atabus_initq, M_DEVBUF); 291 wakeup(&atabus_initq_head); 292 293 ata_delref(chp); 294 295 config_pending_decr(); 296 } 297 298 /* 299 * atabus_thread: 300 * 301 * Worker thread for the ATA bus. 302 */ 303 static void 304 atabus_thread(void *arg) 305 { 306 struct atabus_softc *sc = arg; 307 struct ata_channel *chp = sc->sc_chan; 308 struct ata_xfer *xfer; 309 int i, s; 310 311 s = splbio(); 312 chp->ch_flags |= ATACH_TH_RUN; 313 314 /* 315 * Probe the drives. Reset all flags to 0 to indicate to controllers 316 * that can re-probe that all drives must be probed.. 317 * 318 * Note: ch_ndrive may be changed during the probe. 319 */ 320 for (i = 0; i < ATA_MAXDRIVES; i++) 321 chp->ch_drive[i].drive_flags = 0; 322 splx(s); 323 324 /* Configure the devices on the bus. */ 325 if (sc->sc_sleeping == 1) { 326 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 327 sc->sc_sleeping = 0; 328 } else 329 atabusconfig(sc); 330 331 for (;;) { 332 s = splbio(); 333 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 334 (chp->ch_queue->active_xfer == NULL || 335 chp->ch_queue->queue_freeze == 0)) { 336 chp->ch_flags &= ~ATACH_TH_RUN; 337 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 338 chp->ch_flags |= ATACH_TH_RUN; 339 } 340 if (chp->ch_flags & ATACH_SHUTDOWN) { 341 splx(s); 342 break; 343 } 344 if (chp->ch_flags & ATACH_TH_RESET) { 345 /* 346 * ata_reset_channel() will freeze 2 times, so 347 * unfreeze one time. Not a problem as we're at splbio 348 */ 349 chp->ch_queue->queue_freeze--; 350 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 351 } else if (chp->ch_queue->active_xfer != NULL && 352 chp->ch_queue->queue_freeze == 1) { 353 /* 354 * Caller has bumped queue_freeze, decrease it. 355 */ 356 chp->ch_queue->queue_freeze--; 357 xfer = chp->ch_queue->active_xfer; 358 KASSERT(xfer != NULL); 359 (*xfer->c_start)(xfer->c_chp, xfer); 360 } else if (chp->ch_queue->queue_freeze > 1) 361 panic("ata_thread: queue_freeze"); 362 splx(s); 363 } 364 chp->ch_thread = NULL; 365 wakeup((void *)&chp->ch_flags); 366 kthread_exit(0); 367 } 368 369 /* 370 * atabus_create_thread: 371 * 372 * Helper routine to create the ATA bus worker thread. 373 */ 374 static void 375 atabus_create_thread(void *arg) 376 { 377 struct atabus_softc *sc = arg; 378 struct ata_channel *chp = sc->sc_chan; 379 int error; 380 381 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 382 "%s", sc->sc_dev.dv_xname)) != 0) 383 aprint_error("%s: unable to create kernel thread: error %d\n", 384 sc->sc_dev.dv_xname, error); 385 } 386 387 /* 388 * atabus_match: 389 * 390 * Autoconfiguration match routine. 391 */ 392 static int 393 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 394 { 395 struct ata_channel *chp = aux; 396 397 if (chp == NULL) 398 return (0); 399 400 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 401 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 402 return (0); 403 404 return (1); 405 } 406 407 /* 408 * atabus_attach: 409 * 410 * Autoconfiguration attach routine. 411 */ 412 static void 413 atabus_attach(struct device *parent, struct device *self, void *aux) 414 { 415 struct atabus_softc *sc = (void *) self; 416 struct ata_channel *chp = aux; 417 struct atabus_initq *initq; 418 419 sc->sc_chan = chp; 420 421 aprint_normal("\n"); 422 aprint_naive("\n"); 423 424 if (ata_addref(chp)) 425 return; 426 427 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 428 initq->atabus_sc = sc; 429 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 430 config_pending_incr(); 431 kthread_create(atabus_create_thread, sc); 432 433 sc->sc_sleeping = 0; 434 sc->sc_powerhook = powerhook_establish(atabus_powerhook, sc); 435 if (sc->sc_powerhook == NULL) 436 printf("%s: WARNING: unable to establish power hook\n", 437 sc->sc_dev.dv_xname); 438 } 439 440 /* 441 * atabus_activate: 442 * 443 * Autoconfiguration activation routine. 444 */ 445 static int 446 atabus_activate(struct device *self, enum devact act) 447 { 448 struct atabus_softc *sc = (void *) self; 449 struct ata_channel *chp = sc->sc_chan; 450 struct device *dev = NULL; 451 int s, i, error = 0; 452 453 s = splbio(); 454 switch (act) { 455 case DVACT_ACTIVATE: 456 error = EOPNOTSUPP; 457 break; 458 459 case DVACT_DEACTIVATE: 460 /* 461 * We might deactivate the children of atapibus twice 462 * (once bia atapibus, once directly), but since the 463 * generic autoconfiguration code maintains the DVF_ACTIVE 464 * flag, it's safe. 465 */ 466 if ((dev = chp->atapibus) != NULL) { 467 error = config_deactivate(dev); 468 if (error) 469 goto out; 470 } 471 472 for (i = 0; i < chp->ch_ndrive; i++) { 473 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 474 ATADEBUG_PRINT(("atabus_activate: %s: " 475 "deactivating %s\n", sc->sc_dev.dv_xname, 476 dev->dv_xname), 477 DEBUG_DETACH); 478 error = config_deactivate(dev); 479 if (error) 480 goto out; 481 } 482 } 483 break; 484 } 485 out: 486 splx(s); 487 488 #ifdef ATADEBUG 489 if (dev != NULL && error != 0) 490 ATADEBUG_PRINT(("atabus_activate: %s: " 491 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 492 error, dev->dv_xname), DEBUG_DETACH); 493 #endif /* ATADEBUG */ 494 495 return (error); 496 } 497 498 /* 499 * atabus_detach: 500 * 501 * Autoconfiguration detach routine. 502 */ 503 static int 504 atabus_detach(struct device *self, int flags) 505 { 506 struct atabus_softc *sc = (void *) self; 507 struct ata_channel *chp = sc->sc_chan; 508 struct device *dev = NULL; 509 int s, i, error = 0; 510 511 /* Shutdown the channel. */ 512 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 513 chp->ch_flags |= ATACH_SHUTDOWN; 514 splx(s); 515 wakeup(&chp->ch_thread); 516 while (chp->ch_thread != NULL) 517 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0); 518 519 /* 520 * Detach atapibus and its children. 521 */ 522 if ((dev = chp->atapibus) != NULL) { 523 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 524 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 525 error = config_detach(dev, flags); 526 if (error) 527 goto out; 528 } 529 530 /* 531 * Detach our other children. 532 */ 533 for (i = 0; i < chp->ch_ndrive; i++) { 534 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 535 continue; 536 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 537 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 538 sc->sc_dev.dv_xname, dev->dv_xname), 539 DEBUG_DETACH); 540 error = config_detach(dev, flags); 541 if (error) 542 goto out; 543 } 544 } 545 546 out: 547 #ifdef ATADEBUG 548 if (dev != NULL && error != 0) 549 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 550 sc->sc_dev.dv_xname, error, dev->dv_xname), 551 DEBUG_DETACH); 552 #endif /* ATADEBUG */ 553 554 return (error); 555 } 556 557 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 558 atabus_match, atabus_attach, atabus_detach, atabus_activate); 559 560 /***************************************************************************** 561 * Common ATA bus operations. 562 *****************************************************************************/ 563 564 /* Get the disk's parameters */ 565 int 566 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 567 struct ataparams *prms) 568 { 569 char tb[DEV_BSIZE]; 570 struct ata_command ata_c; 571 struct ata_channel *chp = drvp->chnl_softc; 572 struct atac_softc *atac = chp->ch_atac; 573 574 #if BYTE_ORDER == LITTLE_ENDIAN 575 int i; 576 u_int16_t *p; 577 #endif 578 579 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 580 581 memset(tb, 0, DEV_BSIZE); 582 memset(prms, 0, sizeof(struct ataparams)); 583 memset(&ata_c, 0, sizeof(struct ata_command)); 584 585 if (drvp->drive_flags & DRIVE_ATA) { 586 ata_c.r_command = WDCC_IDENTIFY; 587 ata_c.r_st_bmask = WDCS_DRDY; 588 ata_c.r_st_pmask = 0; 589 ata_c.timeout = 3000; /* 3s */ 590 } else if (drvp->drive_flags & DRIVE_ATAPI) { 591 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 592 ata_c.r_st_bmask = 0; 593 ata_c.r_st_pmask = 0; 594 ata_c.timeout = 10000; /* 10s */ 595 } else { 596 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 597 DEBUG_FUNCS|DEBUG_PROBE); 598 return CMD_ERR; 599 } 600 ata_c.flags = AT_READ | flags; 601 ata_c.data = tb; 602 ata_c.bcount = DEV_BSIZE; 603 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 604 &ata_c) != ATACMD_COMPLETE) { 605 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 606 DEBUG_FUNCS|DEBUG_PROBE); 607 return CMD_AGAIN; 608 } 609 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 610 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 611 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 612 return CMD_ERR; 613 } else { 614 /* if we didn't read any data something is wrong */ 615 if ((ata_c.flags & AT_XFDONE) == 0) 616 return CMD_ERR; 617 /* Read in parameter block. */ 618 memcpy(prms, tb, sizeof(struct ataparams)); 619 #if BYTE_ORDER == LITTLE_ENDIAN 620 /* 621 * Shuffle string byte order. 622 * ATAPI Mitsumi and NEC drives don't need this. 623 */ 624 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 625 WDC_CFG_ATAPI && 626 ((prms->atap_model[0] == 'N' && 627 prms->atap_model[1] == 'E') || 628 (prms->atap_model[0] == 'F' && 629 prms->atap_model[1] == 'X'))) 630 return 0; 631 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 632 p = (u_short *)(prms->atap_model + i); 633 *p = ntohs(*p); 634 } 635 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 636 p = (u_short *)(prms->atap_serial + i); 637 *p = ntohs(*p); 638 } 639 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 640 p = (u_short *)(prms->atap_revision + i); 641 *p = ntohs(*p); 642 } 643 #endif 644 return CMD_OK; 645 } 646 } 647 648 int 649 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 650 { 651 struct ata_command ata_c; 652 struct ata_channel *chp = drvp->chnl_softc; 653 struct atac_softc *atac = chp->ch_atac; 654 655 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 656 memset(&ata_c, 0, sizeof(struct ata_command)); 657 658 ata_c.r_command = SET_FEATURES; 659 ata_c.r_st_bmask = 0; 660 ata_c.r_st_pmask = 0; 661 ata_c.r_features = WDSF_SET_MODE; 662 ata_c.r_count = mode; 663 ata_c.flags = flags; 664 ata_c.timeout = 1000; /* 1s */ 665 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 666 &ata_c) != ATACMD_COMPLETE) 667 return CMD_AGAIN; 668 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 669 return CMD_ERR; 670 } 671 return CMD_OK; 672 } 673 674 void 675 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 676 { 677 /* 678 * Downgrade decision: if we get NERRS_MAX in NXFER. 679 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 680 * first error within the first NXFER ops will immediatly trigger 681 * a downgrade. 682 * If we got an error and n_xfers is bigger than NXFER reset counters. 683 */ 684 drvp->n_dmaerrs++; 685 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 686 ata_downgrade_mode(drvp, flags); 687 drvp->n_dmaerrs = NERRS_MAX-1; 688 drvp->n_xfers = 0; 689 return; 690 } 691 if (drvp->n_xfers > NXFER) { 692 drvp->n_dmaerrs = 1; /* just got an error */ 693 drvp->n_xfers = 1; /* restart counting from this error */ 694 } 695 } 696 697 /* 698 * Add a command to the queue and start controller. 699 * 700 * MUST BE CALLED AT splbio()! 701 */ 702 void 703 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 704 { 705 706 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 707 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 708 709 /* complete xfer setup */ 710 xfer->c_chp = chp; 711 712 /* insert at the end of command list */ 713 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 714 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 715 chp->ch_flags), DEBUG_XFERS); 716 /* 717 * if polling and can sleep, wait for the xfer to be at head of queue 718 */ 719 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 720 while (chp->ch_queue->active_xfer != NULL || 721 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 722 xfer->c_flags |= C_WAITACT; 723 tsleep(xfer, PRIBIO, "ataact", 0); 724 xfer->c_flags &= ~C_WAITACT; 725 if (xfer->c_flags & C_FREE) { 726 ata_free_xfer(chp, xfer); 727 return; 728 } 729 } 730 } 731 atastart(chp); 732 } 733 734 /* 735 * Start I/O on a controller, for the given channel. 736 * The first xfer may be not for our channel if the channel queues 737 * are shared. 738 * 739 * MUST BE CALLED AT splbio()! 740 */ 741 void 742 atastart(struct ata_channel *chp) 743 { 744 struct atac_softc *atac = chp->ch_atac; 745 struct ata_xfer *xfer; 746 747 #ifdef ATA_DEBUG 748 int spl1, spl2; 749 750 spl1 = splbio(); 751 spl2 = splbio(); 752 if (spl2 != spl1) { 753 printf("atastart: not at splbio()\n"); 754 panic("atastart"); 755 } 756 splx(spl2); 757 splx(spl1); 758 #endif /* ATA_DEBUG */ 759 760 /* is there a xfer ? */ 761 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 762 return; 763 764 /* adjust chp, in case we have a shared queue */ 765 chp = xfer->c_chp; 766 767 if (chp->ch_queue->active_xfer != NULL) { 768 return; /* channel aleady active */ 769 } 770 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 771 return; /* queue froozen */ 772 } 773 /* 774 * if someone is waiting for the command to be active, wake it up 775 * and let it process the command 776 */ 777 if (xfer->c_flags & C_WAITACT) { 778 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 779 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 780 DEBUG_XFERS); 781 wakeup(xfer); 782 return; 783 } 784 #ifdef DIAGNOSTIC 785 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 786 panic("atastart: channel waiting for irq"); 787 #endif 788 if (atac->atac_claim_hw) 789 if (!(*atac->atac_claim_hw)(chp, 0)) 790 return; 791 792 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 793 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 794 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 795 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 796 chp->ch_drive[xfer->c_drive].state = 0; 797 } 798 chp->ch_queue->active_xfer = xfer; 799 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 800 801 if (atac->atac_cap & ATAC_CAP_NOIRQ) 802 KASSERT(xfer->c_flags & C_POLL); 803 804 xfer->c_start(chp, xfer); 805 } 806 807 struct ata_xfer * 808 ata_get_xfer(int flags) 809 { 810 struct ata_xfer *xfer; 811 int s; 812 813 s = splbio(); 814 xfer = pool_get(&ata_xfer_pool, 815 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 816 splx(s); 817 if (xfer != NULL) { 818 memset(xfer, 0, sizeof(struct ata_xfer)); 819 } 820 return xfer; 821 } 822 823 void 824 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 825 { 826 struct atac_softc *atac = chp->ch_atac; 827 int s; 828 829 if (xfer->c_flags & C_WAITACT) { 830 /* Someone is waiting for this xfer, so we can't free now */ 831 xfer->c_flags |= C_FREE; 832 wakeup(xfer); 833 return; 834 } 835 836 if (atac->atac_free_hw) 837 (*atac->atac_free_hw)(chp); 838 s = splbio(); 839 pool_put(&ata_xfer_pool, xfer); 840 splx(s); 841 } 842 843 /* 844 * Kill off all pending xfers for a ata_channel. 845 * 846 * Must be called at splbio(). 847 */ 848 void 849 ata_kill_pending(struct ata_drive_datas *drvp) 850 { 851 struct ata_channel *chp = drvp->chnl_softc; 852 struct ata_xfer *xfer, *next_xfer; 853 int s = splbio(); 854 855 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 856 xfer != NULL; xfer = next_xfer) { 857 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 858 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 859 continue; 860 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 861 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 862 } 863 864 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 865 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 866 drvp->drive_flags |= DRIVE_WAITDRAIN; 867 (void) tsleep(&chp->ch_queue->active_xfer, 868 PRIBIO, "atdrn", 0); 869 } else { 870 /* no more xfer for us */ 871 break; 872 } 873 } 874 splx(s); 875 } 876 877 /* 878 * ata_reset_channel: 879 * 880 * Reset and ATA channel. 881 * 882 * MUST BE CALLED AT splbio()! 883 */ 884 void 885 ata_reset_channel(struct ata_channel *chp, int flags) 886 { 887 struct atac_softc *atac = chp->ch_atac; 888 int drive; 889 890 #ifdef ATA_DEBUG 891 int spl1, spl2; 892 893 spl1 = splbio(); 894 spl2 = splbio(); 895 if (spl2 != spl1) { 896 printf("ata_reset_channel: not at splbio()\n"); 897 panic("ata_reset_channel"); 898 } 899 splx(spl2); 900 splx(spl1); 901 #endif /* ATA_DEBUG */ 902 903 chp->ch_queue->queue_freeze++; 904 905 /* 906 * If we can poll or wait it's OK, otherwise wake up the 907 * kernel thread to do it for us. 908 */ 909 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 910 if (chp->ch_flags & ATACH_TH_RESET) { 911 /* No need to schedule a reset more than one time. */ 912 chp->ch_queue->queue_freeze--; 913 return; 914 } 915 chp->ch_flags |= ATACH_TH_RESET; 916 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 917 wakeup(&chp->ch_thread); 918 return; 919 } 920 921 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 922 923 for (drive = 0; drive < chp->ch_ndrive; drive++) 924 chp->ch_drive[drive].state = 0; 925 926 chp->ch_flags &= ~ATACH_TH_RESET; 927 if ((flags & AT_RST_EMERG) == 0) { 928 chp->ch_queue->queue_freeze--; 929 atastart(chp); 930 } else { 931 /* make sure that we can use polled commands */ 932 TAILQ_INIT(&chp->ch_queue->queue_xfer); 933 chp->ch_queue->queue_freeze = 0; 934 chp->ch_queue->active_xfer = NULL; 935 } 936 } 937 938 int 939 ata_addref(struct ata_channel *chp) 940 { 941 struct atac_softc *atac = chp->ch_atac; 942 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 943 int s, error = 0; 944 945 s = splbio(); 946 if (adapt->adapt_refcnt++ == 0 && 947 adapt->adapt_enable != NULL) { 948 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 949 if (error) 950 adapt->adapt_refcnt--; 951 } 952 splx(s); 953 return (error); 954 } 955 956 void 957 ata_delref(struct ata_channel *chp) 958 { 959 struct atac_softc *atac = chp->ch_atac; 960 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 961 int s; 962 963 s = splbio(); 964 if (adapt->adapt_refcnt-- == 1 && 965 adapt->adapt_enable != NULL) 966 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 967 splx(s); 968 } 969 970 void 971 ata_print_modes(struct ata_channel *chp) 972 { 973 struct atac_softc *atac = chp->ch_atac; 974 int drive; 975 struct ata_drive_datas *drvp; 976 977 for (drive = 0; drive < 2; drive++) { 978 drvp = &chp->ch_drive[drive]; 979 if ((drvp->drive_flags & DRIVE) == 0) 980 continue; 981 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 982 drvp->drv_softc->dv_xname, 983 atac->atac_dev.dv_xname, 984 chp->ch_channel, drive, drvp->PIO_mode); 985 if (drvp->drive_flags & DRIVE_DMA) 986 aprint_normal(", DMA mode %d", drvp->DMA_mode); 987 if (drvp->drive_flags & DRIVE_UDMA) { 988 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 989 if (drvp->UDMA_mode == 2) 990 aprint_normal(" (Ultra/33)"); 991 else if (drvp->UDMA_mode == 4) 992 aprint_normal(" (Ultra/66)"); 993 else if (drvp->UDMA_mode == 5) 994 aprint_normal(" (Ultra/100)"); 995 else if (drvp->UDMA_mode == 6) 996 aprint_normal(" (Ultra/133)"); 997 } 998 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 999 aprint_normal(" (using DMA)"); 1000 aprint_normal("\n"); 1001 } 1002 } 1003 1004 /* 1005 * downgrade the transfer mode of a drive after an error. return 1 if 1006 * downgrade was possible, 0 otherwise. 1007 * 1008 * MUST BE CALLED AT splbio()! 1009 */ 1010 int 1011 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1012 { 1013 struct ata_channel *chp = drvp->chnl_softc; 1014 struct atac_softc *atac = chp->ch_atac; 1015 struct device *drv_dev = drvp->drv_softc; 1016 int cf_flags = drv_dev->dv_cfdata->cf_flags; 1017 1018 /* if drive or controller don't know its mode, we can't do much */ 1019 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1020 (atac->atac_set_modes == NULL)) 1021 return 0; 1022 /* current drive mode was set by a config flag, let it this way */ 1023 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1024 (cf_flags & ATA_CONFIG_DMA_SET) || 1025 (cf_flags & ATA_CONFIG_UDMA_SET)) 1026 return 0; 1027 1028 /* 1029 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1030 */ 1031 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1032 drvp->UDMA_mode--; 1033 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1034 drv_dev->dv_xname, drvp->UDMA_mode); 1035 } 1036 1037 /* 1038 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1039 */ 1040 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1041 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1042 drvp->PIO_mode = drvp->PIO_cap; 1043 printf("%s: transfer error, downgrading to PIO mode %d\n", 1044 drv_dev->dv_xname, drvp->PIO_mode); 1045 } else /* already using PIO, can't downgrade */ 1046 return 0; 1047 1048 (*atac->atac_set_modes)(chp); 1049 ata_print_modes(chp); 1050 /* reset the channel, which will shedule all drives for setup */ 1051 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1052 return 1; 1053 } 1054 1055 /* 1056 * Probe drive's capabilities, for use by the controller later 1057 * Assumes drvp points to an existing drive. 1058 */ 1059 void 1060 ata_probe_caps(struct ata_drive_datas *drvp) 1061 { 1062 struct ataparams params, params2; 1063 struct ata_channel *chp = drvp->chnl_softc; 1064 struct atac_softc *atac = chp->ch_atac; 1065 struct device *drv_dev = drvp->drv_softc; 1066 int i, printed, s; 1067 char *sep = ""; 1068 int cf_flags; 1069 1070 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1071 /* IDENTIFY failed. Can't tell more about the device */ 1072 return; 1073 } 1074 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1075 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1076 /* 1077 * Controller claims 16 and 32 bit transfers. 1078 * Re-do an IDENTIFY with 32-bit transfers, 1079 * and compare results. 1080 */ 1081 s = splbio(); 1082 drvp->drive_flags |= DRIVE_CAP32; 1083 splx(s); 1084 ata_get_params(drvp, AT_WAIT, ¶ms2); 1085 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1086 /* Not good. fall back to 16bits */ 1087 s = splbio(); 1088 drvp->drive_flags &= ~DRIVE_CAP32; 1089 splx(s); 1090 } else { 1091 aprint_normal("%s: 32-bit data port\n", 1092 drv_dev->dv_xname); 1093 } 1094 } 1095 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1096 if (params.atap_ata_major > 0x01 && 1097 params.atap_ata_major != 0xffff) { 1098 for (i = 14; i > 0; i--) { 1099 if (params.atap_ata_major & (1 << i)) { 1100 aprint_normal("%s: ATA version %d\n", 1101 drv_dev->dv_xname, i); 1102 drvp->ata_vers = i; 1103 break; 1104 } 1105 } 1106 } 1107 #endif 1108 1109 /* An ATAPI device is at last PIO mode 3 */ 1110 if (drvp->drive_flags & DRIVE_ATAPI) 1111 drvp->PIO_mode = 3; 1112 1113 /* 1114 * It's not in the specs, but it seems that some drive 1115 * returns 0xffff in atap_extensions when this field is invalid 1116 */ 1117 if (params.atap_extensions != 0xffff && 1118 (params.atap_extensions & WDC_EXT_MODES)) { 1119 printed = 0; 1120 /* 1121 * XXX some drives report something wrong here (they claim to 1122 * support PIO mode 8 !). As mode is coded on 3 bits in 1123 * SET FEATURE, limit it to 7 (so limit i to 4). 1124 * If higher mode than 7 is found, abort. 1125 */ 1126 for (i = 7; i >= 0; i--) { 1127 if ((params.atap_piomode_supp & (1 << i)) == 0) 1128 continue; 1129 if (i > 4) 1130 return; 1131 /* 1132 * See if mode is accepted. 1133 * If the controller can't set its PIO mode, 1134 * assume the defaults are good, so don't try 1135 * to set it 1136 */ 1137 if (atac->atac_set_modes) 1138 /* 1139 * It's OK to pool here, it's fast enouth 1140 * to not bother waiting for interrupt 1141 */ 1142 if (ata_set_mode(drvp, 0x08 | (i + 3), 1143 AT_WAIT) != CMD_OK) 1144 continue; 1145 if (!printed) { 1146 aprint_normal("%s: drive supports PIO mode %d", 1147 drv_dev->dv_xname, i + 3); 1148 sep = ","; 1149 printed = 1; 1150 } 1151 /* 1152 * If controller's driver can't set its PIO mode, 1153 * get the highter one for the drive. 1154 */ 1155 if (atac->atac_set_modes == NULL || 1156 atac->atac_pio_cap >= i + 3) { 1157 drvp->PIO_mode = i + 3; 1158 drvp->PIO_cap = i + 3; 1159 break; 1160 } 1161 } 1162 if (!printed) { 1163 /* 1164 * We didn't find a valid PIO mode. 1165 * Assume the values returned for DMA are buggy too 1166 */ 1167 return; 1168 } 1169 s = splbio(); 1170 drvp->drive_flags |= DRIVE_MODE; 1171 splx(s); 1172 printed = 0; 1173 for (i = 7; i >= 0; i--) { 1174 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1175 continue; 1176 if ((atac->atac_cap & ATAC_CAP_DMA) && 1177 atac->atac_set_modes != NULL) 1178 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1179 != CMD_OK) 1180 continue; 1181 if (!printed) { 1182 aprint_normal("%s DMA mode %d", sep, i); 1183 sep = ","; 1184 printed = 1; 1185 } 1186 if (atac->atac_cap & ATAC_CAP_DMA) { 1187 if (atac->atac_set_modes != NULL && 1188 atac->atac_dma_cap < i) 1189 continue; 1190 drvp->DMA_mode = i; 1191 drvp->DMA_cap = i; 1192 s = splbio(); 1193 drvp->drive_flags |= DRIVE_DMA; 1194 splx(s); 1195 } 1196 break; 1197 } 1198 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1199 printed = 0; 1200 for (i = 7; i >= 0; i--) { 1201 if ((params.atap_udmamode_supp & (1 << i)) 1202 == 0) 1203 continue; 1204 if (atac->atac_set_modes != NULL && 1205 (atac->atac_cap & ATAC_CAP_UDMA)) 1206 if (ata_set_mode(drvp, 0x40 | i, 1207 AT_WAIT) != CMD_OK) 1208 continue; 1209 if (!printed) { 1210 aprint_normal("%s Ultra-DMA mode %d", 1211 sep, i); 1212 if (i == 2) 1213 aprint_normal(" (Ultra/33)"); 1214 else if (i == 4) 1215 aprint_normal(" (Ultra/66)"); 1216 else if (i == 5) 1217 aprint_normal(" (Ultra/100)"); 1218 else if (i == 6) 1219 aprint_normal(" (Ultra/133)"); 1220 sep = ","; 1221 printed = 1; 1222 } 1223 if (atac->atac_cap & ATAC_CAP_UDMA) { 1224 if (atac->atac_set_modes != NULL && 1225 atac->atac_udma_cap < i) 1226 continue; 1227 drvp->UDMA_mode = i; 1228 drvp->UDMA_cap = i; 1229 s = splbio(); 1230 drvp->drive_flags |= DRIVE_UDMA; 1231 splx(s); 1232 } 1233 break; 1234 } 1235 } 1236 aprint_normal("\n"); 1237 } 1238 1239 s = splbio(); 1240 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1241 if (drvp->drive_flags & DRIVE_ATAPI) { 1242 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1243 drvp->drive_flags |= DRIVE_NOSTREAM; 1244 } else { 1245 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1246 drvp->drive_flags |= DRIVE_NOSTREAM; 1247 } 1248 splx(s); 1249 1250 /* Try to guess ATA version here, if it didn't get reported */ 1251 if (drvp->ata_vers == 0) { 1252 if (drvp->drive_flags & DRIVE_UDMA) 1253 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1254 else if (drvp->PIO_cap > 2) 1255 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1256 } 1257 cf_flags = drv_dev->dv_cfdata->cf_flags; 1258 if (cf_flags & ATA_CONFIG_PIO_SET) { 1259 s = splbio(); 1260 drvp->PIO_mode = 1261 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1262 drvp->drive_flags |= DRIVE_MODE; 1263 splx(s); 1264 } 1265 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1266 /* don't care about DMA modes */ 1267 return; 1268 } 1269 if (cf_flags & ATA_CONFIG_DMA_SET) { 1270 s = splbio(); 1271 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1272 ATA_CONFIG_DMA_DISABLE) { 1273 drvp->drive_flags &= ~DRIVE_DMA; 1274 } else { 1275 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1276 ATA_CONFIG_DMA_OFF; 1277 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1278 } 1279 splx(s); 1280 } 1281 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1282 /* don't care about UDMA modes */ 1283 return; 1284 } 1285 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1286 s = splbio(); 1287 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1288 ATA_CONFIG_UDMA_DISABLE) { 1289 drvp->drive_flags &= ~DRIVE_UDMA; 1290 } else { 1291 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1292 ATA_CONFIG_UDMA_OFF; 1293 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1294 } 1295 splx(s); 1296 } 1297 } 1298 1299 /* management of the /dev/atabus* devices */ 1300 int 1301 atabusopen(dev_t dev, int flag, int fmt, struct proc *p) 1302 { 1303 struct atabus_softc *sc; 1304 int error, unit = minor(dev); 1305 1306 if (unit >= atabus_cd.cd_ndevs || 1307 (sc = atabus_cd.cd_devs[unit]) == NULL) 1308 return (ENXIO); 1309 1310 if (sc->sc_flags & ATABUSCF_OPEN) 1311 return (EBUSY); 1312 1313 if ((error = ata_addref(sc->sc_chan)) != 0) 1314 return (error); 1315 1316 sc->sc_flags |= ATABUSCF_OPEN; 1317 1318 return (0); 1319 } 1320 1321 1322 int 1323 atabusclose(dev_t dev, int flag, int fmt, struct proc *p) 1324 { 1325 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1326 1327 ata_delref(sc->sc_chan); 1328 1329 sc->sc_flags &= ~ATABUSCF_OPEN; 1330 1331 return (0); 1332 } 1333 1334 int 1335 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p) 1336 { 1337 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1338 struct ata_channel *chp = sc->sc_chan; 1339 int min_drive, max_drive, drive; 1340 int error; 1341 int s; 1342 1343 /* 1344 * Enforce write permission for ioctls that change the 1345 * state of the bus. Host adapter specific ioctls must 1346 * be checked by the adapter driver. 1347 */ 1348 switch (cmd) { 1349 case ATABUSIOSCAN: 1350 case ATABUSIODETACH: 1351 case ATABUSIORESET: 1352 if ((flag & FWRITE) == 0) 1353 return (EBADF); 1354 } 1355 1356 switch (cmd) { 1357 case ATABUSIORESET: 1358 s = splbio(); 1359 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1360 splx(s); 1361 error = 0; 1362 break; 1363 case ATABUSIOSCAN: 1364 { 1365 #if 0 1366 struct atabusioscan_args *a= 1367 (struct atabusioscan_args *)addr; 1368 #endif 1369 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1370 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1371 return (EOPNOTSUPP); 1372 return (EOPNOTSUPP); 1373 } 1374 case ATABUSIODETACH: 1375 { 1376 struct atabusioscan_args *a= 1377 (struct atabusioscan_args *)addr; 1378 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1379 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1380 return (EOPNOTSUPP); 1381 switch (a->at_dev) { 1382 case -1: 1383 min_drive = 0; 1384 max_drive = 1; 1385 break; 1386 case 0: 1387 case 1: 1388 min_drive = max_drive = a->at_dev; 1389 break; 1390 default: 1391 return (EINVAL); 1392 } 1393 for (drive = min_drive; drive <= max_drive; drive++) { 1394 if (chp->ch_drive[drive].drv_softc != NULL) { 1395 error = config_detach( 1396 chp->ch_drive[drive].drv_softc, 0); 1397 if (error) 1398 return (error); 1399 chp->ch_drive[drive].drv_softc = NULL; 1400 } 1401 } 1402 error = 0; 1403 break; 1404 } 1405 default: 1406 error = ENOTTY; 1407 } 1408 return (error); 1409 }; 1410 1411 static void 1412 atabus_powerhook(int why, void *hdl) 1413 { 1414 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1415 struct ata_channel *chp = sc->sc_chan; 1416 int s; 1417 1418 switch (why) { 1419 case PWR_SOFTSUSPEND: 1420 case PWR_SOFTSTANDBY: 1421 sc->sc_sleeping = 1; 1422 s = splbio(); 1423 chp->ch_flags = ATACH_SHUTDOWN; 1424 splx(s); 1425 wakeup(&chp->ch_thread); 1426 while (chp->ch_thread != NULL) 1427 (void) tsleep((void *)&chp->ch_flags, PRIBIO, 1428 "atadown", 0); 1429 break; 1430 case PWR_RESUME: 1431 atabus_create_thread(sc); 1432 break; 1433 case PWR_SUSPEND: 1434 case PWR_STANDBY: 1435 case PWR_SOFTRESUME: 1436 break; 1437 } 1438 1439 return; 1440 } 1441
Indexes created Thu Sep 25 02:09:54 GMT 2025