ata.c revision 1.67
1 /* $NetBSD: ata.c,v 1.67 2005/04/11 04:24:54 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.67 2005/04/11 04:24:54 matt Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 81 82 /* 83 * A queue of atabus instances, used to ensure the same bus probe order 84 * for a given hardware configuration at each boot. 85 */ 86 struct atabus_initq_head atabus_initq_head = 87 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 88 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 89 90 /***************************************************************************** 91 * ATA bus layer. 92 * 93 * ATA controllers attach an atabus instance, which handles probing the bus 94 * for drives, etc. 95 *****************************************************************************/ 96 97 dev_type_open(atabusopen); 98 dev_type_close(atabusclose); 99 dev_type_ioctl(atabusioctl); 100 101 const struct cdevsw atabus_cdevsw = { 102 atabusopen, atabusclose, noread, nowrite, atabusioctl, 103 nostop, notty, nopoll, nommap, nokqfilter, 104 }; 105 106 extern struct cfdriver atabus_cd; 107 108 static void atabus_powerhook(int, void *); 109 110 /* 111 * atabusprint: 112 * 113 * Autoconfiguration print routine used by ATA controllers when 114 * attaching an atabus instance. 115 */ 116 int 117 atabusprint(void *aux, const char *pnp) 118 { 119 struct ata_channel *chan = aux; 120 121 if (pnp) 122 aprint_normal("atabus at %s", pnp); 123 aprint_normal(" channel %d", chan->ch_channel); 124 125 return (UNCONF); 126 } 127 128 /* 129 * ataprint: 130 * 131 * Autoconfiguration print routine. 132 */ 133 int 134 ataprint(void *aux, const char *pnp) 135 { 136 struct ata_device *adev = aux; 137 138 if (pnp) 139 aprint_normal("wd at %s", pnp); 140 aprint_normal(" drive %d", adev->adev_drv_data->drive); 141 142 return (UNCONF); 143 } 144 145 /* 146 * ata_channel_attach: 147 * 148 * Common parts of attaching an atabus to an ATA controller channel. 149 */ 150 void 151 ata_channel_attach(struct ata_channel *chp) 152 { 153 154 if (chp->ch_flags & ATACH_DISABLED) 155 return; 156 157 callout_init(&chp->ch_callout); 158 159 TAILQ_INIT(&chp->ch_queue->queue_xfer); 160 chp->ch_queue->queue_freeze = 0; 161 chp->ch_queue->active_xfer = NULL; 162 163 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint); 164 } 165 166 static void 167 atabusconfig(struct atabus_softc *atabus_sc) 168 { 169 struct ata_channel *chp = atabus_sc->sc_chan; 170 struct atac_softc *atac = chp->ch_atac; 171 int i, s; 172 struct atabus_initq *atabus_initq = NULL; 173 174 /* Probe for the drives. */ 175 (*atac->atac_probe)(chp); 176 177 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 178 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 179 DEBUG_PROBE); 180 181 /* If no drives, abort here */ 182 for (i = 0; i < chp->ch_ndrive; i++) 183 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 184 break; 185 if (i == chp->ch_ndrive) 186 goto out; 187 188 /* Shortcut in case we've been shutdown */ 189 if (chp->ch_flags & ATACH_SHUTDOWN) 190 goto out; 191 192 /* Make sure the devices probe in atabus order to avoid jitter. */ 193 simple_lock(&atabus_interlock); 194 while(1) { 195 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 196 if (atabus_initq->atabus_sc == atabus_sc) 197 break; 198 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 199 &atabus_interlock); 200 } 201 simple_unlock(&atabus_interlock); 202 203 /* 204 * Attach an ATAPI bus, if needed. 205 */ 206 for (i = 0; i < chp->ch_ndrive; i++) { 207 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 208 #if NATAPIBUS > 0 209 (*atac->atac_atapibus_attach)(atabus_sc); 210 #else 211 /* 212 * Fake the autoconfig "not configured" message 213 */ 214 aprint_normal("atapibus at %s not configured\n", 215 atac->atac_dev.dv_xname); 216 chp->atapibus = NULL; 217 s = splbio(); 218 for (i = 0; i < chp->ch_ndrive; i++) 219 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 220 splx(s); 221 #endif 222 break; 223 } 224 } 225 226 for (i = 0; i < chp->ch_ndrive; i++) { 227 struct ata_device adev; 228 if ((chp->ch_drive[i].drive_flags & 229 (DRIVE_ATA | DRIVE_OLD)) == 0) { 230 continue; 231 } 232 memset(&adev, 0, sizeof(struct ata_device)); 233 adev.adev_bustype = atac->atac_bustype_ata; 234 adev.adev_channel = chp->ch_channel; 235 adev.adev_openings = 1; 236 adev.adev_drv_data = &chp->ch_drive[i]; 237 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev, 238 &adev, ataprint); 239 if (chp->ata_drives[i] != NULL) 240 ata_probe_caps(&chp->ch_drive[i]); 241 else { 242 s = splbio(); 243 chp->ch_drive[i].drive_flags &= 244 ~(DRIVE_ATA | DRIVE_OLD); 245 splx(s); 246 } 247 } 248 249 /* now that we know the drives, the controller can set its modes */ 250 if (atac->atac_set_modes) { 251 (*atac->atac_set_modes)(chp); 252 ata_print_modes(chp); 253 } 254 #if NATARAID > 0 255 if (atac->atac_cap & ATAC_CAP_RAID) 256 for (i = 0; i < chp->ch_ndrive; i++) 257 if (chp->ata_drives[i] != NULL) 258 ata_raid_check_component(chp->ata_drives[i]); 259 #endif /* NATARAID > 0 */ 260 261 /* 262 * reset drive_flags for unattached devices, reset state for attached 263 * ones 264 */ 265 s = splbio(); 266 for (i = 0; i < chp->ch_ndrive; i++) { 267 if (chp->ch_drive[i].drv_softc == NULL) 268 chp->ch_drive[i].drive_flags = 0; 269 else 270 chp->ch_drive[i].state = 0; 271 } 272 splx(s); 273 274 out: 275 if (atabus_initq == NULL) { 276 simple_lock(&atabus_interlock); 277 while(1) { 278 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 279 if (atabus_initq->atabus_sc == atabus_sc) 280 break; 281 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 282 &atabus_interlock); 283 } 284 simple_unlock(&atabus_interlock); 285 } 286 simple_lock(&atabus_interlock); 287 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 288 simple_unlock(&atabus_interlock); 289 290 free(atabus_initq, M_DEVBUF); 291 wakeup(&atabus_initq_head); 292 293 ata_delref(chp); 294 295 config_pending_decr(); 296 } 297 298 /* 299 * atabus_thread: 300 * 301 * Worker thread for the ATA bus. 302 */ 303 static void 304 atabus_thread(void *arg) 305 { 306 struct atabus_softc *sc = arg; 307 struct ata_channel *chp = sc->sc_chan; 308 struct ata_xfer *xfer; 309 int i, s; 310 311 s = splbio(); 312 chp->ch_flags |= ATACH_TH_RUN; 313 314 /* 315 * Probe the drives. Reset all flags to 0 to indicate to controllers 316 * that can re-probe that all drives must be probed.. 317 * 318 * Note: ch_ndrive may be changed during the probe. 319 */ 320 for (i = 0; i < ATA_MAXDRIVES; i++) 321 chp->ch_drive[i].drive_flags = 0; 322 splx(s); 323 324 /* Configure the devices on the bus. */ 325 if (sc->sc_sleeping == 1) { 326 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 327 sc->sc_sleeping = 0; 328 } else 329 atabusconfig(sc); 330 331 for (;;) { 332 s = splbio(); 333 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 334 (chp->ch_queue->active_xfer == NULL || 335 chp->ch_queue->queue_freeze == 0)) { 336 chp->ch_flags &= ~ATACH_TH_RUN; 337 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 338 chp->ch_flags |= ATACH_TH_RUN; 339 } 340 if (chp->ch_flags & ATACH_SHUTDOWN) { 341 splx(s); 342 break; 343 } 344 if (chp->ch_flags & ATACH_TH_RESET) { 345 /* 346 * ata_reset_channel() will freeze 2 times, so 347 * unfreeze one time. Not a problem as we're at splbio 348 */ 349 chp->ch_queue->queue_freeze--; 350 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 351 } else if (chp->ch_queue->active_xfer != NULL && 352 chp->ch_queue->queue_freeze == 1) { 353 /* 354 * Caller has bumped queue_freeze, decrease it. 355 */ 356 chp->ch_queue->queue_freeze--; 357 xfer = chp->ch_queue->active_xfer; 358 KASSERT(xfer != NULL); 359 (*xfer->c_start)(xfer->c_chp, xfer); 360 } else if (chp->ch_queue->queue_freeze > 1) 361 panic("ata_thread: queue_freeze"); 362 splx(s); 363 } 364 chp->ch_thread = NULL; 365 wakeup((void *)&chp->ch_flags); 366 kthread_exit(0); 367 } 368 369 /* 370 * atabus_create_thread: 371 * 372 * Helper routine to create the ATA bus worker thread. 373 */ 374 static void 375 atabus_create_thread(void *arg) 376 { 377 struct atabus_softc *sc = arg; 378 struct ata_channel *chp = sc->sc_chan; 379 int error; 380 381 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 382 "%s", sc->sc_dev.dv_xname)) != 0) 383 aprint_error("%s: unable to create kernel thread: error %d\n", 384 sc->sc_dev.dv_xname, error); 385 } 386 387 /* 388 * atabus_match: 389 * 390 * Autoconfiguration match routine. 391 */ 392 static int 393 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 394 { 395 struct ata_channel *chp = aux; 396 397 if (chp == NULL) 398 return (0); 399 400 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 401 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 402 return (0); 403 404 return (1); 405 } 406 407 /* 408 * atabus_attach: 409 * 410 * Autoconfiguration attach routine. 411 */ 412 static void 413 atabus_attach(struct device *parent, struct device *self, void *aux) 414 { 415 struct atabus_softc *sc = (void *) self; 416 struct ata_channel *chp = aux; 417 struct atabus_initq *initq; 418 419 sc->sc_chan = chp; 420 421 aprint_normal("\n"); 422 aprint_naive("\n"); 423 424 if (ata_addref(chp)) 425 return; 426 427 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 428 initq->atabus_sc = sc; 429 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 430 config_pending_incr(); 431 kthread_create(atabus_create_thread, sc); 432 433 sc->sc_sleeping = 0; 434 sc->sc_powerhook = powerhook_establish(atabus_powerhook, sc); 435 if (sc->sc_powerhook == NULL) 436 printf("%s: WARNING: unable to establish power hook\n", 437 sc->sc_dev.dv_xname); 438 } 439 440 /* 441 * atabus_activate: 442 * 443 * Autoconfiguration activation routine. 444 */ 445 static int 446 atabus_activate(struct device *self, enum devact act) 447 { 448 struct atabus_softc *sc = (void *) self; 449 struct ata_channel *chp = sc->sc_chan; 450 struct device *dev = NULL; 451 int s, i, error = 0; 452 453 s = splbio(); 454 switch (act) { 455 case DVACT_ACTIVATE: 456 error = EOPNOTSUPP; 457 break; 458 459 case DVACT_DEACTIVATE: 460 /* 461 * We might deactivate the children of atapibus twice 462 * (once bia atapibus, once directly), but since the 463 * generic autoconfiguration code maintains the DVF_ACTIVE 464 * flag, it's safe. 465 */ 466 if ((dev = chp->atapibus) != NULL) { 467 error = config_deactivate(dev); 468 if (error) 469 goto out; 470 } 471 472 for (i = 0; i < chp->ch_ndrive; i++) { 473 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 474 ATADEBUG_PRINT(("atabus_activate: %s: " 475 "deactivating %s\n", sc->sc_dev.dv_xname, 476 dev->dv_xname), 477 DEBUG_DETACH); 478 error = config_deactivate(dev); 479 if (error) 480 goto out; 481 } 482 } 483 break; 484 } 485 out: 486 splx(s); 487 488 #ifdef ATADEBUG 489 if (dev != NULL && error != 0) 490 ATADEBUG_PRINT(("atabus_activate: %s: " 491 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 492 error, dev->dv_xname), DEBUG_DETACH); 493 #endif /* ATADEBUG */ 494 495 return (error); 496 } 497 498 /* 499 * atabus_detach: 500 * 501 * Autoconfiguration detach routine. 502 */ 503 static int 504 atabus_detach(struct device *self, int flags) 505 { 506 struct atabus_softc *sc = (void *) self; 507 struct ata_channel *chp = sc->sc_chan; 508 struct device *dev = NULL; 509 int s, i, error = 0; 510 511 /* Shutdown the channel. */ 512 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 513 chp->ch_flags |= ATACH_SHUTDOWN; 514 splx(s); 515 wakeup(&chp->ch_thread); 516 while (chp->ch_thread != NULL) 517 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0); 518 519 /* power hook */ 520 if (sc->sc_powerhook) 521 powerhook_disestablish(sc->sc_powerhook); 522 523 /* 524 * Detach atapibus and its children. 525 */ 526 if ((dev = chp->atapibus) != NULL) { 527 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 528 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 529 error = config_detach(dev, flags); 530 if (error) 531 goto out; 532 } 533 534 /* 535 * Detach our other children. 536 */ 537 for (i = 0; i < chp->ch_ndrive; i++) { 538 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 539 continue; 540 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 541 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 542 sc->sc_dev.dv_xname, dev->dv_xname), 543 DEBUG_DETACH); 544 error = config_detach(dev, flags); 545 if (error) 546 goto out; 547 } 548 } 549 550 out: 551 #ifdef ATADEBUG 552 if (dev != NULL && error != 0) 553 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 554 sc->sc_dev.dv_xname, error, dev->dv_xname), 555 DEBUG_DETACH); 556 #endif /* ATADEBUG */ 557 558 return (error); 559 } 560 561 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 562 atabus_match, atabus_attach, atabus_detach, atabus_activate); 563 564 /***************************************************************************** 565 * Common ATA bus operations. 566 *****************************************************************************/ 567 568 /* Get the disk's parameters */ 569 int 570 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 571 struct ataparams *prms) 572 { 573 char tb[DEV_BSIZE]; 574 struct ata_command ata_c; 575 struct ata_channel *chp = drvp->chnl_softc; 576 struct atac_softc *atac = chp->ch_atac; 577 578 #if BYTE_ORDER == LITTLE_ENDIAN 579 int i; 580 u_int16_t *p; 581 #endif 582 583 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 584 585 memset(tb, 0, DEV_BSIZE); 586 memset(prms, 0, sizeof(struct ataparams)); 587 memset(&ata_c, 0, sizeof(struct ata_command)); 588 589 if (drvp->drive_flags & DRIVE_ATA) { 590 ata_c.r_command = WDCC_IDENTIFY; 591 ata_c.r_st_bmask = WDCS_DRDY; 592 ata_c.r_st_pmask = 0; 593 ata_c.timeout = 3000; /* 3s */ 594 } else if (drvp->drive_flags & DRIVE_ATAPI) { 595 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 596 ata_c.r_st_bmask = 0; 597 ata_c.r_st_pmask = 0; 598 ata_c.timeout = 10000; /* 10s */ 599 } else { 600 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 601 DEBUG_FUNCS|DEBUG_PROBE); 602 return CMD_ERR; 603 } 604 ata_c.flags = AT_READ | flags; 605 ata_c.data = tb; 606 ata_c.bcount = DEV_BSIZE; 607 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 608 &ata_c) != ATACMD_COMPLETE) { 609 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 610 DEBUG_FUNCS|DEBUG_PROBE); 611 return CMD_AGAIN; 612 } 613 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 614 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 615 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 616 return CMD_ERR; 617 } else { 618 /* if we didn't read any data something is wrong */ 619 if ((ata_c.flags & AT_XFDONE) == 0) 620 return CMD_ERR; 621 /* Read in parameter block. */ 622 memcpy(prms, tb, sizeof(struct ataparams)); 623 #if BYTE_ORDER == LITTLE_ENDIAN 624 /* 625 * Shuffle string byte order. 626 * ATAPI Mitsumi and NEC drives don't need this. 627 */ 628 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 629 WDC_CFG_ATAPI && 630 ((prms->atap_model[0] == 'N' && 631 prms->atap_model[1] == 'E') || 632 (prms->atap_model[0] == 'F' && 633 prms->atap_model[1] == 'X'))) 634 return 0; 635 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 636 p = (u_short *)(prms->atap_model + i); 637 *p = ntohs(*p); 638 } 639 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 640 p = (u_short *)(prms->atap_serial + i); 641 *p = ntohs(*p); 642 } 643 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 644 p = (u_short *)(prms->atap_revision + i); 645 *p = ntohs(*p); 646 } 647 #endif 648 return CMD_OK; 649 } 650 } 651 652 int 653 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 654 { 655 struct ata_command ata_c; 656 struct ata_channel *chp = drvp->chnl_softc; 657 struct atac_softc *atac = chp->ch_atac; 658 659 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 660 memset(&ata_c, 0, sizeof(struct ata_command)); 661 662 ata_c.r_command = SET_FEATURES; 663 ata_c.r_st_bmask = 0; 664 ata_c.r_st_pmask = 0; 665 ata_c.r_features = WDSF_SET_MODE; 666 ata_c.r_count = mode; 667 ata_c.flags = flags; 668 ata_c.timeout = 1000; /* 1s */ 669 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 670 &ata_c) != ATACMD_COMPLETE) 671 return CMD_AGAIN; 672 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 673 return CMD_ERR; 674 } 675 return CMD_OK; 676 } 677 678 void 679 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 680 { 681 /* 682 * Downgrade decision: if we get NERRS_MAX in NXFER. 683 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 684 * first error within the first NXFER ops will immediatly trigger 685 * a downgrade. 686 * If we got an error and n_xfers is bigger than NXFER reset counters. 687 */ 688 drvp->n_dmaerrs++; 689 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 690 ata_downgrade_mode(drvp, flags); 691 drvp->n_dmaerrs = NERRS_MAX-1; 692 drvp->n_xfers = 0; 693 return; 694 } 695 if (drvp->n_xfers > NXFER) { 696 drvp->n_dmaerrs = 1; /* just got an error */ 697 drvp->n_xfers = 1; /* restart counting from this error */ 698 } 699 } 700 701 /* 702 * Add a command to the queue and start controller. 703 * 704 * MUST BE CALLED AT splbio()! 705 */ 706 void 707 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 708 { 709 710 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 711 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 712 713 /* complete xfer setup */ 714 xfer->c_chp = chp; 715 716 /* insert at the end of command list */ 717 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 718 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 719 chp->ch_flags), DEBUG_XFERS); 720 /* 721 * if polling and can sleep, wait for the xfer to be at head of queue 722 */ 723 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 724 while (chp->ch_queue->active_xfer != NULL || 725 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 726 xfer->c_flags |= C_WAITACT; 727 tsleep(xfer, PRIBIO, "ataact", 0); 728 xfer->c_flags &= ~C_WAITACT; 729 if (xfer->c_flags & C_FREE) { 730 ata_free_xfer(chp, xfer); 731 return; 732 } 733 } 734 } 735 atastart(chp); 736 } 737 738 /* 739 * Start I/O on a controller, for the given channel. 740 * The first xfer may be not for our channel if the channel queues 741 * are shared. 742 * 743 * MUST BE CALLED AT splbio()! 744 */ 745 void 746 atastart(struct ata_channel *chp) 747 { 748 struct atac_softc *atac = chp->ch_atac; 749 struct ata_xfer *xfer; 750 751 #ifdef ATA_DEBUG 752 int spl1, spl2; 753 754 spl1 = splbio(); 755 spl2 = splbio(); 756 if (spl2 != spl1) { 757 printf("atastart: not at splbio()\n"); 758 panic("atastart"); 759 } 760 splx(spl2); 761 splx(spl1); 762 #endif /* ATA_DEBUG */ 763 764 /* is there a xfer ? */ 765 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 766 return; 767 768 /* adjust chp, in case we have a shared queue */ 769 chp = xfer->c_chp; 770 771 if (chp->ch_queue->active_xfer != NULL) { 772 return; /* channel aleady active */ 773 } 774 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 775 return; /* queue froozen */ 776 } 777 /* 778 * if someone is waiting for the command to be active, wake it up 779 * and let it process the command 780 */ 781 if (xfer->c_flags & C_WAITACT) { 782 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 783 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 784 DEBUG_XFERS); 785 wakeup(xfer); 786 return; 787 } 788 #ifdef DIAGNOSTIC 789 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 790 panic("atastart: channel waiting for irq"); 791 #endif 792 if (atac->atac_claim_hw) 793 if (!(*atac->atac_claim_hw)(chp, 0)) 794 return; 795 796 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 797 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 798 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 799 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 800 chp->ch_drive[xfer->c_drive].state = 0; 801 } 802 chp->ch_queue->active_xfer = xfer; 803 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 804 805 if (atac->atac_cap & ATAC_CAP_NOIRQ) 806 KASSERT(xfer->c_flags & C_POLL); 807 808 xfer->c_start(chp, xfer); 809 } 810 811 struct ata_xfer * 812 ata_get_xfer(int flags) 813 { 814 struct ata_xfer *xfer; 815 int s; 816 817 s = splbio(); 818 xfer = pool_get(&ata_xfer_pool, 819 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 820 splx(s); 821 if (xfer != NULL) { 822 memset(xfer, 0, sizeof(struct ata_xfer)); 823 } 824 return xfer; 825 } 826 827 void 828 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 829 { 830 struct atac_softc *atac = chp->ch_atac; 831 int s; 832 833 if (xfer->c_flags & C_WAITACT) { 834 /* Someone is waiting for this xfer, so we can't free now */ 835 xfer->c_flags |= C_FREE; 836 wakeup(xfer); 837 return; 838 } 839 840 if (atac->atac_free_hw) 841 (*atac->atac_free_hw)(chp); 842 s = splbio(); 843 pool_put(&ata_xfer_pool, xfer); 844 splx(s); 845 } 846 847 /* 848 * Kill off all pending xfers for a ata_channel. 849 * 850 * Must be called at splbio(). 851 */ 852 void 853 ata_kill_pending(struct ata_drive_datas *drvp) 854 { 855 struct ata_channel *chp = drvp->chnl_softc; 856 struct ata_xfer *xfer, *next_xfer; 857 int s = splbio(); 858 859 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 860 xfer != NULL; xfer = next_xfer) { 861 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 862 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 863 continue; 864 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 865 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 866 } 867 868 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 869 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 870 drvp->drive_flags |= DRIVE_WAITDRAIN; 871 (void) tsleep(&chp->ch_queue->active_xfer, 872 PRIBIO, "atdrn", 0); 873 } else { 874 /* no more xfer for us */ 875 break; 876 } 877 } 878 splx(s); 879 } 880 881 /* 882 * ata_reset_channel: 883 * 884 * Reset and ATA channel. 885 * 886 * MUST BE CALLED AT splbio()! 887 */ 888 void 889 ata_reset_channel(struct ata_channel *chp, int flags) 890 { 891 struct atac_softc *atac = chp->ch_atac; 892 int drive; 893 894 #ifdef ATA_DEBUG 895 int spl1, spl2; 896 897 spl1 = splbio(); 898 spl2 = splbio(); 899 if (spl2 != spl1) { 900 printf("ata_reset_channel: not at splbio()\n"); 901 panic("ata_reset_channel"); 902 } 903 splx(spl2); 904 splx(spl1); 905 #endif /* ATA_DEBUG */ 906 907 chp->ch_queue->queue_freeze++; 908 909 /* 910 * If we can poll or wait it's OK, otherwise wake up the 911 * kernel thread to do it for us. 912 */ 913 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 914 if (chp->ch_flags & ATACH_TH_RESET) { 915 /* No need to schedule a reset more than one time. */ 916 chp->ch_queue->queue_freeze--; 917 return; 918 } 919 chp->ch_flags |= ATACH_TH_RESET; 920 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 921 wakeup(&chp->ch_thread); 922 return; 923 } 924 925 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 926 927 for (drive = 0; drive < chp->ch_ndrive; drive++) 928 chp->ch_drive[drive].state = 0; 929 930 chp->ch_flags &= ~ATACH_TH_RESET; 931 if ((flags & AT_RST_EMERG) == 0) { 932 chp->ch_queue->queue_freeze--; 933 atastart(chp); 934 } else { 935 /* make sure that we can use polled commands */ 936 TAILQ_INIT(&chp->ch_queue->queue_xfer); 937 chp->ch_queue->queue_freeze = 0; 938 chp->ch_queue->active_xfer = NULL; 939 } 940 } 941 942 int 943 ata_addref(struct ata_channel *chp) 944 { 945 struct atac_softc *atac = chp->ch_atac; 946 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 947 int s, error = 0; 948 949 s = splbio(); 950 if (adapt->adapt_refcnt++ == 0 && 951 adapt->adapt_enable != NULL) { 952 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 953 if (error) 954 adapt->adapt_refcnt--; 955 } 956 splx(s); 957 return (error); 958 } 959 960 void 961 ata_delref(struct ata_channel *chp) 962 { 963 struct atac_softc *atac = chp->ch_atac; 964 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 965 int s; 966 967 s = splbio(); 968 if (adapt->adapt_refcnt-- == 1 && 969 adapt->adapt_enable != NULL) 970 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 971 splx(s); 972 } 973 974 void 975 ata_print_modes(struct ata_channel *chp) 976 { 977 struct atac_softc *atac = chp->ch_atac; 978 int drive; 979 struct ata_drive_datas *drvp; 980 981 for (drive = 0; drive < chp->ch_ndrive; drive++) { 982 drvp = &chp->ch_drive[drive]; 983 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 984 continue; 985 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 986 drvp->drv_softc->dv_xname, 987 atac->atac_dev.dv_xname, 988 chp->ch_channel, drvp->drive, drvp->PIO_mode); 989 if (drvp->drive_flags & DRIVE_DMA) 990 aprint_normal(", DMA mode %d", drvp->DMA_mode); 991 if (drvp->drive_flags & DRIVE_UDMA) { 992 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 993 if (drvp->UDMA_mode == 2) 994 aprint_normal(" (Ultra/33)"); 995 else if (drvp->UDMA_mode == 4) 996 aprint_normal(" (Ultra/66)"); 997 else if (drvp->UDMA_mode == 5) 998 aprint_normal(" (Ultra/100)"); 999 else if (drvp->UDMA_mode == 6) 1000 aprint_normal(" (Ultra/133)"); 1001 } 1002 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1003 aprint_normal(" (using DMA)"); 1004 aprint_normal("\n"); 1005 } 1006 } 1007 1008 /* 1009 * downgrade the transfer mode of a drive after an error. return 1 if 1010 * downgrade was possible, 0 otherwise. 1011 * 1012 * MUST BE CALLED AT splbio()! 1013 */ 1014 int 1015 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1016 { 1017 struct ata_channel *chp = drvp->chnl_softc; 1018 struct atac_softc *atac = chp->ch_atac; 1019 struct device *drv_dev = drvp->drv_softc; 1020 int cf_flags = drv_dev->dv_cfdata->cf_flags; 1021 1022 /* if drive or controller don't know its mode, we can't do much */ 1023 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1024 (atac->atac_set_modes == NULL)) 1025 return 0; 1026 /* current drive mode was set by a config flag, let it this way */ 1027 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1028 (cf_flags & ATA_CONFIG_DMA_SET) || 1029 (cf_flags & ATA_CONFIG_UDMA_SET)) 1030 return 0; 1031 1032 /* 1033 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1034 */ 1035 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1036 drvp->UDMA_mode--; 1037 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1038 drv_dev->dv_xname, drvp->UDMA_mode); 1039 } 1040 1041 /* 1042 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1043 */ 1044 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1045 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1046 drvp->PIO_mode = drvp->PIO_cap; 1047 printf("%s: transfer error, downgrading to PIO mode %d\n", 1048 drv_dev->dv_xname, drvp->PIO_mode); 1049 } else /* already using PIO, can't downgrade */ 1050 return 0; 1051 1052 (*atac->atac_set_modes)(chp); 1053 ata_print_modes(chp); 1054 /* reset the channel, which will shedule all drives for setup */ 1055 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1056 return 1; 1057 } 1058 1059 /* 1060 * Probe drive's capabilities, for use by the controller later 1061 * Assumes drvp points to an existing drive. 1062 */ 1063 void 1064 ata_probe_caps(struct ata_drive_datas *drvp) 1065 { 1066 struct ataparams params, params2; 1067 struct ata_channel *chp = drvp->chnl_softc; 1068 struct atac_softc *atac = chp->ch_atac; 1069 struct device *drv_dev = drvp->drv_softc; 1070 int i, printed, s; 1071 char *sep = ""; 1072 int cf_flags; 1073 1074 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1075 /* IDENTIFY failed. Can't tell more about the device */ 1076 return; 1077 } 1078 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1079 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1080 /* 1081 * Controller claims 16 and 32 bit transfers. 1082 * Re-do an IDENTIFY with 32-bit transfers, 1083 * and compare results. 1084 */ 1085 s = splbio(); 1086 drvp->drive_flags |= DRIVE_CAP32; 1087 splx(s); 1088 ata_get_params(drvp, AT_WAIT, ¶ms2); 1089 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1090 /* Not good. fall back to 16bits */ 1091 s = splbio(); 1092 drvp->drive_flags &= ~DRIVE_CAP32; 1093 splx(s); 1094 } else { 1095 aprint_normal("%s: 32-bit data port\n", 1096 drv_dev->dv_xname); 1097 } 1098 } 1099 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1100 if (params.atap_ata_major > 0x01 && 1101 params.atap_ata_major != 0xffff) { 1102 for (i = 14; i > 0; i--) { 1103 if (params.atap_ata_major & (1 << i)) { 1104 aprint_normal("%s: ATA version %d\n", 1105 drv_dev->dv_xname, i); 1106 drvp->ata_vers = i; 1107 break; 1108 } 1109 } 1110 } 1111 #endif 1112 1113 /* An ATAPI device is at last PIO mode 3 */ 1114 if (drvp->drive_flags & DRIVE_ATAPI) 1115 drvp->PIO_mode = 3; 1116 1117 /* 1118 * It's not in the specs, but it seems that some drive 1119 * returns 0xffff in atap_extensions when this field is invalid 1120 */ 1121 if (params.atap_extensions != 0xffff && 1122 (params.atap_extensions & WDC_EXT_MODES)) { 1123 printed = 0; 1124 /* 1125 * XXX some drives report something wrong here (they claim to 1126 * support PIO mode 8 !). As mode is coded on 3 bits in 1127 * SET FEATURE, limit it to 7 (so limit i to 4). 1128 * If higher mode than 7 is found, abort. 1129 */ 1130 for (i = 7; i >= 0; i--) { 1131 if ((params.atap_piomode_supp & (1 << i)) == 0) 1132 continue; 1133 if (i > 4) 1134 return; 1135 /* 1136 * See if mode is accepted. 1137 * If the controller can't set its PIO mode, 1138 * assume the defaults are good, so don't try 1139 * to set it 1140 */ 1141 if (atac->atac_set_modes) 1142 /* 1143 * It's OK to pool here, it's fast enouth 1144 * to not bother waiting for interrupt 1145 */ 1146 if (ata_set_mode(drvp, 0x08 | (i + 3), 1147 AT_WAIT) != CMD_OK) 1148 continue; 1149 if (!printed) { 1150 aprint_normal("%s: drive supports PIO mode %d", 1151 drv_dev->dv_xname, i + 3); 1152 sep = ","; 1153 printed = 1; 1154 } 1155 /* 1156 * If controller's driver can't set its PIO mode, 1157 * get the highter one for the drive. 1158 */ 1159 if (atac->atac_set_modes == NULL || 1160 atac->atac_pio_cap >= i + 3) { 1161 drvp->PIO_mode = i + 3; 1162 drvp->PIO_cap = i + 3; 1163 break; 1164 } 1165 } 1166 if (!printed) { 1167 /* 1168 * We didn't find a valid PIO mode. 1169 * Assume the values returned for DMA are buggy too 1170 */ 1171 return; 1172 } 1173 s = splbio(); 1174 drvp->drive_flags |= DRIVE_MODE; 1175 splx(s); 1176 printed = 0; 1177 for (i = 7; i >= 0; i--) { 1178 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1179 continue; 1180 if ((atac->atac_cap & ATAC_CAP_DMA) && 1181 atac->atac_set_modes != NULL) 1182 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1183 != CMD_OK) 1184 continue; 1185 if (!printed) { 1186 aprint_normal("%s DMA mode %d", sep, i); 1187 sep = ","; 1188 printed = 1; 1189 } 1190 if (atac->atac_cap & ATAC_CAP_DMA) { 1191 if (atac->atac_set_modes != NULL && 1192 atac->atac_dma_cap < i) 1193 continue; 1194 drvp->DMA_mode = i; 1195 drvp->DMA_cap = i; 1196 s = splbio(); 1197 drvp->drive_flags |= DRIVE_DMA; 1198 splx(s); 1199 } 1200 break; 1201 } 1202 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1203 printed = 0; 1204 for (i = 7; i >= 0; i--) { 1205 if ((params.atap_udmamode_supp & (1 << i)) 1206 == 0) 1207 continue; 1208 if (atac->atac_set_modes != NULL && 1209 (atac->atac_cap & ATAC_CAP_UDMA)) 1210 if (ata_set_mode(drvp, 0x40 | i, 1211 AT_WAIT) != CMD_OK) 1212 continue; 1213 if (!printed) { 1214 aprint_normal("%s Ultra-DMA mode %d", 1215 sep, i); 1216 if (i == 2) 1217 aprint_normal(" (Ultra/33)"); 1218 else if (i == 4) 1219 aprint_normal(" (Ultra/66)"); 1220 else if (i == 5) 1221 aprint_normal(" (Ultra/100)"); 1222 else if (i == 6) 1223 aprint_normal(" (Ultra/133)"); 1224 sep = ","; 1225 printed = 1; 1226 } 1227 if (atac->atac_cap & ATAC_CAP_UDMA) { 1228 if (atac->atac_set_modes != NULL && 1229 atac->atac_udma_cap < i) 1230 continue; 1231 drvp->UDMA_mode = i; 1232 drvp->UDMA_cap = i; 1233 s = splbio(); 1234 drvp->drive_flags |= DRIVE_UDMA; 1235 splx(s); 1236 } 1237 break; 1238 } 1239 } 1240 aprint_normal("\n"); 1241 } 1242 1243 s = splbio(); 1244 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1245 if (drvp->drive_flags & DRIVE_ATAPI) { 1246 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1247 drvp->drive_flags |= DRIVE_NOSTREAM; 1248 } else { 1249 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1250 drvp->drive_flags |= DRIVE_NOSTREAM; 1251 } 1252 splx(s); 1253 1254 /* Try to guess ATA version here, if it didn't get reported */ 1255 if (drvp->ata_vers == 0) { 1256 if (drvp->drive_flags & DRIVE_UDMA) 1257 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1258 else if (drvp->PIO_cap > 2) 1259 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1260 } 1261 cf_flags = drv_dev->dv_cfdata->cf_flags; 1262 if (cf_flags & ATA_CONFIG_PIO_SET) { 1263 s = splbio(); 1264 drvp->PIO_mode = 1265 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1266 drvp->drive_flags |= DRIVE_MODE; 1267 splx(s); 1268 } 1269 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1270 /* don't care about DMA modes */ 1271 return; 1272 } 1273 if (cf_flags & ATA_CONFIG_DMA_SET) { 1274 s = splbio(); 1275 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1276 ATA_CONFIG_DMA_DISABLE) { 1277 drvp->drive_flags &= ~DRIVE_DMA; 1278 } else { 1279 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1280 ATA_CONFIG_DMA_OFF; 1281 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1282 } 1283 splx(s); 1284 } 1285 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1286 /* don't care about UDMA modes */ 1287 return; 1288 } 1289 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1290 s = splbio(); 1291 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1292 ATA_CONFIG_UDMA_DISABLE) { 1293 drvp->drive_flags &= ~DRIVE_UDMA; 1294 } else { 1295 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1296 ATA_CONFIG_UDMA_OFF; 1297 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1298 } 1299 splx(s); 1300 } 1301 } 1302 1303 /* management of the /dev/atabus* devices */ 1304 int 1305 atabusopen(dev_t dev, int flag, int fmt, struct proc *p) 1306 { 1307 struct atabus_softc *sc; 1308 int error, unit = minor(dev); 1309 1310 if (unit >= atabus_cd.cd_ndevs || 1311 (sc = atabus_cd.cd_devs[unit]) == NULL) 1312 return (ENXIO); 1313 1314 if (sc->sc_flags & ATABUSCF_OPEN) 1315 return (EBUSY); 1316 1317 if ((error = ata_addref(sc->sc_chan)) != 0) 1318 return (error); 1319 1320 sc->sc_flags |= ATABUSCF_OPEN; 1321 1322 return (0); 1323 } 1324 1325 1326 int 1327 atabusclose(dev_t dev, int flag, int fmt, struct proc *p) 1328 { 1329 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1330 1331 ata_delref(sc->sc_chan); 1332 1333 sc->sc_flags &= ~ATABUSCF_OPEN; 1334 1335 return (0); 1336 } 1337 1338 int 1339 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p) 1340 { 1341 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1342 struct ata_channel *chp = sc->sc_chan; 1343 int min_drive, max_drive, drive; 1344 int error; 1345 int s; 1346 1347 /* 1348 * Enforce write permission for ioctls that change the 1349 * state of the bus. Host adapter specific ioctls must 1350 * be checked by the adapter driver. 1351 */ 1352 switch (cmd) { 1353 case ATABUSIOSCAN: 1354 case ATABUSIODETACH: 1355 case ATABUSIORESET: 1356 if ((flag & FWRITE) == 0) 1357 return (EBADF); 1358 } 1359 1360 switch (cmd) { 1361 case ATABUSIORESET: 1362 s = splbio(); 1363 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1364 splx(s); 1365 error = 0; 1366 break; 1367 case ATABUSIOSCAN: 1368 { 1369 #if 0 1370 struct atabusioscan_args *a= 1371 (struct atabusioscan_args *)addr; 1372 #endif 1373 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1374 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1375 return (EOPNOTSUPP); 1376 return (EOPNOTSUPP); 1377 } 1378 case ATABUSIODETACH: 1379 { 1380 struct atabusioscan_args *a= 1381 (struct atabusioscan_args *)addr; 1382 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1383 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1384 return (EOPNOTSUPP); 1385 switch (a->at_dev) { 1386 case -1: 1387 min_drive = 0; 1388 max_drive = 1; 1389 break; 1390 case 0: 1391 case 1: 1392 min_drive = max_drive = a->at_dev; 1393 break; 1394 default: 1395 return (EINVAL); 1396 } 1397 for (drive = min_drive; drive <= max_drive; drive++) { 1398 if (chp->ch_drive[drive].drv_softc != NULL) { 1399 error = config_detach( 1400 chp->ch_drive[drive].drv_softc, 0); 1401 if (error) 1402 return (error); 1403 chp->ch_drive[drive].drv_softc = NULL; 1404 } 1405 } 1406 error = 0; 1407 break; 1408 } 1409 default: 1410 error = ENOTTY; 1411 } 1412 return (error); 1413 }; 1414 1415 static void 1416 atabus_powerhook(int why, void *hdl) 1417 { 1418 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1419 struct ata_channel *chp = sc->sc_chan; 1420 int s; 1421 1422 switch (why) { 1423 case PWR_SOFTSUSPEND: 1424 case PWR_SOFTSTANDBY: 1425 sc->sc_sleeping = 1; 1426 s = splbio(); 1427 chp->ch_flags = ATACH_SHUTDOWN; 1428 splx(s); 1429 wakeup(&chp->ch_thread); 1430 while (chp->ch_thread != NULL) 1431 (void) tsleep((void *)&chp->ch_flags, PRIBIO, 1432 "atadown", 0); 1433 break; 1434 case PWR_RESUME: 1435 atabus_create_thread(sc); 1436 break; 1437 case PWR_SUSPEND: 1438 case PWR_STANDBY: 1439 case PWR_SOFTRESUME: 1440 break; 1441 } 1442 1443 return; 1444 } 1445
Indexes created Wed Sep 24 05:09:52 GMT 2025