ata.c revision 1.70
1 /* $NetBSD: ata.c,v 1.70 2005/05/29 22:11:28 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.70 2005/05/29 22:11:28 christos Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 81 82 /* 83 * A queue of atabus instances, used to ensure the same bus probe order 84 * for a given hardware configuration at each boot. 85 */ 86 struct atabus_initq_head atabus_initq_head = 87 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 88 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 89 90 /***************************************************************************** 91 * ATA bus layer. 92 * 93 * ATA controllers attach an atabus instance, which handles probing the bus 94 * for drives, etc. 95 *****************************************************************************/ 96 97 dev_type_open(atabusopen); 98 dev_type_close(atabusclose); 99 dev_type_ioctl(atabusioctl); 100 101 const struct cdevsw atabus_cdevsw = { 102 atabusopen, atabusclose, noread, nowrite, atabusioctl, 103 nostop, notty, nopoll, nommap, nokqfilter, 104 }; 105 106 extern struct cfdriver atabus_cd; 107 108 static void atabus_powerhook(int, void *); 109 110 /* 111 * atabusprint: 112 * 113 * Autoconfiguration print routine used by ATA controllers when 114 * attaching an atabus instance. 115 */ 116 int 117 atabusprint(void *aux, const char *pnp) 118 { 119 struct ata_channel *chan = aux; 120 121 if (pnp) 122 aprint_normal("atabus at %s", pnp); 123 aprint_normal(" channel %d", chan->ch_channel); 124 125 return (UNCONF); 126 } 127 128 /* 129 * ataprint: 130 * 131 * Autoconfiguration print routine. 132 */ 133 int 134 ataprint(void *aux, const char *pnp) 135 { 136 struct ata_device *adev = aux; 137 138 if (pnp) 139 aprint_normal("wd at %s", pnp); 140 aprint_normal(" drive %d", adev->adev_drv_data->drive); 141 142 return (UNCONF); 143 } 144 145 /* 146 * ata_channel_attach: 147 * 148 * Common parts of attaching an atabus to an ATA controller channel. 149 */ 150 void 151 ata_channel_attach(struct ata_channel *chp) 152 { 153 154 if (chp->ch_flags & ATACH_DISABLED) 155 return; 156 157 callout_init(&chp->ch_callout); 158 159 TAILQ_INIT(&chp->ch_queue->queue_xfer); 160 chp->ch_queue->queue_freeze = 0; 161 chp->ch_queue->queue_flags = 0; 162 chp->ch_queue->active_xfer = NULL; 163 164 chp->atabus = config_found(&chp->ch_atac->atac_dev, chp, atabusprint); 165 } 166 167 static void 168 atabusconfig(struct atabus_softc *atabus_sc) 169 { 170 struct ata_channel *chp = atabus_sc->sc_chan; 171 struct atac_softc *atac = chp->ch_atac; 172 int i, s; 173 struct atabus_initq *atabus_initq = NULL; 174 175 /* Probe for the drives. */ 176 (*atac->atac_probe)(chp); 177 178 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 179 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 180 DEBUG_PROBE); 181 182 /* If no drives, abort here */ 183 for (i = 0; i < chp->ch_ndrive; i++) 184 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 185 break; 186 if (i == chp->ch_ndrive) 187 goto out; 188 189 /* Shortcut in case we've been shutdown */ 190 if (chp->ch_flags & ATACH_SHUTDOWN) 191 goto out; 192 193 /* Make sure the devices probe in atabus order to avoid jitter. */ 194 simple_lock(&atabus_interlock); 195 while(1) { 196 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 197 if (atabus_initq->atabus_sc == atabus_sc) 198 break; 199 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 200 &atabus_interlock); 201 } 202 simple_unlock(&atabus_interlock); 203 204 /* 205 * Attach an ATAPI bus, if needed. 206 */ 207 for (i = 0; i < chp->ch_ndrive; i++) { 208 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 209 #if NATAPIBUS > 0 210 (*atac->atac_atapibus_attach)(atabus_sc); 211 #else 212 /* 213 * Fake the autoconfig "not configured" message 214 */ 215 aprint_normal("atapibus at %s not configured\n", 216 atac->atac_dev.dv_xname); 217 chp->atapibus = NULL; 218 s = splbio(); 219 for (i = 0; i < chp->ch_ndrive; i++) 220 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 221 splx(s); 222 #endif 223 break; 224 } 225 } 226 227 for (i = 0; i < chp->ch_ndrive; i++) { 228 struct ata_device adev; 229 if ((chp->ch_drive[i].drive_flags & 230 (DRIVE_ATA | DRIVE_OLD)) == 0) { 231 continue; 232 } 233 memset(&adev, 0, sizeof(struct ata_device)); 234 adev.adev_bustype = atac->atac_bustype_ata; 235 adev.adev_channel = chp->ch_channel; 236 adev.adev_openings = 1; 237 adev.adev_drv_data = &chp->ch_drive[i]; 238 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev, 239 &adev, ataprint); 240 if (chp->ata_drives[i] != NULL) 241 ata_probe_caps(&chp->ch_drive[i]); 242 else { 243 s = splbio(); 244 chp->ch_drive[i].drive_flags &= 245 ~(DRIVE_ATA | DRIVE_OLD); 246 splx(s); 247 } 248 } 249 250 /* now that we know the drives, the controller can set its modes */ 251 if (atac->atac_set_modes) { 252 (*atac->atac_set_modes)(chp); 253 ata_print_modes(chp); 254 } 255 #if NATARAID > 0 256 if (atac->atac_cap & ATAC_CAP_RAID) 257 for (i = 0; i < chp->ch_ndrive; i++) 258 if (chp->ata_drives[i] != NULL) 259 ata_raid_check_component(chp->ata_drives[i]); 260 #endif /* NATARAID > 0 */ 261 262 /* 263 * reset drive_flags for unattached devices, reset state for attached 264 * ones 265 */ 266 s = splbio(); 267 for (i = 0; i < chp->ch_ndrive; i++) { 268 if (chp->ch_drive[i].drv_softc == NULL) 269 chp->ch_drive[i].drive_flags = 0; 270 else 271 chp->ch_drive[i].state = 0; 272 } 273 splx(s); 274 275 out: 276 if (atabus_initq == NULL) { 277 simple_lock(&atabus_interlock); 278 while(1) { 279 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 280 if (atabus_initq->atabus_sc == atabus_sc) 281 break; 282 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 283 &atabus_interlock); 284 } 285 simple_unlock(&atabus_interlock); 286 } 287 simple_lock(&atabus_interlock); 288 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 289 simple_unlock(&atabus_interlock); 290 291 free(atabus_initq, M_DEVBUF); 292 wakeup(&atabus_initq_head); 293 294 ata_delref(chp); 295 296 config_pending_decr(); 297 } 298 299 /* 300 * atabus_thread: 301 * 302 * Worker thread for the ATA bus. 303 */ 304 static void 305 atabus_thread(void *arg) 306 { 307 struct atabus_softc *sc = arg; 308 struct ata_channel *chp = sc->sc_chan; 309 struct ata_xfer *xfer; 310 int i, s; 311 312 s = splbio(); 313 chp->ch_flags |= ATACH_TH_RUN; 314 315 /* 316 * Probe the drives. Reset all flags to 0 to indicate to controllers 317 * that can re-probe that all drives must be probed.. 318 * 319 * Note: ch_ndrive may be changed during the probe. 320 */ 321 for (i = 0; i < ATA_MAXDRIVES; i++) 322 chp->ch_drive[i].drive_flags = 0; 323 splx(s); 324 325 /* Configure the devices on the bus. */ 326 atabusconfig(sc); 327 328 s = splbio(); 329 for (;;) { 330 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 331 (chp->ch_queue->active_xfer == NULL || 332 chp->ch_queue->queue_freeze == 0)) { 333 chp->ch_flags &= ~ATACH_TH_RUN; 334 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 335 chp->ch_flags |= ATACH_TH_RUN; 336 } 337 if (chp->ch_flags & ATACH_SHUTDOWN) { 338 break; 339 } 340 if (chp->ch_flags & ATACH_TH_RESET) { 341 /* 342 * ata_reset_channel() will freeze 2 times, so 343 * unfreeze one time. Not a problem as we're at splbio 344 */ 345 chp->ch_queue->queue_freeze--; 346 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 347 } else if (chp->ch_queue->active_xfer != NULL && 348 chp->ch_queue->queue_freeze == 1) { 349 /* 350 * Caller has bumped queue_freeze, decrease it. 351 */ 352 chp->ch_queue->queue_freeze--; 353 xfer = chp->ch_queue->active_xfer; 354 KASSERT(xfer != NULL); 355 (*xfer->c_start)(xfer->c_chp, xfer); 356 } else if (chp->ch_queue->queue_freeze > 1) 357 panic("ata_thread: queue_freeze"); 358 } 359 splx(s); 360 chp->ch_thread = NULL; 361 wakeup(&chp->ch_flags); 362 kthread_exit(0); 363 } 364 365 /* 366 * atabus_create_thread: 367 * 368 * Helper routine to create the ATA bus worker thread. 369 */ 370 static void 371 atabus_create_thread(void *arg) 372 { 373 struct atabus_softc *sc = arg; 374 struct ata_channel *chp = sc->sc_chan; 375 int error; 376 377 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 378 "%s", sc->sc_dev.dv_xname)) != 0) 379 aprint_error("%s: unable to create kernel thread: error %d\n", 380 sc->sc_dev.dv_xname, error); 381 } 382 383 /* 384 * atabus_match: 385 * 386 * Autoconfiguration match routine. 387 */ 388 static int 389 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 390 { 391 struct ata_channel *chp = aux; 392 393 if (chp == NULL) 394 return (0); 395 396 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 397 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 398 return (0); 399 400 return (1); 401 } 402 403 /* 404 * atabus_attach: 405 * 406 * Autoconfiguration attach routine. 407 */ 408 static void 409 atabus_attach(struct device *parent, struct device *self, void *aux) 410 { 411 struct atabus_softc *sc = (void *) self; 412 struct ata_channel *chp = aux; 413 struct atabus_initq *initq; 414 415 sc->sc_chan = chp; 416 417 aprint_normal("\n"); 418 aprint_naive("\n"); 419 420 if (ata_addref(chp)) 421 return; 422 423 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 424 initq->atabus_sc = sc; 425 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 426 config_pending_incr(); 427 kthread_create(atabus_create_thread, sc); 428 429 sc->sc_powerhook = powerhook_establish(atabus_powerhook, sc); 430 if (sc->sc_powerhook == NULL) 431 printf("%s: WARNING: unable to establish power hook\n", 432 sc->sc_dev.dv_xname); 433 } 434 435 /* 436 * atabus_activate: 437 * 438 * Autoconfiguration activation routine. 439 */ 440 static int 441 atabus_activate(struct device *self, enum devact act) 442 { 443 struct atabus_softc *sc = (void *) self; 444 struct ata_channel *chp = sc->sc_chan; 445 struct device *dev = NULL; 446 int s, i, error = 0; 447 448 s = splbio(); 449 switch (act) { 450 case DVACT_ACTIVATE: 451 error = EOPNOTSUPP; 452 break; 453 454 case DVACT_DEACTIVATE: 455 /* 456 * We might deactivate the children of atapibus twice 457 * (once bia atapibus, once directly), but since the 458 * generic autoconfiguration code maintains the DVF_ACTIVE 459 * flag, it's safe. 460 */ 461 if ((dev = chp->atapibus) != NULL) { 462 error = config_deactivate(dev); 463 if (error) 464 goto out; 465 } 466 467 for (i = 0; i < chp->ch_ndrive; i++) { 468 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 469 ATADEBUG_PRINT(("atabus_activate: %s: " 470 "deactivating %s\n", sc->sc_dev.dv_xname, 471 dev->dv_xname), 472 DEBUG_DETACH); 473 error = config_deactivate(dev); 474 if (error) 475 goto out; 476 } 477 } 478 break; 479 } 480 out: 481 splx(s); 482 483 #ifdef ATADEBUG 484 if (dev != NULL && error != 0) 485 ATADEBUG_PRINT(("atabus_activate: %s: " 486 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 487 error, dev->dv_xname), DEBUG_DETACH); 488 #endif /* ATADEBUG */ 489 490 return (error); 491 } 492 493 /* 494 * atabus_detach: 495 * 496 * Autoconfiguration detach routine. 497 */ 498 static int 499 atabus_detach(struct device *self, int flags) 500 { 501 struct atabus_softc *sc = (void *) self; 502 struct ata_channel *chp = sc->sc_chan; 503 struct device *dev = NULL; 504 int s, i, error = 0; 505 506 /* Shutdown the channel. */ 507 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 508 chp->ch_flags |= ATACH_SHUTDOWN; 509 splx(s); 510 wakeup(&chp->ch_thread); 511 while (chp->ch_thread != NULL) 512 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 513 514 /* power hook */ 515 if (sc->sc_powerhook) 516 powerhook_disestablish(sc->sc_powerhook); 517 518 /* 519 * Detach atapibus and its children. 520 */ 521 if ((dev = chp->atapibus) != NULL) { 522 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 523 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 524 error = config_detach(dev, flags); 525 if (error) 526 goto out; 527 } 528 529 /* 530 * Detach our other children. 531 */ 532 for (i = 0; i < chp->ch_ndrive; i++) { 533 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 534 continue; 535 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 536 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 537 sc->sc_dev.dv_xname, dev->dv_xname), 538 DEBUG_DETACH); 539 error = config_detach(dev, flags); 540 if (error) 541 goto out; 542 } 543 } 544 545 out: 546 #ifdef ATADEBUG 547 if (dev != NULL && error != 0) 548 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 549 sc->sc_dev.dv_xname, error, dev->dv_xname), 550 DEBUG_DETACH); 551 #endif /* ATADEBUG */ 552 553 return (error); 554 } 555 556 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 557 atabus_match, atabus_attach, atabus_detach, atabus_activate); 558 559 /***************************************************************************** 560 * Common ATA bus operations. 561 *****************************************************************************/ 562 563 /* Get the disk's parameters */ 564 int 565 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 566 struct ataparams *prms) 567 { 568 char tb[DEV_BSIZE]; 569 struct ata_command ata_c; 570 struct ata_channel *chp = drvp->chnl_softc; 571 struct atac_softc *atac = chp->ch_atac; 572 573 #if BYTE_ORDER == LITTLE_ENDIAN 574 int i; 575 u_int16_t *p; 576 #endif 577 578 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 579 580 memset(tb, 0, DEV_BSIZE); 581 memset(prms, 0, sizeof(struct ataparams)); 582 memset(&ata_c, 0, sizeof(struct ata_command)); 583 584 if (drvp->drive_flags & DRIVE_ATA) { 585 ata_c.r_command = WDCC_IDENTIFY; 586 ata_c.r_st_bmask = WDCS_DRDY; 587 ata_c.r_st_pmask = 0; 588 ata_c.timeout = 3000; /* 3s */ 589 } else if (drvp->drive_flags & DRIVE_ATAPI) { 590 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 591 ata_c.r_st_bmask = 0; 592 ata_c.r_st_pmask = 0; 593 ata_c.timeout = 10000; /* 10s */ 594 } else { 595 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 596 DEBUG_FUNCS|DEBUG_PROBE); 597 return CMD_ERR; 598 } 599 ata_c.flags = AT_READ | flags; 600 ata_c.data = tb; 601 ata_c.bcount = DEV_BSIZE; 602 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 603 &ata_c) != ATACMD_COMPLETE) { 604 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 605 DEBUG_FUNCS|DEBUG_PROBE); 606 return CMD_AGAIN; 607 } 608 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 609 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 610 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 611 return CMD_ERR; 612 } else { 613 /* if we didn't read any data something is wrong */ 614 if ((ata_c.flags & AT_XFDONE) == 0) 615 return CMD_ERR; 616 /* Read in parameter block. */ 617 memcpy(prms, tb, sizeof(struct ataparams)); 618 #if BYTE_ORDER == LITTLE_ENDIAN 619 /* 620 * Shuffle string byte order. 621 * ATAPI Mitsumi and NEC drives don't need this. 622 */ 623 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 624 WDC_CFG_ATAPI && 625 ((prms->atap_model[0] == 'N' && 626 prms->atap_model[1] == 'E') || 627 (prms->atap_model[0] == 'F' && 628 prms->atap_model[1] == 'X'))) 629 return 0; 630 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 631 p = (u_short *)(prms->atap_model + i); 632 *p = ntohs(*p); 633 } 634 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 635 p = (u_short *)(prms->atap_serial + i); 636 *p = ntohs(*p); 637 } 638 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 639 p = (u_short *)(prms->atap_revision + i); 640 *p = ntohs(*p); 641 } 642 #endif 643 return CMD_OK; 644 } 645 } 646 647 int 648 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 649 { 650 struct ata_command ata_c; 651 struct ata_channel *chp = drvp->chnl_softc; 652 struct atac_softc *atac = chp->ch_atac; 653 654 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 655 memset(&ata_c, 0, sizeof(struct ata_command)); 656 657 ata_c.r_command = SET_FEATURES; 658 ata_c.r_st_bmask = 0; 659 ata_c.r_st_pmask = 0; 660 ata_c.r_features = WDSF_SET_MODE; 661 ata_c.r_count = mode; 662 ata_c.flags = flags; 663 ata_c.timeout = 1000; /* 1s */ 664 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 665 &ata_c) != ATACMD_COMPLETE) 666 return CMD_AGAIN; 667 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 668 return CMD_ERR; 669 } 670 return CMD_OK; 671 } 672 673 void 674 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 675 { 676 /* 677 * Downgrade decision: if we get NERRS_MAX in NXFER. 678 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 679 * first error within the first NXFER ops will immediatly trigger 680 * a downgrade. 681 * If we got an error and n_xfers is bigger than NXFER reset counters. 682 */ 683 drvp->n_dmaerrs++; 684 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 685 ata_downgrade_mode(drvp, flags); 686 drvp->n_dmaerrs = NERRS_MAX-1; 687 drvp->n_xfers = 0; 688 return; 689 } 690 if (drvp->n_xfers > NXFER) { 691 drvp->n_dmaerrs = 1; /* just got an error */ 692 drvp->n_xfers = 1; /* restart counting from this error */ 693 } 694 } 695 696 /* 697 * freeze the queue and wait for the controller to be idle. Caller has to 698 * unfreeze/restart the queue 699 */ 700 void 701 ata_queue_idle(struct ata_queue *queue) 702 { 703 int s = splbio(); 704 queue->queue_freeze++; 705 while (queue->active_xfer != NULL) { 706 queue->queue_flags |= QF_IDLE_WAIT; 707 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 708 } 709 splx(s); 710 } 711 712 /* 713 * Add a command to the queue and start controller. 714 * 715 * MUST BE CALLED AT splbio()! 716 */ 717 void 718 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 719 { 720 721 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 722 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 723 724 /* complete xfer setup */ 725 xfer->c_chp = chp; 726 727 /* insert at the end of command list */ 728 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 729 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 730 chp->ch_flags), DEBUG_XFERS); 731 /* 732 * if polling and can sleep, wait for the xfer to be at head of queue 733 */ 734 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 735 while (chp->ch_queue->active_xfer != NULL || 736 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 737 xfer->c_flags |= C_WAITACT; 738 tsleep(xfer, PRIBIO, "ataact", 0); 739 xfer->c_flags &= ~C_WAITACT; 740 if (xfer->c_flags & C_FREE) { 741 ata_free_xfer(chp, xfer); 742 return; 743 } 744 } 745 } 746 atastart(chp); 747 } 748 749 /* 750 * Start I/O on a controller, for the given channel. 751 * The first xfer may be not for our channel if the channel queues 752 * are shared. 753 * 754 * MUST BE CALLED AT splbio()! 755 */ 756 void 757 atastart(struct ata_channel *chp) 758 { 759 struct atac_softc *atac = chp->ch_atac; 760 struct ata_xfer *xfer; 761 762 #ifdef ATA_DEBUG 763 int spl1, spl2; 764 765 spl1 = splbio(); 766 spl2 = splbio(); 767 if (spl2 != spl1) { 768 printf("atastart: not at splbio()\n"); 769 panic("atastart"); 770 } 771 splx(spl2); 772 splx(spl1); 773 #endif /* ATA_DEBUG */ 774 775 /* is there a xfer ? */ 776 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 777 return; 778 779 /* adjust chp, in case we have a shared queue */ 780 chp = xfer->c_chp; 781 782 if (chp->ch_queue->active_xfer != NULL) { 783 return; /* channel aleady active */ 784 } 785 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 786 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 787 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 788 wakeup(&chp->ch_queue->queue_flags); 789 } 790 return; /* queue frozen */ 791 } 792 /* 793 * if someone is waiting for the command to be active, wake it up 794 * and let it process the command 795 */ 796 if (xfer->c_flags & C_WAITACT) { 797 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 798 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 799 DEBUG_XFERS); 800 wakeup(xfer); 801 return; 802 } 803 #ifdef DIAGNOSTIC 804 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 805 panic("atastart: channel waiting for irq"); 806 #endif 807 if (atac->atac_claim_hw) 808 if (!(*atac->atac_claim_hw)(chp, 0)) 809 return; 810 811 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 812 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 813 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 814 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 815 chp->ch_drive[xfer->c_drive].state = 0; 816 } 817 chp->ch_queue->active_xfer = xfer; 818 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 819 820 if (atac->atac_cap & ATAC_CAP_NOIRQ) 821 KASSERT(xfer->c_flags & C_POLL); 822 823 xfer->c_start(chp, xfer); 824 } 825 826 struct ata_xfer * 827 ata_get_xfer(int flags) 828 { 829 struct ata_xfer *xfer; 830 int s; 831 832 s = splbio(); 833 xfer = pool_get(&ata_xfer_pool, 834 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 835 splx(s); 836 if (xfer != NULL) { 837 memset(xfer, 0, sizeof(struct ata_xfer)); 838 } 839 return xfer; 840 } 841 842 void 843 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 844 { 845 struct atac_softc *atac = chp->ch_atac; 846 int s; 847 848 if (xfer->c_flags & C_WAITACT) { 849 /* Someone is waiting for this xfer, so we can't free now */ 850 xfer->c_flags |= C_FREE; 851 wakeup(xfer); 852 return; 853 } 854 855 if (atac->atac_free_hw) 856 (*atac->atac_free_hw)(chp); 857 s = splbio(); 858 pool_put(&ata_xfer_pool, xfer); 859 splx(s); 860 } 861 862 /* 863 * Kill off all pending xfers for a ata_channel. 864 * 865 * Must be called at splbio(). 866 */ 867 void 868 ata_kill_pending(struct ata_drive_datas *drvp) 869 { 870 struct ata_channel *chp = drvp->chnl_softc; 871 struct ata_xfer *xfer, *next_xfer; 872 int s = splbio(); 873 874 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 875 xfer != NULL; xfer = next_xfer) { 876 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 877 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 878 continue; 879 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 880 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 881 } 882 883 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 884 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 885 drvp->drive_flags |= DRIVE_WAITDRAIN; 886 (void) tsleep(&chp->ch_queue->active_xfer, 887 PRIBIO, "atdrn", 0); 888 } else { 889 /* no more xfer for us */ 890 break; 891 } 892 } 893 splx(s); 894 } 895 896 /* 897 * ata_reset_channel: 898 * 899 * Reset and ATA channel. 900 * 901 * MUST BE CALLED AT splbio()! 902 */ 903 void 904 ata_reset_channel(struct ata_channel *chp, int flags) 905 { 906 struct atac_softc *atac = chp->ch_atac; 907 int drive; 908 909 #ifdef ATA_DEBUG 910 int spl1, spl2; 911 912 spl1 = splbio(); 913 spl2 = splbio(); 914 if (spl2 != spl1) { 915 printf("ata_reset_channel: not at splbio()\n"); 916 panic("ata_reset_channel"); 917 } 918 splx(spl2); 919 splx(spl1); 920 #endif /* ATA_DEBUG */ 921 922 chp->ch_queue->queue_freeze++; 923 924 /* 925 * If we can poll or wait it's OK, otherwise wake up the 926 * kernel thread to do it for us. 927 */ 928 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 929 if (chp->ch_flags & ATACH_TH_RESET) { 930 /* No need to schedule a reset more than one time. */ 931 chp->ch_queue->queue_freeze--; 932 return; 933 } 934 chp->ch_flags |= ATACH_TH_RESET; 935 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 936 wakeup(&chp->ch_thread); 937 return; 938 } 939 940 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 941 942 for (drive = 0; drive < chp->ch_ndrive; drive++) 943 chp->ch_drive[drive].state = 0; 944 945 chp->ch_flags &= ~ATACH_TH_RESET; 946 if ((flags & AT_RST_EMERG) == 0) { 947 chp->ch_queue->queue_freeze--; 948 atastart(chp); 949 } else { 950 /* make sure that we can use polled commands */ 951 TAILQ_INIT(&chp->ch_queue->queue_xfer); 952 chp->ch_queue->queue_freeze = 0; 953 chp->ch_queue->active_xfer = NULL; 954 } 955 } 956 957 int 958 ata_addref(struct ata_channel *chp) 959 { 960 struct atac_softc *atac = chp->ch_atac; 961 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 962 int s, error = 0; 963 964 s = splbio(); 965 if (adapt->adapt_refcnt++ == 0 && 966 adapt->adapt_enable != NULL) { 967 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 968 if (error) 969 adapt->adapt_refcnt--; 970 } 971 splx(s); 972 return (error); 973 } 974 975 void 976 ata_delref(struct ata_channel *chp) 977 { 978 struct atac_softc *atac = chp->ch_atac; 979 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 980 int s; 981 982 s = splbio(); 983 if (adapt->adapt_refcnt-- == 1 && 984 adapt->adapt_enable != NULL) 985 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 986 splx(s); 987 } 988 989 void 990 ata_print_modes(struct ata_channel *chp) 991 { 992 struct atac_softc *atac = chp->ch_atac; 993 int drive; 994 struct ata_drive_datas *drvp; 995 996 for (drive = 0; drive < chp->ch_ndrive; drive++) { 997 drvp = &chp->ch_drive[drive]; 998 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 999 continue; 1000 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 1001 drvp->drv_softc->dv_xname, 1002 atac->atac_dev.dv_xname, 1003 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1004 if (drvp->drive_flags & DRIVE_DMA) 1005 aprint_normal(", DMA mode %d", drvp->DMA_mode); 1006 if (drvp->drive_flags & DRIVE_UDMA) { 1007 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 1008 if (drvp->UDMA_mode == 2) 1009 aprint_normal(" (Ultra/33)"); 1010 else if (drvp->UDMA_mode == 4) 1011 aprint_normal(" (Ultra/66)"); 1012 else if (drvp->UDMA_mode == 5) 1013 aprint_normal(" (Ultra/100)"); 1014 else if (drvp->UDMA_mode == 6) 1015 aprint_normal(" (Ultra/133)"); 1016 } 1017 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1018 aprint_normal(" (using DMA)"); 1019 aprint_normal("\n"); 1020 } 1021 } 1022 1023 /* 1024 * downgrade the transfer mode of a drive after an error. return 1 if 1025 * downgrade was possible, 0 otherwise. 1026 * 1027 * MUST BE CALLED AT splbio()! 1028 */ 1029 int 1030 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1031 { 1032 struct ata_channel *chp = drvp->chnl_softc; 1033 struct atac_softc *atac = chp->ch_atac; 1034 struct device *drv_dev = drvp->drv_softc; 1035 int cf_flags = drv_dev->dv_cfdata->cf_flags; 1036 1037 /* if drive or controller don't know its mode, we can't do much */ 1038 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1039 (atac->atac_set_modes == NULL)) 1040 return 0; 1041 /* current drive mode was set by a config flag, let it this way */ 1042 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1043 (cf_flags & ATA_CONFIG_DMA_SET) || 1044 (cf_flags & ATA_CONFIG_UDMA_SET)) 1045 return 0; 1046 1047 /* 1048 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1049 */ 1050 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1051 drvp->UDMA_mode--; 1052 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1053 drv_dev->dv_xname, drvp->UDMA_mode); 1054 } 1055 1056 /* 1057 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1058 */ 1059 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1060 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1061 drvp->PIO_mode = drvp->PIO_cap; 1062 printf("%s: transfer error, downgrading to PIO mode %d\n", 1063 drv_dev->dv_xname, drvp->PIO_mode); 1064 } else /* already using PIO, can't downgrade */ 1065 return 0; 1066 1067 (*atac->atac_set_modes)(chp); 1068 ata_print_modes(chp); 1069 /* reset the channel, which will shedule all drives for setup */ 1070 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1071 return 1; 1072 } 1073 1074 /* 1075 * Probe drive's capabilities, for use by the controller later 1076 * Assumes drvp points to an existing drive. 1077 */ 1078 void 1079 ata_probe_caps(struct ata_drive_datas *drvp) 1080 { 1081 struct ataparams params, params2; 1082 struct ata_channel *chp = drvp->chnl_softc; 1083 struct atac_softc *atac = chp->ch_atac; 1084 struct device *drv_dev = drvp->drv_softc; 1085 int i, printed, s; 1086 const char *sep = ""; 1087 int cf_flags; 1088 1089 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1090 /* IDENTIFY failed. Can't tell more about the device */ 1091 return; 1092 } 1093 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1094 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1095 /* 1096 * Controller claims 16 and 32 bit transfers. 1097 * Re-do an IDENTIFY with 32-bit transfers, 1098 * and compare results. 1099 */ 1100 s = splbio(); 1101 drvp->drive_flags |= DRIVE_CAP32; 1102 splx(s); 1103 ata_get_params(drvp, AT_WAIT, ¶ms2); 1104 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1105 /* Not good. fall back to 16bits */ 1106 s = splbio(); 1107 drvp->drive_flags &= ~DRIVE_CAP32; 1108 splx(s); 1109 } else { 1110 aprint_normal("%s: 32-bit data port\n", 1111 drv_dev->dv_xname); 1112 } 1113 } 1114 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1115 if (params.atap_ata_major > 0x01 && 1116 params.atap_ata_major != 0xffff) { 1117 for (i = 14; i > 0; i--) { 1118 if (params.atap_ata_major & (1 << i)) { 1119 aprint_normal("%s: ATA version %d\n", 1120 drv_dev->dv_xname, i); 1121 drvp->ata_vers = i; 1122 break; 1123 } 1124 } 1125 } 1126 #endif 1127 1128 /* An ATAPI device is at last PIO mode 3 */ 1129 if (drvp->drive_flags & DRIVE_ATAPI) 1130 drvp->PIO_mode = 3; 1131 1132 /* 1133 * It's not in the specs, but it seems that some drive 1134 * returns 0xffff in atap_extensions when this field is invalid 1135 */ 1136 if (params.atap_extensions != 0xffff && 1137 (params.atap_extensions & WDC_EXT_MODES)) { 1138 printed = 0; 1139 /* 1140 * XXX some drives report something wrong here (they claim to 1141 * support PIO mode 8 !). As mode is coded on 3 bits in 1142 * SET FEATURE, limit it to 7 (so limit i to 4). 1143 * If higher mode than 7 is found, abort. 1144 */ 1145 for (i = 7; i >= 0; i--) { 1146 if ((params.atap_piomode_supp & (1 << i)) == 0) 1147 continue; 1148 if (i > 4) 1149 return; 1150 /* 1151 * See if mode is accepted. 1152 * If the controller can't set its PIO mode, 1153 * assume the defaults are good, so don't try 1154 * to set it 1155 */ 1156 if (atac->atac_set_modes) 1157 /* 1158 * It's OK to pool here, it's fast enouth 1159 * to not bother waiting for interrupt 1160 */ 1161 if (ata_set_mode(drvp, 0x08 | (i + 3), 1162 AT_WAIT) != CMD_OK) 1163 continue; 1164 if (!printed) { 1165 aprint_normal("%s: drive supports PIO mode %d", 1166 drv_dev->dv_xname, i + 3); 1167 sep = ","; 1168 printed = 1; 1169 } 1170 /* 1171 * If controller's driver can't set its PIO mode, 1172 * get the highter one for the drive. 1173 */ 1174 if (atac->atac_set_modes == NULL || 1175 atac->atac_pio_cap >= i + 3) { 1176 drvp->PIO_mode = i + 3; 1177 drvp->PIO_cap = i + 3; 1178 break; 1179 } 1180 } 1181 if (!printed) { 1182 /* 1183 * We didn't find a valid PIO mode. 1184 * Assume the values returned for DMA are buggy too 1185 */ 1186 return; 1187 } 1188 s = splbio(); 1189 drvp->drive_flags |= DRIVE_MODE; 1190 splx(s); 1191 printed = 0; 1192 for (i = 7; i >= 0; i--) { 1193 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1194 continue; 1195 if ((atac->atac_cap & ATAC_CAP_DMA) && 1196 atac->atac_set_modes != NULL) 1197 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1198 != CMD_OK) 1199 continue; 1200 if (!printed) { 1201 aprint_normal("%s DMA mode %d", sep, i); 1202 sep = ","; 1203 printed = 1; 1204 } 1205 if (atac->atac_cap & ATAC_CAP_DMA) { 1206 if (atac->atac_set_modes != NULL && 1207 atac->atac_dma_cap < i) 1208 continue; 1209 drvp->DMA_mode = i; 1210 drvp->DMA_cap = i; 1211 s = splbio(); 1212 drvp->drive_flags |= DRIVE_DMA; 1213 splx(s); 1214 } 1215 break; 1216 } 1217 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1218 printed = 0; 1219 for (i = 7; i >= 0; i--) { 1220 if ((params.atap_udmamode_supp & (1 << i)) 1221 == 0) 1222 continue; 1223 if (atac->atac_set_modes != NULL && 1224 (atac->atac_cap & ATAC_CAP_UDMA)) 1225 if (ata_set_mode(drvp, 0x40 | i, 1226 AT_WAIT) != CMD_OK) 1227 continue; 1228 if (!printed) { 1229 aprint_normal("%s Ultra-DMA mode %d", 1230 sep, i); 1231 if (i == 2) 1232 aprint_normal(" (Ultra/33)"); 1233 else if (i == 4) 1234 aprint_normal(" (Ultra/66)"); 1235 else if (i == 5) 1236 aprint_normal(" (Ultra/100)"); 1237 else if (i == 6) 1238 aprint_normal(" (Ultra/133)"); 1239 sep = ","; 1240 printed = 1; 1241 } 1242 if (atac->atac_cap & ATAC_CAP_UDMA) { 1243 if (atac->atac_set_modes != NULL && 1244 atac->atac_udma_cap < i) 1245 continue; 1246 drvp->UDMA_mode = i; 1247 drvp->UDMA_cap = i; 1248 s = splbio(); 1249 drvp->drive_flags |= DRIVE_UDMA; 1250 splx(s); 1251 } 1252 break; 1253 } 1254 } 1255 aprint_normal("\n"); 1256 } 1257 1258 s = splbio(); 1259 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1260 if (drvp->drive_flags & DRIVE_ATAPI) { 1261 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1262 drvp->drive_flags |= DRIVE_NOSTREAM; 1263 } else { 1264 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1265 drvp->drive_flags |= DRIVE_NOSTREAM; 1266 } 1267 splx(s); 1268 1269 /* Try to guess ATA version here, if it didn't get reported */ 1270 if (drvp->ata_vers == 0) { 1271 if (drvp->drive_flags & DRIVE_UDMA) 1272 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1273 else if (drvp->PIO_cap > 2) 1274 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1275 } 1276 cf_flags = drv_dev->dv_cfdata->cf_flags; 1277 if (cf_flags & ATA_CONFIG_PIO_SET) { 1278 s = splbio(); 1279 drvp->PIO_mode = 1280 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1281 drvp->drive_flags |= DRIVE_MODE; 1282 splx(s); 1283 } 1284 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1285 /* don't care about DMA modes */ 1286 return; 1287 } 1288 if (cf_flags & ATA_CONFIG_DMA_SET) { 1289 s = splbio(); 1290 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1291 ATA_CONFIG_DMA_DISABLE) { 1292 drvp->drive_flags &= ~DRIVE_DMA; 1293 } else { 1294 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1295 ATA_CONFIG_DMA_OFF; 1296 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1297 } 1298 splx(s); 1299 } 1300 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1301 /* don't care about UDMA modes */ 1302 return; 1303 } 1304 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1305 s = splbio(); 1306 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1307 ATA_CONFIG_UDMA_DISABLE) { 1308 drvp->drive_flags &= ~DRIVE_UDMA; 1309 } else { 1310 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1311 ATA_CONFIG_UDMA_OFF; 1312 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1313 } 1314 splx(s); 1315 } 1316 } 1317 1318 /* management of the /dev/atabus* devices */ 1319 int 1320 atabusopen(dev_t dev, int flag, int fmt, struct proc *p) 1321 { 1322 struct atabus_softc *sc; 1323 int error, unit = minor(dev); 1324 1325 if (unit >= atabus_cd.cd_ndevs || 1326 (sc = atabus_cd.cd_devs[unit]) == NULL) 1327 return (ENXIO); 1328 1329 if (sc->sc_flags & ATABUSCF_OPEN) 1330 return (EBUSY); 1331 1332 if ((error = ata_addref(sc->sc_chan)) != 0) 1333 return (error); 1334 1335 sc->sc_flags |= ATABUSCF_OPEN; 1336 1337 return (0); 1338 } 1339 1340 1341 int 1342 atabusclose(dev_t dev, int flag, int fmt, struct proc *p) 1343 { 1344 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1345 1346 ata_delref(sc->sc_chan); 1347 1348 sc->sc_flags &= ~ATABUSCF_OPEN; 1349 1350 return (0); 1351 } 1352 1353 int 1354 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct proc *p) 1355 { 1356 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1357 struct ata_channel *chp = sc->sc_chan; 1358 int min_drive, max_drive, drive; 1359 int error; 1360 int s; 1361 1362 /* 1363 * Enforce write permission for ioctls that change the 1364 * state of the bus. Host adapter specific ioctls must 1365 * be checked by the adapter driver. 1366 */ 1367 switch (cmd) { 1368 case ATABUSIOSCAN: 1369 case ATABUSIODETACH: 1370 case ATABUSIORESET: 1371 if ((flag & FWRITE) == 0) 1372 return (EBADF); 1373 } 1374 1375 switch (cmd) { 1376 case ATABUSIORESET: 1377 s = splbio(); 1378 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1379 splx(s); 1380 error = 0; 1381 break; 1382 case ATABUSIOSCAN: 1383 { 1384 #if 0 1385 struct atabusioscan_args *a= 1386 (struct atabusioscan_args *)addr; 1387 #endif 1388 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1389 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1390 return (EOPNOTSUPP); 1391 return (EOPNOTSUPP); 1392 } 1393 case ATABUSIODETACH: 1394 { 1395 struct atabusioscan_args *a= 1396 (struct atabusioscan_args *)addr; 1397 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1398 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1399 return (EOPNOTSUPP); 1400 switch (a->at_dev) { 1401 case -1: 1402 min_drive = 0; 1403 max_drive = 1; 1404 break; 1405 case 0: 1406 case 1: 1407 min_drive = max_drive = a->at_dev; 1408 break; 1409 default: 1410 return (EINVAL); 1411 } 1412 for (drive = min_drive; drive <= max_drive; drive++) { 1413 if (chp->ch_drive[drive].drv_softc != NULL) { 1414 error = config_detach( 1415 chp->ch_drive[drive].drv_softc, 0); 1416 if (error) 1417 return (error); 1418 chp->ch_drive[drive].drv_softc = NULL; 1419 } 1420 } 1421 error = 0; 1422 break; 1423 } 1424 default: 1425 error = ENOTTY; 1426 } 1427 return (error); 1428 }; 1429 1430 static void 1431 atabus_powerhook(int why, void *hdl) 1432 { 1433 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1434 struct ata_channel *chp = sc->sc_chan; 1435 int s; 1436 1437 switch (why) { 1438 case PWR_SOFTSUSPEND: 1439 case PWR_SOFTSTANDBY: 1440 /* freeze the queue and wait for the controller to be idle */ 1441 ata_queue_idle(chp->ch_queue); 1442 break; 1443 case PWR_RESUME: 1444 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 1445 s = splbio(); 1446 KASSERT(chp->ch_queue->queue_freeze > 0); 1447 /* unfreeze the queue and reset drives (to wake them up) */ 1448 chp->ch_queue->queue_freeze--; 1449 ata_reset_channel(chp, AT_WAIT); 1450 splx(s); 1451 break; 1452 case PWR_SUSPEND: 1453 case PWR_STANDBY: 1454 case PWR_SOFTRESUME: 1455 break; 1456 } 1457 1458 return; 1459 } 1460
Indexes created Wed Sep 24 05:09:52 GMT 2025