ata.c revision 1.76
1 /* $NetBSD: ata.c,v 1.76 2006/09/07 12:34:42 itohy Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.76 2006/09/07 12:34:42 itohy Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/ataconf.h> 56 #include <dev/ata/atareg.h> 57 #include <dev/ata/atavar.h> 58 #include <dev/ic/wdcvar.h> /* for PIOBM */ 59 60 #include "locators.h" 61 62 #include "atapibus.h" 63 #include "ataraid.h" 64 65 #if NATARAID > 0 66 #include <dev/ata/ata_raidvar.h> 67 #endif 68 69 #define DEBUG_FUNCS 0x08 70 #define DEBUG_PROBE 0x10 71 #define DEBUG_DETACH 0x20 72 #define DEBUG_XFERS 0x40 73 #ifdef ATADEBUG 74 int atadebug_mask = 0; 75 #define ATADEBUG_PRINT(args, level) \ 76 if (atadebug_mask & (level)) \ 77 printf args 78 #else 79 #define ATADEBUG_PRINT(args, level) 80 #endif 81 82 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /***************************************************************************** 93 * ATA bus layer. 94 * 95 * ATA controllers attach an atabus instance, which handles probing the bus 96 * for drives, etc. 97 *****************************************************************************/ 98 99 dev_type_open(atabusopen); 100 dev_type_close(atabusclose); 101 dev_type_ioctl(atabusioctl); 102 103 const struct cdevsw atabus_cdevsw = { 104 atabusopen, atabusclose, noread, nowrite, atabusioctl, 105 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 106 }; 107 108 extern struct cfdriver atabus_cd; 109 110 static void atabus_powerhook(int, void *); 111 112 /* 113 * atabusprint: 114 * 115 * Autoconfiguration print routine used by ATA controllers when 116 * attaching an atabus instance. 117 */ 118 int 119 atabusprint(void *aux, const char *pnp) 120 { 121 struct ata_channel *chan = aux; 122 123 if (pnp) 124 aprint_normal("atabus at %s", pnp); 125 aprint_normal(" channel %d", chan->ch_channel); 126 127 return (UNCONF); 128 } 129 130 /* 131 * ataprint: 132 * 133 * Autoconfiguration print routine. 134 */ 135 int 136 ataprint(void *aux, const char *pnp) 137 { 138 struct ata_device *adev = aux; 139 140 if (pnp) 141 aprint_normal("wd at %s", pnp); 142 aprint_normal(" drive %d", adev->adev_drv_data->drive); 143 144 return (UNCONF); 145 } 146 147 /* 148 * ata_channel_attach: 149 * 150 * Common parts of attaching an atabus to an ATA controller channel. 151 */ 152 void 153 ata_channel_attach(struct ata_channel *chp) 154 { 155 156 if (chp->ch_flags & ATACH_DISABLED) 157 return; 158 159 callout_init(&chp->ch_callout); 160 161 TAILQ_INIT(&chp->ch_queue->queue_xfer); 162 chp->ch_queue->queue_freeze = 0; 163 chp->ch_queue->queue_flags = 0; 164 chp->ch_queue->active_xfer = NULL; 165 166 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 167 atabusprint); 168 } 169 170 static void 171 atabusconfig(struct atabus_softc *atabus_sc) 172 { 173 struct ata_channel *chp = atabus_sc->sc_chan; 174 struct atac_softc *atac = chp->ch_atac; 175 int i, s; 176 struct atabus_initq *atabus_initq = NULL; 177 178 /* Probe for the drives. */ 179 (*atac->atac_probe)(chp); 180 181 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 182 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 183 DEBUG_PROBE); 184 185 /* If no drives, abort here */ 186 for (i = 0; i < chp->ch_ndrive; i++) 187 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 188 break; 189 if (i == chp->ch_ndrive) 190 goto out; 191 192 /* Shortcut in case we've been shutdown */ 193 if (chp->ch_flags & ATACH_SHUTDOWN) 194 goto out; 195 196 /* Make sure the devices probe in atabus order to avoid jitter. */ 197 simple_lock(&atabus_interlock); 198 while(1) { 199 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 200 if (atabus_initq->atabus_sc == atabus_sc) 201 break; 202 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 203 &atabus_interlock); 204 } 205 simple_unlock(&atabus_interlock); 206 207 /* 208 * Attach an ATAPI bus, if needed. 209 */ 210 for (i = 0; i < chp->ch_ndrive; i++) { 211 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 212 #if NATAPIBUS > 0 213 (*atac->atac_atapibus_attach)(atabus_sc); 214 #else 215 /* 216 * Fake the autoconfig "not configured" message 217 */ 218 aprint_normal("atapibus at %s not configured\n", 219 atac->atac_dev.dv_xname); 220 chp->atapibus = NULL; 221 s = splbio(); 222 for (i = 0; i < chp->ch_ndrive; i++) 223 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 224 splx(s); 225 #endif 226 break; 227 } 228 } 229 230 for (i = 0; i < chp->ch_ndrive; i++) { 231 struct ata_device adev; 232 if ((chp->ch_drive[i].drive_flags & 233 (DRIVE_ATA | DRIVE_OLD)) == 0) { 234 continue; 235 } 236 memset(&adev, 0, sizeof(struct ata_device)); 237 adev.adev_bustype = atac->atac_bustype_ata; 238 adev.adev_channel = chp->ch_channel; 239 adev.adev_openings = 1; 240 adev.adev_drv_data = &chp->ch_drive[i]; 241 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 242 "ata_hl", &adev, ataprint); 243 if (chp->ata_drives[i] != NULL) 244 ata_probe_caps(&chp->ch_drive[i]); 245 else { 246 s = splbio(); 247 chp->ch_drive[i].drive_flags &= 248 ~(DRIVE_ATA | DRIVE_OLD); 249 splx(s); 250 } 251 } 252 253 /* now that we know the drives, the controller can set its modes */ 254 if (atac->atac_set_modes) { 255 (*atac->atac_set_modes)(chp); 256 ata_print_modes(chp); 257 } 258 #if NATARAID > 0 259 if (atac->atac_cap & ATAC_CAP_RAID) 260 for (i = 0; i < chp->ch_ndrive; i++) 261 if (chp->ata_drives[i] != NULL) 262 ata_raid_check_component(chp->ata_drives[i]); 263 #endif /* NATARAID > 0 */ 264 265 /* 266 * reset drive_flags for unattached devices, reset state for attached 267 * ones 268 */ 269 s = splbio(); 270 for (i = 0; i < chp->ch_ndrive; i++) { 271 if (chp->ch_drive[i].drv_softc == NULL) 272 chp->ch_drive[i].drive_flags = 0; 273 else 274 chp->ch_drive[i].state = 0; 275 } 276 splx(s); 277 278 out: 279 if (atabus_initq == NULL) { 280 simple_lock(&atabus_interlock); 281 while(1) { 282 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 283 if (atabus_initq->atabus_sc == atabus_sc) 284 break; 285 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 286 &atabus_interlock); 287 } 288 simple_unlock(&atabus_interlock); 289 } 290 simple_lock(&atabus_interlock); 291 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 292 simple_unlock(&atabus_interlock); 293 294 free(atabus_initq, M_DEVBUF); 295 wakeup(&atabus_initq_head); 296 297 ata_delref(chp); 298 299 config_pending_decr(); 300 } 301 302 /* 303 * atabus_thread: 304 * 305 * Worker thread for the ATA bus. 306 */ 307 static void 308 atabus_thread(void *arg) 309 { 310 struct atabus_softc *sc = arg; 311 struct ata_channel *chp = sc->sc_chan; 312 struct ata_xfer *xfer; 313 int i, s; 314 315 s = splbio(); 316 chp->ch_flags |= ATACH_TH_RUN; 317 318 /* 319 * Probe the drives. Reset all flags to 0 to indicate to controllers 320 * that can re-probe that all drives must be probed.. 321 * 322 * Note: ch_ndrive may be changed during the probe. 323 */ 324 for (i = 0; i < ATA_MAXDRIVES; i++) 325 chp->ch_drive[i].drive_flags = 0; 326 splx(s); 327 328 /* Configure the devices on the bus. */ 329 atabusconfig(sc); 330 331 s = splbio(); 332 for (;;) { 333 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 334 (chp->ch_queue->active_xfer == NULL || 335 chp->ch_queue->queue_freeze == 0)) { 336 chp->ch_flags &= ~ATACH_TH_RUN; 337 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 338 chp->ch_flags |= ATACH_TH_RUN; 339 } 340 if (chp->ch_flags & ATACH_SHUTDOWN) { 341 break; 342 } 343 if (chp->ch_flags & ATACH_TH_RESET) { 344 /* 345 * ata_reset_channel() will freeze 2 times, so 346 * unfreeze one time. Not a problem as we're at splbio 347 */ 348 chp->ch_queue->queue_freeze--; 349 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 350 } else if (chp->ch_queue->active_xfer != NULL && 351 chp->ch_queue->queue_freeze == 1) { 352 /* 353 * Caller has bumped queue_freeze, decrease it. 354 */ 355 chp->ch_queue->queue_freeze--; 356 xfer = chp->ch_queue->active_xfer; 357 KASSERT(xfer != NULL); 358 (*xfer->c_start)(xfer->c_chp, xfer); 359 } else if (chp->ch_queue->queue_freeze > 1) 360 panic("ata_thread: queue_freeze"); 361 } 362 splx(s); 363 chp->ch_thread = NULL; 364 wakeup(&chp->ch_flags); 365 kthread_exit(0); 366 } 367 368 /* 369 * atabus_create_thread: 370 * 371 * Helper routine to create the ATA bus worker thread. 372 */ 373 static void 374 atabus_create_thread(void *arg) 375 { 376 struct atabus_softc *sc = arg; 377 struct ata_channel *chp = sc->sc_chan; 378 int error; 379 380 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 381 "%s", sc->sc_dev.dv_xname)) != 0) 382 aprint_error("%s: unable to create kernel thread: error %d\n", 383 sc->sc_dev.dv_xname, error); 384 } 385 386 /* 387 * atabus_match: 388 * 389 * Autoconfiguration match routine. 390 */ 391 static int 392 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 393 { 394 struct ata_channel *chp = aux; 395 396 if (chp == NULL) 397 return (0); 398 399 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 400 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 401 return (0); 402 403 return (1); 404 } 405 406 /* 407 * atabus_attach: 408 * 409 * Autoconfiguration attach routine. 410 */ 411 static void 412 atabus_attach(struct device *parent, struct device *self, void *aux) 413 { 414 struct atabus_softc *sc = (void *) self; 415 struct ata_channel *chp = aux; 416 struct atabus_initq *initq; 417 418 sc->sc_chan = chp; 419 420 aprint_normal("\n"); 421 aprint_naive("\n"); 422 423 if (ata_addref(chp)) 424 return; 425 426 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 427 initq->atabus_sc = sc; 428 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 429 config_pending_incr(); 430 kthread_create(atabus_create_thread, sc); 431 432 sc->sc_powerhook = powerhook_establish(atabus_powerhook, sc); 433 if (sc->sc_powerhook == NULL) 434 printf("%s: WARNING: unable to establish power hook\n", 435 sc->sc_dev.dv_xname); 436 } 437 438 /* 439 * atabus_activate: 440 * 441 * Autoconfiguration activation routine. 442 */ 443 static int 444 atabus_activate(struct device *self, enum devact act) 445 { 446 struct atabus_softc *sc = (void *) self; 447 struct ata_channel *chp = sc->sc_chan; 448 struct device *dev = NULL; 449 int s, i, error = 0; 450 451 s = splbio(); 452 switch (act) { 453 case DVACT_ACTIVATE: 454 error = EOPNOTSUPP; 455 break; 456 457 case DVACT_DEACTIVATE: 458 /* 459 * We might deactivate the children of atapibus twice 460 * (once bia atapibus, once directly), but since the 461 * generic autoconfiguration code maintains the DVF_ACTIVE 462 * flag, it's safe. 463 */ 464 if ((dev = chp->atapibus) != NULL) { 465 error = config_deactivate(dev); 466 if (error) 467 goto out; 468 } 469 470 for (i = 0; i < chp->ch_ndrive; i++) { 471 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 472 ATADEBUG_PRINT(("atabus_activate: %s: " 473 "deactivating %s\n", sc->sc_dev.dv_xname, 474 dev->dv_xname), 475 DEBUG_DETACH); 476 error = config_deactivate(dev); 477 if (error) 478 goto out; 479 } 480 } 481 break; 482 } 483 out: 484 splx(s); 485 486 #ifdef ATADEBUG 487 if (dev != NULL && error != 0) 488 ATADEBUG_PRINT(("atabus_activate: %s: " 489 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 490 error, dev->dv_xname), DEBUG_DETACH); 491 #endif /* ATADEBUG */ 492 493 return (error); 494 } 495 496 /* 497 * atabus_detach: 498 * 499 * Autoconfiguration detach routine. 500 */ 501 static int 502 atabus_detach(struct device *self, int flags) 503 { 504 struct atabus_softc *sc = (void *) self; 505 struct ata_channel *chp = sc->sc_chan; 506 struct device *dev = NULL; 507 int s, i, error = 0; 508 509 /* Shutdown the channel. */ 510 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 511 chp->ch_flags |= ATACH_SHUTDOWN; 512 splx(s); 513 wakeup(&chp->ch_thread); 514 while (chp->ch_thread != NULL) 515 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 516 517 /* power hook */ 518 if (sc->sc_powerhook) 519 powerhook_disestablish(sc->sc_powerhook); 520 521 /* 522 * Detach atapibus and its children. 523 */ 524 if ((dev = chp->atapibus) != NULL) { 525 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 526 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 527 error = config_detach(dev, flags); 528 if (error) 529 goto out; 530 } 531 532 /* 533 * Detach our other children. 534 */ 535 for (i = 0; i < chp->ch_ndrive; i++) { 536 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 537 continue; 538 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 539 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 540 sc->sc_dev.dv_xname, dev->dv_xname), 541 DEBUG_DETACH); 542 error = config_detach(dev, flags); 543 if (error) 544 goto out; 545 } 546 } 547 548 out: 549 #ifdef ATADEBUG 550 if (dev != NULL && error != 0) 551 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 552 sc->sc_dev.dv_xname, error, dev->dv_xname), 553 DEBUG_DETACH); 554 #endif /* ATADEBUG */ 555 556 return (error); 557 } 558 559 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 560 atabus_match, atabus_attach, atabus_detach, atabus_activate); 561 562 /***************************************************************************** 563 * Common ATA bus operations. 564 *****************************************************************************/ 565 566 /* Get the disk's parameters */ 567 int 568 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 569 struct ataparams *prms) 570 { 571 char tb[DEV_BSIZE]; 572 struct ata_command ata_c; 573 struct ata_channel *chp = drvp->chnl_softc; 574 struct atac_softc *atac = chp->ch_atac; 575 576 #if BYTE_ORDER == LITTLE_ENDIAN 577 int i; 578 u_int16_t *p; 579 #endif 580 581 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 582 583 memset(tb, 0, DEV_BSIZE); 584 memset(prms, 0, sizeof(struct ataparams)); 585 memset(&ata_c, 0, sizeof(struct ata_command)); 586 587 if (drvp->drive_flags & DRIVE_ATA) { 588 ata_c.r_command = WDCC_IDENTIFY; 589 ata_c.r_st_bmask = WDCS_DRDY; 590 ata_c.r_st_pmask = WDCS_DRQ; 591 ata_c.timeout = 3000; /* 3s */ 592 } else if (drvp->drive_flags & DRIVE_ATAPI) { 593 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 594 ata_c.r_st_bmask = 0; 595 ata_c.r_st_pmask = WDCS_DRQ; 596 ata_c.timeout = 10000; /* 10s */ 597 } else { 598 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 599 DEBUG_FUNCS|DEBUG_PROBE); 600 return CMD_ERR; 601 } 602 ata_c.flags = AT_READ | flags; 603 ata_c.data = tb; 604 ata_c.bcount = DEV_BSIZE; 605 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 606 &ata_c) != ATACMD_COMPLETE) { 607 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 608 DEBUG_FUNCS|DEBUG_PROBE); 609 return CMD_AGAIN; 610 } 611 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 612 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 613 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 614 return CMD_ERR; 615 } else { 616 /* if we didn't read any data something is wrong */ 617 if ((ata_c.flags & AT_XFDONE) == 0) 618 return CMD_ERR; 619 /* Read in parameter block. */ 620 memcpy(prms, tb, sizeof(struct ataparams)); 621 #if BYTE_ORDER == LITTLE_ENDIAN 622 /* 623 * Shuffle string byte order. 624 * ATAPI Mitsumi and NEC drives don't need this. 625 */ 626 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 627 WDC_CFG_ATAPI && 628 ((prms->atap_model[0] == 'N' && 629 prms->atap_model[1] == 'E') || 630 (prms->atap_model[0] == 'F' && 631 prms->atap_model[1] == 'X'))) 632 return 0; 633 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 634 p = (u_short *)(prms->atap_model + i); 635 *p = ntohs(*p); 636 } 637 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 638 p = (u_short *)(prms->atap_serial + i); 639 *p = ntohs(*p); 640 } 641 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 642 p = (u_short *)(prms->atap_revision + i); 643 *p = ntohs(*p); 644 } 645 #endif 646 return CMD_OK; 647 } 648 } 649 650 int 651 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 652 { 653 struct ata_command ata_c; 654 struct ata_channel *chp = drvp->chnl_softc; 655 struct atac_softc *atac = chp->ch_atac; 656 657 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 658 memset(&ata_c, 0, sizeof(struct ata_command)); 659 660 ata_c.r_command = SET_FEATURES; 661 ata_c.r_st_bmask = 0; 662 ata_c.r_st_pmask = 0; 663 ata_c.r_features = WDSF_SET_MODE; 664 ata_c.r_count = mode; 665 ata_c.flags = flags; 666 ata_c.timeout = 1000; /* 1s */ 667 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 668 &ata_c) != ATACMD_COMPLETE) 669 return CMD_AGAIN; 670 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 671 return CMD_ERR; 672 } 673 return CMD_OK; 674 } 675 676 void 677 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 678 { 679 /* 680 * Downgrade decision: if we get NERRS_MAX in NXFER. 681 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 682 * first error within the first NXFER ops will immediatly trigger 683 * a downgrade. 684 * If we got an error and n_xfers is bigger than NXFER reset counters. 685 */ 686 drvp->n_dmaerrs++; 687 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 688 ata_downgrade_mode(drvp, flags); 689 drvp->n_dmaerrs = NERRS_MAX-1; 690 drvp->n_xfers = 0; 691 return; 692 } 693 if (drvp->n_xfers > NXFER) { 694 drvp->n_dmaerrs = 1; /* just got an error */ 695 drvp->n_xfers = 1; /* restart counting from this error */ 696 } 697 } 698 699 /* 700 * freeze the queue and wait for the controller to be idle. Caller has to 701 * unfreeze/restart the queue 702 */ 703 void 704 ata_queue_idle(struct ata_queue *queue) 705 { 706 int s = splbio(); 707 queue->queue_freeze++; 708 while (queue->active_xfer != NULL) { 709 queue->queue_flags |= QF_IDLE_WAIT; 710 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 711 } 712 splx(s); 713 } 714 715 /* 716 * Add a command to the queue and start controller. 717 * 718 * MUST BE CALLED AT splbio()! 719 */ 720 void 721 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 722 { 723 724 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 725 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 726 727 /* complete xfer setup */ 728 xfer->c_chp = chp; 729 730 /* insert at the end of command list */ 731 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 732 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 733 chp->ch_flags), DEBUG_XFERS); 734 /* 735 * if polling and can sleep, wait for the xfer to be at head of queue 736 */ 737 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 738 while (chp->ch_queue->active_xfer != NULL || 739 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 740 xfer->c_flags |= C_WAITACT; 741 tsleep(xfer, PRIBIO, "ataact", 0); 742 xfer->c_flags &= ~C_WAITACT; 743 if (xfer->c_flags & C_FREE) { 744 ata_free_xfer(chp, xfer); 745 return; 746 } 747 } 748 } 749 atastart(chp); 750 } 751 752 /* 753 * Start I/O on a controller, for the given channel. 754 * The first xfer may be not for our channel if the channel queues 755 * are shared. 756 * 757 * MUST BE CALLED AT splbio()! 758 */ 759 void 760 atastart(struct ata_channel *chp) 761 { 762 struct atac_softc *atac = chp->ch_atac; 763 struct ata_xfer *xfer; 764 765 #ifdef ATA_DEBUG 766 int spl1, spl2; 767 768 spl1 = splbio(); 769 spl2 = splbio(); 770 if (spl2 != spl1) { 771 printf("atastart: not at splbio()\n"); 772 panic("atastart"); 773 } 774 splx(spl2); 775 splx(spl1); 776 #endif /* ATA_DEBUG */ 777 778 /* is there a xfer ? */ 779 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 780 return; 781 782 /* adjust chp, in case we have a shared queue */ 783 chp = xfer->c_chp; 784 785 if (chp->ch_queue->active_xfer != NULL) { 786 return; /* channel aleady active */ 787 } 788 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 789 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 790 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 791 wakeup(&chp->ch_queue->queue_flags); 792 } 793 return; /* queue frozen */ 794 } 795 /* 796 * if someone is waiting for the command to be active, wake it up 797 * and let it process the command 798 */ 799 if (xfer->c_flags & C_WAITACT) { 800 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 801 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 802 DEBUG_XFERS); 803 wakeup(xfer); 804 return; 805 } 806 #ifdef DIAGNOSTIC 807 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 808 panic("atastart: channel waiting for irq"); 809 #endif 810 if (atac->atac_claim_hw) 811 if (!(*atac->atac_claim_hw)(chp, 0)) 812 return; 813 814 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 815 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 816 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 817 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 818 chp->ch_drive[xfer->c_drive].state = 0; 819 } 820 chp->ch_queue->active_xfer = xfer; 821 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 822 823 if (atac->atac_cap & ATAC_CAP_NOIRQ) 824 KASSERT(xfer->c_flags & C_POLL); 825 826 xfer->c_start(chp, xfer); 827 } 828 829 struct ata_xfer * 830 ata_get_xfer(int flags) 831 { 832 struct ata_xfer *xfer; 833 int s; 834 835 s = splbio(); 836 xfer = pool_get(&ata_xfer_pool, 837 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 838 splx(s); 839 if (xfer != NULL) { 840 memset(xfer, 0, sizeof(struct ata_xfer)); 841 } 842 return xfer; 843 } 844 845 void 846 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 847 { 848 struct atac_softc *atac = chp->ch_atac; 849 int s; 850 851 if (xfer->c_flags & C_WAITACT) { 852 /* Someone is waiting for this xfer, so we can't free now */ 853 xfer->c_flags |= C_FREE; 854 wakeup(xfer); 855 return; 856 } 857 858 #if NATA_PIOBM /* XXX wdc dependent code */ 859 if (xfer->c_flags & C_PIOBM) { 860 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 861 862 /* finish the busmastering PIO */ 863 (*wdc->piobm_done)(wdc->dma_arg, 864 chp->ch_channel, xfer->c_drive); 865 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 866 } 867 #endif 868 869 if (atac->atac_free_hw) 870 (*atac->atac_free_hw)(chp); 871 s = splbio(); 872 pool_put(&ata_xfer_pool, xfer); 873 splx(s); 874 } 875 876 /* 877 * Kill off all pending xfers for a ata_channel. 878 * 879 * Must be called at splbio(). 880 */ 881 void 882 ata_kill_pending(struct ata_drive_datas *drvp) 883 { 884 struct ata_channel *chp = drvp->chnl_softc; 885 struct ata_xfer *xfer, *next_xfer; 886 int s = splbio(); 887 888 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 889 xfer != NULL; xfer = next_xfer) { 890 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 891 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 892 continue; 893 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 894 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 895 } 896 897 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 898 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 899 drvp->drive_flags |= DRIVE_WAITDRAIN; 900 (void) tsleep(&chp->ch_queue->active_xfer, 901 PRIBIO, "atdrn", 0); 902 } else { 903 /* no more xfer for us */ 904 break; 905 } 906 } 907 splx(s); 908 } 909 910 /* 911 * ata_reset_channel: 912 * 913 * Reset and ATA channel. 914 * 915 * MUST BE CALLED AT splbio()! 916 */ 917 void 918 ata_reset_channel(struct ata_channel *chp, int flags) 919 { 920 struct atac_softc *atac = chp->ch_atac; 921 int drive; 922 923 #ifdef ATA_DEBUG 924 int spl1, spl2; 925 926 spl1 = splbio(); 927 spl2 = splbio(); 928 if (spl2 != spl1) { 929 printf("ata_reset_channel: not at splbio()\n"); 930 panic("ata_reset_channel"); 931 } 932 splx(spl2); 933 splx(spl1); 934 #endif /* ATA_DEBUG */ 935 936 chp->ch_queue->queue_freeze++; 937 938 /* 939 * If we can poll or wait it's OK, otherwise wake up the 940 * kernel thread to do it for us. 941 */ 942 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 943 if (chp->ch_flags & ATACH_TH_RESET) { 944 /* No need to schedule a reset more than one time. */ 945 chp->ch_queue->queue_freeze--; 946 return; 947 } 948 chp->ch_flags |= ATACH_TH_RESET; 949 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 950 wakeup(&chp->ch_thread); 951 return; 952 } 953 954 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 955 956 for (drive = 0; drive < chp->ch_ndrive; drive++) 957 chp->ch_drive[drive].state = 0; 958 959 chp->ch_flags &= ~ATACH_TH_RESET; 960 if ((flags & AT_RST_EMERG) == 0) { 961 chp->ch_queue->queue_freeze--; 962 atastart(chp); 963 } else { 964 /* make sure that we can use polled commands */ 965 TAILQ_INIT(&chp->ch_queue->queue_xfer); 966 chp->ch_queue->queue_freeze = 0; 967 chp->ch_queue->active_xfer = NULL; 968 } 969 } 970 971 int 972 ata_addref(struct ata_channel *chp) 973 { 974 struct atac_softc *atac = chp->ch_atac; 975 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 976 int s, error = 0; 977 978 s = splbio(); 979 if (adapt->adapt_refcnt++ == 0 && 980 adapt->adapt_enable != NULL) { 981 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 982 if (error) 983 adapt->adapt_refcnt--; 984 } 985 splx(s); 986 return (error); 987 } 988 989 void 990 ata_delref(struct ata_channel *chp) 991 { 992 struct atac_softc *atac = chp->ch_atac; 993 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 994 int s; 995 996 s = splbio(); 997 if (adapt->adapt_refcnt-- == 1 && 998 adapt->adapt_enable != NULL) 999 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 1000 splx(s); 1001 } 1002 1003 void 1004 ata_print_modes(struct ata_channel *chp) 1005 { 1006 struct atac_softc *atac = chp->ch_atac; 1007 int drive; 1008 struct ata_drive_datas *drvp; 1009 1010 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1011 drvp = &chp->ch_drive[drive]; 1012 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1013 continue; 1014 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 1015 drvp->drv_softc->dv_xname, 1016 atac->atac_dev.dv_xname, 1017 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1018 if (drvp->drive_flags & DRIVE_DMA) 1019 aprint_normal(", DMA mode %d", drvp->DMA_mode); 1020 if (drvp->drive_flags & DRIVE_UDMA) { 1021 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 1022 if (drvp->UDMA_mode == 2) 1023 aprint_normal(" (Ultra/33)"); 1024 else if (drvp->UDMA_mode == 4) 1025 aprint_normal(" (Ultra/66)"); 1026 else if (drvp->UDMA_mode == 5) 1027 aprint_normal(" (Ultra/100)"); 1028 else if (drvp->UDMA_mode == 6) 1029 aprint_normal(" (Ultra/133)"); 1030 } 1031 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1032 #if NATA_PIOBM 1033 /* PIOBM capable controllers use DMA for PIO commands */ 1034 || (atac->atac_cap & ATAC_CAP_PIOBM) 1035 #endif 1036 ) 1037 aprint_normal(" (using DMA)"); 1038 aprint_normal("\n"); 1039 } 1040 } 1041 1042 /* 1043 * downgrade the transfer mode of a drive after an error. return 1 if 1044 * downgrade was possible, 0 otherwise. 1045 * 1046 * MUST BE CALLED AT splbio()! 1047 */ 1048 int 1049 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1050 { 1051 struct ata_channel *chp = drvp->chnl_softc; 1052 struct atac_softc *atac = chp->ch_atac; 1053 struct device *drv_dev = drvp->drv_softc; 1054 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1055 1056 /* if drive or controller don't know its mode, we can't do much */ 1057 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1058 (atac->atac_set_modes == NULL)) 1059 return 0; 1060 /* current drive mode was set by a config flag, let it this way */ 1061 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1062 (cf_flags & ATA_CONFIG_DMA_SET) || 1063 (cf_flags & ATA_CONFIG_UDMA_SET)) 1064 return 0; 1065 1066 /* 1067 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1068 */ 1069 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1070 drvp->UDMA_mode--; 1071 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1072 drv_dev->dv_xname, drvp->UDMA_mode); 1073 } 1074 1075 /* 1076 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1077 */ 1078 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1079 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1080 drvp->PIO_mode = drvp->PIO_cap; 1081 printf("%s: transfer error, downgrading to PIO mode %d\n", 1082 drv_dev->dv_xname, drvp->PIO_mode); 1083 } else /* already using PIO, can't downgrade */ 1084 return 0; 1085 1086 (*atac->atac_set_modes)(chp); 1087 ata_print_modes(chp); 1088 /* reset the channel, which will shedule all drives for setup */ 1089 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1090 return 1; 1091 } 1092 1093 /* 1094 * Probe drive's capabilities, for use by the controller later 1095 * Assumes drvp points to an existing drive. 1096 */ 1097 void 1098 ata_probe_caps(struct ata_drive_datas *drvp) 1099 { 1100 struct ataparams params, params2; 1101 struct ata_channel *chp = drvp->chnl_softc; 1102 struct atac_softc *atac = chp->ch_atac; 1103 struct device *drv_dev = drvp->drv_softc; 1104 int i, printed, s; 1105 const char *sep = ""; 1106 int cf_flags; 1107 1108 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1109 /* IDENTIFY failed. Can't tell more about the device */ 1110 return; 1111 } 1112 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1113 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1114 /* 1115 * Controller claims 16 and 32 bit transfers. 1116 * Re-do an IDENTIFY with 32-bit transfers, 1117 * and compare results. 1118 */ 1119 s = splbio(); 1120 drvp->drive_flags |= DRIVE_CAP32; 1121 splx(s); 1122 ata_get_params(drvp, AT_WAIT, ¶ms2); 1123 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1124 /* Not good. fall back to 16bits */ 1125 s = splbio(); 1126 drvp->drive_flags &= ~DRIVE_CAP32; 1127 splx(s); 1128 } else { 1129 aprint_normal("%s: 32-bit data port\n", 1130 drv_dev->dv_xname); 1131 } 1132 } 1133 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1134 if (params.atap_ata_major > 0x01 && 1135 params.atap_ata_major != 0xffff) { 1136 for (i = 14; i > 0; i--) { 1137 if (params.atap_ata_major & (1 << i)) { 1138 aprint_normal("%s: ATA version %d\n", 1139 drv_dev->dv_xname, i); 1140 drvp->ata_vers = i; 1141 break; 1142 } 1143 } 1144 } 1145 #endif 1146 1147 /* An ATAPI device is at last PIO mode 3 */ 1148 if (drvp->drive_flags & DRIVE_ATAPI) 1149 drvp->PIO_mode = 3; 1150 1151 /* 1152 * It's not in the specs, but it seems that some drive 1153 * returns 0xffff in atap_extensions when this field is invalid 1154 */ 1155 if (params.atap_extensions != 0xffff && 1156 (params.atap_extensions & WDC_EXT_MODES)) { 1157 printed = 0; 1158 /* 1159 * XXX some drives report something wrong here (they claim to 1160 * support PIO mode 8 !). As mode is coded on 3 bits in 1161 * SET FEATURE, limit it to 7 (so limit i to 4). 1162 * If higher mode than 7 is found, abort. 1163 */ 1164 for (i = 7; i >= 0; i--) { 1165 if ((params.atap_piomode_supp & (1 << i)) == 0) 1166 continue; 1167 if (i > 4) 1168 return; 1169 /* 1170 * See if mode is accepted. 1171 * If the controller can't set its PIO mode, 1172 * assume the defaults are good, so don't try 1173 * to set it 1174 */ 1175 if (atac->atac_set_modes) 1176 /* 1177 * It's OK to pool here, it's fast enouth 1178 * to not bother waiting for interrupt 1179 */ 1180 if (ata_set_mode(drvp, 0x08 | (i + 3), 1181 AT_WAIT) != CMD_OK) 1182 continue; 1183 if (!printed) { 1184 aprint_normal("%s: drive supports PIO mode %d", 1185 drv_dev->dv_xname, i + 3); 1186 sep = ","; 1187 printed = 1; 1188 } 1189 /* 1190 * If controller's driver can't set its PIO mode, 1191 * get the highter one for the drive. 1192 */ 1193 if (atac->atac_set_modes == NULL || 1194 atac->atac_pio_cap >= i + 3) { 1195 drvp->PIO_mode = i + 3; 1196 drvp->PIO_cap = i + 3; 1197 break; 1198 } 1199 } 1200 if (!printed) { 1201 /* 1202 * We didn't find a valid PIO mode. 1203 * Assume the values returned for DMA are buggy too 1204 */ 1205 return; 1206 } 1207 s = splbio(); 1208 drvp->drive_flags |= DRIVE_MODE; 1209 splx(s); 1210 printed = 0; 1211 for (i = 7; i >= 0; i--) { 1212 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1213 continue; 1214 if ((atac->atac_cap & ATAC_CAP_DMA) && 1215 atac->atac_set_modes != NULL) 1216 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1217 != CMD_OK) 1218 continue; 1219 if (!printed) { 1220 aprint_normal("%s DMA mode %d", sep, i); 1221 sep = ","; 1222 printed = 1; 1223 } 1224 if (atac->atac_cap & ATAC_CAP_DMA) { 1225 if (atac->atac_set_modes != NULL && 1226 atac->atac_dma_cap < i) 1227 continue; 1228 drvp->DMA_mode = i; 1229 drvp->DMA_cap = i; 1230 s = splbio(); 1231 drvp->drive_flags |= DRIVE_DMA; 1232 splx(s); 1233 } 1234 break; 1235 } 1236 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1237 printed = 0; 1238 for (i = 7; i >= 0; i--) { 1239 if ((params.atap_udmamode_supp & (1 << i)) 1240 == 0) 1241 continue; 1242 if (atac->atac_set_modes != NULL && 1243 (atac->atac_cap & ATAC_CAP_UDMA)) 1244 if (ata_set_mode(drvp, 0x40 | i, 1245 AT_WAIT) != CMD_OK) 1246 continue; 1247 if (!printed) { 1248 aprint_normal("%s Ultra-DMA mode %d", 1249 sep, i); 1250 if (i == 2) 1251 aprint_normal(" (Ultra/33)"); 1252 else if (i == 4) 1253 aprint_normal(" (Ultra/66)"); 1254 else if (i == 5) 1255 aprint_normal(" (Ultra/100)"); 1256 else if (i == 6) 1257 aprint_normal(" (Ultra/133)"); 1258 sep = ","; 1259 printed = 1; 1260 } 1261 if (atac->atac_cap & ATAC_CAP_UDMA) { 1262 if (atac->atac_set_modes != NULL && 1263 atac->atac_udma_cap < i) 1264 continue; 1265 drvp->UDMA_mode = i; 1266 drvp->UDMA_cap = i; 1267 s = splbio(); 1268 drvp->drive_flags |= DRIVE_UDMA; 1269 splx(s); 1270 } 1271 break; 1272 } 1273 } 1274 aprint_normal("\n"); 1275 } 1276 1277 s = splbio(); 1278 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1279 if (drvp->drive_flags & DRIVE_ATAPI) { 1280 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1281 drvp->drive_flags |= DRIVE_NOSTREAM; 1282 } else { 1283 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1284 drvp->drive_flags |= DRIVE_NOSTREAM; 1285 } 1286 splx(s); 1287 1288 /* Try to guess ATA version here, if it didn't get reported */ 1289 if (drvp->ata_vers == 0) { 1290 if (drvp->drive_flags & DRIVE_UDMA) 1291 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1292 else if (drvp->PIO_cap > 2) 1293 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1294 } 1295 cf_flags = device_cfdata(drv_dev)->cf_flags; 1296 if (cf_flags & ATA_CONFIG_PIO_SET) { 1297 s = splbio(); 1298 drvp->PIO_mode = 1299 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1300 drvp->drive_flags |= DRIVE_MODE; 1301 splx(s); 1302 } 1303 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1304 /* don't care about DMA modes */ 1305 return; 1306 } 1307 if (cf_flags & ATA_CONFIG_DMA_SET) { 1308 s = splbio(); 1309 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1310 ATA_CONFIG_DMA_DISABLE) { 1311 drvp->drive_flags &= ~DRIVE_DMA; 1312 } else { 1313 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1314 ATA_CONFIG_DMA_OFF; 1315 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1316 } 1317 splx(s); 1318 } 1319 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1320 /* don't care about UDMA modes */ 1321 return; 1322 } 1323 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1324 s = splbio(); 1325 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1326 ATA_CONFIG_UDMA_DISABLE) { 1327 drvp->drive_flags &= ~DRIVE_UDMA; 1328 } else { 1329 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1330 ATA_CONFIG_UDMA_OFF; 1331 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1332 } 1333 splx(s); 1334 } 1335 } 1336 1337 /* management of the /dev/atabus* devices */ 1338 int 1339 atabusopen(dev_t dev, int flag, int fmt, struct lwp *l) 1340 { 1341 struct atabus_softc *sc; 1342 int error, unit = minor(dev); 1343 1344 if (unit >= atabus_cd.cd_ndevs || 1345 (sc = atabus_cd.cd_devs[unit]) == NULL) 1346 return (ENXIO); 1347 1348 if (sc->sc_flags & ATABUSCF_OPEN) 1349 return (EBUSY); 1350 1351 if ((error = ata_addref(sc->sc_chan)) != 0) 1352 return (error); 1353 1354 sc->sc_flags |= ATABUSCF_OPEN; 1355 1356 return (0); 1357 } 1358 1359 1360 int 1361 atabusclose(dev_t dev, int flag, int fmt, struct lwp *l) 1362 { 1363 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1364 1365 ata_delref(sc->sc_chan); 1366 1367 sc->sc_flags &= ~ATABUSCF_OPEN; 1368 1369 return (0); 1370 } 1371 1372 int 1373 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, struct lwp *l) 1374 { 1375 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1376 struct ata_channel *chp = sc->sc_chan; 1377 int min_drive, max_drive, drive; 1378 int error; 1379 int s; 1380 1381 /* 1382 * Enforce write permission for ioctls that change the 1383 * state of the bus. Host adapter specific ioctls must 1384 * be checked by the adapter driver. 1385 */ 1386 switch (cmd) { 1387 case ATABUSIOSCAN: 1388 case ATABUSIODETACH: 1389 case ATABUSIORESET: 1390 if ((flag & FWRITE) == 0) 1391 return (EBADF); 1392 } 1393 1394 switch (cmd) { 1395 case ATABUSIORESET: 1396 s = splbio(); 1397 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1398 splx(s); 1399 error = 0; 1400 break; 1401 case ATABUSIOSCAN: 1402 { 1403 #if 0 1404 struct atabusioscan_args *a= 1405 (struct atabusioscan_args *)addr; 1406 #endif 1407 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1408 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1409 return (EOPNOTSUPP); 1410 return (EOPNOTSUPP); 1411 } 1412 case ATABUSIODETACH: 1413 { 1414 struct atabusioscan_args *a= 1415 (struct atabusioscan_args *)addr; 1416 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1417 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1418 return (EOPNOTSUPP); 1419 switch (a->at_dev) { 1420 case -1: 1421 min_drive = 0; 1422 max_drive = 1; 1423 break; 1424 case 0: 1425 case 1: 1426 min_drive = max_drive = a->at_dev; 1427 break; 1428 default: 1429 return (EINVAL); 1430 } 1431 for (drive = min_drive; drive <= max_drive; drive++) { 1432 if (chp->ch_drive[drive].drv_softc != NULL) { 1433 error = config_detach( 1434 chp->ch_drive[drive].drv_softc, 0); 1435 if (error) 1436 return (error); 1437 chp->ch_drive[drive].drv_softc = NULL; 1438 } 1439 } 1440 error = 0; 1441 break; 1442 } 1443 default: 1444 error = ENOTTY; 1445 } 1446 return (error); 1447 }; 1448 1449 static void 1450 atabus_powerhook(int why, void *hdl) 1451 { 1452 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1453 struct ata_channel *chp = sc->sc_chan; 1454 int s; 1455 1456 switch (why) { 1457 case PWR_SOFTSUSPEND: 1458 case PWR_SOFTSTANDBY: 1459 /* freeze the queue and wait for the controller to be idle */ 1460 ata_queue_idle(chp->ch_queue); 1461 break; 1462 case PWR_RESUME: 1463 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 1464 s = splbio(); 1465 KASSERT(chp->ch_queue->queue_freeze > 0); 1466 /* unfreeze the queue and reset drives (to wake them up) */ 1467 chp->ch_queue->queue_freeze--; 1468 ata_reset_channel(chp, AT_WAIT); 1469 splx(s); 1470 break; 1471 case PWR_SUSPEND: 1472 case PWR_STANDBY: 1473 case PWR_SOFTRESUME: 1474 break; 1475 } 1476 1477 return; 1478 } 1479
Indexes created Sat Sep 27 14:09:57 GMT 2025