ata.c revision 1.81
1 /* $NetBSD: ata.c,v 1.81 2006/10/15 00:00:00 itohy Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.81 2006/10/15 00:00:00 itohy Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/ataconf.h> 56 #include <dev/ata/atareg.h> 57 #include <dev/ata/atavar.h> 58 #include <dev/ic/wdcvar.h> /* for PIOBM */ 59 60 #include "locators.h" 61 62 #include "atapibus.h" 63 #include "ataraid.h" 64 65 #if NATARAID > 0 66 #include <dev/ata/ata_raidvar.h> 67 #endif 68 69 #define DEBUG_FUNCS 0x08 70 #define DEBUG_PROBE 0x10 71 #define DEBUG_DETACH 0x20 72 #define DEBUG_XFERS 0x40 73 #ifdef ATADEBUG 74 int atadebug_mask = 0; 75 #define ATADEBUG_PRINT(args, level) \ 76 if (atadebug_mask & (level)) \ 77 printf args 78 #else 79 #define ATADEBUG_PRINT(args, level) 80 #endif 81 82 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /***************************************************************************** 93 * ATA bus layer. 94 * 95 * ATA controllers attach an atabus instance, which handles probing the bus 96 * for drives, etc. 97 *****************************************************************************/ 98 99 dev_type_open(atabusopen); 100 dev_type_close(atabusclose); 101 dev_type_ioctl(atabusioctl); 102 103 const struct cdevsw atabus_cdevsw = { 104 atabusopen, atabusclose, noread, nowrite, atabusioctl, 105 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 106 }; 107 108 extern struct cfdriver atabus_cd; 109 110 static void atabus_powerhook(int, void *); 111 112 /* 113 * atabusprint: 114 * 115 * Autoconfiguration print routine used by ATA controllers when 116 * attaching an atabus instance. 117 */ 118 int 119 atabusprint(void *aux, const char *pnp) 120 { 121 struct ata_channel *chan = aux; 122 123 if (pnp) 124 aprint_normal("atabus at %s", pnp); 125 aprint_normal(" channel %d", chan->ch_channel); 126 127 return (UNCONF); 128 } 129 130 /* 131 * ataprint: 132 * 133 * Autoconfiguration print routine. 134 */ 135 int 136 ataprint(void *aux, const char *pnp) 137 { 138 struct ata_device *adev = aux; 139 140 if (pnp) 141 aprint_normal("wd at %s", pnp); 142 aprint_normal(" drive %d", adev->adev_drv_data->drive); 143 144 return (UNCONF); 145 } 146 147 /* 148 * ata_channel_attach: 149 * 150 * Common parts of attaching an atabus to an ATA controller channel. 151 */ 152 void 153 ata_channel_attach(struct ata_channel *chp) 154 { 155 156 if (chp->ch_flags & ATACH_DISABLED) 157 return; 158 159 callout_init(&chp->ch_callout); 160 161 TAILQ_INIT(&chp->ch_queue->queue_xfer); 162 chp->ch_queue->queue_freeze = 0; 163 chp->ch_queue->queue_flags = 0; 164 chp->ch_queue->active_xfer = NULL; 165 166 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 167 atabusprint); 168 } 169 170 static void 171 atabusconfig(struct atabus_softc *atabus_sc) 172 { 173 struct ata_channel *chp = atabus_sc->sc_chan; 174 struct atac_softc *atac = chp->ch_atac; 175 int i, s; 176 struct atabus_initq *atabus_initq = NULL; 177 178 /* Probe for the drives. */ 179 (*atac->atac_probe)(chp); 180 181 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 182 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 183 DEBUG_PROBE); 184 185 /* If no drives, abort here */ 186 for (i = 0; i < chp->ch_ndrive; i++) 187 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 188 break; 189 if (i == chp->ch_ndrive) 190 goto out; 191 192 /* Shortcut in case we've been shutdown */ 193 if (chp->ch_flags & ATACH_SHUTDOWN) 194 goto out; 195 196 /* Make sure the devices probe in atabus order to avoid jitter. */ 197 simple_lock(&atabus_interlock); 198 while(1) { 199 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 200 if (atabus_initq->atabus_sc == atabus_sc) 201 break; 202 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 203 &atabus_interlock); 204 } 205 simple_unlock(&atabus_interlock); 206 207 /* 208 * Attach an ATAPI bus, if needed. 209 */ 210 for (i = 0; i < chp->ch_ndrive; i++) { 211 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 212 #if NATAPIBUS > 0 213 (*atac->atac_atapibus_attach)(atabus_sc); 214 #else 215 /* 216 * Fake the autoconfig "not configured" message 217 */ 218 aprint_normal("atapibus at %s not configured\n", 219 atac->atac_dev.dv_xname); 220 chp->atapibus = NULL; 221 s = splbio(); 222 for (i = 0; i < chp->ch_ndrive; i++) 223 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 224 splx(s); 225 #endif 226 break; 227 } 228 } 229 230 for (i = 0; i < chp->ch_ndrive; i++) { 231 struct ata_device adev; 232 if ((chp->ch_drive[i].drive_flags & 233 (DRIVE_ATA | DRIVE_OLD)) == 0) { 234 continue; 235 } 236 memset(&adev, 0, sizeof(struct ata_device)); 237 adev.adev_bustype = atac->atac_bustype_ata; 238 adev.adev_channel = chp->ch_channel; 239 adev.adev_openings = 1; 240 adev.adev_drv_data = &chp->ch_drive[i]; 241 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 242 "ata_hl", &adev, ataprint); 243 if (chp->ata_drives[i] != NULL) 244 ata_probe_caps(&chp->ch_drive[i]); 245 else { 246 s = splbio(); 247 chp->ch_drive[i].drive_flags &= 248 ~(DRIVE_ATA | DRIVE_OLD); 249 splx(s); 250 } 251 } 252 253 /* now that we know the drives, the controller can set its modes */ 254 if (atac->atac_set_modes) { 255 (*atac->atac_set_modes)(chp); 256 ata_print_modes(chp); 257 } 258 #if NATARAID > 0 259 if (atac->atac_cap & ATAC_CAP_RAID) 260 for (i = 0; i < chp->ch_ndrive; i++) 261 if (chp->ata_drives[i] != NULL) 262 ata_raid_check_component(chp->ata_drives[i]); 263 #endif /* NATARAID > 0 */ 264 265 /* 266 * reset drive_flags for unattached devices, reset state for attached 267 * ones 268 */ 269 s = splbio(); 270 for (i = 0; i < chp->ch_ndrive; i++) { 271 if (chp->ch_drive[i].drv_softc == NULL) 272 chp->ch_drive[i].drive_flags = 0; 273 else 274 chp->ch_drive[i].state = 0; 275 } 276 splx(s); 277 278 out: 279 if (atabus_initq == NULL) { 280 simple_lock(&atabus_interlock); 281 while(1) { 282 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 283 if (atabus_initq->atabus_sc == atabus_sc) 284 break; 285 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 286 &atabus_interlock); 287 } 288 simple_unlock(&atabus_interlock); 289 } 290 simple_lock(&atabus_interlock); 291 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 292 simple_unlock(&atabus_interlock); 293 294 free(atabus_initq, M_DEVBUF); 295 wakeup(&atabus_initq_head); 296 297 ata_delref(chp); 298 299 config_pending_decr(); 300 } 301 302 /* 303 * atabus_thread: 304 * 305 * Worker thread for the ATA bus. 306 */ 307 static void 308 atabus_thread(void *arg) 309 { 310 struct atabus_softc *sc = arg; 311 struct ata_channel *chp = sc->sc_chan; 312 struct ata_xfer *xfer; 313 int i, s; 314 315 s = splbio(); 316 chp->ch_flags |= ATACH_TH_RUN; 317 318 /* 319 * Probe the drives. Reset all flags to 0 to indicate to controllers 320 * that can re-probe that all drives must be probed.. 321 * 322 * Note: ch_ndrive may be changed during the probe. 323 */ 324 for (i = 0; i < ATA_MAXDRIVES; i++) 325 chp->ch_drive[i].drive_flags = 0; 326 splx(s); 327 328 /* Configure the devices on the bus. */ 329 atabusconfig(sc); 330 331 s = splbio(); 332 for (;;) { 333 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 334 (chp->ch_queue->active_xfer == NULL || 335 chp->ch_queue->queue_freeze == 0)) { 336 chp->ch_flags &= ~ATACH_TH_RUN; 337 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 338 chp->ch_flags |= ATACH_TH_RUN; 339 } 340 if (chp->ch_flags & ATACH_SHUTDOWN) { 341 break; 342 } 343 if (chp->ch_flags & ATACH_TH_RESET) { 344 /* 345 * ata_reset_channel() will freeze 2 times, so 346 * unfreeze one time. Not a problem as we're at splbio 347 */ 348 chp->ch_queue->queue_freeze--; 349 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 350 } else if (chp->ch_queue->active_xfer != NULL && 351 chp->ch_queue->queue_freeze == 1) { 352 /* 353 * Caller has bumped queue_freeze, decrease it. 354 */ 355 chp->ch_queue->queue_freeze--; 356 xfer = chp->ch_queue->active_xfer; 357 KASSERT(xfer != NULL); 358 (*xfer->c_start)(xfer->c_chp, xfer); 359 } else if (chp->ch_queue->queue_freeze > 1) 360 panic("ata_thread: queue_freeze"); 361 } 362 splx(s); 363 chp->ch_thread = NULL; 364 wakeup(&chp->ch_flags); 365 kthread_exit(0); 366 } 367 368 /* 369 * atabus_create_thread: 370 * 371 * Helper routine to create the ATA bus worker thread. 372 */ 373 static void 374 atabus_create_thread(void *arg) 375 { 376 struct atabus_softc *sc = arg; 377 struct ata_channel *chp = sc->sc_chan; 378 int error; 379 380 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 381 "%s", sc->sc_dev.dv_xname)) != 0) 382 aprint_error("%s: unable to create kernel thread: error %d\n", 383 sc->sc_dev.dv_xname, error); 384 } 385 386 /* 387 * atabus_match: 388 * 389 * Autoconfiguration match routine. 390 */ 391 static int 392 atabus_match(struct device *parent __unused, struct cfdata *cf, void *aux) 393 { 394 struct ata_channel *chp = aux; 395 396 if (chp == NULL) 397 return (0); 398 399 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 400 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 401 return (0); 402 403 return (1); 404 } 405 406 /* 407 * atabus_attach: 408 * 409 * Autoconfiguration attach routine. 410 */ 411 static void 412 atabus_attach(struct device *parent __unused, struct device *self, void *aux) 413 { 414 struct atabus_softc *sc = (void *) self; 415 struct ata_channel *chp = aux; 416 struct atabus_initq *initq; 417 418 sc->sc_chan = chp; 419 420 aprint_normal("\n"); 421 aprint_naive("\n"); 422 423 if (ata_addref(chp)) 424 return; 425 426 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 427 initq->atabus_sc = sc; 428 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 429 config_pending_incr(); 430 kthread_create(atabus_create_thread, sc); 431 432 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 433 atabus_powerhook, sc); 434 if (sc->sc_powerhook == NULL) 435 printf("%s: WARNING: unable to establish power hook\n", 436 sc->sc_dev.dv_xname); 437 } 438 439 /* 440 * atabus_activate: 441 * 442 * Autoconfiguration activation routine. 443 */ 444 static int 445 atabus_activate(struct device *self, enum devact act) 446 { 447 struct atabus_softc *sc = (void *) self; 448 struct ata_channel *chp = sc->sc_chan; 449 struct device *dev = NULL; 450 int s, i, error = 0; 451 452 s = splbio(); 453 switch (act) { 454 case DVACT_ACTIVATE: 455 error = EOPNOTSUPP; 456 break; 457 458 case DVACT_DEACTIVATE: 459 /* 460 * We might deactivate the children of atapibus twice 461 * (once bia atapibus, once directly), but since the 462 * generic autoconfiguration code maintains the DVF_ACTIVE 463 * flag, it's safe. 464 */ 465 if ((dev = chp->atapibus) != NULL) { 466 error = config_deactivate(dev); 467 if (error) 468 goto out; 469 } 470 471 for (i = 0; i < chp->ch_ndrive; i++) { 472 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 473 ATADEBUG_PRINT(("atabus_activate: %s: " 474 "deactivating %s\n", sc->sc_dev.dv_xname, 475 dev->dv_xname), 476 DEBUG_DETACH); 477 error = config_deactivate(dev); 478 if (error) 479 goto out; 480 } 481 } 482 break; 483 } 484 out: 485 splx(s); 486 487 #ifdef ATADEBUG 488 if (dev != NULL && error != 0) 489 ATADEBUG_PRINT(("atabus_activate: %s: " 490 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 491 error, dev->dv_xname), DEBUG_DETACH); 492 #endif /* ATADEBUG */ 493 494 return (error); 495 } 496 497 /* 498 * atabus_detach: 499 * 500 * Autoconfiguration detach routine. 501 */ 502 static int 503 atabus_detach(struct device *self, int flags) 504 { 505 struct atabus_softc *sc = (void *) self; 506 struct ata_channel *chp = sc->sc_chan; 507 struct device *dev = NULL; 508 int s, i, error = 0; 509 510 /* Shutdown the channel. */ 511 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 512 chp->ch_flags |= ATACH_SHUTDOWN; 513 splx(s); 514 wakeup(&chp->ch_thread); 515 while (chp->ch_thread != NULL) 516 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 517 518 /* power hook */ 519 if (sc->sc_powerhook) 520 powerhook_disestablish(sc->sc_powerhook); 521 522 /* 523 * Detach atapibus and its children. 524 */ 525 if ((dev = chp->atapibus) != NULL) { 526 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 527 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 528 error = config_detach(dev, flags); 529 if (error) 530 goto out; 531 } 532 533 /* 534 * Detach our other children. 535 */ 536 for (i = 0; i < chp->ch_ndrive; i++) { 537 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 538 continue; 539 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 540 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 541 sc->sc_dev.dv_xname, dev->dv_xname), 542 DEBUG_DETACH); 543 error = config_detach(dev, flags); 544 if (error) 545 goto out; 546 } 547 } 548 549 out: 550 #ifdef ATADEBUG 551 if (dev != NULL && error != 0) 552 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 553 sc->sc_dev.dv_xname, error, dev->dv_xname), 554 DEBUG_DETACH); 555 #endif /* ATADEBUG */ 556 557 return (error); 558 } 559 560 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 561 atabus_match, atabus_attach, atabus_detach, atabus_activate); 562 563 /***************************************************************************** 564 * Common ATA bus operations. 565 *****************************************************************************/ 566 567 /* Get the disk's parameters */ 568 int 569 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 570 struct ataparams *prms) 571 { 572 char tb[DEV_BSIZE]; 573 struct ata_command ata_c; 574 struct ata_channel *chp = drvp->chnl_softc; 575 struct atac_softc *atac = chp->ch_atac; 576 int i; 577 u_int16_t *p; 578 579 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 580 581 memset(tb, 0, DEV_BSIZE); 582 memset(prms, 0, sizeof(struct ataparams)); 583 memset(&ata_c, 0, sizeof(struct ata_command)); 584 585 if (drvp->drive_flags & DRIVE_ATA) { 586 ata_c.r_command = WDCC_IDENTIFY; 587 ata_c.r_st_bmask = WDCS_DRDY; 588 ata_c.r_st_pmask = WDCS_DRQ; 589 ata_c.timeout = 3000; /* 3s */ 590 } else if (drvp->drive_flags & DRIVE_ATAPI) { 591 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 592 ata_c.r_st_bmask = 0; 593 ata_c.r_st_pmask = WDCS_DRQ; 594 ata_c.timeout = 10000; /* 10s */ 595 } else { 596 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 597 DEBUG_FUNCS|DEBUG_PROBE); 598 return CMD_ERR; 599 } 600 ata_c.flags = AT_READ | flags; 601 ata_c.data = tb; 602 ata_c.bcount = DEV_BSIZE; 603 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 604 &ata_c) != ATACMD_COMPLETE) { 605 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 606 DEBUG_FUNCS|DEBUG_PROBE); 607 return CMD_AGAIN; 608 } 609 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 610 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 611 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 612 return CMD_ERR; 613 } else { 614 /* if we didn't read any data something is wrong */ 615 if ((ata_c.flags & AT_XFDONE) == 0) 616 return CMD_ERR; 617 /* Read in parameter block. */ 618 memcpy(prms, tb, sizeof(struct ataparams)); 619 620 /* 621 * Shuffle string byte order. 622 * ATAPI NEC, Mitsumi and Pioneer drives and 623 * old ATA TDK CompactFlash cards 624 * have different byte order. 625 */ 626 #if BYTE_ORDER == BIG_ENDIAN 627 # define M(n) prms->atap_model[(n) ^ 1] 628 #else 629 # define M(n) prms->atap_model[n] 630 #endif 631 if ( 632 #if BYTE_ORDER == BIG_ENDIAN 633 ! 634 #endif 635 ((drvp->drive_flags & DRIVE_ATAPI) ? 636 ((M(0) == 'N' && M(1) == 'E') || 637 (M(0) == 'F' && M(1) == 'X') || 638 (M(0) == 'P' && M(1) == 'i')) : 639 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) 640 return CMD_OK; 641 #undef M 642 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 643 p = (u_int16_t *)(prms->atap_model + i); 644 *p = bswap16(*p); 645 } 646 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 647 p = (u_int16_t *)(prms->atap_serial + i); 648 *p = bswap16(*p); 649 } 650 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 651 p = (u_int16_t *)(prms->atap_revision + i); 652 *p = bswap16(*p); 653 } 654 655 return CMD_OK; 656 } 657 } 658 659 int 660 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 661 { 662 struct ata_command ata_c; 663 struct ata_channel *chp = drvp->chnl_softc; 664 struct atac_softc *atac = chp->ch_atac; 665 666 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 667 memset(&ata_c, 0, sizeof(struct ata_command)); 668 669 ata_c.r_command = SET_FEATURES; 670 ata_c.r_st_bmask = 0; 671 ata_c.r_st_pmask = 0; 672 ata_c.r_features = WDSF_SET_MODE; 673 ata_c.r_count = mode; 674 ata_c.flags = flags; 675 ata_c.timeout = 1000; /* 1s */ 676 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 677 &ata_c) != ATACMD_COMPLETE) 678 return CMD_AGAIN; 679 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 680 return CMD_ERR; 681 } 682 return CMD_OK; 683 } 684 685 #if NATA_DMA 686 void 687 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 688 { 689 /* 690 * Downgrade decision: if we get NERRS_MAX in NXFER. 691 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 692 * first error within the first NXFER ops will immediatly trigger 693 * a downgrade. 694 * If we got an error and n_xfers is bigger than NXFER reset counters. 695 */ 696 drvp->n_dmaerrs++; 697 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 698 ata_downgrade_mode(drvp, flags); 699 drvp->n_dmaerrs = NERRS_MAX-1; 700 drvp->n_xfers = 0; 701 return; 702 } 703 if (drvp->n_xfers > NXFER) { 704 drvp->n_dmaerrs = 1; /* just got an error */ 705 drvp->n_xfers = 1; /* restart counting from this error */ 706 } 707 } 708 #endif /* NATA_DMA */ 709 710 /* 711 * freeze the queue and wait for the controller to be idle. Caller has to 712 * unfreeze/restart the queue 713 */ 714 void 715 ata_queue_idle(struct ata_queue *queue) 716 { 717 int s = splbio(); 718 queue->queue_freeze++; 719 while (queue->active_xfer != NULL) { 720 queue->queue_flags |= QF_IDLE_WAIT; 721 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 722 } 723 splx(s); 724 } 725 726 /* 727 * Add a command to the queue and start controller. 728 * 729 * MUST BE CALLED AT splbio()! 730 */ 731 void 732 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 733 { 734 735 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 736 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 737 738 /* complete xfer setup */ 739 xfer->c_chp = chp; 740 741 /* insert at the end of command list */ 742 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 743 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 744 chp->ch_flags), DEBUG_XFERS); 745 /* 746 * if polling and can sleep, wait for the xfer to be at head of queue 747 */ 748 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 749 while (chp->ch_queue->active_xfer != NULL || 750 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 751 xfer->c_flags |= C_WAITACT; 752 tsleep(xfer, PRIBIO, "ataact", 0); 753 xfer->c_flags &= ~C_WAITACT; 754 if (xfer->c_flags & C_FREE) { 755 ata_free_xfer(chp, xfer); 756 return; 757 } 758 } 759 } 760 atastart(chp); 761 } 762 763 /* 764 * Start I/O on a controller, for the given channel. 765 * The first xfer may be not for our channel if the channel queues 766 * are shared. 767 * 768 * MUST BE CALLED AT splbio()! 769 */ 770 void 771 atastart(struct ata_channel *chp) 772 { 773 struct atac_softc *atac = chp->ch_atac; 774 struct ata_xfer *xfer; 775 776 #ifdef ATA_DEBUG 777 int spl1, spl2; 778 779 spl1 = splbio(); 780 spl2 = splbio(); 781 if (spl2 != spl1) { 782 printf("atastart: not at splbio()\n"); 783 panic("atastart"); 784 } 785 splx(spl2); 786 splx(spl1); 787 #endif /* ATA_DEBUG */ 788 789 /* is there a xfer ? */ 790 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 791 return; 792 793 /* adjust chp, in case we have a shared queue */ 794 chp = xfer->c_chp; 795 796 if (chp->ch_queue->active_xfer != NULL) { 797 return; /* channel aleady active */ 798 } 799 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 800 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 801 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 802 wakeup(&chp->ch_queue->queue_flags); 803 } 804 return; /* queue frozen */ 805 } 806 /* 807 * if someone is waiting for the command to be active, wake it up 808 * and let it process the command 809 */ 810 if (xfer->c_flags & C_WAITACT) { 811 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 812 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 813 DEBUG_XFERS); 814 wakeup(xfer); 815 return; 816 } 817 #ifdef DIAGNOSTIC 818 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 819 panic("atastart: channel waiting for irq"); 820 #endif 821 if (atac->atac_claim_hw) 822 if (!(*atac->atac_claim_hw)(chp, 0)) 823 return; 824 825 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 826 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 827 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 828 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 829 chp->ch_drive[xfer->c_drive].state = 0; 830 } 831 chp->ch_queue->active_xfer = xfer; 832 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 833 834 if (atac->atac_cap & ATAC_CAP_NOIRQ) 835 KASSERT(xfer->c_flags & C_POLL); 836 837 xfer->c_start(chp, xfer); 838 } 839 840 struct ata_xfer * 841 ata_get_xfer(int flags) 842 { 843 struct ata_xfer *xfer; 844 int s; 845 846 s = splbio(); 847 xfer = pool_get(&ata_xfer_pool, 848 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 849 splx(s); 850 if (xfer != NULL) { 851 memset(xfer, 0, sizeof(struct ata_xfer)); 852 } 853 return xfer; 854 } 855 856 void 857 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 858 { 859 struct atac_softc *atac = chp->ch_atac; 860 int s; 861 862 if (xfer->c_flags & C_WAITACT) { 863 /* Someone is waiting for this xfer, so we can't free now */ 864 xfer->c_flags |= C_FREE; 865 wakeup(xfer); 866 return; 867 } 868 869 #if NATA_PIOBM /* XXX wdc dependent code */ 870 if (xfer->c_flags & C_PIOBM) { 871 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 872 873 /* finish the busmastering PIO */ 874 (*wdc->piobm_done)(wdc->dma_arg, 875 chp->ch_channel, xfer->c_drive); 876 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 877 } 878 #endif 879 880 if (atac->atac_free_hw) 881 (*atac->atac_free_hw)(chp); 882 s = splbio(); 883 pool_put(&ata_xfer_pool, xfer); 884 splx(s); 885 } 886 887 /* 888 * Kill off all pending xfers for a ata_channel. 889 * 890 * Must be called at splbio(). 891 */ 892 void 893 ata_kill_pending(struct ata_drive_datas *drvp) 894 { 895 struct ata_channel *chp = drvp->chnl_softc; 896 struct ata_xfer *xfer, *next_xfer; 897 int s = splbio(); 898 899 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 900 xfer != NULL; xfer = next_xfer) { 901 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 902 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 903 continue; 904 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 905 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 906 } 907 908 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 909 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 910 drvp->drive_flags |= DRIVE_WAITDRAIN; 911 (void) tsleep(&chp->ch_queue->active_xfer, 912 PRIBIO, "atdrn", 0); 913 } else { 914 /* no more xfer for us */ 915 break; 916 } 917 } 918 splx(s); 919 } 920 921 /* 922 * ata_reset_channel: 923 * 924 * Reset and ATA channel. 925 * 926 * MUST BE CALLED AT splbio()! 927 */ 928 void 929 ata_reset_channel(struct ata_channel *chp, int flags) 930 { 931 struct atac_softc *atac = chp->ch_atac; 932 int drive; 933 934 #ifdef ATA_DEBUG 935 int spl1, spl2; 936 937 spl1 = splbio(); 938 spl2 = splbio(); 939 if (spl2 != spl1) { 940 printf("ata_reset_channel: not at splbio()\n"); 941 panic("ata_reset_channel"); 942 } 943 splx(spl2); 944 splx(spl1); 945 #endif /* ATA_DEBUG */ 946 947 chp->ch_queue->queue_freeze++; 948 949 /* 950 * If we can poll or wait it's OK, otherwise wake up the 951 * kernel thread to do it for us. 952 */ 953 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 954 if (chp->ch_flags & ATACH_TH_RESET) { 955 /* No need to schedule a reset more than one time. */ 956 chp->ch_queue->queue_freeze--; 957 return; 958 } 959 chp->ch_flags |= ATACH_TH_RESET; 960 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 961 wakeup(&chp->ch_thread); 962 return; 963 } 964 965 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 966 967 for (drive = 0; drive < chp->ch_ndrive; drive++) 968 chp->ch_drive[drive].state = 0; 969 970 chp->ch_flags &= ~ATACH_TH_RESET; 971 if ((flags & AT_RST_EMERG) == 0) { 972 chp->ch_queue->queue_freeze--; 973 atastart(chp); 974 } else { 975 /* make sure that we can use polled commands */ 976 TAILQ_INIT(&chp->ch_queue->queue_xfer); 977 chp->ch_queue->queue_freeze = 0; 978 chp->ch_queue->active_xfer = NULL; 979 } 980 } 981 982 int 983 ata_addref(struct ata_channel *chp) 984 { 985 struct atac_softc *atac = chp->ch_atac; 986 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 987 int s, error = 0; 988 989 s = splbio(); 990 if (adapt->adapt_refcnt++ == 0 && 991 adapt->adapt_enable != NULL) { 992 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 993 if (error) 994 adapt->adapt_refcnt--; 995 } 996 splx(s); 997 return (error); 998 } 999 1000 void 1001 ata_delref(struct ata_channel *chp) 1002 { 1003 struct atac_softc *atac = chp->ch_atac; 1004 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1005 int s; 1006 1007 s = splbio(); 1008 if (adapt->adapt_refcnt-- == 1 && 1009 adapt->adapt_enable != NULL) 1010 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 1011 splx(s); 1012 } 1013 1014 void 1015 ata_print_modes(struct ata_channel *chp) 1016 { 1017 struct atac_softc *atac = chp->ch_atac; 1018 int drive; 1019 struct ata_drive_datas *drvp; 1020 1021 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1022 drvp = &chp->ch_drive[drive]; 1023 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1024 continue; 1025 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 1026 drvp->drv_softc->dv_xname, 1027 atac->atac_dev.dv_xname, 1028 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1029 #if NATA_DMA 1030 if (drvp->drive_flags & DRIVE_DMA) 1031 aprint_normal(", DMA mode %d", drvp->DMA_mode); 1032 #if NATA_UDMA 1033 if (drvp->drive_flags & DRIVE_UDMA) { 1034 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 1035 if (drvp->UDMA_mode == 2) 1036 aprint_normal(" (Ultra/33)"); 1037 else if (drvp->UDMA_mode == 4) 1038 aprint_normal(" (Ultra/66)"); 1039 else if (drvp->UDMA_mode == 5) 1040 aprint_normal(" (Ultra/100)"); 1041 else if (drvp->UDMA_mode == 6) 1042 aprint_normal(" (Ultra/133)"); 1043 } 1044 #endif /* NATA_UDMA */ 1045 #endif /* NATA_DMA */ 1046 #if NATA_DMA || NATA_PIOBM 1047 if (0 1048 #if NATA_DMA 1049 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1050 #endif 1051 #if NATA_PIOBM 1052 /* PIOBM capable controllers use DMA for PIO commands */ 1053 || (atac->atac_cap & ATAC_CAP_PIOBM) 1054 #endif 1055 ) 1056 aprint_normal(" (using DMA)"); 1057 #endif /* NATA_DMA || NATA_PIOBM */ 1058 aprint_normal("\n"); 1059 } 1060 } 1061 1062 #if NATA_DMA 1063 /* 1064 * downgrade the transfer mode of a drive after an error. return 1 if 1065 * downgrade was possible, 0 otherwise. 1066 * 1067 * MUST BE CALLED AT splbio()! 1068 */ 1069 int 1070 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1071 { 1072 struct ata_channel *chp = drvp->chnl_softc; 1073 struct atac_softc *atac = chp->ch_atac; 1074 struct device *drv_dev = drvp->drv_softc; 1075 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1076 1077 /* if drive or controller don't know its mode, we can't do much */ 1078 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1079 (atac->atac_set_modes == NULL)) 1080 return 0; 1081 /* current drive mode was set by a config flag, let it this way */ 1082 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1083 (cf_flags & ATA_CONFIG_DMA_SET) || 1084 (cf_flags & ATA_CONFIG_UDMA_SET)) 1085 return 0; 1086 1087 #if NATA_UDMA 1088 /* 1089 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1090 */ 1091 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1092 drvp->UDMA_mode--; 1093 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1094 drv_dev->dv_xname, drvp->UDMA_mode); 1095 } 1096 #endif 1097 1098 /* 1099 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1100 */ 1101 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1102 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1103 drvp->PIO_mode = drvp->PIO_cap; 1104 printf("%s: transfer error, downgrading to PIO mode %d\n", 1105 drv_dev->dv_xname, drvp->PIO_mode); 1106 } else /* already using PIO, can't downgrade */ 1107 return 0; 1108 1109 (*atac->atac_set_modes)(chp); 1110 ata_print_modes(chp); 1111 /* reset the channel, which will shedule all drives for setup */ 1112 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1113 return 1; 1114 } 1115 #endif /* NATA_DMA */ 1116 1117 /* 1118 * Probe drive's capabilities, for use by the controller later 1119 * Assumes drvp points to an existing drive. 1120 */ 1121 void 1122 ata_probe_caps(struct ata_drive_datas *drvp) 1123 { 1124 struct ataparams params, params2; 1125 struct ata_channel *chp = drvp->chnl_softc; 1126 struct atac_softc *atac = chp->ch_atac; 1127 struct device *drv_dev = drvp->drv_softc; 1128 int i, printed, s; 1129 const char *sep = ""; 1130 int cf_flags; 1131 1132 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1133 /* IDENTIFY failed. Can't tell more about the device */ 1134 return; 1135 } 1136 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1137 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1138 /* 1139 * Controller claims 16 and 32 bit transfers. 1140 * Re-do an IDENTIFY with 32-bit transfers, 1141 * and compare results. 1142 */ 1143 s = splbio(); 1144 drvp->drive_flags |= DRIVE_CAP32; 1145 splx(s); 1146 ata_get_params(drvp, AT_WAIT, ¶ms2); 1147 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1148 /* Not good. fall back to 16bits */ 1149 s = splbio(); 1150 drvp->drive_flags &= ~DRIVE_CAP32; 1151 splx(s); 1152 } else { 1153 aprint_normal("%s: 32-bit data port\n", 1154 drv_dev->dv_xname); 1155 } 1156 } 1157 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1158 if (params.atap_ata_major > 0x01 && 1159 params.atap_ata_major != 0xffff) { 1160 for (i = 14; i > 0; i--) { 1161 if (params.atap_ata_major & (1 << i)) { 1162 aprint_normal("%s: ATA version %d\n", 1163 drv_dev->dv_xname, i); 1164 drvp->ata_vers = i; 1165 break; 1166 } 1167 } 1168 } 1169 #endif 1170 1171 /* An ATAPI device is at last PIO mode 3 */ 1172 if (drvp->drive_flags & DRIVE_ATAPI) 1173 drvp->PIO_mode = 3; 1174 1175 /* 1176 * It's not in the specs, but it seems that some drive 1177 * returns 0xffff in atap_extensions when this field is invalid 1178 */ 1179 if (params.atap_extensions != 0xffff && 1180 (params.atap_extensions & WDC_EXT_MODES)) { 1181 printed = 0; 1182 /* 1183 * XXX some drives report something wrong here (they claim to 1184 * support PIO mode 8 !). As mode is coded on 3 bits in 1185 * SET FEATURE, limit it to 7 (so limit i to 4). 1186 * If higher mode than 7 is found, abort. 1187 */ 1188 for (i = 7; i >= 0; i--) { 1189 if ((params.atap_piomode_supp & (1 << i)) == 0) 1190 continue; 1191 if (i > 4) 1192 return; 1193 /* 1194 * See if mode is accepted. 1195 * If the controller can't set its PIO mode, 1196 * assume the defaults are good, so don't try 1197 * to set it 1198 */ 1199 if (atac->atac_set_modes) 1200 /* 1201 * It's OK to pool here, it's fast enouth 1202 * to not bother waiting for interrupt 1203 */ 1204 if (ata_set_mode(drvp, 0x08 | (i + 3), 1205 AT_WAIT) != CMD_OK) 1206 continue; 1207 if (!printed) { 1208 aprint_normal("%s: drive supports PIO mode %d", 1209 drv_dev->dv_xname, i + 3); 1210 sep = ","; 1211 printed = 1; 1212 } 1213 /* 1214 * If controller's driver can't set its PIO mode, 1215 * get the highter one for the drive. 1216 */ 1217 if (atac->atac_set_modes == NULL || 1218 atac->atac_pio_cap >= i + 3) { 1219 drvp->PIO_mode = i + 3; 1220 drvp->PIO_cap = i + 3; 1221 break; 1222 } 1223 } 1224 if (!printed) { 1225 /* 1226 * We didn't find a valid PIO mode. 1227 * Assume the values returned for DMA are buggy too 1228 */ 1229 return; 1230 } 1231 s = splbio(); 1232 drvp->drive_flags |= DRIVE_MODE; 1233 splx(s); 1234 printed = 0; 1235 for (i = 7; i >= 0; i--) { 1236 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1237 continue; 1238 #if NATA_DMA 1239 if ((atac->atac_cap & ATAC_CAP_DMA) && 1240 atac->atac_set_modes != NULL) 1241 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1242 != CMD_OK) 1243 continue; 1244 #endif 1245 if (!printed) { 1246 aprint_normal("%s DMA mode %d", sep, i); 1247 sep = ","; 1248 printed = 1; 1249 } 1250 #if NATA_DMA 1251 if (atac->atac_cap & ATAC_CAP_DMA) { 1252 if (atac->atac_set_modes != NULL && 1253 atac->atac_dma_cap < i) 1254 continue; 1255 drvp->DMA_mode = i; 1256 drvp->DMA_cap = i; 1257 s = splbio(); 1258 drvp->drive_flags |= DRIVE_DMA; 1259 splx(s); 1260 } 1261 #endif 1262 break; 1263 } 1264 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1265 printed = 0; 1266 for (i = 7; i >= 0; i--) { 1267 if ((params.atap_udmamode_supp & (1 << i)) 1268 == 0) 1269 continue; 1270 #if NATA_UDMA 1271 if (atac->atac_set_modes != NULL && 1272 (atac->atac_cap & ATAC_CAP_UDMA)) 1273 if (ata_set_mode(drvp, 0x40 | i, 1274 AT_WAIT) != CMD_OK) 1275 continue; 1276 #endif 1277 if (!printed) { 1278 aprint_normal("%s Ultra-DMA mode %d", 1279 sep, i); 1280 if (i == 2) 1281 aprint_normal(" (Ultra/33)"); 1282 else if (i == 4) 1283 aprint_normal(" (Ultra/66)"); 1284 else if (i == 5) 1285 aprint_normal(" (Ultra/100)"); 1286 else if (i == 6) 1287 aprint_normal(" (Ultra/133)"); 1288 sep = ","; 1289 printed = 1; 1290 } 1291 #if NATA_UDMA 1292 if (atac->atac_cap & ATAC_CAP_UDMA) { 1293 if (atac->atac_set_modes != NULL && 1294 atac->atac_udma_cap < i) 1295 continue; 1296 drvp->UDMA_mode = i; 1297 drvp->UDMA_cap = i; 1298 s = splbio(); 1299 drvp->drive_flags |= DRIVE_UDMA; 1300 splx(s); 1301 } 1302 #endif 1303 break; 1304 } 1305 } 1306 aprint_normal("\n"); 1307 } 1308 1309 s = splbio(); 1310 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1311 if (drvp->drive_flags & DRIVE_ATAPI) { 1312 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1313 drvp->drive_flags |= DRIVE_NOSTREAM; 1314 } else { 1315 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1316 drvp->drive_flags |= DRIVE_NOSTREAM; 1317 } 1318 splx(s); 1319 1320 /* Try to guess ATA version here, if it didn't get reported */ 1321 if (drvp->ata_vers == 0) { 1322 #if NATA_UDMA 1323 if (drvp->drive_flags & DRIVE_UDMA) 1324 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1325 else 1326 #endif 1327 if (drvp->PIO_cap > 2) 1328 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1329 } 1330 cf_flags = device_cfdata(drv_dev)->cf_flags; 1331 if (cf_flags & ATA_CONFIG_PIO_SET) { 1332 s = splbio(); 1333 drvp->PIO_mode = 1334 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1335 drvp->drive_flags |= DRIVE_MODE; 1336 splx(s); 1337 } 1338 #if NATA_DMA 1339 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1340 /* don't care about DMA modes */ 1341 return; 1342 } 1343 if (cf_flags & ATA_CONFIG_DMA_SET) { 1344 s = splbio(); 1345 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1346 ATA_CONFIG_DMA_DISABLE) { 1347 drvp->drive_flags &= ~DRIVE_DMA; 1348 } else { 1349 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1350 ATA_CONFIG_DMA_OFF; 1351 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1352 } 1353 splx(s); 1354 } 1355 #if NATA_UDMA 1356 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1357 /* don't care about UDMA modes */ 1358 return; 1359 } 1360 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1361 s = splbio(); 1362 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1363 ATA_CONFIG_UDMA_DISABLE) { 1364 drvp->drive_flags &= ~DRIVE_UDMA; 1365 } else { 1366 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1367 ATA_CONFIG_UDMA_OFF; 1368 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1369 } 1370 splx(s); 1371 } 1372 #endif /* NATA_UDMA */ 1373 #endif /* NATA_DMA */ 1374 } 1375 1376 /* management of the /dev/atabus* devices */ 1377 int 1378 atabusopen(dev_t dev, int flag __unused, int fmt __unused, 1379 struct lwp *l __unused) 1380 { 1381 struct atabus_softc *sc; 1382 int error, unit = minor(dev); 1383 1384 if (unit >= atabus_cd.cd_ndevs || 1385 (sc = atabus_cd.cd_devs[unit]) == NULL) 1386 return (ENXIO); 1387 1388 if (sc->sc_flags & ATABUSCF_OPEN) 1389 return (EBUSY); 1390 1391 if ((error = ata_addref(sc->sc_chan)) != 0) 1392 return (error); 1393 1394 sc->sc_flags |= ATABUSCF_OPEN; 1395 1396 return (0); 1397 } 1398 1399 1400 int 1401 atabusclose(dev_t dev, int flag __unused, int fmt __unused, 1402 struct lwp *l __unused) 1403 { 1404 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1405 1406 ata_delref(sc->sc_chan); 1407 1408 sc->sc_flags &= ~ATABUSCF_OPEN; 1409 1410 return (0); 1411 } 1412 1413 int 1414 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, 1415 struct lwp *l __unused) 1416 { 1417 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1418 struct ata_channel *chp = sc->sc_chan; 1419 int min_drive, max_drive, drive; 1420 int error; 1421 int s; 1422 1423 /* 1424 * Enforce write permission for ioctls that change the 1425 * state of the bus. Host adapter specific ioctls must 1426 * be checked by the adapter driver. 1427 */ 1428 switch (cmd) { 1429 case ATABUSIOSCAN: 1430 case ATABUSIODETACH: 1431 case ATABUSIORESET: 1432 if ((flag & FWRITE) == 0) 1433 return (EBADF); 1434 } 1435 1436 switch (cmd) { 1437 case ATABUSIORESET: 1438 s = splbio(); 1439 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1440 splx(s); 1441 error = 0; 1442 break; 1443 case ATABUSIOSCAN: 1444 { 1445 #if 0 1446 struct atabusioscan_args *a= 1447 (struct atabusioscan_args *)addr; 1448 #endif 1449 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1450 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1451 return (EOPNOTSUPP); 1452 return (EOPNOTSUPP); 1453 } 1454 case ATABUSIODETACH: 1455 { 1456 struct atabusioscan_args *a= 1457 (struct atabusioscan_args *)addr; 1458 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1459 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1460 return (EOPNOTSUPP); 1461 switch (a->at_dev) { 1462 case -1: 1463 min_drive = 0; 1464 max_drive = 1; 1465 break; 1466 case 0: 1467 case 1: 1468 min_drive = max_drive = a->at_dev; 1469 break; 1470 default: 1471 return (EINVAL); 1472 } 1473 for (drive = min_drive; drive <= max_drive; drive++) { 1474 if (chp->ch_drive[drive].drv_softc != NULL) { 1475 error = config_detach( 1476 chp->ch_drive[drive].drv_softc, 0); 1477 if (error) 1478 return (error); 1479 chp->ch_drive[drive].drv_softc = NULL; 1480 } 1481 } 1482 error = 0; 1483 break; 1484 } 1485 default: 1486 error = ENOTTY; 1487 } 1488 return (error); 1489 }; 1490 1491 static void 1492 atabus_powerhook(int why, void *hdl) 1493 { 1494 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1495 struct ata_channel *chp = sc->sc_chan; 1496 int s; 1497 1498 switch (why) { 1499 case PWR_SOFTSUSPEND: 1500 case PWR_SOFTSTANDBY: 1501 /* freeze the queue and wait for the controller to be idle */ 1502 ata_queue_idle(chp->ch_queue); 1503 break; 1504 case PWR_RESUME: 1505 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 1506 s = splbio(); 1507 KASSERT(chp->ch_queue->queue_freeze > 0); 1508 /* unfreeze the queue and reset drives (to wake them up) */ 1509 chp->ch_queue->queue_freeze--; 1510 ata_reset_channel(chp, AT_WAIT); 1511 splx(s); 1512 break; 1513 case PWR_SUSPEND: 1514 case PWR_STANDBY: 1515 case PWR_SOFTRESUME: 1516 break; 1517 } 1518 1519 return; 1520 } 1521
Indexes created Fri Sep 26 08:10:20 GMT 2025