ata.c revision 1.85
1 /* $NetBSD: ata.c,v 1.85 2007/02/09 21:55:27 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.85 2007/02/09 21:55:27 ad Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/ataconf.h> 56 #include <dev/ata/atareg.h> 57 #include <dev/ata/atavar.h> 58 #include <dev/ic/wdcvar.h> /* for PIOBM */ 59 60 #include "locators.h" 61 62 #include "atapibus.h" 63 #include "ataraid.h" 64 65 #if NATARAID > 0 66 #include <dev/ata/ata_raidvar.h> 67 #endif 68 69 #define DEBUG_FUNCS 0x08 70 #define DEBUG_PROBE 0x10 71 #define DEBUG_DETACH 0x20 72 #define DEBUG_XFERS 0x40 73 #ifdef ATADEBUG 74 int atadebug_mask = 0; 75 #define ATADEBUG_PRINT(args, level) \ 76 if (atadebug_mask & (level)) \ 77 printf args 78 #else 79 #define ATADEBUG_PRINT(args, level) 80 #endif 81 82 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /***************************************************************************** 93 * ATA bus layer. 94 * 95 * ATA controllers attach an atabus instance, which handles probing the bus 96 * for drives, etc. 97 *****************************************************************************/ 98 99 dev_type_open(atabusopen); 100 dev_type_close(atabusclose); 101 dev_type_ioctl(atabusioctl); 102 103 const struct cdevsw atabus_cdevsw = { 104 atabusopen, atabusclose, noread, nowrite, atabusioctl, 105 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 106 }; 107 108 extern struct cfdriver atabus_cd; 109 110 static void atabus_powerhook(int, void *); 111 112 /* 113 * atabusprint: 114 * 115 * Autoconfiguration print routine used by ATA controllers when 116 * attaching an atabus instance. 117 */ 118 int 119 atabusprint(void *aux, const char *pnp) 120 { 121 struct ata_channel *chan = aux; 122 123 if (pnp) 124 aprint_normal("atabus at %s", pnp); 125 aprint_normal(" channel %d", chan->ch_channel); 126 127 return (UNCONF); 128 } 129 130 /* 131 * ataprint: 132 * 133 * Autoconfiguration print routine. 134 */ 135 int 136 ataprint(void *aux, const char *pnp) 137 { 138 struct ata_device *adev = aux; 139 140 if (pnp) 141 aprint_normal("wd at %s", pnp); 142 aprint_normal(" drive %d", adev->adev_drv_data->drive); 143 144 return (UNCONF); 145 } 146 147 /* 148 * ata_channel_attach: 149 * 150 * Common parts of attaching an atabus to an ATA controller channel. 151 */ 152 void 153 ata_channel_attach(struct ata_channel *chp) 154 { 155 156 if (chp->ch_flags & ATACH_DISABLED) 157 return; 158 159 callout_init(&chp->ch_callout); 160 161 TAILQ_INIT(&chp->ch_queue->queue_xfer); 162 chp->ch_queue->queue_freeze = 0; 163 chp->ch_queue->queue_flags = 0; 164 chp->ch_queue->active_xfer = NULL; 165 166 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 167 atabusprint); 168 } 169 170 static void 171 atabusconfig(struct atabus_softc *atabus_sc) 172 { 173 struct ata_channel *chp = atabus_sc->sc_chan; 174 struct atac_softc *atac = chp->ch_atac; 175 int i, s; 176 struct atabus_initq *atabus_initq = NULL; 177 178 /* Probe for the drives. */ 179 /* XXX for SATA devices we will power up all drives at once */ 180 (*atac->atac_probe)(chp); 181 182 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 183 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 184 DEBUG_PROBE); 185 186 /* If no drives, abort here */ 187 for (i = 0; i < chp->ch_ndrive; i++) 188 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 189 break; 190 if (i == chp->ch_ndrive) 191 goto out; 192 193 /* Shortcut in case we've been shutdown */ 194 if (chp->ch_flags & ATACH_SHUTDOWN) 195 goto out; 196 197 /* Make sure the devices probe in atabus order to avoid jitter. */ 198 simple_lock(&atabus_interlock); 199 while(1) { 200 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 201 if (atabus_initq->atabus_sc == atabus_sc) 202 break; 203 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 204 &atabus_interlock); 205 } 206 simple_unlock(&atabus_interlock); 207 208 /* 209 * Attach an ATAPI bus, if needed. 210 */ 211 for (i = 0; i < chp->ch_ndrive; i++) { 212 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 213 #if NATAPIBUS > 0 214 (*atac->atac_atapibus_attach)(atabus_sc); 215 #else 216 /* 217 * Fake the autoconfig "not configured" message 218 */ 219 aprint_normal("atapibus at %s not configured\n", 220 atac->atac_dev.dv_xname); 221 chp->atapibus = NULL; 222 s = splbio(); 223 for (i = 0; i < chp->ch_ndrive; i++) 224 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 225 splx(s); 226 #endif 227 break; 228 } 229 } 230 231 for (i = 0; i < chp->ch_ndrive; i++) { 232 struct ata_device adev; 233 if ((chp->ch_drive[i].drive_flags & 234 (DRIVE_ATA | DRIVE_OLD)) == 0) { 235 continue; 236 } 237 memset(&adev, 0, sizeof(struct ata_device)); 238 adev.adev_bustype = atac->atac_bustype_ata; 239 adev.adev_channel = chp->ch_channel; 240 adev.adev_openings = 1; 241 adev.adev_drv_data = &chp->ch_drive[i]; 242 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 243 "ata_hl", &adev, ataprint); 244 if (chp->ata_drives[i] != NULL) 245 ata_probe_caps(&chp->ch_drive[i]); 246 else { 247 s = splbio(); 248 chp->ch_drive[i].drive_flags &= 249 ~(DRIVE_ATA | DRIVE_OLD); 250 splx(s); 251 } 252 } 253 254 /* now that we know the drives, the controller can set its modes */ 255 if (atac->atac_set_modes) { 256 (*atac->atac_set_modes)(chp); 257 ata_print_modes(chp); 258 } 259 #if NATARAID > 0 260 if (atac->atac_cap & ATAC_CAP_RAID) 261 for (i = 0; i < chp->ch_ndrive; i++) 262 if (chp->ata_drives[i] != NULL) 263 ata_raid_check_component(chp->ata_drives[i]); 264 #endif /* NATARAID > 0 */ 265 266 /* 267 * reset drive_flags for unattached devices, reset state for attached 268 * ones 269 */ 270 s = splbio(); 271 for (i = 0; i < chp->ch_ndrive; i++) { 272 if (chp->ch_drive[i].drv_softc == NULL) 273 chp->ch_drive[i].drive_flags = 0; 274 else 275 chp->ch_drive[i].state = 0; 276 } 277 splx(s); 278 279 out: 280 if (atabus_initq == NULL) { 281 simple_lock(&atabus_interlock); 282 while(1) { 283 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 284 if (atabus_initq->atabus_sc == atabus_sc) 285 break; 286 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 287 &atabus_interlock); 288 } 289 simple_unlock(&atabus_interlock); 290 } 291 simple_lock(&atabus_interlock); 292 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 293 simple_unlock(&atabus_interlock); 294 295 free(atabus_initq, M_DEVBUF); 296 wakeup(&atabus_initq_head); 297 298 ata_delref(chp); 299 300 config_pending_decr(); 301 } 302 303 /* 304 * atabus_thread: 305 * 306 * Worker thread for the ATA bus. 307 */ 308 static void 309 atabus_thread(void *arg) 310 { 311 struct atabus_softc *sc = arg; 312 struct ata_channel *chp = sc->sc_chan; 313 struct ata_xfer *xfer; 314 int i, s; 315 316 s = splbio(); 317 chp->ch_flags |= ATACH_TH_RUN; 318 319 /* 320 * Probe the drives. Reset all flags to 0 to indicate to controllers 321 * that can re-probe that all drives must be probed.. 322 * 323 * Note: ch_ndrive may be changed during the probe. 324 */ 325 for (i = 0; i < ATA_MAXDRIVES; i++) 326 chp->ch_drive[i].drive_flags = 0; 327 splx(s); 328 329 /* Configure the devices on the bus. */ 330 atabusconfig(sc); 331 332 s = splbio(); 333 for (;;) { 334 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 335 (chp->ch_queue->active_xfer == NULL || 336 chp->ch_queue->queue_freeze == 0)) { 337 chp->ch_flags &= ~ATACH_TH_RUN; 338 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 339 chp->ch_flags |= ATACH_TH_RUN; 340 } 341 if (chp->ch_flags & ATACH_SHUTDOWN) { 342 break; 343 } 344 if (chp->ch_flags & ATACH_TH_RESET) { 345 /* 346 * ata_reset_channel() will freeze 2 times, so 347 * unfreeze one time. Not a problem as we're at splbio 348 */ 349 chp->ch_queue->queue_freeze--; 350 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 351 } else if (chp->ch_queue->active_xfer != NULL && 352 chp->ch_queue->queue_freeze == 1) { 353 /* 354 * Caller has bumped queue_freeze, decrease it. 355 */ 356 chp->ch_queue->queue_freeze--; 357 xfer = chp->ch_queue->active_xfer; 358 KASSERT(xfer != NULL); 359 (*xfer->c_start)(xfer->c_chp, xfer); 360 } else if (chp->ch_queue->queue_freeze > 1) 361 panic("ata_thread: queue_freeze"); 362 } 363 splx(s); 364 chp->ch_thread = NULL; 365 wakeup(&chp->ch_flags); 366 kthread_exit(0); 367 } 368 369 /* 370 * atabus_create_thread: 371 * 372 * Helper routine to create the ATA bus worker thread. 373 */ 374 static void 375 atabus_create_thread(void *arg) 376 { 377 struct atabus_softc *sc = arg; 378 struct ata_channel *chp = sc->sc_chan; 379 int error; 380 381 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 382 "%s", sc->sc_dev.dv_xname)) != 0) 383 aprint_error("%s: unable to create kernel thread: error %d\n", 384 sc->sc_dev.dv_xname, error); 385 } 386 387 /* 388 * atabus_match: 389 * 390 * Autoconfiguration match routine. 391 */ 392 static int 393 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 394 { 395 struct ata_channel *chp = aux; 396 397 if (chp == NULL) 398 return (0); 399 400 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 401 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 402 return (0); 403 404 return (1); 405 } 406 407 /* 408 * atabus_attach: 409 * 410 * Autoconfiguration attach routine. 411 */ 412 static void 413 atabus_attach(struct device *parent, struct device *self, void *aux) 414 { 415 struct atabus_softc *sc = (void *) self; 416 struct ata_channel *chp = aux; 417 struct atabus_initq *initq; 418 419 sc->sc_chan = chp; 420 421 aprint_normal("\n"); 422 aprint_naive("\n"); 423 424 if (ata_addref(chp)) 425 return; 426 427 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 428 initq->atabus_sc = sc; 429 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 430 config_pending_incr(); 431 kthread_create(atabus_create_thread, sc); 432 433 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 434 atabus_powerhook, sc); 435 if (sc->sc_powerhook == NULL) 436 printf("%s: WARNING: unable to establish power hook\n", 437 sc->sc_dev.dv_xname); 438 } 439 440 /* 441 * atabus_activate: 442 * 443 * Autoconfiguration activation routine. 444 */ 445 static int 446 atabus_activate(struct device *self, enum devact act) 447 { 448 struct atabus_softc *sc = (void *) self; 449 struct ata_channel *chp = sc->sc_chan; 450 struct device *dev = NULL; 451 int s, i, error = 0; 452 453 s = splbio(); 454 switch (act) { 455 case DVACT_ACTIVATE: 456 error = EOPNOTSUPP; 457 break; 458 459 case DVACT_DEACTIVATE: 460 /* 461 * We might deactivate the children of atapibus twice 462 * (once bia atapibus, once directly), but since the 463 * generic autoconfiguration code maintains the DVF_ACTIVE 464 * flag, it's safe. 465 */ 466 if ((dev = chp->atapibus) != NULL) { 467 error = config_deactivate(dev); 468 if (error) 469 goto out; 470 } 471 472 for (i = 0; i < chp->ch_ndrive; i++) { 473 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 474 ATADEBUG_PRINT(("atabus_activate: %s: " 475 "deactivating %s\n", sc->sc_dev.dv_xname, 476 dev->dv_xname), 477 DEBUG_DETACH); 478 error = config_deactivate(dev); 479 if (error) 480 goto out; 481 } 482 } 483 break; 484 } 485 out: 486 splx(s); 487 488 #ifdef ATADEBUG 489 if (dev != NULL && error != 0) 490 ATADEBUG_PRINT(("atabus_activate: %s: " 491 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 492 error, dev->dv_xname), DEBUG_DETACH); 493 #endif /* ATADEBUG */ 494 495 return (error); 496 } 497 498 /* 499 * atabus_detach: 500 * 501 * Autoconfiguration detach routine. 502 */ 503 static int 504 atabus_detach(struct device *self, int flags) 505 { 506 struct atabus_softc *sc = (void *) self; 507 struct ata_channel *chp = sc->sc_chan; 508 struct device *dev = NULL; 509 int s, i, error = 0; 510 511 /* Shutdown the channel. */ 512 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 513 chp->ch_flags |= ATACH_SHUTDOWN; 514 splx(s); 515 wakeup(&chp->ch_thread); 516 while (chp->ch_thread != NULL) 517 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 518 519 /* power hook */ 520 if (sc->sc_powerhook) 521 powerhook_disestablish(sc->sc_powerhook); 522 523 /* 524 * Detach atapibus and its children. 525 */ 526 if ((dev = chp->atapibus) != NULL) { 527 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 528 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 529 error = config_detach(dev, flags); 530 if (error) 531 goto out; 532 } 533 534 /* 535 * Detach our other children. 536 */ 537 for (i = 0; i < chp->ch_ndrive; i++) { 538 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 539 continue; 540 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 541 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 542 sc->sc_dev.dv_xname, dev->dv_xname), 543 DEBUG_DETACH); 544 error = config_detach(dev, flags); 545 if (error) 546 goto out; 547 } 548 } 549 550 out: 551 #ifdef ATADEBUG 552 if (dev != NULL && error != 0) 553 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 554 sc->sc_dev.dv_xname, error, dev->dv_xname), 555 DEBUG_DETACH); 556 #endif /* ATADEBUG */ 557 558 return (error); 559 } 560 561 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 562 atabus_match, atabus_attach, atabus_detach, atabus_activate); 563 564 /***************************************************************************** 565 * Common ATA bus operations. 566 *****************************************************************************/ 567 568 /* Get the disk's parameters */ 569 int 570 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 571 struct ataparams *prms) 572 { 573 char tb[DEV_BSIZE]; 574 struct ata_command ata_c; 575 struct ata_channel *chp = drvp->chnl_softc; 576 struct atac_softc *atac = chp->ch_atac; 577 int i; 578 u_int16_t *p; 579 580 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 581 582 memset(tb, 0, DEV_BSIZE); 583 memset(prms, 0, sizeof(struct ataparams)); 584 memset(&ata_c, 0, sizeof(struct ata_command)); 585 586 if (drvp->drive_flags & DRIVE_ATA) { 587 ata_c.r_command = WDCC_IDENTIFY; 588 ata_c.r_st_bmask = WDCS_DRDY; 589 ata_c.r_st_pmask = WDCS_DRQ; 590 ata_c.timeout = 3000; /* 3s */ 591 } else if (drvp->drive_flags & DRIVE_ATAPI) { 592 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 593 ata_c.r_st_bmask = 0; 594 ata_c.r_st_pmask = WDCS_DRQ; 595 ata_c.timeout = 10000; /* 10s */ 596 } else { 597 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 598 DEBUG_FUNCS|DEBUG_PROBE); 599 return CMD_ERR; 600 } 601 ata_c.flags = AT_READ | flags; 602 ata_c.data = tb; 603 ata_c.bcount = DEV_BSIZE; 604 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 605 &ata_c) != ATACMD_COMPLETE) { 606 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 607 DEBUG_FUNCS|DEBUG_PROBE); 608 return CMD_AGAIN; 609 } 610 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 611 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 612 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 613 return CMD_ERR; 614 } else { 615 /* if we didn't read any data something is wrong */ 616 if ((ata_c.flags & AT_XFDONE) == 0) 617 return CMD_ERR; 618 /* Read in parameter block. */ 619 memcpy(prms, tb, sizeof(struct ataparams)); 620 621 /* 622 * Shuffle string byte order. 623 * ATAPI NEC, Mitsumi and Pioneer drives and 624 * old ATA TDK CompactFlash cards 625 * have different byte order. 626 */ 627 #if BYTE_ORDER == BIG_ENDIAN 628 # define M(n) prms->atap_model[(n) ^ 1] 629 #else 630 # define M(n) prms->atap_model[n] 631 #endif 632 if ( 633 #if BYTE_ORDER == BIG_ENDIAN 634 ! 635 #endif 636 ((drvp->drive_flags & DRIVE_ATAPI) ? 637 ((M(0) == 'N' && M(1) == 'E') || 638 (M(0) == 'F' && M(1) == 'X') || 639 (M(0) == 'P' && M(1) == 'i')) : 640 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) 641 return CMD_OK; 642 #undef M 643 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 644 p = (u_int16_t *)(prms->atap_model + i); 645 *p = bswap16(*p); 646 } 647 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 648 p = (u_int16_t *)(prms->atap_serial + i); 649 *p = bswap16(*p); 650 } 651 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 652 p = (u_int16_t *)(prms->atap_revision + i); 653 *p = bswap16(*p); 654 } 655 656 return CMD_OK; 657 } 658 } 659 660 int 661 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 662 { 663 struct ata_command ata_c; 664 struct ata_channel *chp = drvp->chnl_softc; 665 struct atac_softc *atac = chp->ch_atac; 666 667 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 668 memset(&ata_c, 0, sizeof(struct ata_command)); 669 670 ata_c.r_command = SET_FEATURES; 671 ata_c.r_st_bmask = 0; 672 ata_c.r_st_pmask = 0; 673 ata_c.r_features = WDSF_SET_MODE; 674 ata_c.r_count = mode; 675 ata_c.flags = flags; 676 ata_c.timeout = 1000; /* 1s */ 677 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 678 &ata_c) != ATACMD_COMPLETE) 679 return CMD_AGAIN; 680 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 681 return CMD_ERR; 682 } 683 return CMD_OK; 684 } 685 686 #if NATA_DMA 687 void 688 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 689 { 690 /* 691 * Downgrade decision: if we get NERRS_MAX in NXFER. 692 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 693 * first error within the first NXFER ops will immediatly trigger 694 * a downgrade. 695 * If we got an error and n_xfers is bigger than NXFER reset counters. 696 */ 697 drvp->n_dmaerrs++; 698 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 699 ata_downgrade_mode(drvp, flags); 700 drvp->n_dmaerrs = NERRS_MAX-1; 701 drvp->n_xfers = 0; 702 return; 703 } 704 if (drvp->n_xfers > NXFER) { 705 drvp->n_dmaerrs = 1; /* just got an error */ 706 drvp->n_xfers = 1; /* restart counting from this error */ 707 } 708 } 709 #endif /* NATA_DMA */ 710 711 /* 712 * freeze the queue and wait for the controller to be idle. Caller has to 713 * unfreeze/restart the queue 714 */ 715 void 716 ata_queue_idle(struct ata_queue *queue) 717 { 718 int s = splbio(); 719 queue->queue_freeze++; 720 while (queue->active_xfer != NULL) { 721 queue->queue_flags |= QF_IDLE_WAIT; 722 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 723 } 724 splx(s); 725 } 726 727 /* 728 * Add a command to the queue and start controller. 729 * 730 * MUST BE CALLED AT splbio()! 731 */ 732 void 733 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 734 { 735 736 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 737 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 738 739 /* complete xfer setup */ 740 xfer->c_chp = chp; 741 742 /* insert at the end of command list */ 743 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 744 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 745 chp->ch_flags), DEBUG_XFERS); 746 /* 747 * if polling and can sleep, wait for the xfer to be at head of queue 748 */ 749 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 750 while (chp->ch_queue->active_xfer != NULL || 751 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 752 xfer->c_flags |= C_WAITACT; 753 tsleep(xfer, PRIBIO, "ataact", 0); 754 xfer->c_flags &= ~C_WAITACT; 755 if (xfer->c_flags & C_FREE) { 756 ata_free_xfer(chp, xfer); 757 return; 758 } 759 } 760 } 761 atastart(chp); 762 } 763 764 /* 765 * Start I/O on a controller, for the given channel. 766 * The first xfer may be not for our channel if the channel queues 767 * are shared. 768 * 769 * MUST BE CALLED AT splbio()! 770 */ 771 void 772 atastart(struct ata_channel *chp) 773 { 774 struct atac_softc *atac = chp->ch_atac; 775 struct ata_xfer *xfer; 776 777 #ifdef ATA_DEBUG 778 int spl1, spl2; 779 780 spl1 = splbio(); 781 spl2 = splbio(); 782 if (spl2 != spl1) { 783 printf("atastart: not at splbio()\n"); 784 panic("atastart"); 785 } 786 splx(spl2); 787 splx(spl1); 788 #endif /* ATA_DEBUG */ 789 790 /* is there a xfer ? */ 791 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 792 return; 793 794 /* adjust chp, in case we have a shared queue */ 795 chp = xfer->c_chp; 796 797 if (chp->ch_queue->active_xfer != NULL) { 798 return; /* channel aleady active */ 799 } 800 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 801 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 802 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 803 wakeup(&chp->ch_queue->queue_flags); 804 } 805 return; /* queue frozen */ 806 } 807 /* 808 * if someone is waiting for the command to be active, wake it up 809 * and let it process the command 810 */ 811 if (xfer->c_flags & C_WAITACT) { 812 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 813 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 814 DEBUG_XFERS); 815 wakeup(xfer); 816 return; 817 } 818 #ifdef DIAGNOSTIC 819 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 820 panic("atastart: channel waiting for irq"); 821 #endif 822 if (atac->atac_claim_hw) 823 if (!(*atac->atac_claim_hw)(chp, 0)) 824 return; 825 826 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 827 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 828 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 829 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 830 chp->ch_drive[xfer->c_drive].state = 0; 831 } 832 chp->ch_queue->active_xfer = xfer; 833 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 834 835 if (atac->atac_cap & ATAC_CAP_NOIRQ) 836 KASSERT(xfer->c_flags & C_POLL); 837 838 xfer->c_start(chp, xfer); 839 } 840 841 struct ata_xfer * 842 ata_get_xfer(int flags) 843 { 844 struct ata_xfer *xfer; 845 int s; 846 847 s = splbio(); 848 xfer = pool_get(&ata_xfer_pool, 849 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 850 splx(s); 851 if (xfer != NULL) { 852 memset(xfer, 0, sizeof(struct ata_xfer)); 853 } 854 return xfer; 855 } 856 857 void 858 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 859 { 860 struct atac_softc *atac = chp->ch_atac; 861 int s; 862 863 if (xfer->c_flags & C_WAITACT) { 864 /* Someone is waiting for this xfer, so we can't free now */ 865 xfer->c_flags |= C_FREE; 866 wakeup(xfer); 867 return; 868 } 869 870 #if NATA_PIOBM /* XXX wdc dependent code */ 871 if (xfer->c_flags & C_PIOBM) { 872 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 873 874 /* finish the busmastering PIO */ 875 (*wdc->piobm_done)(wdc->dma_arg, 876 chp->ch_channel, xfer->c_drive); 877 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 878 } 879 #endif 880 881 if (atac->atac_free_hw) 882 (*atac->atac_free_hw)(chp); 883 s = splbio(); 884 pool_put(&ata_xfer_pool, xfer); 885 splx(s); 886 } 887 888 /* 889 * Kill off all pending xfers for a ata_channel. 890 * 891 * Must be called at splbio(). 892 */ 893 void 894 ata_kill_pending(struct ata_drive_datas *drvp) 895 { 896 struct ata_channel *chp = drvp->chnl_softc; 897 struct ata_xfer *xfer, *next_xfer; 898 int s = splbio(); 899 900 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 901 xfer != NULL; xfer = next_xfer) { 902 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 903 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 904 continue; 905 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 906 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 907 } 908 909 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 910 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 911 drvp->drive_flags |= DRIVE_WAITDRAIN; 912 (void) tsleep(&chp->ch_queue->active_xfer, 913 PRIBIO, "atdrn", 0); 914 } else { 915 /* no more xfer for us */ 916 break; 917 } 918 } 919 splx(s); 920 } 921 922 /* 923 * ata_reset_channel: 924 * 925 * Reset and ATA channel. 926 * 927 * MUST BE CALLED AT splbio()! 928 */ 929 void 930 ata_reset_channel(struct ata_channel *chp, int flags) 931 { 932 struct atac_softc *atac = chp->ch_atac; 933 int drive; 934 935 #ifdef ATA_DEBUG 936 int spl1, spl2; 937 938 spl1 = splbio(); 939 spl2 = splbio(); 940 if (spl2 != spl1) { 941 printf("ata_reset_channel: not at splbio()\n"); 942 panic("ata_reset_channel"); 943 } 944 splx(spl2); 945 splx(spl1); 946 #endif /* ATA_DEBUG */ 947 948 chp->ch_queue->queue_freeze++; 949 950 /* 951 * If we can poll or wait it's OK, otherwise wake up the 952 * kernel thread to do it for us. 953 */ 954 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 955 if (chp->ch_flags & ATACH_TH_RESET) { 956 /* No need to schedule a reset more than one time. */ 957 chp->ch_queue->queue_freeze--; 958 return; 959 } 960 chp->ch_flags |= ATACH_TH_RESET; 961 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 962 wakeup(&chp->ch_thread); 963 return; 964 } 965 966 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 967 968 for (drive = 0; drive < chp->ch_ndrive; drive++) 969 chp->ch_drive[drive].state = 0; 970 971 chp->ch_flags &= ~ATACH_TH_RESET; 972 if ((flags & AT_RST_EMERG) == 0) { 973 chp->ch_queue->queue_freeze--; 974 atastart(chp); 975 } else { 976 /* make sure that we can use polled commands */ 977 TAILQ_INIT(&chp->ch_queue->queue_xfer); 978 chp->ch_queue->queue_freeze = 0; 979 chp->ch_queue->active_xfer = NULL; 980 } 981 } 982 983 int 984 ata_addref(struct ata_channel *chp) 985 { 986 struct atac_softc *atac = chp->ch_atac; 987 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 988 int s, error = 0; 989 990 s = splbio(); 991 if (adapt->adapt_refcnt++ == 0 && 992 adapt->adapt_enable != NULL) { 993 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 994 if (error) 995 adapt->adapt_refcnt--; 996 } 997 splx(s); 998 return (error); 999 } 1000 1001 void 1002 ata_delref(struct ata_channel *chp) 1003 { 1004 struct atac_softc *atac = chp->ch_atac; 1005 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1006 int s; 1007 1008 s = splbio(); 1009 if (adapt->adapt_refcnt-- == 1 && 1010 adapt->adapt_enable != NULL) 1011 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 1012 splx(s); 1013 } 1014 1015 void 1016 ata_print_modes(struct ata_channel *chp) 1017 { 1018 struct atac_softc *atac = chp->ch_atac; 1019 int drive; 1020 struct ata_drive_datas *drvp; 1021 1022 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1023 drvp = &chp->ch_drive[drive]; 1024 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1025 continue; 1026 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1027 drvp->drv_softc->dv_xname, 1028 atac->atac_dev.dv_xname, 1029 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1030 #if NATA_DMA 1031 if (drvp->drive_flags & DRIVE_DMA) 1032 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1033 #if NATA_UDMA 1034 if (drvp->drive_flags & DRIVE_UDMA) { 1035 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1036 if (drvp->UDMA_mode == 2) 1037 aprint_verbose(" (Ultra/33)"); 1038 else if (drvp->UDMA_mode == 4) 1039 aprint_verbose(" (Ultra/66)"); 1040 else if (drvp->UDMA_mode == 5) 1041 aprint_verbose(" (Ultra/100)"); 1042 else if (drvp->UDMA_mode == 6) 1043 aprint_verbose(" (Ultra/133)"); 1044 } 1045 #endif /* NATA_UDMA */ 1046 #endif /* NATA_DMA */ 1047 #if NATA_DMA || NATA_PIOBM 1048 if (0 1049 #if NATA_DMA 1050 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1051 #endif 1052 #if NATA_PIOBM 1053 /* PIOBM capable controllers use DMA for PIO commands */ 1054 || (atac->atac_cap & ATAC_CAP_PIOBM) 1055 #endif 1056 ) 1057 aprint_verbose(" (using DMA)"); 1058 #endif /* NATA_DMA || NATA_PIOBM */ 1059 aprint_verbose("\n"); 1060 } 1061 } 1062 1063 #if NATA_DMA 1064 /* 1065 * downgrade the transfer mode of a drive after an error. return 1 if 1066 * downgrade was possible, 0 otherwise. 1067 * 1068 * MUST BE CALLED AT splbio()! 1069 */ 1070 int 1071 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1072 { 1073 struct ata_channel *chp = drvp->chnl_softc; 1074 struct atac_softc *atac = chp->ch_atac; 1075 struct device *drv_dev = drvp->drv_softc; 1076 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1077 1078 /* if drive or controller don't know its mode, we can't do much */ 1079 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1080 (atac->atac_set_modes == NULL)) 1081 return 0; 1082 /* current drive mode was set by a config flag, let it this way */ 1083 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1084 (cf_flags & ATA_CONFIG_DMA_SET) || 1085 (cf_flags & ATA_CONFIG_UDMA_SET)) 1086 return 0; 1087 1088 #if NATA_UDMA 1089 /* 1090 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1091 */ 1092 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1093 drvp->UDMA_mode--; 1094 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1095 drv_dev->dv_xname, drvp->UDMA_mode); 1096 } 1097 #endif 1098 1099 /* 1100 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1101 */ 1102 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1103 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1104 drvp->PIO_mode = drvp->PIO_cap; 1105 printf("%s: transfer error, downgrading to PIO mode %d\n", 1106 drv_dev->dv_xname, drvp->PIO_mode); 1107 } else /* already using PIO, can't downgrade */ 1108 return 0; 1109 1110 (*atac->atac_set_modes)(chp); 1111 ata_print_modes(chp); 1112 /* reset the channel, which will schedule all drives for setup */ 1113 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1114 return 1; 1115 } 1116 #endif /* NATA_DMA */ 1117 1118 /* 1119 * Probe drive's capabilities, for use by the controller later 1120 * Assumes drvp points to an existing drive. 1121 */ 1122 void 1123 ata_probe_caps(struct ata_drive_datas *drvp) 1124 { 1125 struct ataparams params, params2; 1126 struct ata_channel *chp = drvp->chnl_softc; 1127 struct atac_softc *atac = chp->ch_atac; 1128 struct device *drv_dev = drvp->drv_softc; 1129 int i, printed, s; 1130 const char *sep = ""; 1131 int cf_flags; 1132 1133 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1134 /* IDENTIFY failed. Can't tell more about the device */ 1135 return; 1136 } 1137 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1138 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1139 /* 1140 * Controller claims 16 and 32 bit transfers. 1141 * Re-do an IDENTIFY with 32-bit transfers, 1142 * and compare results. 1143 */ 1144 s = splbio(); 1145 drvp->drive_flags |= DRIVE_CAP32; 1146 splx(s); 1147 ata_get_params(drvp, AT_WAIT, ¶ms2); 1148 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1149 /* Not good. fall back to 16bits */ 1150 s = splbio(); 1151 drvp->drive_flags &= ~DRIVE_CAP32; 1152 splx(s); 1153 } else { 1154 aprint_verbose("%s: 32-bit data port\n", 1155 drv_dev->dv_xname); 1156 } 1157 } 1158 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1159 if (params.atap_ata_major > 0x01 && 1160 params.atap_ata_major != 0xffff) { 1161 for (i = 14; i > 0; i--) { 1162 if (params.atap_ata_major & (1 << i)) { 1163 aprint_verbose("%s: ATA version %d\n", 1164 drv_dev->dv_xname, i); 1165 drvp->ata_vers = i; 1166 break; 1167 } 1168 } 1169 } 1170 #endif 1171 1172 /* An ATAPI device is at last PIO mode 3 */ 1173 if (drvp->drive_flags & DRIVE_ATAPI) 1174 drvp->PIO_mode = 3; 1175 1176 /* 1177 * It's not in the specs, but it seems that some drive 1178 * returns 0xffff in atap_extensions when this field is invalid 1179 */ 1180 if (params.atap_extensions != 0xffff && 1181 (params.atap_extensions & WDC_EXT_MODES)) { 1182 printed = 0; 1183 /* 1184 * XXX some drives report something wrong here (they claim to 1185 * support PIO mode 8 !). As mode is coded on 3 bits in 1186 * SET FEATURE, limit it to 7 (so limit i to 4). 1187 * If higher mode than 7 is found, abort. 1188 */ 1189 for (i = 7; i >= 0; i--) { 1190 if ((params.atap_piomode_supp & (1 << i)) == 0) 1191 continue; 1192 if (i > 4) 1193 return; 1194 /* 1195 * See if mode is accepted. 1196 * If the controller can't set its PIO mode, 1197 * assume the defaults are good, so don't try 1198 * to set it 1199 */ 1200 if (atac->atac_set_modes) 1201 /* 1202 * It's OK to pool here, it's fast enouth 1203 * to not bother waiting for interrupt 1204 */ 1205 if (ata_set_mode(drvp, 0x08 | (i + 3), 1206 AT_WAIT) != CMD_OK) 1207 continue; 1208 if (!printed) { 1209 aprint_verbose("%s: drive supports PIO mode %d", 1210 drv_dev->dv_xname, i + 3); 1211 sep = ","; 1212 printed = 1; 1213 } 1214 /* 1215 * If controller's driver can't set its PIO mode, 1216 * get the highter one for the drive. 1217 */ 1218 if (atac->atac_set_modes == NULL || 1219 atac->atac_pio_cap >= i + 3) { 1220 drvp->PIO_mode = i + 3; 1221 drvp->PIO_cap = i + 3; 1222 break; 1223 } 1224 } 1225 if (!printed) { 1226 /* 1227 * We didn't find a valid PIO mode. 1228 * Assume the values returned for DMA are buggy too 1229 */ 1230 return; 1231 } 1232 s = splbio(); 1233 drvp->drive_flags |= DRIVE_MODE; 1234 splx(s); 1235 printed = 0; 1236 for (i = 7; i >= 0; i--) { 1237 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1238 continue; 1239 #if NATA_DMA 1240 if ((atac->atac_cap & ATAC_CAP_DMA) && 1241 atac->atac_set_modes != NULL) 1242 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1243 != CMD_OK) 1244 continue; 1245 #endif 1246 if (!printed) { 1247 aprint_verbose("%s DMA mode %d", sep, i); 1248 sep = ","; 1249 printed = 1; 1250 } 1251 #if NATA_DMA 1252 if (atac->atac_cap & ATAC_CAP_DMA) { 1253 if (atac->atac_set_modes != NULL && 1254 atac->atac_dma_cap < i) 1255 continue; 1256 drvp->DMA_mode = i; 1257 drvp->DMA_cap = i; 1258 s = splbio(); 1259 drvp->drive_flags |= DRIVE_DMA; 1260 splx(s); 1261 } 1262 #endif 1263 break; 1264 } 1265 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1266 printed = 0; 1267 for (i = 7; i >= 0; i--) { 1268 if ((params.atap_udmamode_supp & (1 << i)) 1269 == 0) 1270 continue; 1271 #if NATA_UDMA 1272 if (atac->atac_set_modes != NULL && 1273 (atac->atac_cap & ATAC_CAP_UDMA)) 1274 if (ata_set_mode(drvp, 0x40 | i, 1275 AT_WAIT) != CMD_OK) 1276 continue; 1277 #endif 1278 if (!printed) { 1279 aprint_verbose("%s Ultra-DMA mode %d", 1280 sep, i); 1281 if (i == 2) 1282 aprint_verbose(" (Ultra/33)"); 1283 else if (i == 4) 1284 aprint_verbose(" (Ultra/66)"); 1285 else if (i == 5) 1286 aprint_verbose(" (Ultra/100)"); 1287 else if (i == 6) 1288 aprint_verbose(" (Ultra/133)"); 1289 sep = ","; 1290 printed = 1; 1291 } 1292 #if NATA_UDMA 1293 if (atac->atac_cap & ATAC_CAP_UDMA) { 1294 if (atac->atac_set_modes != NULL && 1295 atac->atac_udma_cap < i) 1296 continue; 1297 drvp->UDMA_mode = i; 1298 drvp->UDMA_cap = i; 1299 s = splbio(); 1300 drvp->drive_flags |= DRIVE_UDMA; 1301 splx(s); 1302 } 1303 #endif 1304 break; 1305 } 1306 } 1307 aprint_verbose("\n"); 1308 } 1309 1310 s = splbio(); 1311 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1312 if (drvp->drive_flags & DRIVE_ATAPI) { 1313 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1314 drvp->drive_flags |= DRIVE_NOSTREAM; 1315 } else { 1316 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1317 drvp->drive_flags |= DRIVE_NOSTREAM; 1318 } 1319 splx(s); 1320 1321 /* Try to guess ATA version here, if it didn't get reported */ 1322 if (drvp->ata_vers == 0) { 1323 #if NATA_UDMA 1324 if (drvp->drive_flags & DRIVE_UDMA) 1325 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1326 else 1327 #endif 1328 if (drvp->PIO_cap > 2) 1329 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1330 } 1331 cf_flags = device_cfdata(drv_dev)->cf_flags; 1332 if (cf_flags & ATA_CONFIG_PIO_SET) { 1333 s = splbio(); 1334 drvp->PIO_mode = 1335 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1336 drvp->drive_flags |= DRIVE_MODE; 1337 splx(s); 1338 } 1339 #if NATA_DMA 1340 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1341 /* don't care about DMA modes */ 1342 return; 1343 } 1344 if (cf_flags & ATA_CONFIG_DMA_SET) { 1345 s = splbio(); 1346 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1347 ATA_CONFIG_DMA_DISABLE) { 1348 drvp->drive_flags &= ~DRIVE_DMA; 1349 } else { 1350 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1351 ATA_CONFIG_DMA_OFF; 1352 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1353 } 1354 splx(s); 1355 } 1356 #if NATA_UDMA 1357 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1358 /* don't care about UDMA modes */ 1359 return; 1360 } 1361 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1362 s = splbio(); 1363 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1364 ATA_CONFIG_UDMA_DISABLE) { 1365 drvp->drive_flags &= ~DRIVE_UDMA; 1366 } else { 1367 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1368 ATA_CONFIG_UDMA_OFF; 1369 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1370 } 1371 splx(s); 1372 } 1373 #endif /* NATA_UDMA */ 1374 #endif /* NATA_DMA */ 1375 } 1376 1377 /* management of the /dev/atabus* devices */ 1378 int 1379 atabusopen(dev_t dev, int flag, int fmt, 1380 struct lwp *l) 1381 { 1382 struct atabus_softc *sc; 1383 int error, unit = minor(dev); 1384 1385 if (unit >= atabus_cd.cd_ndevs || 1386 (sc = atabus_cd.cd_devs[unit]) == NULL) 1387 return (ENXIO); 1388 1389 if (sc->sc_flags & ATABUSCF_OPEN) 1390 return (EBUSY); 1391 1392 if ((error = ata_addref(sc->sc_chan)) != 0) 1393 return (error); 1394 1395 sc->sc_flags |= ATABUSCF_OPEN; 1396 1397 return (0); 1398 } 1399 1400 1401 int 1402 atabusclose(dev_t dev, int flag, int fmt, 1403 struct lwp *l) 1404 { 1405 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1406 1407 ata_delref(sc->sc_chan); 1408 1409 sc->sc_flags &= ~ATABUSCF_OPEN; 1410 1411 return (0); 1412 } 1413 1414 int 1415 atabusioctl(dev_t dev, u_long cmd, caddr_t addr, int flag, 1416 struct lwp *l) 1417 { 1418 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1419 struct ata_channel *chp = sc->sc_chan; 1420 int min_drive, max_drive, drive; 1421 int error; 1422 int s; 1423 1424 /* 1425 * Enforce write permission for ioctls that change the 1426 * state of the bus. Host adapter specific ioctls must 1427 * be checked by the adapter driver. 1428 */ 1429 switch (cmd) { 1430 case ATABUSIOSCAN: 1431 case ATABUSIODETACH: 1432 case ATABUSIORESET: 1433 if ((flag & FWRITE) == 0) 1434 return (EBADF); 1435 } 1436 1437 switch (cmd) { 1438 case ATABUSIORESET: 1439 s = splbio(); 1440 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1441 splx(s); 1442 error = 0; 1443 break; 1444 case ATABUSIOSCAN: 1445 { 1446 #if 0 1447 struct atabusioscan_args *a= 1448 (struct atabusioscan_args *)addr; 1449 #endif 1450 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1451 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1452 return (EOPNOTSUPP); 1453 return (EOPNOTSUPP); 1454 } 1455 case ATABUSIODETACH: 1456 { 1457 struct atabusioscan_args *a= 1458 (struct atabusioscan_args *)addr; 1459 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1460 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1461 return (EOPNOTSUPP); 1462 switch (a->at_dev) { 1463 case -1: 1464 min_drive = 0; 1465 max_drive = 1; 1466 break; 1467 case 0: 1468 case 1: 1469 min_drive = max_drive = a->at_dev; 1470 break; 1471 default: 1472 return (EINVAL); 1473 } 1474 for (drive = min_drive; drive <= max_drive; drive++) { 1475 if (chp->ch_drive[drive].drv_softc != NULL) { 1476 error = config_detach( 1477 chp->ch_drive[drive].drv_softc, 0); 1478 if (error) 1479 return (error); 1480 chp->ch_drive[drive].drv_softc = NULL; 1481 } 1482 } 1483 error = 0; 1484 break; 1485 } 1486 default: 1487 error = ENOTTY; 1488 } 1489 return (error); 1490 }; 1491 1492 static void 1493 atabus_powerhook(int why, void *hdl) 1494 { 1495 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1496 struct ata_channel *chp = sc->sc_chan; 1497 int s; 1498 1499 switch (why) { 1500 case PWR_SOFTSUSPEND: 1501 case PWR_SOFTSTANDBY: 1502 /* freeze the queue and wait for the controller to be idle */ 1503 ata_queue_idle(chp->ch_queue); 1504 break; 1505 case PWR_RESUME: 1506 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 1507 s = splbio(); 1508 KASSERT(chp->ch_queue->queue_freeze > 0); 1509 /* unfreeze the queue and reset drives (to wake them up) */ 1510 chp->ch_queue->queue_freeze--; 1511 ata_reset_channel(chp, AT_WAIT); 1512 splx(s); 1513 break; 1514 case PWR_SUSPEND: 1515 case PWR_STANDBY: 1516 case PWR_SOFTRESUME: 1517 break; 1518 } 1519 1520 return; 1521 } 1522
Indexes created Wed Sep 24 05:09:52 GMT 2025