ata.c revision 1.87
1 /* $NetBSD: ata.c,v 1.87 2007/03/12 18:18:30 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.87 2007/03/12 18:18:30 ad Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/ataconf.h> 56 #include <dev/ata/atareg.h> 57 #include <dev/ata/atavar.h> 58 #include <dev/ic/wdcvar.h> /* for PIOBM */ 59 60 #include "locators.h" 61 62 #include "atapibus.h" 63 #include "ataraid.h" 64 65 #if NATARAID > 0 66 #include <dev/ata/ata_raidvar.h> 67 #endif 68 69 #define DEBUG_FUNCS 0x08 70 #define DEBUG_PROBE 0x10 71 #define DEBUG_DETACH 0x20 72 #define DEBUG_XFERS 0x40 73 #ifdef ATADEBUG 74 int atadebug_mask = 0; 75 #define ATADEBUG_PRINT(args, level) \ 76 if (atadebug_mask & (level)) \ 77 printf args 78 #else 79 #define ATADEBUG_PRINT(args, level) 80 #endif 81 82 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL, 83 IPL_BIO); 84 85 /* 86 * A queue of atabus instances, used to ensure the same bus probe order 87 * for a given hardware configuration at each boot. 88 */ 89 struct atabus_initq_head atabus_initq_head = 90 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 91 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 92 93 /***************************************************************************** 94 * ATA bus layer. 95 * 96 * ATA controllers attach an atabus instance, which handles probing the bus 97 * for drives, etc. 98 *****************************************************************************/ 99 100 dev_type_open(atabusopen); 101 dev_type_close(atabusclose); 102 dev_type_ioctl(atabusioctl); 103 104 const struct cdevsw atabus_cdevsw = { 105 atabusopen, atabusclose, noread, nowrite, atabusioctl, 106 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 107 }; 108 109 extern struct cfdriver atabus_cd; 110 111 static void atabus_powerhook(int, void *); 112 113 /* 114 * atabusprint: 115 * 116 * Autoconfiguration print routine used by ATA controllers when 117 * attaching an atabus instance. 118 */ 119 int 120 atabusprint(void *aux, const char *pnp) 121 { 122 struct ata_channel *chan = aux; 123 124 if (pnp) 125 aprint_normal("atabus at %s", pnp); 126 aprint_normal(" channel %d", chan->ch_channel); 127 128 return (UNCONF); 129 } 130 131 /* 132 * ataprint: 133 * 134 * Autoconfiguration print routine. 135 */ 136 int 137 ataprint(void *aux, const char *pnp) 138 { 139 struct ata_device *adev = aux; 140 141 if (pnp) 142 aprint_normal("wd at %s", pnp); 143 aprint_normal(" drive %d", adev->adev_drv_data->drive); 144 145 return (UNCONF); 146 } 147 148 /* 149 * ata_channel_attach: 150 * 151 * Common parts of attaching an atabus to an ATA controller channel. 152 */ 153 void 154 ata_channel_attach(struct ata_channel *chp) 155 { 156 157 if (chp->ch_flags & ATACH_DISABLED) 158 return; 159 160 callout_init(&chp->ch_callout); 161 162 TAILQ_INIT(&chp->ch_queue->queue_xfer); 163 chp->ch_queue->queue_freeze = 0; 164 chp->ch_queue->queue_flags = 0; 165 chp->ch_queue->active_xfer = NULL; 166 167 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 168 atabusprint); 169 } 170 171 static void 172 atabusconfig(struct atabus_softc *atabus_sc) 173 { 174 struct ata_channel *chp = atabus_sc->sc_chan; 175 struct atac_softc *atac = chp->ch_atac; 176 int i, s; 177 struct atabus_initq *atabus_initq = NULL; 178 179 /* Probe for the drives. */ 180 /* XXX for SATA devices we will power up all drives at once */ 181 (*atac->atac_probe)(chp); 182 183 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 184 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 185 DEBUG_PROBE); 186 187 /* If no drives, abort here */ 188 for (i = 0; i < chp->ch_ndrive; i++) 189 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 190 break; 191 if (i == chp->ch_ndrive) 192 goto out; 193 194 /* Shortcut in case we've been shutdown */ 195 if (chp->ch_flags & ATACH_SHUTDOWN) 196 goto out; 197 198 /* Make sure the devices probe in atabus order to avoid jitter. */ 199 simple_lock(&atabus_interlock); 200 while(1) { 201 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 202 if (atabus_initq->atabus_sc == atabus_sc) 203 break; 204 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 205 &atabus_interlock); 206 } 207 simple_unlock(&atabus_interlock); 208 209 /* 210 * Attach an ATAPI bus, if needed. 211 */ 212 for (i = 0; i < chp->ch_ndrive; i++) { 213 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 214 #if NATAPIBUS > 0 215 (*atac->atac_atapibus_attach)(atabus_sc); 216 #else 217 /* 218 * Fake the autoconfig "not configured" message 219 */ 220 aprint_normal("atapibus at %s not configured\n", 221 atac->atac_dev.dv_xname); 222 chp->atapibus = NULL; 223 s = splbio(); 224 for (i = 0; i < chp->ch_ndrive; i++) 225 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 226 splx(s); 227 #endif 228 break; 229 } 230 } 231 232 for (i = 0; i < chp->ch_ndrive; i++) { 233 struct ata_device adev; 234 if ((chp->ch_drive[i].drive_flags & 235 (DRIVE_ATA | DRIVE_OLD)) == 0) { 236 continue; 237 } 238 memset(&adev, 0, sizeof(struct ata_device)); 239 adev.adev_bustype = atac->atac_bustype_ata; 240 adev.adev_channel = chp->ch_channel; 241 adev.adev_openings = 1; 242 adev.adev_drv_data = &chp->ch_drive[i]; 243 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 244 "ata_hl", &adev, ataprint); 245 if (chp->ata_drives[i] != NULL) 246 ata_probe_caps(&chp->ch_drive[i]); 247 else { 248 s = splbio(); 249 chp->ch_drive[i].drive_flags &= 250 ~(DRIVE_ATA | DRIVE_OLD); 251 splx(s); 252 } 253 } 254 255 /* now that we know the drives, the controller can set its modes */ 256 if (atac->atac_set_modes) { 257 (*atac->atac_set_modes)(chp); 258 ata_print_modes(chp); 259 } 260 #if NATARAID > 0 261 if (atac->atac_cap & ATAC_CAP_RAID) 262 for (i = 0; i < chp->ch_ndrive; i++) 263 if (chp->ata_drives[i] != NULL) 264 ata_raid_check_component(chp->ata_drives[i]); 265 #endif /* NATARAID > 0 */ 266 267 /* 268 * reset drive_flags for unattached devices, reset state for attached 269 * ones 270 */ 271 s = splbio(); 272 for (i = 0; i < chp->ch_ndrive; i++) { 273 if (chp->ch_drive[i].drv_softc == NULL) 274 chp->ch_drive[i].drive_flags = 0; 275 else 276 chp->ch_drive[i].state = 0; 277 } 278 splx(s); 279 280 out: 281 if (atabus_initq == NULL) { 282 simple_lock(&atabus_interlock); 283 while(1) { 284 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 285 if (atabus_initq->atabus_sc == atabus_sc) 286 break; 287 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 288 &atabus_interlock); 289 } 290 simple_unlock(&atabus_interlock); 291 } 292 simple_lock(&atabus_interlock); 293 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 294 simple_unlock(&atabus_interlock); 295 296 free(atabus_initq, M_DEVBUF); 297 wakeup(&atabus_initq_head); 298 299 ata_delref(chp); 300 301 config_pending_decr(); 302 } 303 304 /* 305 * atabus_thread: 306 * 307 * Worker thread for the ATA bus. 308 */ 309 static void 310 atabus_thread(void *arg) 311 { 312 struct atabus_softc *sc = arg; 313 struct ata_channel *chp = sc->sc_chan; 314 struct ata_xfer *xfer; 315 int i, s; 316 317 s = splbio(); 318 chp->ch_flags |= ATACH_TH_RUN; 319 320 /* 321 * Probe the drives. Reset all flags to 0 to indicate to controllers 322 * that can re-probe that all drives must be probed.. 323 * 324 * Note: ch_ndrive may be changed during the probe. 325 */ 326 for (i = 0; i < ATA_MAXDRIVES; i++) 327 chp->ch_drive[i].drive_flags = 0; 328 splx(s); 329 330 /* Configure the devices on the bus. */ 331 atabusconfig(sc); 332 333 s = splbio(); 334 for (;;) { 335 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 336 (chp->ch_queue->active_xfer == NULL || 337 chp->ch_queue->queue_freeze == 0)) { 338 chp->ch_flags &= ~ATACH_TH_RUN; 339 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 340 chp->ch_flags |= ATACH_TH_RUN; 341 } 342 if (chp->ch_flags & ATACH_SHUTDOWN) { 343 break; 344 } 345 if (chp->ch_flags & ATACH_TH_RESET) { 346 /* 347 * ata_reset_channel() will freeze 2 times, so 348 * unfreeze one time. Not a problem as we're at splbio 349 */ 350 chp->ch_queue->queue_freeze--; 351 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 352 } else if (chp->ch_queue->active_xfer != NULL && 353 chp->ch_queue->queue_freeze == 1) { 354 /* 355 * Caller has bumped queue_freeze, decrease it. 356 */ 357 chp->ch_queue->queue_freeze--; 358 xfer = chp->ch_queue->active_xfer; 359 KASSERT(xfer != NULL); 360 (*xfer->c_start)(xfer->c_chp, xfer); 361 } else if (chp->ch_queue->queue_freeze > 1) 362 panic("ata_thread: queue_freeze"); 363 } 364 splx(s); 365 chp->ch_thread = NULL; 366 wakeup(&chp->ch_flags); 367 kthread_exit(0); 368 } 369 370 /* 371 * atabus_create_thread: 372 * 373 * Helper routine to create the ATA bus worker thread. 374 */ 375 static void 376 atabus_create_thread(void *arg) 377 { 378 struct atabus_softc *sc = arg; 379 struct ata_channel *chp = sc->sc_chan; 380 int error; 381 382 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 383 "%s", sc->sc_dev.dv_xname)) != 0) 384 aprint_error("%s: unable to create kernel thread: error %d\n", 385 sc->sc_dev.dv_xname, error); 386 } 387 388 /* 389 * atabus_match: 390 * 391 * Autoconfiguration match routine. 392 */ 393 static int 394 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 395 { 396 struct ata_channel *chp = aux; 397 398 if (chp == NULL) 399 return (0); 400 401 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 402 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 403 return (0); 404 405 return (1); 406 } 407 408 /* 409 * atabus_attach: 410 * 411 * Autoconfiguration attach routine. 412 */ 413 static void 414 atabus_attach(struct device *parent, struct device *self, void *aux) 415 { 416 struct atabus_softc *sc = (void *) self; 417 struct ata_channel *chp = aux; 418 struct atabus_initq *initq; 419 420 sc->sc_chan = chp; 421 422 aprint_normal("\n"); 423 aprint_naive("\n"); 424 425 if (ata_addref(chp)) 426 return; 427 428 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 429 initq->atabus_sc = sc; 430 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 431 config_pending_incr(); 432 kthread_create(atabus_create_thread, sc); 433 434 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 435 atabus_powerhook, sc); 436 if (sc->sc_powerhook == NULL) 437 printf("%s: WARNING: unable to establish power hook\n", 438 sc->sc_dev.dv_xname); 439 } 440 441 /* 442 * atabus_activate: 443 * 444 * Autoconfiguration activation routine. 445 */ 446 static int 447 atabus_activate(struct device *self, enum devact act) 448 { 449 struct atabus_softc *sc = (void *) self; 450 struct ata_channel *chp = sc->sc_chan; 451 struct device *dev = NULL; 452 int s, i, error = 0; 453 454 s = splbio(); 455 switch (act) { 456 case DVACT_ACTIVATE: 457 error = EOPNOTSUPP; 458 break; 459 460 case DVACT_DEACTIVATE: 461 /* 462 * We might deactivate the children of atapibus twice 463 * (once bia atapibus, once directly), but since the 464 * generic autoconfiguration code maintains the DVF_ACTIVE 465 * flag, it's safe. 466 */ 467 if ((dev = chp->atapibus) != NULL) { 468 error = config_deactivate(dev); 469 if (error) 470 goto out; 471 } 472 473 for (i = 0; i < chp->ch_ndrive; i++) { 474 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 475 ATADEBUG_PRINT(("atabus_activate: %s: " 476 "deactivating %s\n", sc->sc_dev.dv_xname, 477 dev->dv_xname), 478 DEBUG_DETACH); 479 error = config_deactivate(dev); 480 if (error) 481 goto out; 482 } 483 } 484 break; 485 } 486 out: 487 splx(s); 488 489 #ifdef ATADEBUG 490 if (dev != NULL && error != 0) 491 ATADEBUG_PRINT(("atabus_activate: %s: " 492 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 493 error, dev->dv_xname), DEBUG_DETACH); 494 #endif /* ATADEBUG */ 495 496 return (error); 497 } 498 499 /* 500 * atabus_detach: 501 * 502 * Autoconfiguration detach routine. 503 */ 504 static int 505 atabus_detach(struct device *self, int flags) 506 { 507 struct atabus_softc *sc = (void *) self; 508 struct ata_channel *chp = sc->sc_chan; 509 struct device *dev = NULL; 510 int s, i, error = 0; 511 512 /* Shutdown the channel. */ 513 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 514 chp->ch_flags |= ATACH_SHUTDOWN; 515 splx(s); 516 wakeup(&chp->ch_thread); 517 while (chp->ch_thread != NULL) 518 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 519 520 /* power hook */ 521 if (sc->sc_powerhook) 522 powerhook_disestablish(sc->sc_powerhook); 523 524 /* 525 * Detach atapibus and its children. 526 */ 527 if ((dev = chp->atapibus) != NULL) { 528 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 529 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 530 error = config_detach(dev, flags); 531 if (error) 532 goto out; 533 } 534 535 /* 536 * Detach our other children. 537 */ 538 for (i = 0; i < chp->ch_ndrive; i++) { 539 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 540 continue; 541 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 542 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 543 sc->sc_dev.dv_xname, dev->dv_xname), 544 DEBUG_DETACH); 545 error = config_detach(dev, flags); 546 if (error) 547 goto out; 548 } 549 } 550 551 out: 552 #ifdef ATADEBUG 553 if (dev != NULL && error != 0) 554 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 555 sc->sc_dev.dv_xname, error, dev->dv_xname), 556 DEBUG_DETACH); 557 #endif /* ATADEBUG */ 558 559 return (error); 560 } 561 562 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 563 atabus_match, atabus_attach, atabus_detach, atabus_activate); 564 565 /***************************************************************************** 566 * Common ATA bus operations. 567 *****************************************************************************/ 568 569 /* Get the disk's parameters */ 570 int 571 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 572 struct ataparams *prms) 573 { 574 char tb[DEV_BSIZE]; 575 struct ata_command ata_c; 576 struct ata_channel *chp = drvp->chnl_softc; 577 struct atac_softc *atac = chp->ch_atac; 578 int i; 579 u_int16_t *p; 580 581 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 582 583 memset(tb, 0, DEV_BSIZE); 584 memset(prms, 0, sizeof(struct ataparams)); 585 memset(&ata_c, 0, sizeof(struct ata_command)); 586 587 if (drvp->drive_flags & DRIVE_ATA) { 588 ata_c.r_command = WDCC_IDENTIFY; 589 ata_c.r_st_bmask = WDCS_DRDY; 590 ata_c.r_st_pmask = WDCS_DRQ; 591 ata_c.timeout = 3000; /* 3s */ 592 } else if (drvp->drive_flags & DRIVE_ATAPI) { 593 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 594 ata_c.r_st_bmask = 0; 595 ata_c.r_st_pmask = WDCS_DRQ; 596 ata_c.timeout = 10000; /* 10s */ 597 } else { 598 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 599 DEBUG_FUNCS|DEBUG_PROBE); 600 return CMD_ERR; 601 } 602 ata_c.flags = AT_READ | flags; 603 ata_c.data = tb; 604 ata_c.bcount = DEV_BSIZE; 605 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 606 &ata_c) != ATACMD_COMPLETE) { 607 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 608 DEBUG_FUNCS|DEBUG_PROBE); 609 return CMD_AGAIN; 610 } 611 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 612 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 613 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 614 return CMD_ERR; 615 } else { 616 /* if we didn't read any data something is wrong */ 617 if ((ata_c.flags & AT_XFDONE) == 0) 618 return CMD_ERR; 619 /* Read in parameter block. */ 620 memcpy(prms, tb, sizeof(struct ataparams)); 621 622 /* 623 * Shuffle string byte order. 624 * ATAPI NEC, Mitsumi and Pioneer drives and 625 * old ATA TDK CompactFlash cards 626 * have different byte order. 627 */ 628 #if BYTE_ORDER == BIG_ENDIAN 629 # define M(n) prms->atap_model[(n) ^ 1] 630 #else 631 # define M(n) prms->atap_model[n] 632 #endif 633 if ( 634 #if BYTE_ORDER == BIG_ENDIAN 635 ! 636 #endif 637 ((drvp->drive_flags & DRIVE_ATAPI) ? 638 ((M(0) == 'N' && M(1) == 'E') || 639 (M(0) == 'F' && M(1) == 'X') || 640 (M(0) == 'P' && M(1) == 'i')) : 641 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) 642 return CMD_OK; 643 #undef M 644 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 645 p = (u_int16_t *)(prms->atap_model + i); 646 *p = bswap16(*p); 647 } 648 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 649 p = (u_int16_t *)(prms->atap_serial + i); 650 *p = bswap16(*p); 651 } 652 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 653 p = (u_int16_t *)(prms->atap_revision + i); 654 *p = bswap16(*p); 655 } 656 657 return CMD_OK; 658 } 659 } 660 661 int 662 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 663 { 664 struct ata_command ata_c; 665 struct ata_channel *chp = drvp->chnl_softc; 666 struct atac_softc *atac = chp->ch_atac; 667 668 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 669 memset(&ata_c, 0, sizeof(struct ata_command)); 670 671 ata_c.r_command = SET_FEATURES; 672 ata_c.r_st_bmask = 0; 673 ata_c.r_st_pmask = 0; 674 ata_c.r_features = WDSF_SET_MODE; 675 ata_c.r_count = mode; 676 ata_c.flags = flags; 677 ata_c.timeout = 1000; /* 1s */ 678 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 679 &ata_c) != ATACMD_COMPLETE) 680 return CMD_AGAIN; 681 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 682 return CMD_ERR; 683 } 684 return CMD_OK; 685 } 686 687 #if NATA_DMA 688 void 689 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 690 { 691 /* 692 * Downgrade decision: if we get NERRS_MAX in NXFER. 693 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 694 * first error within the first NXFER ops will immediatly trigger 695 * a downgrade. 696 * If we got an error and n_xfers is bigger than NXFER reset counters. 697 */ 698 drvp->n_dmaerrs++; 699 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 700 ata_downgrade_mode(drvp, flags); 701 drvp->n_dmaerrs = NERRS_MAX-1; 702 drvp->n_xfers = 0; 703 return; 704 } 705 if (drvp->n_xfers > NXFER) { 706 drvp->n_dmaerrs = 1; /* just got an error */ 707 drvp->n_xfers = 1; /* restart counting from this error */ 708 } 709 } 710 #endif /* NATA_DMA */ 711 712 /* 713 * freeze the queue and wait for the controller to be idle. Caller has to 714 * unfreeze/restart the queue 715 */ 716 void 717 ata_queue_idle(struct ata_queue *queue) 718 { 719 int s = splbio(); 720 queue->queue_freeze++; 721 while (queue->active_xfer != NULL) { 722 queue->queue_flags |= QF_IDLE_WAIT; 723 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 724 } 725 splx(s); 726 } 727 728 /* 729 * Add a command to the queue and start controller. 730 * 731 * MUST BE CALLED AT splbio()! 732 */ 733 void 734 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 735 { 736 737 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 738 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 739 740 /* complete xfer setup */ 741 xfer->c_chp = chp; 742 743 /* insert at the end of command list */ 744 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 745 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 746 chp->ch_flags), DEBUG_XFERS); 747 /* 748 * if polling and can sleep, wait for the xfer to be at head of queue 749 */ 750 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 751 while (chp->ch_queue->active_xfer != NULL || 752 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 753 xfer->c_flags |= C_WAITACT; 754 tsleep(xfer, PRIBIO, "ataact", 0); 755 xfer->c_flags &= ~C_WAITACT; 756 if (xfer->c_flags & C_FREE) { 757 ata_free_xfer(chp, xfer); 758 return; 759 } 760 } 761 } 762 atastart(chp); 763 } 764 765 /* 766 * Start I/O on a controller, for the given channel. 767 * The first xfer may be not for our channel if the channel queues 768 * are shared. 769 * 770 * MUST BE CALLED AT splbio()! 771 */ 772 void 773 atastart(struct ata_channel *chp) 774 { 775 struct atac_softc *atac = chp->ch_atac; 776 struct ata_xfer *xfer; 777 778 #ifdef ATA_DEBUG 779 int spl1, spl2; 780 781 spl1 = splbio(); 782 spl2 = splbio(); 783 if (spl2 != spl1) { 784 printf("atastart: not at splbio()\n"); 785 panic("atastart"); 786 } 787 splx(spl2); 788 splx(spl1); 789 #endif /* ATA_DEBUG */ 790 791 /* is there a xfer ? */ 792 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 793 return; 794 795 /* adjust chp, in case we have a shared queue */ 796 chp = xfer->c_chp; 797 798 if (chp->ch_queue->active_xfer != NULL) { 799 return; /* channel aleady active */ 800 } 801 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 802 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 803 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 804 wakeup(&chp->ch_queue->queue_flags); 805 } 806 return; /* queue frozen */ 807 } 808 /* 809 * if someone is waiting for the command to be active, wake it up 810 * and let it process the command 811 */ 812 if (xfer->c_flags & C_WAITACT) { 813 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 814 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 815 DEBUG_XFERS); 816 wakeup(xfer); 817 return; 818 } 819 #ifdef DIAGNOSTIC 820 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 821 panic("atastart: channel waiting for irq"); 822 #endif 823 if (atac->atac_claim_hw) 824 if (!(*atac->atac_claim_hw)(chp, 0)) 825 return; 826 827 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 828 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 829 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 830 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 831 chp->ch_drive[xfer->c_drive].state = 0; 832 } 833 chp->ch_queue->active_xfer = xfer; 834 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 835 836 if (atac->atac_cap & ATAC_CAP_NOIRQ) 837 KASSERT(xfer->c_flags & C_POLL); 838 839 xfer->c_start(chp, xfer); 840 } 841 842 struct ata_xfer * 843 ata_get_xfer(int flags) 844 { 845 struct ata_xfer *xfer; 846 int s; 847 848 s = splbio(); 849 xfer = pool_get(&ata_xfer_pool, 850 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 851 splx(s); 852 if (xfer != NULL) { 853 memset(xfer, 0, sizeof(struct ata_xfer)); 854 } 855 return xfer; 856 } 857 858 void 859 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 860 { 861 struct atac_softc *atac = chp->ch_atac; 862 int s; 863 864 if (xfer->c_flags & C_WAITACT) { 865 /* Someone is waiting for this xfer, so we can't free now */ 866 xfer->c_flags |= C_FREE; 867 wakeup(xfer); 868 return; 869 } 870 871 #if NATA_PIOBM /* XXX wdc dependent code */ 872 if (xfer->c_flags & C_PIOBM) { 873 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 874 875 /* finish the busmastering PIO */ 876 (*wdc->piobm_done)(wdc->dma_arg, 877 chp->ch_channel, xfer->c_drive); 878 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 879 } 880 #endif 881 882 if (atac->atac_free_hw) 883 (*atac->atac_free_hw)(chp); 884 s = splbio(); 885 pool_put(&ata_xfer_pool, xfer); 886 splx(s); 887 } 888 889 /* 890 * Kill off all pending xfers for a ata_channel. 891 * 892 * Must be called at splbio(). 893 */ 894 void 895 ata_kill_pending(struct ata_drive_datas *drvp) 896 { 897 struct ata_channel *chp = drvp->chnl_softc; 898 struct ata_xfer *xfer, *next_xfer; 899 int s = splbio(); 900 901 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 902 xfer != NULL; xfer = next_xfer) { 903 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 904 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 905 continue; 906 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 907 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 908 } 909 910 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 911 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 912 drvp->drive_flags |= DRIVE_WAITDRAIN; 913 (void) tsleep(&chp->ch_queue->active_xfer, 914 PRIBIO, "atdrn", 0); 915 } else { 916 /* no more xfer for us */ 917 break; 918 } 919 } 920 splx(s); 921 } 922 923 /* 924 * ata_reset_channel: 925 * 926 * Reset and ATA channel. 927 * 928 * MUST BE CALLED AT splbio()! 929 */ 930 void 931 ata_reset_channel(struct ata_channel *chp, int flags) 932 { 933 struct atac_softc *atac = chp->ch_atac; 934 int drive; 935 936 #ifdef ATA_DEBUG 937 int spl1, spl2; 938 939 spl1 = splbio(); 940 spl2 = splbio(); 941 if (spl2 != spl1) { 942 printf("ata_reset_channel: not at splbio()\n"); 943 panic("ata_reset_channel"); 944 } 945 splx(spl2); 946 splx(spl1); 947 #endif /* ATA_DEBUG */ 948 949 chp->ch_queue->queue_freeze++; 950 951 /* 952 * If we can poll or wait it's OK, otherwise wake up the 953 * kernel thread to do it for us. 954 */ 955 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 956 if (chp->ch_flags & ATACH_TH_RESET) { 957 /* No need to schedule a reset more than one time. */ 958 chp->ch_queue->queue_freeze--; 959 return; 960 } 961 chp->ch_flags |= ATACH_TH_RESET; 962 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 963 wakeup(&chp->ch_thread); 964 return; 965 } 966 967 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 968 969 for (drive = 0; drive < chp->ch_ndrive; drive++) 970 chp->ch_drive[drive].state = 0; 971 972 chp->ch_flags &= ~ATACH_TH_RESET; 973 if ((flags & AT_RST_EMERG) == 0) { 974 chp->ch_queue->queue_freeze--; 975 atastart(chp); 976 } else { 977 /* make sure that we can use polled commands */ 978 TAILQ_INIT(&chp->ch_queue->queue_xfer); 979 chp->ch_queue->queue_freeze = 0; 980 chp->ch_queue->active_xfer = NULL; 981 } 982 } 983 984 int 985 ata_addref(struct ata_channel *chp) 986 { 987 struct atac_softc *atac = chp->ch_atac; 988 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 989 int s, error = 0; 990 991 s = splbio(); 992 if (adapt->adapt_refcnt++ == 0 && 993 adapt->adapt_enable != NULL) { 994 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 995 if (error) 996 adapt->adapt_refcnt--; 997 } 998 splx(s); 999 return (error); 1000 } 1001 1002 void 1003 ata_delref(struct ata_channel *chp) 1004 { 1005 struct atac_softc *atac = chp->ch_atac; 1006 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1007 int s; 1008 1009 s = splbio(); 1010 if (adapt->adapt_refcnt-- == 1 && 1011 adapt->adapt_enable != NULL) 1012 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 1013 splx(s); 1014 } 1015 1016 void 1017 ata_print_modes(struct ata_channel *chp) 1018 { 1019 struct atac_softc *atac = chp->ch_atac; 1020 int drive; 1021 struct ata_drive_datas *drvp; 1022 1023 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1024 drvp = &chp->ch_drive[drive]; 1025 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1026 continue; 1027 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1028 drvp->drv_softc->dv_xname, 1029 atac->atac_dev.dv_xname, 1030 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1031 #if NATA_DMA 1032 if (drvp->drive_flags & DRIVE_DMA) 1033 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1034 #if NATA_UDMA 1035 if (drvp->drive_flags & DRIVE_UDMA) { 1036 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1037 if (drvp->UDMA_mode == 2) 1038 aprint_verbose(" (Ultra/33)"); 1039 else if (drvp->UDMA_mode == 4) 1040 aprint_verbose(" (Ultra/66)"); 1041 else if (drvp->UDMA_mode == 5) 1042 aprint_verbose(" (Ultra/100)"); 1043 else if (drvp->UDMA_mode == 6) 1044 aprint_verbose(" (Ultra/133)"); 1045 } 1046 #endif /* NATA_UDMA */ 1047 #endif /* NATA_DMA */ 1048 #if NATA_DMA || NATA_PIOBM 1049 if (0 1050 #if NATA_DMA 1051 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1052 #endif 1053 #if NATA_PIOBM 1054 /* PIOBM capable controllers use DMA for PIO commands */ 1055 || (atac->atac_cap & ATAC_CAP_PIOBM) 1056 #endif 1057 ) 1058 aprint_verbose(" (using DMA)"); 1059 #endif /* NATA_DMA || NATA_PIOBM */ 1060 aprint_verbose("\n"); 1061 } 1062 } 1063 1064 #if NATA_DMA 1065 /* 1066 * downgrade the transfer mode of a drive after an error. return 1 if 1067 * downgrade was possible, 0 otherwise. 1068 * 1069 * MUST BE CALLED AT splbio()! 1070 */ 1071 int 1072 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1073 { 1074 struct ata_channel *chp = drvp->chnl_softc; 1075 struct atac_softc *atac = chp->ch_atac; 1076 struct device *drv_dev = drvp->drv_softc; 1077 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1078 1079 /* if drive or controller don't know its mode, we can't do much */ 1080 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1081 (atac->atac_set_modes == NULL)) 1082 return 0; 1083 /* current drive mode was set by a config flag, let it this way */ 1084 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1085 (cf_flags & ATA_CONFIG_DMA_SET) || 1086 (cf_flags & ATA_CONFIG_UDMA_SET)) 1087 return 0; 1088 1089 #if NATA_UDMA 1090 /* 1091 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1092 */ 1093 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1094 drvp->UDMA_mode--; 1095 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1096 drv_dev->dv_xname, drvp->UDMA_mode); 1097 } 1098 #endif 1099 1100 /* 1101 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1102 */ 1103 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1104 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1105 drvp->PIO_mode = drvp->PIO_cap; 1106 printf("%s: transfer error, downgrading to PIO mode %d\n", 1107 drv_dev->dv_xname, drvp->PIO_mode); 1108 } else /* already using PIO, can't downgrade */ 1109 return 0; 1110 1111 (*atac->atac_set_modes)(chp); 1112 ata_print_modes(chp); 1113 /* reset the channel, which will schedule all drives for setup */ 1114 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1115 return 1; 1116 } 1117 #endif /* NATA_DMA */ 1118 1119 /* 1120 * Probe drive's capabilities, for use by the controller later 1121 * Assumes drvp points to an existing drive. 1122 */ 1123 void 1124 ata_probe_caps(struct ata_drive_datas *drvp) 1125 { 1126 struct ataparams params, params2; 1127 struct ata_channel *chp = drvp->chnl_softc; 1128 struct atac_softc *atac = chp->ch_atac; 1129 struct device *drv_dev = drvp->drv_softc; 1130 int i, printed, s; 1131 const char *sep = ""; 1132 int cf_flags; 1133 1134 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1135 /* IDENTIFY failed. Can't tell more about the device */ 1136 return; 1137 } 1138 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1139 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1140 /* 1141 * Controller claims 16 and 32 bit transfers. 1142 * Re-do an IDENTIFY with 32-bit transfers, 1143 * and compare results. 1144 */ 1145 s = splbio(); 1146 drvp->drive_flags |= DRIVE_CAP32; 1147 splx(s); 1148 ata_get_params(drvp, AT_WAIT, ¶ms2); 1149 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1150 /* Not good. fall back to 16bits */ 1151 s = splbio(); 1152 drvp->drive_flags &= ~DRIVE_CAP32; 1153 splx(s); 1154 } else { 1155 aprint_verbose("%s: 32-bit data port\n", 1156 drv_dev->dv_xname); 1157 } 1158 } 1159 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1160 if (params.atap_ata_major > 0x01 && 1161 params.atap_ata_major != 0xffff) { 1162 for (i = 14; i > 0; i--) { 1163 if (params.atap_ata_major & (1 << i)) { 1164 aprint_verbose("%s: ATA version %d\n", 1165 drv_dev->dv_xname, i); 1166 drvp->ata_vers = i; 1167 break; 1168 } 1169 } 1170 } 1171 #endif 1172 1173 /* An ATAPI device is at last PIO mode 3 */ 1174 if (drvp->drive_flags & DRIVE_ATAPI) 1175 drvp->PIO_mode = 3; 1176 1177 /* 1178 * It's not in the specs, but it seems that some drive 1179 * returns 0xffff in atap_extensions when this field is invalid 1180 */ 1181 if (params.atap_extensions != 0xffff && 1182 (params.atap_extensions & WDC_EXT_MODES)) { 1183 printed = 0; 1184 /* 1185 * XXX some drives report something wrong here (they claim to 1186 * support PIO mode 8 !). As mode is coded on 3 bits in 1187 * SET FEATURE, limit it to 7 (so limit i to 4). 1188 * If higher mode than 7 is found, abort. 1189 */ 1190 for (i = 7; i >= 0; i--) { 1191 if ((params.atap_piomode_supp & (1 << i)) == 0) 1192 continue; 1193 if (i > 4) 1194 return; 1195 /* 1196 * See if mode is accepted. 1197 * If the controller can't set its PIO mode, 1198 * assume the defaults are good, so don't try 1199 * to set it 1200 */ 1201 if (atac->atac_set_modes) 1202 /* 1203 * It's OK to pool here, it's fast enouth 1204 * to not bother waiting for interrupt 1205 */ 1206 if (ata_set_mode(drvp, 0x08 | (i + 3), 1207 AT_WAIT) != CMD_OK) 1208 continue; 1209 if (!printed) { 1210 aprint_verbose("%s: drive supports PIO mode %d", 1211 drv_dev->dv_xname, i + 3); 1212 sep = ","; 1213 printed = 1; 1214 } 1215 /* 1216 * If controller's driver can't set its PIO mode, 1217 * get the highter one for the drive. 1218 */ 1219 if (atac->atac_set_modes == NULL || 1220 atac->atac_pio_cap >= i + 3) { 1221 drvp->PIO_mode = i + 3; 1222 drvp->PIO_cap = i + 3; 1223 break; 1224 } 1225 } 1226 if (!printed) { 1227 /* 1228 * We didn't find a valid PIO mode. 1229 * Assume the values returned for DMA are buggy too 1230 */ 1231 return; 1232 } 1233 s = splbio(); 1234 drvp->drive_flags |= DRIVE_MODE; 1235 splx(s); 1236 printed = 0; 1237 for (i = 7; i >= 0; i--) { 1238 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1239 continue; 1240 #if NATA_DMA 1241 if ((atac->atac_cap & ATAC_CAP_DMA) && 1242 atac->atac_set_modes != NULL) 1243 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1244 != CMD_OK) 1245 continue; 1246 #endif 1247 if (!printed) { 1248 aprint_verbose("%s DMA mode %d", sep, i); 1249 sep = ","; 1250 printed = 1; 1251 } 1252 #if NATA_DMA 1253 if (atac->atac_cap & ATAC_CAP_DMA) { 1254 if (atac->atac_set_modes != NULL && 1255 atac->atac_dma_cap < i) 1256 continue; 1257 drvp->DMA_mode = i; 1258 drvp->DMA_cap = i; 1259 s = splbio(); 1260 drvp->drive_flags |= DRIVE_DMA; 1261 splx(s); 1262 } 1263 #endif 1264 break; 1265 } 1266 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1267 printed = 0; 1268 for (i = 7; i >= 0; i--) { 1269 if ((params.atap_udmamode_supp & (1 << i)) 1270 == 0) 1271 continue; 1272 #if NATA_UDMA 1273 if (atac->atac_set_modes != NULL && 1274 (atac->atac_cap & ATAC_CAP_UDMA)) 1275 if (ata_set_mode(drvp, 0x40 | i, 1276 AT_WAIT) != CMD_OK) 1277 continue; 1278 #endif 1279 if (!printed) { 1280 aprint_verbose("%s Ultra-DMA mode %d", 1281 sep, i); 1282 if (i == 2) 1283 aprint_verbose(" (Ultra/33)"); 1284 else if (i == 4) 1285 aprint_verbose(" (Ultra/66)"); 1286 else if (i == 5) 1287 aprint_verbose(" (Ultra/100)"); 1288 else if (i == 6) 1289 aprint_verbose(" (Ultra/133)"); 1290 sep = ","; 1291 printed = 1; 1292 } 1293 #if NATA_UDMA 1294 if (atac->atac_cap & ATAC_CAP_UDMA) { 1295 if (atac->atac_set_modes != NULL && 1296 atac->atac_udma_cap < i) 1297 continue; 1298 drvp->UDMA_mode = i; 1299 drvp->UDMA_cap = i; 1300 s = splbio(); 1301 drvp->drive_flags |= DRIVE_UDMA; 1302 splx(s); 1303 } 1304 #endif 1305 break; 1306 } 1307 } 1308 aprint_verbose("\n"); 1309 } 1310 1311 s = splbio(); 1312 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1313 if (drvp->drive_flags & DRIVE_ATAPI) { 1314 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1315 drvp->drive_flags |= DRIVE_NOSTREAM; 1316 } else { 1317 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1318 drvp->drive_flags |= DRIVE_NOSTREAM; 1319 } 1320 splx(s); 1321 1322 /* Try to guess ATA version here, if it didn't get reported */ 1323 if (drvp->ata_vers == 0) { 1324 #if NATA_UDMA 1325 if (drvp->drive_flags & DRIVE_UDMA) 1326 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1327 else 1328 #endif 1329 if (drvp->PIO_cap > 2) 1330 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1331 } 1332 cf_flags = device_cfdata(drv_dev)->cf_flags; 1333 if (cf_flags & ATA_CONFIG_PIO_SET) { 1334 s = splbio(); 1335 drvp->PIO_mode = 1336 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1337 drvp->drive_flags |= DRIVE_MODE; 1338 splx(s); 1339 } 1340 #if NATA_DMA 1341 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1342 /* don't care about DMA modes */ 1343 return; 1344 } 1345 if (cf_flags & ATA_CONFIG_DMA_SET) { 1346 s = splbio(); 1347 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1348 ATA_CONFIG_DMA_DISABLE) { 1349 drvp->drive_flags &= ~DRIVE_DMA; 1350 } else { 1351 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1352 ATA_CONFIG_DMA_OFF; 1353 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1354 } 1355 splx(s); 1356 } 1357 #if NATA_UDMA 1358 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1359 /* don't care about UDMA modes */ 1360 return; 1361 } 1362 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1363 s = splbio(); 1364 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1365 ATA_CONFIG_UDMA_DISABLE) { 1366 drvp->drive_flags &= ~DRIVE_UDMA; 1367 } else { 1368 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1369 ATA_CONFIG_UDMA_OFF; 1370 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1371 } 1372 splx(s); 1373 } 1374 #endif /* NATA_UDMA */ 1375 #endif /* NATA_DMA */ 1376 } 1377 1378 /* management of the /dev/atabus* devices */ 1379 int 1380 atabusopen(dev_t dev, int flag, int fmt, 1381 struct lwp *l) 1382 { 1383 struct atabus_softc *sc; 1384 int error, unit = minor(dev); 1385 1386 if (unit >= atabus_cd.cd_ndevs || 1387 (sc = atabus_cd.cd_devs[unit]) == NULL) 1388 return (ENXIO); 1389 1390 if (sc->sc_flags & ATABUSCF_OPEN) 1391 return (EBUSY); 1392 1393 if ((error = ata_addref(sc->sc_chan)) != 0) 1394 return (error); 1395 1396 sc->sc_flags |= ATABUSCF_OPEN; 1397 1398 return (0); 1399 } 1400 1401 1402 int 1403 atabusclose(dev_t dev, int flag, int fmt, 1404 struct lwp *l) 1405 { 1406 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1407 1408 ata_delref(sc->sc_chan); 1409 1410 sc->sc_flags &= ~ATABUSCF_OPEN; 1411 1412 return (0); 1413 } 1414 1415 int 1416 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, 1417 struct lwp *l) 1418 { 1419 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1420 struct ata_channel *chp = sc->sc_chan; 1421 int min_drive, max_drive, drive; 1422 int error; 1423 int s; 1424 1425 /* 1426 * Enforce write permission for ioctls that change the 1427 * state of the bus. Host adapter specific ioctls must 1428 * be checked by the adapter driver. 1429 */ 1430 switch (cmd) { 1431 case ATABUSIOSCAN: 1432 case ATABUSIODETACH: 1433 case ATABUSIORESET: 1434 if ((flag & FWRITE) == 0) 1435 return (EBADF); 1436 } 1437 1438 switch (cmd) { 1439 case ATABUSIORESET: 1440 s = splbio(); 1441 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1442 splx(s); 1443 error = 0; 1444 break; 1445 case ATABUSIOSCAN: 1446 { 1447 #if 0 1448 struct atabusioscan_args *a= 1449 (struct atabusioscan_args *)addr; 1450 #endif 1451 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1452 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1453 return (EOPNOTSUPP); 1454 return (EOPNOTSUPP); 1455 } 1456 case ATABUSIODETACH: 1457 { 1458 struct atabusioscan_args *a= 1459 (struct atabusioscan_args *)addr; 1460 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1461 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1462 return (EOPNOTSUPP); 1463 switch (a->at_dev) { 1464 case -1: 1465 min_drive = 0; 1466 max_drive = 1; 1467 break; 1468 case 0: 1469 case 1: 1470 min_drive = max_drive = a->at_dev; 1471 break; 1472 default: 1473 return (EINVAL); 1474 } 1475 for (drive = min_drive; drive <= max_drive; drive++) { 1476 if (chp->ch_drive[drive].drv_softc != NULL) { 1477 error = config_detach( 1478 chp->ch_drive[drive].drv_softc, 0); 1479 if (error) 1480 return (error); 1481 chp->ch_drive[drive].drv_softc = NULL; 1482 } 1483 } 1484 error = 0; 1485 break; 1486 } 1487 default: 1488 error = ENOTTY; 1489 } 1490 return (error); 1491 }; 1492 1493 static void 1494 atabus_powerhook(int why, void *hdl) 1495 { 1496 struct atabus_softc *sc = (struct atabus_softc *)hdl; 1497 struct ata_channel *chp = sc->sc_chan; 1498 int s; 1499 1500 switch (why) { 1501 case PWR_SOFTSUSPEND: 1502 case PWR_SOFTSTANDBY: 1503 /* freeze the queue and wait for the controller to be idle */ 1504 ata_queue_idle(chp->ch_queue); 1505 break; 1506 case PWR_RESUME: 1507 printf("%s: resuming...\n", sc->sc_dev.dv_xname); 1508 s = splbio(); 1509 KASSERT(chp->ch_queue->queue_freeze > 0); 1510 /* unfreeze the queue and reset drives (to wake them up) */ 1511 chp->ch_queue->queue_freeze--; 1512 ata_reset_channel(chp, AT_WAIT); 1513 splx(s); 1514 break; 1515 case PWR_SUSPEND: 1516 case PWR_STANDBY: 1517 case PWR_SOFTRESUME: 1518 break; 1519 } 1520 1521 return; 1522 } 1523
Indexes created Wed Sep 24 22:09:59 GMT 2025