ata.c revision 1.92
1 /* $NetBSD: ata.c,v 1.92 2007/12/09 20:27:54 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.92 2007/12/09 20:27:54 jmcneill Exp $"); 34 35 #include "opt_ata.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/fcntl.h> 44 #include <sys/proc.h> 45 #include <sys/pool.h> 46 #include <sys/kthread.h> 47 #include <sys/errno.h> 48 #include <sys/ataio.h> 49 50 #include <sys/intr.h> 51 #include <sys/bus.h> 52 53 #include <dev/ata/ataconf.h> 54 #include <dev/ata/atareg.h> 55 #include <dev/ata/atavar.h> 56 #include <dev/ic/wdcvar.h> /* for PIOBM */ 57 58 #include "locators.h" 59 60 #include "atapibus.h" 61 #include "ataraid.h" 62 63 #if NATARAID > 0 64 #include <dev/ata/ata_raidvar.h> 65 #endif 66 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #define DEBUG_DETACH 0x20 70 #define DEBUG_XFERS 0x40 71 #ifdef ATADEBUG 72 int atadebug_mask = 0; 73 #define ATADEBUG_PRINT(args, level) \ 74 if (atadebug_mask & (level)) \ 75 printf args 76 #else 77 #define ATADEBUG_PRINT(args, level) 78 #endif 79 80 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL, 81 IPL_BIO); 82 83 /* 84 * A queue of atabus instances, used to ensure the same bus probe order 85 * for a given hardware configuration at each boot. 86 */ 87 struct atabus_initq_head atabus_initq_head = 88 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 89 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 90 91 /***************************************************************************** 92 * ATA bus layer. 93 * 94 * ATA controllers attach an atabus instance, which handles probing the bus 95 * for drives, etc. 96 *****************************************************************************/ 97 98 dev_type_open(atabusopen); 99 dev_type_close(atabusclose); 100 dev_type_ioctl(atabusioctl); 101 102 const struct cdevsw atabus_cdevsw = { 103 atabusopen, atabusclose, noread, nowrite, atabusioctl, 104 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 105 }; 106 107 extern struct cfdriver atabus_cd; 108 109 static bool atabus_resume(device_t); 110 static bool atabus_suspend(device_t); 111 112 /* 113 * atabusprint: 114 * 115 * Autoconfiguration print routine used by ATA controllers when 116 * attaching an atabus instance. 117 */ 118 int 119 atabusprint(void *aux, const char *pnp) 120 { 121 struct ata_channel *chan = aux; 122 123 if (pnp) 124 aprint_normal("atabus at %s", pnp); 125 aprint_normal(" channel %d", chan->ch_channel); 126 127 return (UNCONF); 128 } 129 130 /* 131 * ataprint: 132 * 133 * Autoconfiguration print routine. 134 */ 135 int 136 ataprint(void *aux, const char *pnp) 137 { 138 struct ata_device *adev = aux; 139 140 if (pnp) 141 aprint_normal("wd at %s", pnp); 142 aprint_normal(" drive %d", adev->adev_drv_data->drive); 143 144 return (UNCONF); 145 } 146 147 /* 148 * ata_channel_attach: 149 * 150 * Common parts of attaching an atabus to an ATA controller channel. 151 */ 152 void 153 ata_channel_attach(struct ata_channel *chp) 154 { 155 156 if (chp->ch_flags & ATACH_DISABLED) 157 return; 158 159 callout_init(&chp->ch_callout, 0); 160 161 TAILQ_INIT(&chp->ch_queue->queue_xfer); 162 chp->ch_queue->queue_freeze = 0; 163 chp->ch_queue->queue_flags = 0; 164 chp->ch_queue->active_xfer = NULL; 165 166 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 167 atabusprint); 168 } 169 170 static void 171 atabusconfig(struct atabus_softc *atabus_sc) 172 { 173 struct ata_channel *chp = atabus_sc->sc_chan; 174 struct atac_softc *atac = chp->ch_atac; 175 int i, s; 176 struct atabus_initq *atabus_initq = NULL; 177 178 /* Probe for the drives. */ 179 /* XXX for SATA devices we will power up all drives at once */ 180 (*atac->atac_probe)(chp); 181 182 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 183 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 184 DEBUG_PROBE); 185 186 /* If no drives, abort here */ 187 for (i = 0; i < chp->ch_ndrive; i++) 188 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 189 break; 190 if (i == chp->ch_ndrive) 191 goto out; 192 193 /* Shortcut in case we've been shutdown */ 194 if (chp->ch_flags & ATACH_SHUTDOWN) 195 goto out; 196 197 /* Make sure the devices probe in atabus order to avoid jitter. */ 198 simple_lock(&atabus_interlock); 199 while(1) { 200 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 201 if (atabus_initq->atabus_sc == atabus_sc) 202 break; 203 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 204 &atabus_interlock); 205 } 206 simple_unlock(&atabus_interlock); 207 208 /* 209 * Attach an ATAPI bus, if needed. 210 */ 211 for (i = 0; i < chp->ch_ndrive; i++) { 212 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 213 #if NATAPIBUS > 0 214 (*atac->atac_atapibus_attach)(atabus_sc); 215 #else 216 /* 217 * Fake the autoconfig "not configured" message 218 */ 219 aprint_normal("atapibus at %s not configured\n", 220 atac->atac_dev.dv_xname); 221 chp->atapibus = NULL; 222 s = splbio(); 223 for (i = 0; i < chp->ch_ndrive; i++) 224 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 225 splx(s); 226 #endif 227 break; 228 } 229 } 230 231 for (i = 0; i < chp->ch_ndrive; i++) { 232 struct ata_device adev; 233 if ((chp->ch_drive[i].drive_flags & 234 (DRIVE_ATA | DRIVE_OLD)) == 0) { 235 continue; 236 } 237 memset(&adev, 0, sizeof(struct ata_device)); 238 adev.adev_bustype = atac->atac_bustype_ata; 239 adev.adev_channel = chp->ch_channel; 240 adev.adev_openings = 1; 241 adev.adev_drv_data = &chp->ch_drive[i]; 242 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 243 "ata_hl", &adev, ataprint); 244 if (chp->ata_drives[i] != NULL) 245 ata_probe_caps(&chp->ch_drive[i]); 246 else { 247 s = splbio(); 248 chp->ch_drive[i].drive_flags &= 249 ~(DRIVE_ATA | DRIVE_OLD); 250 splx(s); 251 } 252 } 253 254 /* now that we know the drives, the controller can set its modes */ 255 if (atac->atac_set_modes) { 256 (*atac->atac_set_modes)(chp); 257 ata_print_modes(chp); 258 } 259 #if NATARAID > 0 260 if (atac->atac_cap & ATAC_CAP_RAID) 261 for (i = 0; i < chp->ch_ndrive; i++) 262 if (chp->ata_drives[i] != NULL) 263 ata_raid_check_component(chp->ata_drives[i]); 264 #endif /* NATARAID > 0 */ 265 266 /* 267 * reset drive_flags for unattached devices, reset state for attached 268 * ones 269 */ 270 s = splbio(); 271 for (i = 0; i < chp->ch_ndrive; i++) { 272 if (chp->ch_drive[i].drv_softc == NULL) 273 chp->ch_drive[i].drive_flags = 0; 274 else 275 chp->ch_drive[i].state = 0; 276 } 277 splx(s); 278 279 out: 280 if (atabus_initq == NULL) { 281 simple_lock(&atabus_interlock); 282 while(1) { 283 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 284 if (atabus_initq->atabus_sc == atabus_sc) 285 break; 286 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 287 &atabus_interlock); 288 } 289 simple_unlock(&atabus_interlock); 290 } 291 simple_lock(&atabus_interlock); 292 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 293 simple_unlock(&atabus_interlock); 294 295 free(atabus_initq, M_DEVBUF); 296 wakeup(&atabus_initq_head); 297 298 ata_delref(chp); 299 300 config_pending_decr(); 301 } 302 303 /* 304 * atabus_thread: 305 * 306 * Worker thread for the ATA bus. 307 */ 308 static void 309 atabus_thread(void *arg) 310 { 311 struct atabus_softc *sc = arg; 312 struct ata_channel *chp = sc->sc_chan; 313 struct ata_xfer *xfer; 314 int i, s; 315 316 s = splbio(); 317 chp->ch_flags |= ATACH_TH_RUN; 318 319 /* 320 * Probe the drives. Reset all flags to 0 to indicate to controllers 321 * that can re-probe that all drives must be probed.. 322 * 323 * Note: ch_ndrive may be changed during the probe. 324 */ 325 for (i = 0; i < ATA_MAXDRIVES; i++) 326 chp->ch_drive[i].drive_flags = 0; 327 splx(s); 328 329 /* Configure the devices on the bus. */ 330 atabusconfig(sc); 331 332 s = splbio(); 333 for (;;) { 334 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 335 (chp->ch_queue->active_xfer == NULL || 336 chp->ch_queue->queue_freeze == 0)) { 337 chp->ch_flags &= ~ATACH_TH_RUN; 338 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 339 chp->ch_flags |= ATACH_TH_RUN; 340 } 341 if (chp->ch_flags & ATACH_SHUTDOWN) { 342 break; 343 } 344 if (chp->ch_flags & ATACH_TH_RESET) { 345 /* 346 * ata_reset_channel() will freeze 2 times, so 347 * unfreeze one time. Not a problem as we're at splbio 348 */ 349 chp->ch_queue->queue_freeze--; 350 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 351 } else if (chp->ch_queue->active_xfer != NULL && 352 chp->ch_queue->queue_freeze == 1) { 353 /* 354 * Caller has bumped queue_freeze, decrease it. 355 */ 356 chp->ch_queue->queue_freeze--; 357 xfer = chp->ch_queue->active_xfer; 358 KASSERT(xfer != NULL); 359 (*xfer->c_start)(xfer->c_chp, xfer); 360 } else if (chp->ch_queue->queue_freeze > 1) 361 panic("ata_thread: queue_freeze"); 362 } 363 splx(s); 364 chp->ch_thread = NULL; 365 wakeup(&chp->ch_flags); 366 kthread_exit(0); 367 } 368 369 /* 370 * atabus_match: 371 * 372 * Autoconfiguration match routine. 373 */ 374 static int 375 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 376 { 377 struct ata_channel *chp = aux; 378 379 if (chp == NULL) 380 return (0); 381 382 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 383 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 384 return (0); 385 386 return (1); 387 } 388 389 /* 390 * atabus_attach: 391 * 392 * Autoconfiguration attach routine. 393 */ 394 static void 395 atabus_attach(struct device *parent, struct device *self, void *aux) 396 { 397 struct atabus_softc *sc = (void *) self; 398 struct ata_channel *chp = aux; 399 struct atabus_initq *initq; 400 int error; 401 402 sc->sc_chan = chp; 403 404 aprint_normal("\n"); 405 aprint_naive("\n"); 406 407 if (ata_addref(chp)) 408 return; 409 410 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 411 initq->atabus_sc = sc; 412 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 413 config_pending_incr(); 414 415 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 416 &chp->ch_thread, "%s", sc->sc_dev.dv_xname)) != 0) 417 aprint_error("%s: unable to create kernel thread: error %d\n", 418 sc->sc_dev.dv_xname, error); 419 420 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 421 aprint_error_dev(self, "couldn't establish power handler\n"); 422 } 423 424 /* 425 * atabus_activate: 426 * 427 * Autoconfiguration activation routine. 428 */ 429 static int 430 atabus_activate(struct device *self, enum devact act) 431 { 432 struct atabus_softc *sc = (void *) self; 433 struct ata_channel *chp = sc->sc_chan; 434 struct device *dev = NULL; 435 int s, i, error = 0; 436 437 s = splbio(); 438 switch (act) { 439 case DVACT_ACTIVATE: 440 error = EOPNOTSUPP; 441 break; 442 443 case DVACT_DEACTIVATE: 444 /* 445 * We might deactivate the children of atapibus twice 446 * (once bia atapibus, once directly), but since the 447 * generic autoconfiguration code maintains the DVF_ACTIVE 448 * flag, it's safe. 449 */ 450 if ((dev = chp->atapibus) != NULL) { 451 error = config_deactivate(dev); 452 if (error) 453 goto out; 454 } 455 456 for (i = 0; i < chp->ch_ndrive; i++) { 457 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 458 ATADEBUG_PRINT(("atabus_activate: %s: " 459 "deactivating %s\n", sc->sc_dev.dv_xname, 460 dev->dv_xname), 461 DEBUG_DETACH); 462 error = config_deactivate(dev); 463 if (error) 464 goto out; 465 } 466 } 467 break; 468 } 469 out: 470 splx(s); 471 472 #ifdef ATADEBUG 473 if (dev != NULL && error != 0) 474 ATADEBUG_PRINT(("atabus_activate: %s: " 475 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 476 error, dev->dv_xname), DEBUG_DETACH); 477 #endif /* ATADEBUG */ 478 479 return (error); 480 } 481 482 /* 483 * atabus_detach: 484 * 485 * Autoconfiguration detach routine. 486 */ 487 static int 488 atabus_detach(struct device *self, int flags) 489 { 490 struct atabus_softc *sc = (void *) self; 491 struct ata_channel *chp = sc->sc_chan; 492 struct device *dev = NULL; 493 int s, i, error = 0; 494 495 /* Shutdown the channel. */ 496 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 497 chp->ch_flags |= ATACH_SHUTDOWN; 498 splx(s); 499 wakeup(&chp->ch_thread); 500 while (chp->ch_thread != NULL) 501 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 502 503 /* 504 * Detach atapibus and its children. 505 */ 506 if ((dev = chp->atapibus) != NULL) { 507 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 508 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 509 error = config_detach(dev, flags); 510 if (error) 511 goto out; 512 } 513 514 /* 515 * Detach our other children. 516 */ 517 for (i = 0; i < chp->ch_ndrive; i++) { 518 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 519 continue; 520 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 521 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 522 sc->sc_dev.dv_xname, dev->dv_xname), 523 DEBUG_DETACH); 524 error = config_detach(dev, flags); 525 if (error) 526 goto out; 527 } 528 } 529 530 out: 531 #ifdef ATADEBUG 532 if (dev != NULL && error != 0) 533 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 534 sc->sc_dev.dv_xname, error, dev->dv_xname), 535 DEBUG_DETACH); 536 #endif /* ATADEBUG */ 537 538 return (error); 539 } 540 541 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 542 atabus_match, atabus_attach, atabus_detach, atabus_activate); 543 544 /***************************************************************************** 545 * Common ATA bus operations. 546 *****************************************************************************/ 547 548 /* Get the disk's parameters */ 549 int 550 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 551 struct ataparams *prms) 552 { 553 char tb[DEV_BSIZE]; 554 struct ata_command ata_c; 555 struct ata_channel *chp = drvp->chnl_softc; 556 struct atac_softc *atac = chp->ch_atac; 557 int i; 558 u_int16_t *p; 559 560 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 561 562 memset(tb, 0, DEV_BSIZE); 563 memset(prms, 0, sizeof(struct ataparams)); 564 memset(&ata_c, 0, sizeof(struct ata_command)); 565 566 if (drvp->drive_flags & DRIVE_ATA) { 567 ata_c.r_command = WDCC_IDENTIFY; 568 ata_c.r_st_bmask = WDCS_DRDY; 569 ata_c.r_st_pmask = WDCS_DRQ; 570 ata_c.timeout = 3000; /* 3s */ 571 } else if (drvp->drive_flags & DRIVE_ATAPI) { 572 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 573 ata_c.r_st_bmask = 0; 574 ata_c.r_st_pmask = WDCS_DRQ; 575 ata_c.timeout = 10000; /* 10s */ 576 } else { 577 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 578 DEBUG_FUNCS|DEBUG_PROBE); 579 return CMD_ERR; 580 } 581 ata_c.flags = AT_READ | flags; 582 ata_c.data = tb; 583 ata_c.bcount = DEV_BSIZE; 584 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 585 &ata_c) != ATACMD_COMPLETE) { 586 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 587 DEBUG_FUNCS|DEBUG_PROBE); 588 return CMD_AGAIN; 589 } 590 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 591 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 592 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 593 return CMD_ERR; 594 } 595 /* if we didn't read any data something is wrong */ 596 if ((ata_c.flags & AT_XFDONE) == 0) 597 return CMD_ERR; 598 599 /* Read in parameter block. */ 600 memcpy(prms, tb, sizeof(struct ataparams)); 601 602 /* 603 * Shuffle string byte order. 604 * ATAPI NEC, Mitsumi and Pioneer drives and 605 * old ATA TDK CompactFlash cards 606 * have different byte order. 607 */ 608 #if BYTE_ORDER == BIG_ENDIAN 609 # define M(n) prms->atap_model[(n) ^ 1] 610 #else 611 # define M(n) prms->atap_model[n] 612 #endif 613 if ( 614 #if BYTE_ORDER == BIG_ENDIAN 615 ! 616 #endif 617 ((drvp->drive_flags & DRIVE_ATAPI) ? 618 ((M(0) == 'N' && M(1) == 'E') || 619 (M(0) == 'F' && M(1) == 'X') || 620 (M(0) == 'P' && M(1) == 'i')) : 621 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) 622 return CMD_OK; 623 #undef M 624 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 625 p = (u_int16_t *)(prms->atap_model + i); 626 *p = bswap16(*p); 627 } 628 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 629 p = (u_int16_t *)(prms->atap_serial + i); 630 *p = bswap16(*p); 631 } 632 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 633 p = (u_int16_t *)(prms->atap_revision + i); 634 *p = bswap16(*p); 635 } 636 637 return CMD_OK; 638 } 639 640 int 641 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 642 { 643 struct ata_command ata_c; 644 struct ata_channel *chp = drvp->chnl_softc; 645 struct atac_softc *atac = chp->ch_atac; 646 647 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 648 memset(&ata_c, 0, sizeof(struct ata_command)); 649 650 ata_c.r_command = SET_FEATURES; 651 ata_c.r_st_bmask = 0; 652 ata_c.r_st_pmask = 0; 653 ata_c.r_features = WDSF_SET_MODE; 654 ata_c.r_count = mode; 655 ata_c.flags = flags; 656 ata_c.timeout = 1000; /* 1s */ 657 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 658 &ata_c) != ATACMD_COMPLETE) 659 return CMD_AGAIN; 660 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 661 return CMD_ERR; 662 } 663 return CMD_OK; 664 } 665 666 #if NATA_DMA 667 void 668 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 669 { 670 /* 671 * Downgrade decision: if we get NERRS_MAX in NXFER. 672 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 673 * first error within the first NXFER ops will immediatly trigger 674 * a downgrade. 675 * If we got an error and n_xfers is bigger than NXFER reset counters. 676 */ 677 drvp->n_dmaerrs++; 678 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 679 ata_downgrade_mode(drvp, flags); 680 drvp->n_dmaerrs = NERRS_MAX-1; 681 drvp->n_xfers = 0; 682 return; 683 } 684 if (drvp->n_xfers > NXFER) { 685 drvp->n_dmaerrs = 1; /* just got an error */ 686 drvp->n_xfers = 1; /* restart counting from this error */ 687 } 688 } 689 #endif /* NATA_DMA */ 690 691 /* 692 * freeze the queue and wait for the controller to be idle. Caller has to 693 * unfreeze/restart the queue 694 */ 695 void 696 ata_queue_idle(struct ata_queue *queue) 697 { 698 int s = splbio(); 699 queue->queue_freeze++; 700 while (queue->active_xfer != NULL) { 701 queue->queue_flags |= QF_IDLE_WAIT; 702 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 703 } 704 splx(s); 705 } 706 707 /* 708 * Add a command to the queue and start controller. 709 * 710 * MUST BE CALLED AT splbio()! 711 */ 712 void 713 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 714 { 715 716 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 717 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 718 719 /* complete xfer setup */ 720 xfer->c_chp = chp; 721 722 /* insert at the end of command list */ 723 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 724 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 725 chp->ch_flags), DEBUG_XFERS); 726 /* 727 * if polling and can sleep, wait for the xfer to be at head of queue 728 */ 729 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 730 while (chp->ch_queue->active_xfer != NULL || 731 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 732 xfer->c_flags |= C_WAITACT; 733 tsleep(xfer, PRIBIO, "ataact", 0); 734 xfer->c_flags &= ~C_WAITACT; 735 if (xfer->c_flags & C_FREE) { 736 ata_free_xfer(chp, xfer); 737 return; 738 } 739 } 740 } 741 atastart(chp); 742 } 743 744 /* 745 * Start I/O on a controller, for the given channel. 746 * The first xfer may be not for our channel if the channel queues 747 * are shared. 748 * 749 * MUST BE CALLED AT splbio()! 750 */ 751 void 752 atastart(struct ata_channel *chp) 753 { 754 struct atac_softc *atac = chp->ch_atac; 755 struct ata_xfer *xfer; 756 757 #ifdef ATA_DEBUG 758 int spl1, spl2; 759 760 spl1 = splbio(); 761 spl2 = splbio(); 762 if (spl2 != spl1) { 763 printf("atastart: not at splbio()\n"); 764 panic("atastart"); 765 } 766 splx(spl2); 767 splx(spl1); 768 #endif /* ATA_DEBUG */ 769 770 /* is there a xfer ? */ 771 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 772 return; 773 774 /* adjust chp, in case we have a shared queue */ 775 chp = xfer->c_chp; 776 777 if (chp->ch_queue->active_xfer != NULL) { 778 return; /* channel aleady active */ 779 } 780 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 781 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 782 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 783 wakeup(&chp->ch_queue->queue_flags); 784 } 785 return; /* queue frozen */ 786 } 787 /* 788 * if someone is waiting for the command to be active, wake it up 789 * and let it process the command 790 */ 791 if (xfer->c_flags & C_WAITACT) { 792 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 793 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 794 DEBUG_XFERS); 795 wakeup(xfer); 796 return; 797 } 798 #ifdef DIAGNOSTIC 799 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 800 panic("atastart: channel waiting for irq"); 801 #endif 802 if (atac->atac_claim_hw) 803 if (!(*atac->atac_claim_hw)(chp, 0)) 804 return; 805 806 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 807 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 808 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 809 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 810 chp->ch_drive[xfer->c_drive].state = 0; 811 } 812 chp->ch_queue->active_xfer = xfer; 813 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 814 815 if (atac->atac_cap & ATAC_CAP_NOIRQ) 816 KASSERT(xfer->c_flags & C_POLL); 817 818 xfer->c_start(chp, xfer); 819 } 820 821 struct ata_xfer * 822 ata_get_xfer(int flags) 823 { 824 struct ata_xfer *xfer; 825 int s; 826 827 s = splbio(); 828 xfer = pool_get(&ata_xfer_pool, 829 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 830 splx(s); 831 if (xfer != NULL) { 832 memset(xfer, 0, sizeof(struct ata_xfer)); 833 } 834 return xfer; 835 } 836 837 void 838 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 839 { 840 struct atac_softc *atac = chp->ch_atac; 841 int s; 842 843 if (xfer->c_flags & C_WAITACT) { 844 /* Someone is waiting for this xfer, so we can't free now */ 845 xfer->c_flags |= C_FREE; 846 wakeup(xfer); 847 return; 848 } 849 850 #if NATA_PIOBM /* XXX wdc dependent code */ 851 if (xfer->c_flags & C_PIOBM) { 852 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 853 854 /* finish the busmastering PIO */ 855 (*wdc->piobm_done)(wdc->dma_arg, 856 chp->ch_channel, xfer->c_drive); 857 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 858 } 859 #endif 860 861 if (atac->atac_free_hw) 862 (*atac->atac_free_hw)(chp); 863 s = splbio(); 864 pool_put(&ata_xfer_pool, xfer); 865 splx(s); 866 } 867 868 /* 869 * Kill off all pending xfers for a ata_channel. 870 * 871 * Must be called at splbio(). 872 */ 873 void 874 ata_kill_pending(struct ata_drive_datas *drvp) 875 { 876 struct ata_channel *chp = drvp->chnl_softc; 877 struct ata_xfer *xfer, *next_xfer; 878 int s = splbio(); 879 880 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 881 xfer != NULL; xfer = next_xfer) { 882 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 883 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 884 continue; 885 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 886 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 887 } 888 889 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 890 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 891 drvp->drive_flags |= DRIVE_WAITDRAIN; 892 (void) tsleep(&chp->ch_queue->active_xfer, 893 PRIBIO, "atdrn", 0); 894 } else { 895 /* no more xfer for us */ 896 break; 897 } 898 } 899 splx(s); 900 } 901 902 /* 903 * ata_reset_channel: 904 * 905 * Reset and ATA channel. 906 * 907 * MUST BE CALLED AT splbio()! 908 */ 909 void 910 ata_reset_channel(struct ata_channel *chp, int flags) 911 { 912 struct atac_softc *atac = chp->ch_atac; 913 int drive; 914 915 #ifdef ATA_DEBUG 916 int spl1, spl2; 917 918 spl1 = splbio(); 919 spl2 = splbio(); 920 if (spl2 != spl1) { 921 printf("ata_reset_channel: not at splbio()\n"); 922 panic("ata_reset_channel"); 923 } 924 splx(spl2); 925 splx(spl1); 926 #endif /* ATA_DEBUG */ 927 928 chp->ch_queue->queue_freeze++; 929 930 /* 931 * If we can poll or wait it's OK, otherwise wake up the 932 * kernel thread to do it for us. 933 */ 934 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 935 if (chp->ch_flags & ATACH_TH_RESET) { 936 /* No need to schedule a reset more than one time. */ 937 chp->ch_queue->queue_freeze--; 938 return; 939 } 940 chp->ch_flags |= ATACH_TH_RESET; 941 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 942 wakeup(&chp->ch_thread); 943 return; 944 } 945 946 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 947 948 for (drive = 0; drive < chp->ch_ndrive; drive++) 949 chp->ch_drive[drive].state = 0; 950 951 chp->ch_flags &= ~ATACH_TH_RESET; 952 if ((flags & AT_RST_EMERG) == 0) { 953 chp->ch_queue->queue_freeze--; 954 atastart(chp); 955 } else { 956 /* make sure that we can use polled commands */ 957 TAILQ_INIT(&chp->ch_queue->queue_xfer); 958 chp->ch_queue->queue_freeze = 0; 959 chp->ch_queue->active_xfer = NULL; 960 } 961 } 962 963 int 964 ata_addref(struct ata_channel *chp) 965 { 966 struct atac_softc *atac = chp->ch_atac; 967 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 968 int s, error = 0; 969 970 s = splbio(); 971 if (adapt->adapt_refcnt++ == 0 && 972 adapt->adapt_enable != NULL) { 973 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 974 if (error) 975 adapt->adapt_refcnt--; 976 } 977 splx(s); 978 return (error); 979 } 980 981 void 982 ata_delref(struct ata_channel *chp) 983 { 984 struct atac_softc *atac = chp->ch_atac; 985 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 986 int s; 987 988 s = splbio(); 989 if (adapt->adapt_refcnt-- == 1 && 990 adapt->adapt_enable != NULL) 991 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 992 splx(s); 993 } 994 995 void 996 ata_print_modes(struct ata_channel *chp) 997 { 998 struct atac_softc *atac = chp->ch_atac; 999 int drive; 1000 struct ata_drive_datas *drvp; 1001 1002 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1003 drvp = &chp->ch_drive[drive]; 1004 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1005 continue; 1006 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1007 drvp->drv_softc->dv_xname, 1008 atac->atac_dev.dv_xname, 1009 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1010 #if NATA_DMA 1011 if (drvp->drive_flags & DRIVE_DMA) 1012 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1013 #if NATA_UDMA 1014 if (drvp->drive_flags & DRIVE_UDMA) { 1015 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1016 if (drvp->UDMA_mode == 2) 1017 aprint_verbose(" (Ultra/33)"); 1018 else if (drvp->UDMA_mode == 4) 1019 aprint_verbose(" (Ultra/66)"); 1020 else if (drvp->UDMA_mode == 5) 1021 aprint_verbose(" (Ultra/100)"); 1022 else if (drvp->UDMA_mode == 6) 1023 aprint_verbose(" (Ultra/133)"); 1024 } 1025 #endif /* NATA_UDMA */ 1026 #endif /* NATA_DMA */ 1027 #if NATA_DMA || NATA_PIOBM 1028 if (0 1029 #if NATA_DMA 1030 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1031 #endif 1032 #if NATA_PIOBM 1033 /* PIOBM capable controllers use DMA for PIO commands */ 1034 || (atac->atac_cap & ATAC_CAP_PIOBM) 1035 #endif 1036 ) 1037 aprint_verbose(" (using DMA)"); 1038 #endif /* NATA_DMA || NATA_PIOBM */ 1039 aprint_verbose("\n"); 1040 } 1041 } 1042 1043 #if NATA_DMA 1044 /* 1045 * downgrade the transfer mode of a drive after an error. return 1 if 1046 * downgrade was possible, 0 otherwise. 1047 * 1048 * MUST BE CALLED AT splbio()! 1049 */ 1050 int 1051 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1052 { 1053 struct ata_channel *chp = drvp->chnl_softc; 1054 struct atac_softc *atac = chp->ch_atac; 1055 struct device *drv_dev = drvp->drv_softc; 1056 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1057 1058 /* if drive or controller don't know its mode, we can't do much */ 1059 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1060 (atac->atac_set_modes == NULL)) 1061 return 0; 1062 /* current drive mode was set by a config flag, let it this way */ 1063 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1064 (cf_flags & ATA_CONFIG_DMA_SET) || 1065 (cf_flags & ATA_CONFIG_UDMA_SET)) 1066 return 0; 1067 1068 #if NATA_UDMA 1069 /* 1070 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1071 */ 1072 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1073 drvp->UDMA_mode--; 1074 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1075 drv_dev->dv_xname, drvp->UDMA_mode); 1076 } 1077 #endif 1078 1079 /* 1080 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1081 */ 1082 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1083 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1084 drvp->PIO_mode = drvp->PIO_cap; 1085 printf("%s: transfer error, downgrading to PIO mode %d\n", 1086 drv_dev->dv_xname, drvp->PIO_mode); 1087 } else /* already using PIO, can't downgrade */ 1088 return 0; 1089 1090 (*atac->atac_set_modes)(chp); 1091 ata_print_modes(chp); 1092 /* reset the channel, which will schedule all drives for setup */ 1093 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1094 return 1; 1095 } 1096 #endif /* NATA_DMA */ 1097 1098 /* 1099 * Probe drive's capabilities, for use by the controller later 1100 * Assumes drvp points to an existing drive. 1101 */ 1102 void 1103 ata_probe_caps(struct ata_drive_datas *drvp) 1104 { 1105 struct ataparams params, params2; 1106 struct ata_channel *chp = drvp->chnl_softc; 1107 struct atac_softc *atac = chp->ch_atac; 1108 struct device *drv_dev = drvp->drv_softc; 1109 int i, printed, s; 1110 const char *sep = ""; 1111 int cf_flags; 1112 1113 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1114 /* IDENTIFY failed. Can't tell more about the device */ 1115 return; 1116 } 1117 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1118 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1119 /* 1120 * Controller claims 16 and 32 bit transfers. 1121 * Re-do an IDENTIFY with 32-bit transfers, 1122 * and compare results. 1123 */ 1124 s = splbio(); 1125 drvp->drive_flags |= DRIVE_CAP32; 1126 splx(s); 1127 ata_get_params(drvp, AT_WAIT, ¶ms2); 1128 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1129 /* Not good. fall back to 16bits */ 1130 s = splbio(); 1131 drvp->drive_flags &= ~DRIVE_CAP32; 1132 splx(s); 1133 } else { 1134 aprint_verbose("%s: 32-bit data port\n", 1135 drv_dev->dv_xname); 1136 } 1137 } 1138 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1139 if (params.atap_ata_major > 0x01 && 1140 params.atap_ata_major != 0xffff) { 1141 for (i = 14; i > 0; i--) { 1142 if (params.atap_ata_major & (1 << i)) { 1143 aprint_verbose("%s: ATA version %d\n", 1144 drv_dev->dv_xname, i); 1145 drvp->ata_vers = i; 1146 break; 1147 } 1148 } 1149 } 1150 #endif 1151 1152 /* An ATAPI device is at last PIO mode 3 */ 1153 if (drvp->drive_flags & DRIVE_ATAPI) 1154 drvp->PIO_mode = 3; 1155 1156 /* 1157 * It's not in the specs, but it seems that some drive 1158 * returns 0xffff in atap_extensions when this field is invalid 1159 */ 1160 if (params.atap_extensions != 0xffff && 1161 (params.atap_extensions & WDC_EXT_MODES)) { 1162 printed = 0; 1163 /* 1164 * XXX some drives report something wrong here (they claim to 1165 * support PIO mode 8 !). As mode is coded on 3 bits in 1166 * SET FEATURE, limit it to 7 (so limit i to 4). 1167 * If higher mode than 7 is found, abort. 1168 */ 1169 for (i = 7; i >= 0; i--) { 1170 if ((params.atap_piomode_supp & (1 << i)) == 0) 1171 continue; 1172 if (i > 4) 1173 return; 1174 /* 1175 * See if mode is accepted. 1176 * If the controller can't set its PIO mode, 1177 * assume the defaults are good, so don't try 1178 * to set it 1179 */ 1180 if (atac->atac_set_modes) 1181 /* 1182 * It's OK to pool here, it's fast enouth 1183 * to not bother waiting for interrupt 1184 */ 1185 if (ata_set_mode(drvp, 0x08 | (i + 3), 1186 AT_WAIT) != CMD_OK) 1187 continue; 1188 if (!printed) { 1189 aprint_verbose("%s: drive supports PIO mode %d", 1190 drv_dev->dv_xname, i + 3); 1191 sep = ","; 1192 printed = 1; 1193 } 1194 /* 1195 * If controller's driver can't set its PIO mode, 1196 * get the highter one for the drive. 1197 */ 1198 if (atac->atac_set_modes == NULL || 1199 atac->atac_pio_cap >= i + 3) { 1200 drvp->PIO_mode = i + 3; 1201 drvp->PIO_cap = i + 3; 1202 break; 1203 } 1204 } 1205 if (!printed) { 1206 /* 1207 * We didn't find a valid PIO mode. 1208 * Assume the values returned for DMA are buggy too 1209 */ 1210 return; 1211 } 1212 s = splbio(); 1213 drvp->drive_flags |= DRIVE_MODE; 1214 splx(s); 1215 printed = 0; 1216 for (i = 7; i >= 0; i--) { 1217 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1218 continue; 1219 #if NATA_DMA 1220 if ((atac->atac_cap & ATAC_CAP_DMA) && 1221 atac->atac_set_modes != NULL) 1222 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1223 != CMD_OK) 1224 continue; 1225 #endif 1226 if (!printed) { 1227 aprint_verbose("%s DMA mode %d", sep, i); 1228 sep = ","; 1229 printed = 1; 1230 } 1231 #if NATA_DMA 1232 if (atac->atac_cap & ATAC_CAP_DMA) { 1233 if (atac->atac_set_modes != NULL && 1234 atac->atac_dma_cap < i) 1235 continue; 1236 drvp->DMA_mode = i; 1237 drvp->DMA_cap = i; 1238 s = splbio(); 1239 drvp->drive_flags |= DRIVE_DMA; 1240 splx(s); 1241 } 1242 #endif 1243 break; 1244 } 1245 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1246 printed = 0; 1247 for (i = 7; i >= 0; i--) { 1248 if ((params.atap_udmamode_supp & (1 << i)) 1249 == 0) 1250 continue; 1251 #if NATA_UDMA 1252 if (atac->atac_set_modes != NULL && 1253 (atac->atac_cap & ATAC_CAP_UDMA)) 1254 if (ata_set_mode(drvp, 0x40 | i, 1255 AT_WAIT) != CMD_OK) 1256 continue; 1257 #endif 1258 if (!printed) { 1259 aprint_verbose("%s Ultra-DMA mode %d", 1260 sep, i); 1261 if (i == 2) 1262 aprint_verbose(" (Ultra/33)"); 1263 else if (i == 4) 1264 aprint_verbose(" (Ultra/66)"); 1265 else if (i == 5) 1266 aprint_verbose(" (Ultra/100)"); 1267 else if (i == 6) 1268 aprint_verbose(" (Ultra/133)"); 1269 sep = ","; 1270 printed = 1; 1271 } 1272 #if NATA_UDMA 1273 if (atac->atac_cap & ATAC_CAP_UDMA) { 1274 if (atac->atac_set_modes != NULL && 1275 atac->atac_udma_cap < i) 1276 continue; 1277 drvp->UDMA_mode = i; 1278 drvp->UDMA_cap = i; 1279 s = splbio(); 1280 drvp->drive_flags |= DRIVE_UDMA; 1281 splx(s); 1282 } 1283 #endif 1284 break; 1285 } 1286 } 1287 aprint_verbose("\n"); 1288 } 1289 1290 s = splbio(); 1291 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1292 if (drvp->drive_flags & DRIVE_ATAPI) { 1293 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1294 drvp->drive_flags |= DRIVE_NOSTREAM; 1295 } else { 1296 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1297 drvp->drive_flags |= DRIVE_NOSTREAM; 1298 } 1299 splx(s); 1300 1301 /* Try to guess ATA version here, if it didn't get reported */ 1302 if (drvp->ata_vers == 0) { 1303 #if NATA_UDMA 1304 if (drvp->drive_flags & DRIVE_UDMA) 1305 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1306 else 1307 #endif 1308 if (drvp->PIO_cap > 2) 1309 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1310 } 1311 cf_flags = device_cfdata(drv_dev)->cf_flags; 1312 if (cf_flags & ATA_CONFIG_PIO_SET) { 1313 s = splbio(); 1314 drvp->PIO_mode = 1315 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1316 drvp->drive_flags |= DRIVE_MODE; 1317 splx(s); 1318 } 1319 #if NATA_DMA 1320 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1321 /* don't care about DMA modes */ 1322 return; 1323 } 1324 if (cf_flags & ATA_CONFIG_DMA_SET) { 1325 s = splbio(); 1326 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1327 ATA_CONFIG_DMA_DISABLE) { 1328 drvp->drive_flags &= ~DRIVE_DMA; 1329 } else { 1330 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1331 ATA_CONFIG_DMA_OFF; 1332 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1333 } 1334 splx(s); 1335 } 1336 #if NATA_UDMA 1337 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1338 /* don't care about UDMA modes */ 1339 return; 1340 } 1341 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1342 s = splbio(); 1343 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1344 ATA_CONFIG_UDMA_DISABLE) { 1345 drvp->drive_flags &= ~DRIVE_UDMA; 1346 } else { 1347 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1348 ATA_CONFIG_UDMA_OFF; 1349 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1350 } 1351 splx(s); 1352 } 1353 #endif /* NATA_UDMA */ 1354 #endif /* NATA_DMA */ 1355 } 1356 1357 /* management of the /dev/atabus* devices */ 1358 int 1359 atabusopen(dev_t dev, int flag, int fmt, 1360 struct lwp *l) 1361 { 1362 struct atabus_softc *sc; 1363 int error, unit = minor(dev); 1364 1365 if (unit >= atabus_cd.cd_ndevs || 1366 (sc = atabus_cd.cd_devs[unit]) == NULL) 1367 return (ENXIO); 1368 1369 if (sc->sc_flags & ATABUSCF_OPEN) 1370 return (EBUSY); 1371 1372 if ((error = ata_addref(sc->sc_chan)) != 0) 1373 return (error); 1374 1375 sc->sc_flags |= ATABUSCF_OPEN; 1376 1377 return (0); 1378 } 1379 1380 1381 int 1382 atabusclose(dev_t dev, int flag, int fmt, 1383 struct lwp *l) 1384 { 1385 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1386 1387 ata_delref(sc->sc_chan); 1388 1389 sc->sc_flags &= ~ATABUSCF_OPEN; 1390 1391 return (0); 1392 } 1393 1394 int 1395 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, 1396 struct lwp *l) 1397 { 1398 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1399 struct ata_channel *chp = sc->sc_chan; 1400 int min_drive, max_drive, drive; 1401 int error; 1402 int s; 1403 1404 /* 1405 * Enforce write permission for ioctls that change the 1406 * state of the bus. Host adapter specific ioctls must 1407 * be checked by the adapter driver. 1408 */ 1409 switch (cmd) { 1410 case ATABUSIOSCAN: 1411 case ATABUSIODETACH: 1412 case ATABUSIORESET: 1413 if ((flag & FWRITE) == 0) 1414 return (EBADF); 1415 } 1416 1417 switch (cmd) { 1418 case ATABUSIORESET: 1419 s = splbio(); 1420 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1421 splx(s); 1422 error = 0; 1423 break; 1424 case ATABUSIOSCAN: 1425 { 1426 #if 0 1427 struct atabusioscan_args *a= 1428 (struct atabusioscan_args *)addr; 1429 #endif 1430 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1431 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1432 return (EOPNOTSUPP); 1433 return (EOPNOTSUPP); 1434 } 1435 case ATABUSIODETACH: 1436 { 1437 struct atabusioscan_args *a= 1438 (struct atabusioscan_args *)addr; 1439 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1440 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1441 return (EOPNOTSUPP); 1442 switch (a->at_dev) { 1443 case -1: 1444 min_drive = 0; 1445 max_drive = 1; 1446 break; 1447 case 0: 1448 case 1: 1449 min_drive = max_drive = a->at_dev; 1450 break; 1451 default: 1452 return (EINVAL); 1453 } 1454 for (drive = min_drive; drive <= max_drive; drive++) { 1455 if (chp->ch_drive[drive].drv_softc != NULL) { 1456 error = config_detach( 1457 chp->ch_drive[drive].drv_softc, 0); 1458 if (error) 1459 return (error); 1460 chp->ch_drive[drive].drv_softc = NULL; 1461 } 1462 } 1463 error = 0; 1464 break; 1465 } 1466 default: 1467 error = ENOTTY; 1468 } 1469 return (error); 1470 }; 1471 1472 static bool 1473 atabus_suspend(device_t dv) 1474 { 1475 struct atabus_softc *sc = device_private(dv); 1476 struct ata_channel *chp = sc->sc_chan; 1477 1478 ata_queue_idle(chp->ch_queue); 1479 1480 return true; 1481 } 1482 1483 static bool 1484 atabus_resume(device_t dv) 1485 { 1486 struct atabus_softc *sc = device_private(dv); 1487 struct ata_channel *chp = sc->sc_chan; 1488 int s; 1489 1490 /* 1491 * XXX joerg: with wdc, the first channel unfreezes the controler. 1492 * Move this the reset and queue idling into wdc. 1493 */ 1494 s = splbio(); 1495 if (chp->ch_queue->queue_freeze == 0) { 1496 splx(s); 1497 return true; 1498 } 1499 KASSERT(chp->ch_queue->queue_freeze > 0); 1500 /* unfreeze the queue and reset drives */ 1501 chp->ch_queue->queue_freeze--; 1502 ata_reset_channel(chp, AT_WAIT); 1503 splx(s); 1504 1505 return true; 1506 } 1507
Indexes created Tue Sep 23 14:10:03 GMT 2025