ata.c revision 1.95
1 /* $NetBSD: ata.c,v 1.95 2008/01/10 07:41:20 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.95 2008/01/10 07:41:20 dyoung Exp $"); 34 35 #include "opt_ata.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/fcntl.h> 44 #include <sys/proc.h> 45 #include <sys/pool.h> 46 #include <sys/kthread.h> 47 #include <sys/errno.h> 48 #include <sys/ataio.h> 49 #include <sys/kmem.h> 50 #include <sys/simplelock.h> 51 #include <sys/intr.h> 52 #include <sys/bus.h> 53 54 #include <dev/ata/ataconf.h> 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 #include <dev/ic/wdcvar.h> /* for PIOBM */ 58 59 #include "locators.h" 60 61 #include "atapibus.h" 62 #include "ataraid.h" 63 64 #if NATARAID > 0 65 #include <dev/ata/ata_raidvar.h> 66 #endif 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 int atadebug_mask = 0; 74 #define ATADEBUG_PRINT(args, level) \ 75 if (atadebug_mask & (level)) \ 76 printf args 77 #else 78 #define ATADEBUG_PRINT(args, level) 79 #endif 80 81 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL, 82 IPL_BIO); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /***************************************************************************** 93 * ATA bus layer. 94 * 95 * ATA controllers attach an atabus instance, which handles probing the bus 96 * for drives, etc. 97 *****************************************************************************/ 98 99 dev_type_open(atabusopen); 100 dev_type_close(atabusclose); 101 dev_type_ioctl(atabusioctl); 102 103 const struct cdevsw atabus_cdevsw = { 104 atabusopen, atabusclose, noread, nowrite, atabusioctl, 105 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 106 }; 107 108 extern struct cfdriver atabus_cd; 109 110 static void atabus_childdetached(device_t, device_t); 111 static bool atabus_resume(device_t); 112 static bool atabus_suspend(device_t); 113 114 /* 115 * atabusprint: 116 * 117 * Autoconfiguration print routine used by ATA controllers when 118 * attaching an atabus instance. 119 */ 120 int 121 atabusprint(void *aux, const char *pnp) 122 { 123 struct ata_channel *chan = aux; 124 125 if (pnp) 126 aprint_normal("atabus at %s", pnp); 127 aprint_normal(" channel %d", chan->ch_channel); 128 129 return (UNCONF); 130 } 131 132 /* 133 * ataprint: 134 * 135 * Autoconfiguration print routine. 136 */ 137 int 138 ataprint(void *aux, const char *pnp) 139 { 140 struct ata_device *adev = aux; 141 142 if (pnp) 143 aprint_normal("wd at %s", pnp); 144 aprint_normal(" drive %d", adev->adev_drv_data->drive); 145 146 return (UNCONF); 147 } 148 149 /* 150 * ata_channel_attach: 151 * 152 * Common parts of attaching an atabus to an ATA controller channel. 153 */ 154 void 155 ata_channel_attach(struct ata_channel *chp) 156 { 157 158 if (chp->ch_flags & ATACH_DISABLED) 159 return; 160 161 callout_init(&chp->ch_callout, 0); 162 163 TAILQ_INIT(&chp->ch_queue->queue_xfer); 164 chp->ch_queue->queue_freeze = 0; 165 chp->ch_queue->queue_flags = 0; 166 chp->ch_queue->active_xfer = NULL; 167 168 chp->atabus = config_found_ia(&chp->ch_atac->atac_dev, "ata", chp, 169 atabusprint); 170 } 171 172 static void 173 atabusconfig(struct atabus_softc *atabus_sc) 174 { 175 struct ata_channel *chp = atabus_sc->sc_chan; 176 struct atac_softc *atac = chp->ch_atac; 177 int i, s; 178 struct atabus_initq *atabus_initq = NULL; 179 180 /* Probe for the drives. */ 181 /* XXX for SATA devices we will power up all drives at once */ 182 (*atac->atac_probe)(chp); 183 184 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 185 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 186 DEBUG_PROBE); 187 188 /* If no drives, abort here */ 189 for (i = 0; i < chp->ch_ndrive; i++) 190 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 191 break; 192 if (i == chp->ch_ndrive) 193 goto out; 194 195 /* Shortcut in case we've been shutdown */ 196 if (chp->ch_flags & ATACH_SHUTDOWN) 197 goto out; 198 199 /* Make sure the devices probe in atabus order to avoid jitter. */ 200 simple_lock(&atabus_interlock); 201 while(1) { 202 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 203 if (atabus_initq->atabus_sc == atabus_sc) 204 break; 205 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 206 &atabus_interlock); 207 } 208 simple_unlock(&atabus_interlock); 209 210 /* 211 * Attach an ATAPI bus, if needed. 212 */ 213 for (i = 0; i < chp->ch_ndrive; i++) { 214 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 215 #if NATAPIBUS > 0 216 (*atac->atac_atapibus_attach)(atabus_sc); 217 #else 218 /* 219 * Fake the autoconfig "not configured" message 220 */ 221 aprint_normal("atapibus at %s not configured\n", 222 device_xname(&atac->atac_dev)); 223 chp->atapibus = NULL; 224 s = splbio(); 225 for (i = 0; i < chp->ch_ndrive; i++) 226 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 227 splx(s); 228 #endif 229 break; 230 } 231 } 232 233 for (i = 0; i < chp->ch_ndrive; i++) { 234 struct ata_device adev; 235 if ((chp->ch_drive[i].drive_flags & 236 (DRIVE_ATA | DRIVE_OLD)) == 0) { 237 continue; 238 } 239 memset(&adev, 0, sizeof(struct ata_device)); 240 adev.adev_bustype = atac->atac_bustype_ata; 241 adev.adev_channel = chp->ch_channel; 242 adev.adev_openings = 1; 243 adev.adev_drv_data = &chp->ch_drive[i]; 244 chp->ata_drives[i] = config_found_ia(&atabus_sc->sc_dev, 245 "ata_hl", &adev, ataprint); 246 if (chp->ata_drives[i] != NULL) 247 ata_probe_caps(&chp->ch_drive[i]); 248 else { 249 s = splbio(); 250 chp->ch_drive[i].drive_flags &= 251 ~(DRIVE_ATA | DRIVE_OLD); 252 splx(s); 253 } 254 } 255 256 /* now that we know the drives, the controller can set its modes */ 257 if (atac->atac_set_modes) { 258 (*atac->atac_set_modes)(chp); 259 ata_print_modes(chp); 260 } 261 #if NATARAID > 0 262 if (atac->atac_cap & ATAC_CAP_RAID) 263 for (i = 0; i < chp->ch_ndrive; i++) 264 if (chp->ata_drives[i] != NULL) 265 ata_raid_check_component(chp->ata_drives[i]); 266 #endif /* NATARAID > 0 */ 267 268 /* 269 * reset drive_flags for unattached devices, reset state for attached 270 * ones 271 */ 272 s = splbio(); 273 for (i = 0; i < chp->ch_ndrive; i++) { 274 if (chp->ch_drive[i].drv_softc == NULL) 275 chp->ch_drive[i].drive_flags = 0; 276 else 277 chp->ch_drive[i].state = 0; 278 } 279 splx(s); 280 281 out: 282 if (atabus_initq == NULL) { 283 simple_lock(&atabus_interlock); 284 while(1) { 285 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 286 if (atabus_initq->atabus_sc == atabus_sc) 287 break; 288 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 289 &atabus_interlock); 290 } 291 simple_unlock(&atabus_interlock); 292 } 293 simple_lock(&atabus_interlock); 294 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 295 simple_unlock(&atabus_interlock); 296 297 free(atabus_initq, M_DEVBUF); 298 wakeup(&atabus_initq_head); 299 300 ata_delref(chp); 301 302 config_pending_decr(); 303 } 304 305 /* 306 * atabus_thread: 307 * 308 * Worker thread for the ATA bus. 309 */ 310 static void 311 atabus_thread(void *arg) 312 { 313 struct atabus_softc *sc = arg; 314 struct ata_channel *chp = sc->sc_chan; 315 struct ata_xfer *xfer; 316 int i, s; 317 318 s = splbio(); 319 chp->ch_flags |= ATACH_TH_RUN; 320 321 /* 322 * Probe the drives. Reset all flags to 0 to indicate to controllers 323 * that can re-probe that all drives must be probed.. 324 * 325 * Note: ch_ndrive may be changed during the probe. 326 */ 327 for (i = 0; i < ATA_MAXDRIVES; i++) 328 chp->ch_drive[i].drive_flags = 0; 329 splx(s); 330 331 /* Configure the devices on the bus. */ 332 atabusconfig(sc); 333 334 s = splbio(); 335 for (;;) { 336 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 337 (chp->ch_queue->active_xfer == NULL || 338 chp->ch_queue->queue_freeze == 0)) { 339 chp->ch_flags &= ~ATACH_TH_RUN; 340 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 341 chp->ch_flags |= ATACH_TH_RUN; 342 } 343 if (chp->ch_flags & ATACH_SHUTDOWN) { 344 break; 345 } 346 if (chp->ch_flags & ATACH_TH_RESET) { 347 /* 348 * ata_reset_channel() will freeze 2 times, so 349 * unfreeze one time. Not a problem as we're at splbio 350 */ 351 chp->ch_queue->queue_freeze--; 352 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 353 } else if (chp->ch_queue->active_xfer != NULL && 354 chp->ch_queue->queue_freeze == 1) { 355 /* 356 * Caller has bumped queue_freeze, decrease it. 357 */ 358 chp->ch_queue->queue_freeze--; 359 xfer = chp->ch_queue->active_xfer; 360 KASSERT(xfer != NULL); 361 (*xfer->c_start)(xfer->c_chp, xfer); 362 } else if (chp->ch_queue->queue_freeze > 1) 363 panic("ata_thread: queue_freeze"); 364 } 365 splx(s); 366 chp->ch_thread = NULL; 367 wakeup(&chp->ch_flags); 368 kthread_exit(0); 369 } 370 371 /* 372 * atabus_match: 373 * 374 * Autoconfiguration match routine. 375 */ 376 static int 377 atabus_match(device_t parent, struct cfdata *cf, void *aux) 378 { 379 struct ata_channel *chp = aux; 380 381 if (chp == NULL) 382 return (0); 383 384 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 385 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 386 return (0); 387 388 return (1); 389 } 390 391 /* 392 * atabus_attach: 393 * 394 * Autoconfiguration attach routine. 395 */ 396 static void 397 atabus_attach(device_t parent, device_t self, void *aux) 398 { 399 struct atabus_softc *sc = device_private(self); 400 struct ata_channel *chp = aux; 401 struct atabus_initq *initq; 402 int error; 403 404 sc->sc_chan = chp; 405 406 aprint_normal("\n"); 407 aprint_naive("\n"); 408 409 if (ata_addref(chp)) 410 return; 411 412 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 413 initq->atabus_sc = sc; 414 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 415 config_pending_incr(); 416 417 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 418 &chp->ch_thread, "%s", device_xname(self))) != 0) 419 aprint_error_dev(self, 420 "unable to create kernel thread: error %d\n", error); 421 422 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 423 aprint_error_dev(self, "couldn't establish power handler\n"); 424 } 425 426 /* 427 * atabus_activate: 428 * 429 * Autoconfiguration activation routine. 430 */ 431 static int 432 atabus_activate(device_t self, enum devact act) 433 { 434 struct atabus_softc *sc = device_private(self); 435 struct ata_channel *chp = sc->sc_chan; 436 device_t dev = NULL; 437 int s, i, error = 0; 438 439 s = splbio(); 440 switch (act) { 441 case DVACT_ACTIVATE: 442 error = EOPNOTSUPP; 443 break; 444 445 case DVACT_DEACTIVATE: 446 /* 447 * We might deactivate the children of atapibus twice 448 * (once bia atapibus, once directly), but since the 449 * generic autoconfiguration code maintains the DVF_ACTIVE 450 * flag, it's safe. 451 */ 452 if ((dev = chp->atapibus) != NULL) { 453 error = config_deactivate(dev); 454 if (error) 455 goto out; 456 } 457 458 for (i = 0; i < chp->ch_ndrive; i++) { 459 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 460 ATADEBUG_PRINT(("atabus_activate: %s: " 461 "deactivating %s\n", device_xname(self), 462 device_xname(dev)), 463 DEBUG_DETACH); 464 error = config_deactivate(dev); 465 if (error) 466 goto out; 467 } 468 } 469 break; 470 } 471 out: 472 splx(s); 473 474 #ifdef ATADEBUG 475 if (dev != NULL && error != 0) 476 ATADEBUG_PRINT(("atabus_activate: %s: " 477 "error %d deactivating %s\n", device_xname(self), 478 error, device_xname(dev)), DEBUG_DETACH); 479 #endif /* ATADEBUG */ 480 481 return (error); 482 } 483 484 /* 485 * atabus_detach: 486 * 487 * Autoconfiguration detach routine. 488 */ 489 static int 490 atabus_detach(device_t self, int flags) 491 { 492 struct atabus_softc *sc = device_private(self); 493 struct ata_channel *chp = sc->sc_chan; 494 device_t dev = NULL; 495 int s, i, error = 0; 496 497 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 498 499 /* Shutdown the channel. */ 500 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 501 chp->ch_flags |= ATACH_SHUTDOWN; 502 splx(s); 503 504 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 505 wakeup(&chp->ch_thread); 506 507 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 508 while (chp->ch_thread != NULL) 509 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 510 511 512 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 513 /* 514 * Detach atapibus and its children. 515 */ 516 if ((dev = chp->atapibus) != NULL) { 517 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 518 device_xname(self), device_xname(dev)), DEBUG_DETACH); 519 520 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 521 error = config_detach(dev, flags); 522 if (error) 523 goto out; 524 } 525 526 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 527 /* 528 * Detach our other children. 529 */ 530 for (i = 0; i < chp->ch_ndrive; i++) { 531 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 532 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 533 continue; 534 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 535 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 536 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 537 device_xname(self), device_xname(dev)), 538 DEBUG_DETACH); 539 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 540 error = config_detach(dev, flags); 541 if (error) 542 goto out; 543 } 544 } 545 546 out: 547 aprint_error_dev(self, "%s.%d\n", __func__, __LINE__); 548 #ifdef ATADEBUG 549 if (dev != NULL && error != 0) 550 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 551 device_xname(self), error, device_xname(dev)), 552 DEBUG_DETACH); 553 #endif /* ATADEBUG */ 554 555 return (error); 556 } 557 558 void 559 atabus_childdetached(device_t self, device_t child) 560 { 561 struct atabus_softc *sc = device_private(self); 562 struct ata_channel *chp = sc->sc_chan; 563 int i; 564 565 /* 566 * atapibus detached. 567 */ 568 if (child == chp->atapibus) { 569 chp->atapibus = NULL; 570 return; 571 } 572 573 /* 574 * Detach our other children. 575 */ 576 for (i = 0; i < chp->ch_ndrive; i++) { 577 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 578 continue; 579 if (child == chp->ch_drive[i].drv_softc) { 580 chp->ch_drive[i].drv_softc = NULL; 581 chp->ch_drive[i].drive_flags = 0; 582 return; 583 } 584 } 585 586 aprint_error_dev(self, "unknown child %p", (const void *)child); 587 } 588 589 CFATTACH_DECL2(atabus, sizeof(struct atabus_softc), 590 atabus_match, atabus_attach, atabus_detach, atabus_activate, NULL, 591 atabus_childdetached); 592 593 /***************************************************************************** 594 * Common ATA bus operations. 595 *****************************************************************************/ 596 597 /* Get the disk's parameters */ 598 int 599 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 600 struct ataparams *prms) 601 { 602 struct ata_command ata_c; 603 struct ata_channel *chp = drvp->chnl_softc; 604 struct atac_softc *atac = chp->ch_atac; 605 char *tb; 606 int i, rv; 607 u_int16_t *p; 608 609 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 610 611 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 612 memset(prms, 0, sizeof(struct ataparams)); 613 memset(&ata_c, 0, sizeof(struct ata_command)); 614 615 if (drvp->drive_flags & DRIVE_ATA) { 616 ata_c.r_command = WDCC_IDENTIFY; 617 ata_c.r_st_bmask = WDCS_DRDY; 618 ata_c.r_st_pmask = WDCS_DRQ; 619 ata_c.timeout = 3000; /* 3s */ 620 } else if (drvp->drive_flags & DRIVE_ATAPI) { 621 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 622 ata_c.r_st_bmask = 0; 623 ata_c.r_st_pmask = WDCS_DRQ; 624 ata_c.timeout = 10000; /* 10s */ 625 } else { 626 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 627 DEBUG_FUNCS|DEBUG_PROBE); 628 rv = CMD_ERR; 629 goto out; 630 } 631 ata_c.flags = AT_READ | flags; 632 ata_c.data = tb; 633 ata_c.bcount = DEV_BSIZE; 634 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 635 &ata_c) != ATACMD_COMPLETE) { 636 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 637 DEBUG_FUNCS|DEBUG_PROBE); 638 rv = CMD_AGAIN; 639 goto out; 640 } 641 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 642 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 643 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 644 rv = CMD_ERR; 645 goto out; 646 } 647 /* if we didn't read any data something is wrong */ 648 if ((ata_c.flags & AT_XFDONE) == 0) { 649 rv = CMD_ERR; 650 goto out; 651 } 652 653 /* Read in parameter block. */ 654 memcpy(prms, tb, sizeof(struct ataparams)); 655 656 /* 657 * Shuffle string byte order. 658 * ATAPI NEC, Mitsumi and Pioneer drives and 659 * old ATA TDK CompactFlash cards 660 * have different byte order. 661 */ 662 #if BYTE_ORDER == BIG_ENDIAN 663 # define M(n) prms->atap_model[(n) ^ 1] 664 #else 665 # define M(n) prms->atap_model[n] 666 #endif 667 if ( 668 #if BYTE_ORDER == BIG_ENDIAN 669 ! 670 #endif 671 ((drvp->drive_flags & DRIVE_ATAPI) ? 672 ((M(0) == 'N' && M(1) == 'E') || 673 (M(0) == 'F' && M(1) == 'X') || 674 (M(0) == 'P' && M(1) == 'i')) : 675 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 676 rv = CMD_OK; 677 goto out; 678 } 679 #undef M 680 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 681 p = (u_int16_t *)(prms->atap_model + i); 682 *p = bswap16(*p); 683 } 684 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 685 p = (u_int16_t *)(prms->atap_serial + i); 686 *p = bswap16(*p); 687 } 688 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 689 p = (u_int16_t *)(prms->atap_revision + i); 690 *p = bswap16(*p); 691 } 692 693 rv = CMD_OK; 694 out: 695 kmem_free(tb, DEV_BSIZE); 696 return rv; 697 } 698 699 int 700 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 701 { 702 struct ata_command ata_c; 703 struct ata_channel *chp = drvp->chnl_softc; 704 struct atac_softc *atac = chp->ch_atac; 705 706 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 707 memset(&ata_c, 0, sizeof(struct ata_command)); 708 709 ata_c.r_command = SET_FEATURES; 710 ata_c.r_st_bmask = 0; 711 ata_c.r_st_pmask = 0; 712 ata_c.r_features = WDSF_SET_MODE; 713 ata_c.r_count = mode; 714 ata_c.flags = flags; 715 ata_c.timeout = 1000; /* 1s */ 716 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 717 &ata_c) != ATACMD_COMPLETE) 718 return CMD_AGAIN; 719 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 720 return CMD_ERR; 721 } 722 return CMD_OK; 723 } 724 725 #if NATA_DMA 726 void 727 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 728 { 729 /* 730 * Downgrade decision: if we get NERRS_MAX in NXFER. 731 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 732 * first error within the first NXFER ops will immediatly trigger 733 * a downgrade. 734 * If we got an error and n_xfers is bigger than NXFER reset counters. 735 */ 736 drvp->n_dmaerrs++; 737 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 738 ata_downgrade_mode(drvp, flags); 739 drvp->n_dmaerrs = NERRS_MAX-1; 740 drvp->n_xfers = 0; 741 return; 742 } 743 if (drvp->n_xfers > NXFER) { 744 drvp->n_dmaerrs = 1; /* just got an error */ 745 drvp->n_xfers = 1; /* restart counting from this error */ 746 } 747 } 748 #endif /* NATA_DMA */ 749 750 /* 751 * freeze the queue and wait for the controller to be idle. Caller has to 752 * unfreeze/restart the queue 753 */ 754 void 755 ata_queue_idle(struct ata_queue *queue) 756 { 757 int s = splbio(); 758 queue->queue_freeze++; 759 while (queue->active_xfer != NULL) { 760 queue->queue_flags |= QF_IDLE_WAIT; 761 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 762 } 763 splx(s); 764 } 765 766 /* 767 * Add a command to the queue and start controller. 768 * 769 * MUST BE CALLED AT splbio()! 770 */ 771 void 772 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 773 { 774 775 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 776 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 777 778 /* complete xfer setup */ 779 xfer->c_chp = chp; 780 781 /* insert at the end of command list */ 782 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 783 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 784 chp->ch_flags), DEBUG_XFERS); 785 /* 786 * if polling and can sleep, wait for the xfer to be at head of queue 787 */ 788 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 789 while (chp->ch_queue->active_xfer != NULL || 790 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 791 xfer->c_flags |= C_WAITACT; 792 tsleep(xfer, PRIBIO, "ataact", 0); 793 xfer->c_flags &= ~C_WAITACT; 794 if (xfer->c_flags & C_FREE) { 795 ata_free_xfer(chp, xfer); 796 return; 797 } 798 } 799 } 800 atastart(chp); 801 } 802 803 /* 804 * Start I/O on a controller, for the given channel. 805 * The first xfer may be not for our channel if the channel queues 806 * are shared. 807 * 808 * MUST BE CALLED AT splbio()! 809 */ 810 void 811 atastart(struct ata_channel *chp) 812 { 813 struct atac_softc *atac = chp->ch_atac; 814 struct ata_xfer *xfer; 815 816 #ifdef ATA_DEBUG 817 int spl1, spl2; 818 819 spl1 = splbio(); 820 spl2 = splbio(); 821 if (spl2 != spl1) { 822 printf("atastart: not at splbio()\n"); 823 panic("atastart"); 824 } 825 splx(spl2); 826 splx(spl1); 827 #endif /* ATA_DEBUG */ 828 829 /* is there a xfer ? */ 830 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 831 return; 832 833 /* adjust chp, in case we have a shared queue */ 834 chp = xfer->c_chp; 835 836 if (chp->ch_queue->active_xfer != NULL) { 837 return; /* channel aleady active */ 838 } 839 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 840 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 841 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 842 wakeup(&chp->ch_queue->queue_flags); 843 } 844 return; /* queue frozen */ 845 } 846 /* 847 * if someone is waiting for the command to be active, wake it up 848 * and let it process the command 849 */ 850 if (xfer->c_flags & C_WAITACT) { 851 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 852 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 853 DEBUG_XFERS); 854 wakeup(xfer); 855 return; 856 } 857 #ifdef DIAGNOSTIC 858 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 859 panic("atastart: channel waiting for irq"); 860 #endif 861 if (atac->atac_claim_hw) 862 if (!(*atac->atac_claim_hw)(chp, 0)) 863 return; 864 865 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 866 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 867 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 868 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 869 chp->ch_drive[xfer->c_drive].state = 0; 870 } 871 chp->ch_queue->active_xfer = xfer; 872 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 873 874 if (atac->atac_cap & ATAC_CAP_NOIRQ) 875 KASSERT(xfer->c_flags & C_POLL); 876 877 xfer->c_start(chp, xfer); 878 } 879 880 struct ata_xfer * 881 ata_get_xfer(int flags) 882 { 883 struct ata_xfer *xfer; 884 int s; 885 886 s = splbio(); 887 xfer = pool_get(&ata_xfer_pool, 888 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 889 splx(s); 890 if (xfer != NULL) { 891 memset(xfer, 0, sizeof(struct ata_xfer)); 892 } 893 return xfer; 894 } 895 896 void 897 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 898 { 899 struct atac_softc *atac = chp->ch_atac; 900 int s; 901 902 if (xfer->c_flags & C_WAITACT) { 903 /* Someone is waiting for this xfer, so we can't free now */ 904 xfer->c_flags |= C_FREE; 905 wakeup(xfer); 906 return; 907 } 908 909 #if NATA_PIOBM /* XXX wdc dependent code */ 910 if (xfer->c_flags & C_PIOBM) { 911 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 912 913 /* finish the busmastering PIO */ 914 (*wdc->piobm_done)(wdc->dma_arg, 915 chp->ch_channel, xfer->c_drive); 916 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 917 } 918 #endif 919 920 if (atac->atac_free_hw) 921 (*atac->atac_free_hw)(chp); 922 s = splbio(); 923 pool_put(&ata_xfer_pool, xfer); 924 splx(s); 925 } 926 927 /* 928 * Kill off all pending xfers for a ata_channel. 929 * 930 * Must be called at splbio(). 931 */ 932 void 933 ata_kill_pending(struct ata_drive_datas *drvp) 934 { 935 struct ata_channel *chp = drvp->chnl_softc; 936 struct ata_xfer *xfer, *next_xfer; 937 int s = splbio(); 938 939 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 940 xfer != NULL; xfer = next_xfer) { 941 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 942 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 943 continue; 944 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 945 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 946 } 947 948 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 949 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 950 drvp->drive_flags |= DRIVE_WAITDRAIN; 951 (void) tsleep(&chp->ch_queue->active_xfer, 952 PRIBIO, "atdrn", 0); 953 } else { 954 /* no more xfer for us */ 955 break; 956 } 957 } 958 splx(s); 959 } 960 961 /* 962 * ata_reset_channel: 963 * 964 * Reset and ATA channel. 965 * 966 * MUST BE CALLED AT splbio()! 967 */ 968 void 969 ata_reset_channel(struct ata_channel *chp, int flags) 970 { 971 struct atac_softc *atac = chp->ch_atac; 972 int drive; 973 974 #ifdef ATA_DEBUG 975 int spl1, spl2; 976 977 spl1 = splbio(); 978 spl2 = splbio(); 979 if (spl2 != spl1) { 980 printf("ata_reset_channel: not at splbio()\n"); 981 panic("ata_reset_channel"); 982 } 983 splx(spl2); 984 splx(spl1); 985 #endif /* ATA_DEBUG */ 986 987 chp->ch_queue->queue_freeze++; 988 989 /* 990 * If we can poll or wait it's OK, otherwise wake up the 991 * kernel thread to do it for us. 992 */ 993 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 994 if (chp->ch_flags & ATACH_TH_RESET) { 995 /* No need to schedule a reset more than one time. */ 996 chp->ch_queue->queue_freeze--; 997 return; 998 } 999 chp->ch_flags |= ATACH_TH_RESET; 1000 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1001 wakeup(&chp->ch_thread); 1002 return; 1003 } 1004 1005 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1006 1007 for (drive = 0; drive < chp->ch_ndrive; drive++) 1008 chp->ch_drive[drive].state = 0; 1009 1010 chp->ch_flags &= ~ATACH_TH_RESET; 1011 if ((flags & AT_RST_EMERG) == 0) { 1012 chp->ch_queue->queue_freeze--; 1013 atastart(chp); 1014 } else { 1015 /* make sure that we can use polled commands */ 1016 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1017 chp->ch_queue->queue_freeze = 0; 1018 chp->ch_queue->active_xfer = NULL; 1019 } 1020 } 1021 1022 int 1023 ata_addref(struct ata_channel *chp) 1024 { 1025 struct atac_softc *atac = chp->ch_atac; 1026 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1027 int s, error = 0; 1028 1029 s = splbio(); 1030 if (adapt->adapt_refcnt++ == 0 && 1031 adapt->adapt_enable != NULL) { 1032 error = (*adapt->adapt_enable)(&atac->atac_dev, 1); 1033 if (error) 1034 adapt->adapt_refcnt--; 1035 } 1036 splx(s); 1037 return (error); 1038 } 1039 1040 void 1041 ata_delref(struct ata_channel *chp) 1042 { 1043 struct atac_softc *atac = chp->ch_atac; 1044 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1045 int s; 1046 1047 s = splbio(); 1048 if (adapt->adapt_refcnt-- == 1 && 1049 adapt->adapt_enable != NULL) 1050 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0); 1051 splx(s); 1052 } 1053 1054 void 1055 ata_print_modes(struct ata_channel *chp) 1056 { 1057 struct atac_softc *atac = chp->ch_atac; 1058 int drive; 1059 struct ata_drive_datas *drvp; 1060 1061 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1062 drvp = &chp->ch_drive[drive]; 1063 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1064 continue; 1065 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1066 device_xname(drvp->drv_softc), 1067 device_xname(&atac->atac_dev), 1068 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1069 #if NATA_DMA 1070 if (drvp->drive_flags & DRIVE_DMA) 1071 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1072 #if NATA_UDMA 1073 if (drvp->drive_flags & DRIVE_UDMA) { 1074 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1075 if (drvp->UDMA_mode == 2) 1076 aprint_verbose(" (Ultra/33)"); 1077 else if (drvp->UDMA_mode == 4) 1078 aprint_verbose(" (Ultra/66)"); 1079 else if (drvp->UDMA_mode == 5) 1080 aprint_verbose(" (Ultra/100)"); 1081 else if (drvp->UDMA_mode == 6) 1082 aprint_verbose(" (Ultra/133)"); 1083 } 1084 #endif /* NATA_UDMA */ 1085 #endif /* NATA_DMA */ 1086 #if NATA_DMA || NATA_PIOBM 1087 if (0 1088 #if NATA_DMA 1089 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1090 #endif 1091 #if NATA_PIOBM 1092 /* PIOBM capable controllers use DMA for PIO commands */ 1093 || (atac->atac_cap & ATAC_CAP_PIOBM) 1094 #endif 1095 ) 1096 aprint_verbose(" (using DMA)"); 1097 #endif /* NATA_DMA || NATA_PIOBM */ 1098 aprint_verbose("\n"); 1099 } 1100 } 1101 1102 #if NATA_DMA 1103 /* 1104 * downgrade the transfer mode of a drive after an error. return 1 if 1105 * downgrade was possible, 0 otherwise. 1106 * 1107 * MUST BE CALLED AT splbio()! 1108 */ 1109 int 1110 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1111 { 1112 struct ata_channel *chp = drvp->chnl_softc; 1113 struct atac_softc *atac = chp->ch_atac; 1114 device_t drv_dev = drvp->drv_softc; 1115 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1116 1117 /* if drive or controller don't know its mode, we can't do much */ 1118 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1119 (atac->atac_set_modes == NULL)) 1120 return 0; 1121 /* current drive mode was set by a config flag, let it this way */ 1122 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1123 (cf_flags & ATA_CONFIG_DMA_SET) || 1124 (cf_flags & ATA_CONFIG_UDMA_SET)) 1125 return 0; 1126 1127 #if NATA_UDMA 1128 /* 1129 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1130 */ 1131 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1132 drvp->UDMA_mode--; 1133 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 1134 device_xname(drv_dev), drvp->UDMA_mode); 1135 } 1136 #endif 1137 1138 /* 1139 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1140 */ 1141 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1142 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1143 drvp->PIO_mode = drvp->PIO_cap; 1144 printf("%s: transfer error, downgrading to PIO mode %d\n", 1145 device_xname(drv_dev), drvp->PIO_mode); 1146 } else /* already using PIO, can't downgrade */ 1147 return 0; 1148 1149 (*atac->atac_set_modes)(chp); 1150 ata_print_modes(chp); 1151 /* reset the channel, which will schedule all drives for setup */ 1152 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1153 return 1; 1154 } 1155 #endif /* NATA_DMA */ 1156 1157 /* 1158 * Probe drive's capabilities, for use by the controller later 1159 * Assumes drvp points to an existing drive. 1160 */ 1161 void 1162 ata_probe_caps(struct ata_drive_datas *drvp) 1163 { 1164 struct ataparams params, params2; 1165 struct ata_channel *chp = drvp->chnl_softc; 1166 struct atac_softc *atac = chp->ch_atac; 1167 device_t drv_dev = drvp->drv_softc; 1168 int i, printed, s; 1169 const char *sep = ""; 1170 int cf_flags; 1171 1172 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1173 /* IDENTIFY failed. Can't tell more about the device */ 1174 return; 1175 } 1176 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1177 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1178 /* 1179 * Controller claims 16 and 32 bit transfers. 1180 * Re-do an IDENTIFY with 32-bit transfers, 1181 * and compare results. 1182 */ 1183 s = splbio(); 1184 drvp->drive_flags |= DRIVE_CAP32; 1185 splx(s); 1186 ata_get_params(drvp, AT_WAIT, ¶ms2); 1187 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1188 /* Not good. fall back to 16bits */ 1189 s = splbio(); 1190 drvp->drive_flags &= ~DRIVE_CAP32; 1191 splx(s); 1192 } else { 1193 aprint_verbose("%s: 32-bit data port\n", 1194 device_xname(drv_dev)); 1195 } 1196 } 1197 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1198 if (params.atap_ata_major > 0x01 && 1199 params.atap_ata_major != 0xffff) { 1200 for (i = 14; i > 0; i--) { 1201 if (params.atap_ata_major & (1 << i)) { 1202 aprint_verbose("%s: ATA version %d\n", 1203 device_xname(drv_dev), i); 1204 drvp->ata_vers = i; 1205 break; 1206 } 1207 } 1208 } 1209 #endif 1210 1211 /* An ATAPI device is at last PIO mode 3 */ 1212 if (drvp->drive_flags & DRIVE_ATAPI) 1213 drvp->PIO_mode = 3; 1214 1215 /* 1216 * It's not in the specs, but it seems that some drive 1217 * returns 0xffff in atap_extensions when this field is invalid 1218 */ 1219 if (params.atap_extensions != 0xffff && 1220 (params.atap_extensions & WDC_EXT_MODES)) { 1221 printed = 0; 1222 /* 1223 * XXX some drives report something wrong here (they claim to 1224 * support PIO mode 8 !). As mode is coded on 3 bits in 1225 * SET FEATURE, limit it to 7 (so limit i to 4). 1226 * If higher mode than 7 is found, abort. 1227 */ 1228 for (i = 7; i >= 0; i--) { 1229 if ((params.atap_piomode_supp & (1 << i)) == 0) 1230 continue; 1231 if (i > 4) 1232 return; 1233 /* 1234 * See if mode is accepted. 1235 * If the controller can't set its PIO mode, 1236 * assume the defaults are good, so don't try 1237 * to set it 1238 */ 1239 if (atac->atac_set_modes) 1240 /* 1241 * It's OK to pool here, it's fast enouth 1242 * to not bother waiting for interrupt 1243 */ 1244 if (ata_set_mode(drvp, 0x08 | (i + 3), 1245 AT_WAIT) != CMD_OK) 1246 continue; 1247 if (!printed) { 1248 aprint_verbose("%s: drive supports PIO mode %d", 1249 device_xname(drv_dev), i + 3); 1250 sep = ","; 1251 printed = 1; 1252 } 1253 /* 1254 * If controller's driver can't set its PIO mode, 1255 * get the highter one for the drive. 1256 */ 1257 if (atac->atac_set_modes == NULL || 1258 atac->atac_pio_cap >= i + 3) { 1259 drvp->PIO_mode = i + 3; 1260 drvp->PIO_cap = i + 3; 1261 break; 1262 } 1263 } 1264 if (!printed) { 1265 /* 1266 * We didn't find a valid PIO mode. 1267 * Assume the values returned for DMA are buggy too 1268 */ 1269 return; 1270 } 1271 s = splbio(); 1272 drvp->drive_flags |= DRIVE_MODE; 1273 splx(s); 1274 printed = 0; 1275 for (i = 7; i >= 0; i--) { 1276 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1277 continue; 1278 #if NATA_DMA 1279 if ((atac->atac_cap & ATAC_CAP_DMA) && 1280 atac->atac_set_modes != NULL) 1281 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1282 != CMD_OK) 1283 continue; 1284 #endif 1285 if (!printed) { 1286 aprint_verbose("%s DMA mode %d", sep, i); 1287 sep = ","; 1288 printed = 1; 1289 } 1290 #if NATA_DMA 1291 if (atac->atac_cap & ATAC_CAP_DMA) { 1292 if (atac->atac_set_modes != NULL && 1293 atac->atac_dma_cap < i) 1294 continue; 1295 drvp->DMA_mode = i; 1296 drvp->DMA_cap = i; 1297 s = splbio(); 1298 drvp->drive_flags |= DRIVE_DMA; 1299 splx(s); 1300 } 1301 #endif 1302 break; 1303 } 1304 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1305 printed = 0; 1306 for (i = 7; i >= 0; i--) { 1307 if ((params.atap_udmamode_supp & (1 << i)) 1308 == 0) 1309 continue; 1310 #if NATA_UDMA 1311 if (atac->atac_set_modes != NULL && 1312 (atac->atac_cap & ATAC_CAP_UDMA)) 1313 if (ata_set_mode(drvp, 0x40 | i, 1314 AT_WAIT) != CMD_OK) 1315 continue; 1316 #endif 1317 if (!printed) { 1318 aprint_verbose("%s Ultra-DMA mode %d", 1319 sep, i); 1320 if (i == 2) 1321 aprint_verbose(" (Ultra/33)"); 1322 else if (i == 4) 1323 aprint_verbose(" (Ultra/66)"); 1324 else if (i == 5) 1325 aprint_verbose(" (Ultra/100)"); 1326 else if (i == 6) 1327 aprint_verbose(" (Ultra/133)"); 1328 sep = ","; 1329 printed = 1; 1330 } 1331 #if NATA_UDMA 1332 if (atac->atac_cap & ATAC_CAP_UDMA) { 1333 if (atac->atac_set_modes != NULL && 1334 atac->atac_udma_cap < i) 1335 continue; 1336 drvp->UDMA_mode = i; 1337 drvp->UDMA_cap = i; 1338 s = splbio(); 1339 drvp->drive_flags |= DRIVE_UDMA; 1340 splx(s); 1341 } 1342 #endif 1343 break; 1344 } 1345 } 1346 aprint_verbose("\n"); 1347 } 1348 1349 s = splbio(); 1350 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1351 if (drvp->drive_flags & DRIVE_ATAPI) { 1352 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1353 drvp->drive_flags |= DRIVE_NOSTREAM; 1354 } else { 1355 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1356 drvp->drive_flags |= DRIVE_NOSTREAM; 1357 } 1358 splx(s); 1359 1360 /* Try to guess ATA version here, if it didn't get reported */ 1361 if (drvp->ata_vers == 0) { 1362 #if NATA_UDMA 1363 if (drvp->drive_flags & DRIVE_UDMA) 1364 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1365 else 1366 #endif 1367 if (drvp->PIO_cap > 2) 1368 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1369 } 1370 cf_flags = device_cfdata(drv_dev)->cf_flags; 1371 if (cf_flags & ATA_CONFIG_PIO_SET) { 1372 s = splbio(); 1373 drvp->PIO_mode = 1374 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1375 drvp->drive_flags |= DRIVE_MODE; 1376 splx(s); 1377 } 1378 #if NATA_DMA 1379 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1380 /* don't care about DMA modes */ 1381 return; 1382 } 1383 if (cf_flags & ATA_CONFIG_DMA_SET) { 1384 s = splbio(); 1385 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1386 ATA_CONFIG_DMA_DISABLE) { 1387 drvp->drive_flags &= ~DRIVE_DMA; 1388 } else { 1389 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1390 ATA_CONFIG_DMA_OFF; 1391 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1392 } 1393 splx(s); 1394 } 1395 #if NATA_UDMA 1396 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1397 /* don't care about UDMA modes */ 1398 return; 1399 } 1400 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1401 s = splbio(); 1402 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1403 ATA_CONFIG_UDMA_DISABLE) { 1404 drvp->drive_flags &= ~DRIVE_UDMA; 1405 } else { 1406 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1407 ATA_CONFIG_UDMA_OFF; 1408 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1409 } 1410 splx(s); 1411 } 1412 #endif /* NATA_UDMA */ 1413 #endif /* NATA_DMA */ 1414 } 1415 1416 /* management of the /dev/atabus* devices */ 1417 int 1418 atabusopen(dev_t dev, int flag, int fmt, 1419 struct lwp *l) 1420 { 1421 struct atabus_softc *sc; 1422 int error, unit = minor(dev); 1423 1424 if (unit >= atabus_cd.cd_ndevs || 1425 (sc = atabus_cd.cd_devs[unit]) == NULL) 1426 return (ENXIO); 1427 1428 if (sc->sc_flags & ATABUSCF_OPEN) 1429 return (EBUSY); 1430 1431 if ((error = ata_addref(sc->sc_chan)) != 0) 1432 return (error); 1433 1434 sc->sc_flags |= ATABUSCF_OPEN; 1435 1436 return (0); 1437 } 1438 1439 1440 int 1441 atabusclose(dev_t dev, int flag, int fmt, 1442 struct lwp *l) 1443 { 1444 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1445 1446 ata_delref(sc->sc_chan); 1447 1448 sc->sc_flags &= ~ATABUSCF_OPEN; 1449 1450 return (0); 1451 } 1452 1453 int 1454 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, 1455 struct lwp *l) 1456 { 1457 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 1458 struct ata_channel *chp = sc->sc_chan; 1459 int min_drive, max_drive, drive; 1460 int error; 1461 int s; 1462 1463 /* 1464 * Enforce write permission for ioctls that change the 1465 * state of the bus. Host adapter specific ioctls must 1466 * be checked by the adapter driver. 1467 */ 1468 switch (cmd) { 1469 case ATABUSIOSCAN: 1470 case ATABUSIODETACH: 1471 case ATABUSIORESET: 1472 if ((flag & FWRITE) == 0) 1473 return (EBADF); 1474 } 1475 1476 switch (cmd) { 1477 case ATABUSIORESET: 1478 s = splbio(); 1479 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1480 splx(s); 1481 error = 0; 1482 break; 1483 case ATABUSIOSCAN: 1484 { 1485 #if 0 1486 struct atabusioscan_args *a= 1487 (struct atabusioscan_args *)addr; 1488 #endif 1489 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1490 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1491 return (EOPNOTSUPP); 1492 return (EOPNOTSUPP); 1493 } 1494 case ATABUSIODETACH: 1495 { 1496 struct atabusioscan_args *a= 1497 (struct atabusioscan_args *)addr; 1498 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1499 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1500 return (EOPNOTSUPP); 1501 switch (a->at_dev) { 1502 case -1: 1503 min_drive = 0; 1504 max_drive = 1; 1505 break; 1506 case 0: 1507 case 1: 1508 min_drive = max_drive = a->at_dev; 1509 break; 1510 default: 1511 return (EINVAL); 1512 } 1513 for (drive = min_drive; drive <= max_drive; drive++) { 1514 if (chp->ch_drive[drive].drv_softc != NULL) { 1515 error = config_detach( 1516 chp->ch_drive[drive].drv_softc, 0); 1517 if (error) 1518 return (error); 1519 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1520 } 1521 } 1522 error = 0; 1523 break; 1524 } 1525 default: 1526 error = ENOTTY; 1527 } 1528 return (error); 1529 }; 1530 1531 static bool 1532 atabus_suspend(device_t dv) 1533 { 1534 struct atabus_softc *sc = device_private(dv); 1535 struct ata_channel *chp = sc->sc_chan; 1536 1537 ata_queue_idle(chp->ch_queue); 1538 1539 return true; 1540 } 1541 1542 static bool 1543 atabus_resume(device_t dv) 1544 { 1545 struct atabus_softc *sc = device_private(dv); 1546 struct ata_channel *chp = sc->sc_chan; 1547 int s; 1548 1549 /* 1550 * XXX joerg: with wdc, the first channel unfreezes the controler. 1551 * Move this the reset and queue idling into wdc. 1552 */ 1553 s = splbio(); 1554 if (chp->ch_queue->queue_freeze == 0) { 1555 splx(s); 1556 return true; 1557 } 1558 KASSERT(chp->ch_queue->queue_freeze > 0); 1559 /* unfreeze the queue and reset drives */ 1560 chp->ch_queue->queue_freeze--; 1561 ata_reset_channel(chp, AT_WAIT); 1562 splx(s); 1563 1564 return true; 1565 } 1566
Indexes created Fri Sep 26 08:10:20 GMT 2025