ata_wdc.c revision 1.22 1 1.22 enami /* $NetBSD: ata_wdc.c,v 1.22 1999/10/20 15:22:24 enami Exp $ */
2 1.2 bouyer
3 1.2 bouyer /*
4 1.2 bouyer * Copyright (c) 1998 Manuel Bouyer.
5 1.2 bouyer *
6 1.2 bouyer * Redistribution and use in source and binary forms, with or without
7 1.2 bouyer * modification, are permitted provided that the following conditions
8 1.2 bouyer * are met:
9 1.2 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.2 bouyer * notice, this list of conditions and the following disclaimer.
11 1.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.2 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.2 bouyer * documentation and/or other materials provided with the distribution.
14 1.2 bouyer * 3. All advertising materials mentioning features or use of this software
15 1.2 bouyer * must display the following acknowledgement:
16 1.2 bouyer * This product includes software developed by the University of
17 1.2 bouyer * California, Berkeley and its contributors.
18 1.2 bouyer * 4. Neither the name of the University nor the names of its contributors
19 1.2 bouyer * may be used to endorse or promote products derived from this software
20 1.2 bouyer * without specific prior written permission.
21 1.2 bouyer *
22 1.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 1.2 bouyer * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.2 bouyer * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.2 bouyer * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 1.2 bouyer * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.2 bouyer * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.2 bouyer * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.2 bouyer * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.2 bouyer * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.2 bouyer * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.2 bouyer * SUCH DAMAGE.
33 1.2 bouyer *
34 1.2 bouyer */
35 1.2 bouyer
36 1.2 bouyer /*-
37 1.2 bouyer * Copyright (c) 1998 The NetBSD Foundation, Inc.
38 1.2 bouyer * All rights reserved.
39 1.2 bouyer *
40 1.2 bouyer * This code is derived from software contributed to The NetBSD Foundation
41 1.2 bouyer * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
42 1.2 bouyer *
43 1.2 bouyer * Redistribution and use in source and binary forms, with or without
44 1.2 bouyer * modification, are permitted provided that the following conditions
45 1.2 bouyer * are met:
46 1.2 bouyer * 1. Redistributions of source code must retain the above copyright
47 1.2 bouyer * notice, this list of conditions and the following disclaimer.
48 1.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
49 1.2 bouyer * notice, this list of conditions and the following disclaimer in the
50 1.2 bouyer * documentation and/or other materials provided with the distribution.
51 1.2 bouyer * 3. All advertising materials mentioning features or use of this software
52 1.2 bouyer * must display the following acknowledgement:
53 1.2 bouyer * This product includes software developed by the NetBSD
54 1.2 bouyer * Foundation, Inc. and its contributors.
55 1.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its
56 1.2 bouyer * contributors may be used to endorse or promote products derived
57 1.2 bouyer * from this software without specific prior written permission.
58 1.2 bouyer *
59 1.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
60 1.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
61 1.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
62 1.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
63 1.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
64 1.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
65 1.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
66 1.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
67 1.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
68 1.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
69 1.2 bouyer * POSSIBILITY OF SUCH DAMAGE.
70 1.2 bouyer */
71 1.2 bouyer
72 1.15 hubertf #ifndef WDCDEBUG
73 1.2 bouyer #define WDCDEBUG
74 1.15 hubertf #endif /* WDCDEBUG */
75 1.2 bouyer
76 1.2 bouyer #include <sys/param.h>
77 1.2 bouyer #include <sys/systm.h>
78 1.2 bouyer #include <sys/kernel.h>
79 1.2 bouyer #include <sys/file.h>
80 1.2 bouyer #include <sys/stat.h>
81 1.2 bouyer #include <sys/buf.h>
82 1.2 bouyer #include <sys/malloc.h>
83 1.2 bouyer #include <sys/device.h>
84 1.2 bouyer #include <sys/disklabel.h>
85 1.2 bouyer #include <sys/syslog.h>
86 1.2 bouyer #include <sys/proc.h>
87 1.2 bouyer
88 1.2 bouyer #include <machine/intr.h>
89 1.2 bouyer #include <machine/bus.h>
90 1.2 bouyer #ifndef __BUS_SPACE_HAS_STREAM_METHODS
91 1.2 bouyer #define bus_space_write_multi_stream_2 bus_space_write_multi_2
92 1.2 bouyer #define bus_space_write_multi_stream_4 bus_space_write_multi_4
93 1.2 bouyer #define bus_space_read_multi_stream_2 bus_space_read_multi_2
94 1.2 bouyer #define bus_space_read_multi_stream_4 bus_space_read_multi_4
95 1.2 bouyer #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
96 1.2 bouyer
97 1.2 bouyer #include <dev/ata/atareg.h>
98 1.2 bouyer #include <dev/ata/atavar.h>
99 1.2 bouyer #include <dev/ic/wdcreg.h>
100 1.2 bouyer #include <dev/ic/wdcvar.h>
101 1.2 bouyer #include <dev/ata/wdvar.h>
102 1.2 bouyer
103 1.2 bouyer #define DEBUG_INTR 0x01
104 1.2 bouyer #define DEBUG_XFERS 0x02
105 1.2 bouyer #define DEBUG_STATUS 0x04
106 1.2 bouyer #define DEBUG_FUNCS 0x08
107 1.2 bouyer #define DEBUG_PROBE 0x10
108 1.2 bouyer #ifdef WDCDEBUG
109 1.3 thorpej int wdcdebug_wd_mask = 0;
110 1.2 bouyer #define WDCDEBUG_PRINT(args, level) \
111 1.2 bouyer if (wdcdebug_wd_mask & (level)) \
112 1.2 bouyer printf args
113 1.2 bouyer #else
114 1.2 bouyer #define WDCDEBUG_PRINT(args, level)
115 1.2 bouyer #endif
116 1.2 bouyer
117 1.17 bouyer #define ATA_DELAY 10000 /* 10s for a drive I/O */
118 1.2 bouyer
119 1.2 bouyer void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
120 1.20 bouyer void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
121 1.19 bouyer int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int));
122 1.22 enami void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *));
123 1.2 bouyer void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *));
124 1.19 bouyer int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int));
125 1.16 bouyer int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *));
126 1.2 bouyer #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
127 1.2 bouyer #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
128 1.2 bouyer #define WDC_ATA_ERR 0x02 /* Drive reports an error */
129 1.2 bouyer
130 1.2 bouyer /*
131 1.2 bouyer * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
132 1.2 bouyer * WDC_TRY_AGAIN. Must be called at splio().
133 1.2 bouyer */
134 1.2 bouyer int
135 1.2 bouyer wdc_ata_bio(drvp, ata_bio)
136 1.2 bouyer struct ata_drive_datas *drvp;
137 1.2 bouyer struct ata_bio *ata_bio;
138 1.2 bouyer {
139 1.2 bouyer struct wdc_xfer *xfer;
140 1.2 bouyer struct channel_softc *chp = drvp->chnl_softc;
141 1.2 bouyer
142 1.2 bouyer xfer = wdc_get_xfer(WDC_NOSLEEP);
143 1.2 bouyer if (xfer == NULL)
144 1.2 bouyer return WDC_TRY_AGAIN;
145 1.2 bouyer if (ata_bio->flags & ATA_POLL)
146 1.2 bouyer xfer->c_flags |= C_POLL;
147 1.2 bouyer if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
148 1.2 bouyer (ata_bio->flags & ATA_SINGLE) == 0)
149 1.2 bouyer xfer->c_flags |= C_DMA;
150 1.2 bouyer xfer->drive = drvp->drive;
151 1.2 bouyer xfer->cmd = ata_bio;
152 1.2 bouyer xfer->databuf = ata_bio->databuf;
153 1.2 bouyer xfer->c_bcount = ata_bio->bcount;
154 1.2 bouyer xfer->c_start = wdc_ata_bio_start;
155 1.2 bouyer xfer->c_intr = wdc_ata_bio_intr;
156 1.22 enami xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
157 1.2 bouyer wdc_exec_xfer(chp, xfer);
158 1.2 bouyer return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
159 1.2 bouyer }
160 1.2 bouyer
161 1.2 bouyer void
162 1.2 bouyer wdc_ata_bio_start(chp, xfer)
163 1.2 bouyer struct channel_softc *chp;
164 1.2 bouyer struct wdc_xfer *xfer;
165 1.2 bouyer {
166 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
167 1.20 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
168 1.20 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
169 1.20 bouyer DEBUG_XFERS);
170 1.20 bouyer
171 1.20 bouyer /* start timeout machinery */
172 1.20 bouyer if ((ata_bio->flags & ATA_POLL) == 0)
173 1.20 bouyer timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
174 1.20 bouyer _wdc_ata_bio_start(chp, xfer);
175 1.20 bouyer }
176 1.20 bouyer
177 1.20 bouyer void
178 1.20 bouyer _wdc_ata_bio_start(chp, xfer)
179 1.20 bouyer struct channel_softc *chp;
180 1.20 bouyer struct wdc_xfer *xfer;
181 1.20 bouyer {
182 1.20 bouyer struct ata_bio *ata_bio = xfer->cmd;
183 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
184 1.2 bouyer u_int16_t cyl;
185 1.2 bouyer u_int8_t head, sect, cmd = 0;
186 1.2 bouyer int nblks;
187 1.16 bouyer int ata_delay;
188 1.2 bouyer int dma_flags = 0;
189 1.2 bouyer
190 1.20 bouyer WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
191 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
192 1.20 bouyer DEBUG_INTR | DEBUG_XFERS);
193 1.2 bouyer /* Do control operations specially. */
194 1.2 bouyer if (drvp->state < READY) {
195 1.2 bouyer /*
196 1.2 bouyer * Actually, we want to be careful not to mess with the control
197 1.2 bouyer * state if the device is currently busy, but we can assume
198 1.2 bouyer * that we never get to this point if that's the case.
199 1.2 bouyer */
200 1.2 bouyer /* at this point, we should only be in RECAL state */
201 1.2 bouyer if (drvp->state != RECAL) {
202 1.20 bouyer printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n",
203 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
204 1.2 bouyer xfer->drive, drvp->state);
205 1.20 bouyer panic("_wdc_ata_bio_start: bad state");
206 1.2 bouyer }
207 1.2 bouyer xfer->c_intr = wdc_ata_ctrl_intr;
208 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
209 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
210 1.17 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
211 1.2 bouyer goto timeout;
212 1.2 bouyer wdccommandshort(chp, xfer->drive, WDCC_RECAL);
213 1.2 bouyer drvp->state = RECAL_WAIT;
214 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
215 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
216 1.2 bouyer } else {
217 1.2 bouyer /* Wait for at last 400ns for status bit to be valid */
218 1.19 bouyer DELAY(1);
219 1.19 bouyer wdc_ata_ctrl_intr(chp, xfer, 0);
220 1.2 bouyer }
221 1.2 bouyer return;
222 1.2 bouyer }
223 1.2 bouyer
224 1.2 bouyer if (xfer->c_flags & C_DMA) {
225 1.2 bouyer dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
226 1.2 bouyer dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0;
227 1.2 bouyer }
228 1.16 bouyer if (ata_bio->flags & ATA_SINGLE)
229 1.17 bouyer ata_delay = ATA_DELAY;
230 1.16 bouyer else
231 1.17 bouyer ata_delay = ATA_DELAY;
232 1.2 bouyer again:
233 1.2 bouyer /*
234 1.2 bouyer *
235 1.2 bouyer * When starting a multi-sector transfer, or doing single-sector
236 1.2 bouyer * transfers...
237 1.2 bouyer */
238 1.2 bouyer if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
239 1.2 bouyer if (ata_bio->flags & ATA_SINGLE)
240 1.2 bouyer nblks = 1;
241 1.2 bouyer else
242 1.2 bouyer nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
243 1.2 bouyer /* Check for bad sectors and adjust transfer, if necessary. */
244 1.2 bouyer if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
245 1.2 bouyer long blkdiff;
246 1.2 bouyer int i;
247 1.2 bouyer for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
248 1.2 bouyer i++) {
249 1.2 bouyer blkdiff -= ata_bio->blkno;
250 1.2 bouyer if (blkdiff < 0)
251 1.2 bouyer continue;
252 1.2 bouyer if (blkdiff == 0) {
253 1.2 bouyer /* Replace current block of transfer. */
254 1.2 bouyer ata_bio->blkno =
255 1.2 bouyer ata_bio->lp->d_secperunit -
256 1.2 bouyer ata_bio->lp->d_nsectors - i - 1;
257 1.2 bouyer }
258 1.2 bouyer if (blkdiff < nblks) {
259 1.2 bouyer /* Bad block inside transfer. */
260 1.2 bouyer ata_bio->flags |= ATA_SINGLE;
261 1.2 bouyer nblks = 1;
262 1.2 bouyer }
263 1.2 bouyer break;
264 1.2 bouyer }
265 1.2 bouyer /* Transfer is okay now. */
266 1.2 bouyer }
267 1.2 bouyer if (ata_bio->flags & ATA_LBA) {
268 1.2 bouyer sect = (ata_bio->blkno >> 0) & 0xff;
269 1.2 bouyer cyl = (ata_bio->blkno >> 8) & 0xffff;
270 1.2 bouyer head = (ata_bio->blkno >> 24) & 0x0f;
271 1.2 bouyer head |= WDSD_LBA;
272 1.2 bouyer } else {
273 1.2 bouyer int blkno = ata_bio->blkno;
274 1.2 bouyer sect = blkno % ata_bio->lp->d_nsectors;
275 1.2 bouyer sect++; /* Sectors begin with 1, not 0. */
276 1.2 bouyer blkno /= ata_bio->lp->d_nsectors;
277 1.2 bouyer head = blkno % ata_bio->lp->d_ntracks;
278 1.2 bouyer blkno /= ata_bio->lp->d_ntracks;
279 1.2 bouyer cyl = blkno;
280 1.2 bouyer head |= WDSD_CHS;
281 1.2 bouyer }
282 1.2 bouyer if (xfer->c_flags & C_DMA) {
283 1.2 bouyer ata_bio->nblks = nblks;
284 1.2 bouyer ata_bio->nbytes = xfer->c_bcount;
285 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
286 1.2 bouyer WDCC_READDMA : WDCC_WRITEDMA;
287 1.2 bouyer nblks = ata_bio->nblks;
288 1.2 bouyer /* Init the DMA channel. */
289 1.2 bouyer if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
290 1.2 bouyer chp->channel, xfer->drive,
291 1.11 augustss (char *)xfer->databuf + xfer->c_skip,
292 1.11 augustss ata_bio->nbytes, dma_flags) != 0) {
293 1.2 bouyer ata_bio->error = ERR_DMA;
294 1.2 bouyer ata_bio->r_error = 0;
295 1.2 bouyer wdc_ata_bio_done(chp, xfer);
296 1.2 bouyer return;
297 1.2 bouyer }
298 1.2 bouyer /* Initiate command */
299 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
300 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
301 1.16 bouyer if (wait_for_ready(chp, ata_delay) < 0)
302 1.2 bouyer goto timeout;
303 1.2 bouyer wdccommand(chp, xfer->drive, cmd, cyl,
304 1.2 bouyer head, sect, nblks, 0);
305 1.2 bouyer /* start the DMA channel */
306 1.2 bouyer (*chp->wdc->dma_start)(chp->wdc->dma_arg,
307 1.2 bouyer chp->channel, xfer->drive, dma_flags);
308 1.2 bouyer /* wait for irq */
309 1.2 bouyer goto intr;
310 1.2 bouyer } /* else not DMA */
311 1.2 bouyer ata_bio->nblks = min(nblks, ata_bio->multi);
312 1.2 bouyer ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
313 1.2 bouyer if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
314 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
315 1.2 bouyer WDCC_READMULTI : WDCC_WRITEMULTI;
316 1.2 bouyer } else {
317 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
318 1.2 bouyer WDCC_READ : WDCC_WRITE;
319 1.2 bouyer }
320 1.2 bouyer /* Initiate command! */
321 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
322 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
323 1.16 bouyer if (wait_for_ready(chp, ata_delay) < 0)
324 1.2 bouyer goto timeout;
325 1.2 bouyer wdccommand(chp, xfer->drive, cmd, cyl,
326 1.2 bouyer head, sect, nblks,
327 1.2 bouyer (ata_bio->lp->d_type == DTYPE_ST506) ?
328 1.2 bouyer ata_bio->lp->d_precompcyl / 4 : 0);
329 1.2 bouyer } else if (ata_bio->nblks > 1) {
330 1.2 bouyer /* The number of blocks in the last stretch may be smaller. */
331 1.2 bouyer nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
332 1.2 bouyer if (ata_bio->nblks > nblks) {
333 1.2 bouyer ata_bio->nblks = nblks;
334 1.2 bouyer ata_bio->nbytes = xfer->c_bcount;
335 1.2 bouyer }
336 1.2 bouyer }
337 1.2 bouyer /* If this was a write and not using DMA, push the data. */
338 1.2 bouyer if ((ata_bio->flags & ATA_READ) == 0) {
339 1.16 bouyer if (wait_for_drq(chp, ata_delay) != 0) {
340 1.2 bouyer printf("%s:%d:%d: timeout waiting for DRQ, "
341 1.2 bouyer "st=0x%02x, err=0x%02x\n",
342 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
343 1.2 bouyer xfer->drive, chp->ch_status, chp->ch_error);
344 1.16 bouyer if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
345 1.2 bouyer ata_bio->error = TIMEOUT;
346 1.2 bouyer wdc_ata_bio_done(chp, xfer);
347 1.2 bouyer return;
348 1.2 bouyer }
349 1.16 bouyer if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
350 1.2 bouyer wdc_ata_bio_done(chp, xfer);
351 1.2 bouyer return;
352 1.2 bouyer }
353 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
354 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
355 1.2 bouyer bus_space_write_multi_4(chp->data32iot,
356 1.2 bouyer chp->data32ioh, 0,
357 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
358 1.12 thorpej xfer->c_skip),
359 1.2 bouyer ata_bio->nbytes >> 2);
360 1.2 bouyer } else {
361 1.2 bouyer bus_space_write_multi_2(chp->cmd_iot,
362 1.2 bouyer chp->cmd_ioh, wd_data,
363 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
364 1.12 thorpej xfer->c_skip),
365 1.2 bouyer ata_bio->nbytes >> 1);
366 1.2 bouyer }
367 1.2 bouyer } else {
368 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
369 1.2 bouyer bus_space_write_multi_stream_4(chp->data32iot,
370 1.2 bouyer chp->data32ioh, 0,
371 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
372 1.12 thorpej xfer->c_skip),
373 1.2 bouyer ata_bio->nbytes >> 2);
374 1.2 bouyer } else {
375 1.2 bouyer bus_space_write_multi_stream_2(chp->cmd_iot,
376 1.2 bouyer chp->cmd_ioh, wd_data,
377 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
378 1.12 thorpej xfer->c_skip),
379 1.2 bouyer ata_bio->nbytes >> 1);
380 1.2 bouyer }
381 1.2 bouyer }
382 1.2 bouyer }
383 1.2 bouyer
384 1.2 bouyer intr: /* Wait for IRQ (either real or polled) */
385 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
386 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
387 1.2 bouyer } else {
388 1.2 bouyer /* Wait for at last 400ns for status bit to be valid */
389 1.2 bouyer delay(1);
390 1.19 bouyer wdc_ata_bio_intr(chp, xfer, 0);
391 1.2 bouyer if ((ata_bio->flags & ATA_ITSDONE) == 0)
392 1.2 bouyer goto again;
393 1.2 bouyer }
394 1.2 bouyer return;
395 1.2 bouyer timeout:
396 1.2 bouyer printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
397 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
398 1.2 bouyer chp->ch_status, chp->ch_error);
399 1.16 bouyer if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
400 1.2 bouyer ata_bio->error = TIMEOUT;
401 1.2 bouyer wdc_ata_bio_done(chp, xfer);
402 1.2 bouyer return;
403 1.2 bouyer }
404 1.2 bouyer
405 1.2 bouyer int
406 1.19 bouyer wdc_ata_bio_intr(chp, xfer, irq)
407 1.2 bouyer struct channel_softc *chp;
408 1.2 bouyer struct wdc_xfer *xfer;
409 1.19 bouyer int irq;
410 1.2 bouyer {
411 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
412 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
413 1.2 bouyer int drv_err;
414 1.2 bouyer int dma_flags = 0;
415 1.2 bouyer
416 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
417 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
418 1.2 bouyer DEBUG_INTR | DEBUG_XFERS);
419 1.2 bouyer
420 1.2 bouyer
421 1.2 bouyer /* Is it not a transfer, but a control operation? */
422 1.2 bouyer if (drvp->state < READY) {
423 1.2 bouyer printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
424 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
425 1.2 bouyer drvp->state);
426 1.2 bouyer panic("wdc_ata_bio_intr: bad state\n");
427 1.2 bouyer }
428 1.2 bouyer
429 1.2 bouyer if (xfer->c_flags & C_DMA) {
430 1.2 bouyer dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
431 1.2 bouyer dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0;
432 1.2 bouyer }
433 1.2 bouyer
434 1.20 bouyer /*
435 1.20 bouyer * if we missed an interrupt in a PIO transfer, reset and restart.
436 1.20 bouyer * Don't try to continue transfer, we may have missed cycles.
437 1.20 bouyer */
438 1.20 bouyer if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
439 1.20 bouyer ata_bio->error = TIMEOUT;
440 1.20 bouyer wdc_ata_bio_done(chp, xfer);
441 1.20 bouyer return 1;
442 1.20 bouyer }
443 1.20 bouyer
444 1.2 bouyer /* Ack interrupt done by wait_for_unbusy */
445 1.18 bouyer if (wait_for_unbusy(chp,
446 1.19 bouyer (irq == 0) ? ATA_DELAY : 0) < 0) {
447 1.19 bouyer if (irq && (xfer->c_flags & C_TIMEOU) == 0)
448 1.18 bouyer return 0; /* IRQ was not for us */
449 1.2 bouyer printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
450 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
451 1.2 bouyer xfer->c_bcount, xfer->c_skip);
452 1.2 bouyer /* if we were using DMA, turn off DMA channel */
453 1.10 bouyer if (xfer->c_flags & C_DMA) {
454 1.2 bouyer (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
455 1.2 bouyer chp->channel, xfer->drive, dma_flags);
456 1.10 bouyer drvp->n_dmaerrs++;
457 1.10 bouyer }
458 1.2 bouyer ata_bio->error = TIMEOUT;
459 1.2 bouyer wdc_ata_bio_done(chp, xfer);
460 1.2 bouyer return 1;
461 1.2 bouyer }
462 1.2 bouyer
463 1.16 bouyer drv_err = wdc_ata_err(drvp, ata_bio);
464 1.2 bouyer
465 1.2 bouyer /* If we were using DMA, Turn off the DMA channel and check for error */
466 1.2 bouyer if (xfer->c_flags & C_DMA) {
467 1.2 bouyer if (ata_bio->flags & ATA_POLL) {
468 1.2 bouyer /*
469 1.13 bouyer * IDE drives deassert WDCS_BSY before transfer is
470 1.2 bouyer * complete when using DMA. Polling for DRQ to deassert
471 1.2 bouyer * is not enouth DRQ is not required to be
472 1.7 bouyer * asserted for DMA transfers, so poll for DRDY.
473 1.2 bouyer */
474 1.2 bouyer if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
475 1.17 bouyer ATA_DELAY) < 0) {
476 1.7 bouyer printf("%s:%d:%d: polled transfer timed out "
477 1.2 bouyer "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
478 1.2 bouyer chp->channel, xfer->drive, chp->ch_status);
479 1.2 bouyer ata_bio->error = TIMEOUT;
480 1.10 bouyer drv_err = WDC_ATA_ERR;
481 1.10 bouyer }
482 1.10 bouyer }
483 1.10 bouyer if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg,
484 1.10 bouyer chp->channel, xfer->drive, dma_flags) != 0) {
485 1.10 bouyer if (drv_err != WDC_ATA_ERR) {
486 1.10 bouyer ata_bio->error = ERR_DMA;
487 1.10 bouyer drv_err = WDC_ATA_ERR;
488 1.2 bouyer }
489 1.2 bouyer }
490 1.2 bouyer if (chp->ch_status & WDCS_DRQ) {
491 1.2 bouyer if (drv_err != WDC_ATA_ERR) {
492 1.2 bouyer printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
493 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
494 1.2 bouyer xfer->drive, chp->ch_status);
495 1.2 bouyer ata_bio->error = TIMEOUT;
496 1.2 bouyer drv_err = WDC_ATA_ERR;
497 1.2 bouyer }
498 1.2 bouyer }
499 1.2 bouyer if (drv_err != WDC_ATA_ERR)
500 1.2 bouyer goto end;
501 1.10 bouyer drvp->n_dmaerrs++;
502 1.2 bouyer }
503 1.2 bouyer
504 1.2 bouyer /* if we had an error, end */
505 1.2 bouyer if (drv_err == WDC_ATA_ERR) {
506 1.2 bouyer wdc_ata_bio_done(chp, xfer);
507 1.2 bouyer return 1;
508 1.2 bouyer }
509 1.2 bouyer
510 1.2 bouyer /* If this was a read and not using DMA, fetch the data. */
511 1.2 bouyer if ((ata_bio->flags & ATA_READ) != 0) {
512 1.14 bouyer if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
513 1.2 bouyer printf("%s:%d:%d: read intr before drq\n",
514 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
515 1.2 bouyer xfer->drive);
516 1.2 bouyer ata_bio->error = TIMEOUT;
517 1.2 bouyer wdc_ata_bio_done(chp, xfer);
518 1.2 bouyer return 1;
519 1.2 bouyer }
520 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
521 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
522 1.2 bouyer bus_space_read_multi_4(chp->data32iot,
523 1.2 bouyer chp->data32ioh, 0,
524 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
525 1.12 thorpej xfer->c_skip),
526 1.2 bouyer ata_bio->nbytes >> 2);
527 1.2 bouyer } else {
528 1.2 bouyer bus_space_read_multi_2(chp->cmd_iot,
529 1.2 bouyer chp->cmd_ioh, wd_data,
530 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
531 1.12 thorpej xfer->c_skip),
532 1.2 bouyer ata_bio->nbytes >> 1);
533 1.2 bouyer }
534 1.2 bouyer } else {
535 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
536 1.2 bouyer bus_space_read_multi_stream_4(chp->data32iot,
537 1.2 bouyer chp->data32ioh, 0,
538 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
539 1.12 thorpej xfer->c_skip),
540 1.2 bouyer ata_bio->nbytes >> 2);
541 1.2 bouyer } else {
542 1.2 bouyer bus_space_read_multi_stream_2(chp->cmd_iot,
543 1.2 bouyer chp->cmd_ioh, wd_data,
544 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
545 1.12 thorpej xfer->c_skip),
546 1.2 bouyer ata_bio->nbytes >> 1);
547 1.2 bouyer }
548 1.2 bouyer }
549 1.2 bouyer }
550 1.2 bouyer
551 1.2 bouyer end:
552 1.2 bouyer ata_bio->blkno += ata_bio->nblks;
553 1.2 bouyer ata_bio->blkdone += ata_bio->nblks;
554 1.2 bouyer xfer->c_skip += ata_bio->nbytes;
555 1.2 bouyer xfer->c_bcount -= ata_bio->nbytes;
556 1.2 bouyer /* See if this transfer is complete. */
557 1.2 bouyer if (xfer->c_bcount > 0) {
558 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
559 1.2 bouyer /* Start the next operation */
560 1.20 bouyer _wdc_ata_bio_start(chp, xfer);
561 1.2 bouyer } else {
562 1.20 bouyer /* Let _wdc_ata_bio_start do the loop */
563 1.2 bouyer return 1;
564 1.2 bouyer }
565 1.2 bouyer } else { /* Done with this transfer */
566 1.2 bouyer ata_bio->error = NOERROR;
567 1.2 bouyer wdc_ata_bio_done(chp, xfer);
568 1.2 bouyer }
569 1.2 bouyer return 1;
570 1.22 enami }
571 1.22 enami
572 1.22 enami void
573 1.22 enami wdc_ata_kill_pending(drvp)
574 1.22 enami struct ata_drive_datas *drvp;
575 1.22 enami {
576 1.22 enami struct channel_softc *chp = drvp->chnl_softc;
577 1.22 enami
578 1.22 enami wdc_kill_pending(chp);
579 1.22 enami }
580 1.22 enami
581 1.22 enami void
582 1.22 enami wdc_ata_bio_kill_xfer(chp, xfer)
583 1.22 enami struct channel_softc *chp;
584 1.22 enami struct wdc_xfer *xfer;
585 1.22 enami {
586 1.22 enami struct ata_bio *ata_bio = xfer->cmd;
587 1.22 enami int drive = xfer->drive;
588 1.22 enami
589 1.22 enami untimeout(wdctimeout, chp);
590 1.22 enami /* remove this command from xfer queue */
591 1.22 enami wdc_free_xfer(chp, xfer);
592 1.22 enami
593 1.22 enami ata_bio->flags |= ATA_ITSDONE;
594 1.22 enami ata_bio->error = ERR_NODEV;
595 1.22 enami ata_bio->r_error = WDCE_ABRT;
596 1.22 enami if ((ata_bio->flags & ATA_POLL) == 0) {
597 1.22 enami WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
598 1.22 enami wddone(chp->ch_drive[drive].drv_softc);
599 1.22 enami }
600 1.2 bouyer }
601 1.2 bouyer
602 1.2 bouyer void
603 1.2 bouyer wdc_ata_bio_done(chp, xfer)
604 1.2 bouyer struct channel_softc *chp;
605 1.2 bouyer struct wdc_xfer *xfer;
606 1.2 bouyer {
607 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
608 1.2 bouyer int drive = xfer->drive;
609 1.10 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[drive];
610 1.2 bouyer
611 1.5 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
612 1.5 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
613 1.5 bouyer (u_int)xfer->c_flags),
614 1.4 bouyer DEBUG_XFERS);
615 1.10 bouyer
616 1.20 bouyer untimeout(wdctimeout, chp);
617 1.10 bouyer if (ata_bio->error == NOERROR)
618 1.10 bouyer drvp->n_dmaerrs = 0;
619 1.10 bouyer else if (drvp->n_dmaerrs >= NERRS_MAX) {
620 1.10 bouyer wdc_downgrade_mode(drvp);
621 1.10 bouyer }
622 1.2 bouyer
623 1.2 bouyer /* feed back residual bcount to our caller */
624 1.2 bouyer ata_bio->bcount = xfer->c_bcount;
625 1.2 bouyer
626 1.2 bouyer /* remove this command from xfer queue */
627 1.2 bouyer wdc_free_xfer(chp, xfer);
628 1.2 bouyer
629 1.2 bouyer ata_bio->flags |= ATA_ITSDONE;
630 1.21 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
631 1.4 bouyer WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
632 1.2 bouyer wddone(chp->ch_drive[drive].drv_softc);
633 1.2 bouyer }
634 1.2 bouyer WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
635 1.4 bouyer chp->ch_flags), DEBUG_XFERS);
636 1.9 drochner wdcstart(chp);
637 1.2 bouyer }
638 1.2 bouyer
639 1.2 bouyer /*
640 1.2 bouyer * Implement operations needed before read/write.
641 1.2 bouyer */
642 1.2 bouyer int
643 1.19 bouyer wdc_ata_ctrl_intr(chp, xfer, irq)
644 1.2 bouyer struct channel_softc *chp;
645 1.2 bouyer struct wdc_xfer *xfer;
646 1.19 bouyer int irq;
647 1.2 bouyer {
648 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
649 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
650 1.2 bouyer char *errstring = NULL;
651 1.19 bouyer int delay = (irq == 0) ? ATA_DELAY : 0;
652 1.18 bouyer
653 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
654 1.18 bouyer DEBUG_FUNCS);
655 1.2 bouyer
656 1.2 bouyer again:
657 1.2 bouyer switch (drvp->state) {
658 1.2 bouyer case RECAL: /* Should not be in this state here */
659 1.2 bouyer panic("wdc_ata_ctrl_intr: state==RECAL");
660 1.2 bouyer break;
661 1.2 bouyer
662 1.2 bouyer case RECAL_WAIT:
663 1.2 bouyer errstring = "recal";
664 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
665 1.2 bouyer goto timeout;
666 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
667 1.2 bouyer goto error;
668 1.2 bouyer /* fall through */
669 1.2 bouyer
670 1.2 bouyer case PIOMODE:
671 1.2 bouyer /* Don't try to set modes if controller can't be adjusted */
672 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
673 1.6 bouyer goto geometry;
674 1.6 bouyer /* Also don't try if the drive didn't report its mode */
675 1.6 bouyer if ((drvp->drive_flags & DRIVE_MODE) == 0)
676 1.2 bouyer goto geometry;
677 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
678 1.2 bouyer 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
679 1.2 bouyer drvp->state = PIOMODE_WAIT;
680 1.2 bouyer break;
681 1.2 bouyer
682 1.2 bouyer case PIOMODE_WAIT:
683 1.2 bouyer errstring = "piomode";
684 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
685 1.2 bouyer goto timeout;
686 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
687 1.2 bouyer goto error;
688 1.2 bouyer /* fall through */
689 1.2 bouyer
690 1.2 bouyer case DMAMODE:
691 1.2 bouyer if (drvp->drive_flags & DRIVE_UDMA) {
692 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
693 1.2 bouyer 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
694 1.2 bouyer } else if (drvp->drive_flags & DRIVE_DMA) {
695 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
696 1.2 bouyer 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
697 1.2 bouyer } else {
698 1.2 bouyer goto geometry;
699 1.2 bouyer }
700 1.2 bouyer drvp->state = DMAMODE_WAIT;
701 1.2 bouyer break;
702 1.2 bouyer case DMAMODE_WAIT:
703 1.2 bouyer errstring = "dmamode";
704 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
705 1.2 bouyer goto timeout;
706 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
707 1.2 bouyer goto error;
708 1.2 bouyer /* fall through */
709 1.2 bouyer
710 1.2 bouyer case GEOMETRY:
711 1.2 bouyer geometry:
712 1.2 bouyer if (ata_bio->flags & ATA_LBA)
713 1.2 bouyer goto multimode;
714 1.2 bouyer wdccommand(chp, xfer->drive, WDCC_IDP,
715 1.2 bouyer ata_bio->lp->d_ncylinders,
716 1.2 bouyer ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
717 1.2 bouyer (ata_bio->lp->d_type == DTYPE_ST506) ?
718 1.2 bouyer ata_bio->lp->d_precompcyl / 4 : 0);
719 1.2 bouyer drvp->state = GEOMETRY_WAIT;
720 1.2 bouyer break;
721 1.2 bouyer
722 1.2 bouyer case GEOMETRY_WAIT:
723 1.2 bouyer errstring = "geometry";
724 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
725 1.2 bouyer goto timeout;
726 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
727 1.2 bouyer goto error;
728 1.2 bouyer /* fall through */
729 1.2 bouyer
730 1.2 bouyer case MULTIMODE:
731 1.2 bouyer multimode:
732 1.2 bouyer if (ata_bio->multi == 1)
733 1.2 bouyer goto ready;
734 1.2 bouyer wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
735 1.2 bouyer ata_bio->multi, 0);
736 1.2 bouyer drvp->state = MULTIMODE_WAIT;
737 1.2 bouyer break;
738 1.2 bouyer
739 1.2 bouyer case MULTIMODE_WAIT:
740 1.2 bouyer errstring = "setmulti";
741 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
742 1.2 bouyer goto timeout;
743 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
744 1.2 bouyer goto error;
745 1.2 bouyer /* fall through */
746 1.2 bouyer
747 1.2 bouyer case READY:
748 1.2 bouyer ready:
749 1.2 bouyer drvp->state = READY;
750 1.2 bouyer /*
751 1.2 bouyer * The drive is usable now
752 1.2 bouyer */
753 1.2 bouyer xfer->c_intr = wdc_ata_bio_intr;
754 1.20 bouyer _wdc_ata_bio_start(chp, xfer);
755 1.2 bouyer return 1;
756 1.2 bouyer }
757 1.2 bouyer
758 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
759 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
760 1.2 bouyer } else {
761 1.2 bouyer goto again;
762 1.2 bouyer }
763 1.2 bouyer return 1;
764 1.2 bouyer
765 1.2 bouyer timeout:
766 1.19 bouyer if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
767 1.2 bouyer return 0; /* IRQ was not for us */
768 1.2 bouyer }
769 1.2 bouyer printf("%s:%d:%d: %s timed out\n",
770 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
771 1.2 bouyer ata_bio->error = TIMEOUT;
772 1.2 bouyer drvp->state = 0;
773 1.2 bouyer wdc_ata_bio_done(chp, xfer);
774 1.2 bouyer return 0;
775 1.2 bouyer error:
776 1.2 bouyer printf("%s:%d:%d: %s ",
777 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
778 1.2 bouyer errstring);
779 1.2 bouyer if (chp->ch_status & WDCS_DWF) {
780 1.2 bouyer printf("drive fault\n");
781 1.2 bouyer ata_bio->error = ERR_DF;
782 1.2 bouyer } else {
783 1.2 bouyer printf("error (%x)\n", chp->ch_error);
784 1.2 bouyer ata_bio->r_error = chp->ch_error;
785 1.2 bouyer ata_bio->error = ERROR;
786 1.2 bouyer }
787 1.2 bouyer drvp->state = 0;
788 1.2 bouyer wdc_ata_bio_done(chp, xfer);
789 1.2 bouyer return 1;
790 1.2 bouyer }
791 1.2 bouyer
792 1.2 bouyer int
793 1.16 bouyer wdc_ata_err(drvp, ata_bio)
794 1.16 bouyer struct ata_drive_datas *drvp;
795 1.2 bouyer struct ata_bio *ata_bio;
796 1.2 bouyer {
797 1.16 bouyer struct channel_softc *chp = drvp->chnl_softc;
798 1.2 bouyer ata_bio->error = 0;
799 1.2 bouyer if (chp->ch_status & WDCS_BSY) {
800 1.2 bouyer ata_bio->error = TIMEOUT;
801 1.2 bouyer return WDC_ATA_ERR;
802 1.2 bouyer }
803 1.2 bouyer
804 1.2 bouyer if (chp->ch_status & WDCS_DWF) {
805 1.2 bouyer ata_bio->error = ERR_DF;
806 1.2 bouyer return WDC_ATA_ERR;
807 1.2 bouyer }
808 1.2 bouyer
809 1.2 bouyer if (chp->ch_status & WDCS_ERR) {
810 1.2 bouyer ata_bio->error = ERROR;
811 1.2 bouyer ata_bio->r_error = chp->ch_error;
812 1.16 bouyer if (drvp->drive_flags & DRIVE_UDMA &&
813 1.16 bouyer (ata_bio->r_error & WDCE_CRC)) {
814 1.16 bouyer /*
815 1.16 bouyer * Record the CRC error, to avoid downgrading to
816 1.16 bouyer * multiword DMA
817 1.16 bouyer */
818 1.16 bouyer drvp->drive_flags |= DRIVE_DMAERR;
819 1.16 bouyer }
820 1.2 bouyer if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
821 1.2 bouyer WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
822 1.2 bouyer return WDC_ATA_ERR;
823 1.2 bouyer return WDC_ATA_NOERR;
824 1.2 bouyer }
825 1.2 bouyer
826 1.2 bouyer if (chp->ch_status & WDCS_CORR)
827 1.2 bouyer ata_bio->flags |= ATA_CORR;
828 1.2 bouyer return WDC_ATA_NOERR;
829 1.8 thorpej }
830 1.8 thorpej
831 1.8 thorpej int
832 1.8 thorpej wdc_ata_addref(drvp)
833 1.8 thorpej struct ata_drive_datas *drvp;
834 1.8 thorpej {
835 1.8 thorpej struct channel_softc *chp = drvp->chnl_softc;
836 1.8 thorpej
837 1.8 thorpej return (wdc_addref(chp));
838 1.8 thorpej }
839 1.8 thorpej
840 1.8 thorpej void
841 1.8 thorpej wdc_ata_delref(drvp)
842 1.8 thorpej struct ata_drive_datas *drvp;
843 1.8 thorpej {
844 1.8 thorpej struct channel_softc *chp = drvp->chnl_softc;
845 1.8 thorpej
846 1.8 thorpej wdc_delref(chp);
847 1.2 bouyer }
848