ata_wdc.c revision 1.29 1 1.29 jdolecek /* $NetBSD: ata_wdc.c,v 1.29 2001/04/18 05:40:03 jdolecek Exp $ */
2 1.2 bouyer
3 1.2 bouyer /*
4 1.2 bouyer * Copyright (c) 1998 Manuel Bouyer.
5 1.2 bouyer *
6 1.2 bouyer * Redistribution and use in source and binary forms, with or without
7 1.2 bouyer * modification, are permitted provided that the following conditions
8 1.2 bouyer * are met:
9 1.2 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.2 bouyer * notice, this list of conditions and the following disclaimer.
11 1.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.2 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.2 bouyer * documentation and/or other materials provided with the distribution.
14 1.2 bouyer * 3. All advertising materials mentioning features or use of this software
15 1.2 bouyer * must display the following acknowledgement:
16 1.2 bouyer * This product includes software developed by the University of
17 1.2 bouyer * California, Berkeley and its contributors.
18 1.2 bouyer * 4. Neither the name of the University nor the names of its contributors
19 1.2 bouyer * may be used to endorse or promote products derived from this software
20 1.2 bouyer * without specific prior written permission.
21 1.2 bouyer *
22 1.27 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.27 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.27 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.27 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.27 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.27 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.27 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.27 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.27 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.27 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.2 bouyer *
33 1.2 bouyer */
34 1.2 bouyer
35 1.2 bouyer /*-
36 1.2 bouyer * Copyright (c) 1998 The NetBSD Foundation, Inc.
37 1.2 bouyer * All rights reserved.
38 1.2 bouyer *
39 1.2 bouyer * This code is derived from software contributed to The NetBSD Foundation
40 1.2 bouyer * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
41 1.2 bouyer *
42 1.2 bouyer * Redistribution and use in source and binary forms, with or without
43 1.2 bouyer * modification, are permitted provided that the following conditions
44 1.2 bouyer * are met:
45 1.2 bouyer * 1. Redistributions of source code must retain the above copyright
46 1.2 bouyer * notice, this list of conditions and the following disclaimer.
47 1.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
48 1.2 bouyer * notice, this list of conditions and the following disclaimer in the
49 1.2 bouyer * documentation and/or other materials provided with the distribution.
50 1.2 bouyer * 3. All advertising materials mentioning features or use of this software
51 1.2 bouyer * must display the following acknowledgement:
52 1.2 bouyer * This product includes software developed by the NetBSD
53 1.2 bouyer * Foundation, Inc. and its contributors.
54 1.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its
55 1.2 bouyer * contributors may be used to endorse or promote products derived
56 1.2 bouyer * from this software without specific prior written permission.
57 1.2 bouyer *
58 1.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
59 1.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
60 1.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
61 1.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
62 1.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
63 1.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
64 1.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
65 1.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
66 1.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
67 1.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 1.2 bouyer * POSSIBILITY OF SUCH DAMAGE.
69 1.2 bouyer */
70 1.2 bouyer
71 1.15 hubertf #ifndef WDCDEBUG
72 1.2 bouyer #define WDCDEBUG
73 1.15 hubertf #endif /* WDCDEBUG */
74 1.2 bouyer
75 1.2 bouyer #include <sys/param.h>
76 1.2 bouyer #include <sys/systm.h>
77 1.2 bouyer #include <sys/kernel.h>
78 1.2 bouyer #include <sys/file.h>
79 1.2 bouyer #include <sys/stat.h>
80 1.2 bouyer #include <sys/buf.h>
81 1.2 bouyer #include <sys/malloc.h>
82 1.2 bouyer #include <sys/device.h>
83 1.2 bouyer #include <sys/disklabel.h>
84 1.2 bouyer #include <sys/syslog.h>
85 1.2 bouyer #include <sys/proc.h>
86 1.2 bouyer
87 1.2 bouyer #include <machine/intr.h>
88 1.2 bouyer #include <machine/bus.h>
89 1.2 bouyer #ifndef __BUS_SPACE_HAS_STREAM_METHODS
90 1.2 bouyer #define bus_space_write_multi_stream_2 bus_space_write_multi_2
91 1.2 bouyer #define bus_space_write_multi_stream_4 bus_space_write_multi_4
92 1.2 bouyer #define bus_space_read_multi_stream_2 bus_space_read_multi_2
93 1.2 bouyer #define bus_space_read_multi_stream_4 bus_space_read_multi_4
94 1.2 bouyer #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
95 1.2 bouyer
96 1.2 bouyer #include <dev/ata/atareg.h>
97 1.2 bouyer #include <dev/ata/atavar.h>
98 1.2 bouyer #include <dev/ic/wdcreg.h>
99 1.2 bouyer #include <dev/ic/wdcvar.h>
100 1.2 bouyer #include <dev/ata/wdvar.h>
101 1.2 bouyer
102 1.2 bouyer #define DEBUG_INTR 0x01
103 1.2 bouyer #define DEBUG_XFERS 0x02
104 1.2 bouyer #define DEBUG_STATUS 0x04
105 1.2 bouyer #define DEBUG_FUNCS 0x08
106 1.2 bouyer #define DEBUG_PROBE 0x10
107 1.2 bouyer #ifdef WDCDEBUG
108 1.3 thorpej int wdcdebug_wd_mask = 0;
109 1.2 bouyer #define WDCDEBUG_PRINT(args, level) \
110 1.2 bouyer if (wdcdebug_wd_mask & (level)) \
111 1.2 bouyer printf args
112 1.2 bouyer #else
113 1.2 bouyer #define WDCDEBUG_PRINT(args, level)
114 1.2 bouyer #endif
115 1.2 bouyer
116 1.17 bouyer #define ATA_DELAY 10000 /* 10s for a drive I/O */
117 1.2 bouyer
118 1.2 bouyer void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
119 1.20 bouyer void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
120 1.19 bouyer int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int));
121 1.22 enami void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *));
122 1.2 bouyer void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *));
123 1.19 bouyer int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int));
124 1.16 bouyer int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *));
125 1.2 bouyer #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
126 1.2 bouyer #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
127 1.2 bouyer #define WDC_ATA_ERR 0x02 /* Drive reports an error */
128 1.2 bouyer
129 1.2 bouyer /*
130 1.2 bouyer * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
131 1.29 jdolecek * WDC_TRY_AGAIN. Must be called at splbio().
132 1.2 bouyer */
133 1.2 bouyer int
134 1.2 bouyer wdc_ata_bio(drvp, ata_bio)
135 1.2 bouyer struct ata_drive_datas *drvp;
136 1.2 bouyer struct ata_bio *ata_bio;
137 1.2 bouyer {
138 1.2 bouyer struct wdc_xfer *xfer;
139 1.2 bouyer struct channel_softc *chp = drvp->chnl_softc;
140 1.2 bouyer
141 1.2 bouyer xfer = wdc_get_xfer(WDC_NOSLEEP);
142 1.2 bouyer if (xfer == NULL)
143 1.2 bouyer return WDC_TRY_AGAIN;
144 1.2 bouyer if (ata_bio->flags & ATA_POLL)
145 1.2 bouyer xfer->c_flags |= C_POLL;
146 1.2 bouyer if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
147 1.2 bouyer (ata_bio->flags & ATA_SINGLE) == 0)
148 1.2 bouyer xfer->c_flags |= C_DMA;
149 1.2 bouyer xfer->drive = drvp->drive;
150 1.2 bouyer xfer->cmd = ata_bio;
151 1.2 bouyer xfer->databuf = ata_bio->databuf;
152 1.2 bouyer xfer->c_bcount = ata_bio->bcount;
153 1.2 bouyer xfer->c_start = wdc_ata_bio_start;
154 1.2 bouyer xfer->c_intr = wdc_ata_bio_intr;
155 1.22 enami xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
156 1.2 bouyer wdc_exec_xfer(chp, xfer);
157 1.2 bouyer return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
158 1.2 bouyer }
159 1.2 bouyer
160 1.2 bouyer void
161 1.2 bouyer wdc_ata_bio_start(chp, xfer)
162 1.2 bouyer struct channel_softc *chp;
163 1.2 bouyer struct wdc_xfer *xfer;
164 1.2 bouyer {
165 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
166 1.20 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
167 1.20 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
168 1.20 bouyer DEBUG_XFERS);
169 1.20 bouyer
170 1.20 bouyer /* start timeout machinery */
171 1.20 bouyer if ((ata_bio->flags & ATA_POLL) == 0)
172 1.24 thorpej callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz,
173 1.24 thorpej wdctimeout, chp);
174 1.20 bouyer _wdc_ata_bio_start(chp, xfer);
175 1.20 bouyer }
176 1.20 bouyer
177 1.20 bouyer void
178 1.20 bouyer _wdc_ata_bio_start(chp, xfer)
179 1.20 bouyer struct channel_softc *chp;
180 1.20 bouyer struct wdc_xfer *xfer;
181 1.20 bouyer {
182 1.20 bouyer struct ata_bio *ata_bio = xfer->cmd;
183 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
184 1.2 bouyer u_int16_t cyl;
185 1.2 bouyer u_int8_t head, sect, cmd = 0;
186 1.2 bouyer int nblks;
187 1.16 bouyer int ata_delay;
188 1.2 bouyer int dma_flags = 0;
189 1.2 bouyer
190 1.20 bouyer WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
191 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
192 1.20 bouyer DEBUG_INTR | DEBUG_XFERS);
193 1.2 bouyer /* Do control operations specially. */
194 1.2 bouyer if (drvp->state < READY) {
195 1.2 bouyer /*
196 1.2 bouyer * Actually, we want to be careful not to mess with the control
197 1.2 bouyer * state if the device is currently busy, but we can assume
198 1.2 bouyer * that we never get to this point if that's the case.
199 1.2 bouyer */
200 1.2 bouyer /* at this point, we should only be in RECAL state */
201 1.26 bouyer if (drvp->state != RESET) {
202 1.20 bouyer printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n",
203 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
204 1.2 bouyer xfer->drive, drvp->state);
205 1.20 bouyer panic("_wdc_ata_bio_start: bad state");
206 1.2 bouyer }
207 1.26 bouyer drvp->state = RECAL;
208 1.2 bouyer xfer->c_intr = wdc_ata_ctrl_intr;
209 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
210 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
211 1.17 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
212 1.2 bouyer goto timeout;
213 1.2 bouyer wdccommandshort(chp, xfer->drive, WDCC_RECAL);
214 1.2 bouyer drvp->state = RECAL_WAIT;
215 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
216 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
217 1.2 bouyer } else {
218 1.2 bouyer /* Wait for at last 400ns for status bit to be valid */
219 1.19 bouyer DELAY(1);
220 1.19 bouyer wdc_ata_ctrl_intr(chp, xfer, 0);
221 1.2 bouyer }
222 1.2 bouyer return;
223 1.2 bouyer }
224 1.2 bouyer
225 1.2 bouyer if (xfer->c_flags & C_DMA) {
226 1.23 bouyer if (drvp->n_xfers <= NXFER)
227 1.23 bouyer drvp->n_xfers++;
228 1.2 bouyer dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
229 1.2 bouyer }
230 1.16 bouyer if (ata_bio->flags & ATA_SINGLE)
231 1.17 bouyer ata_delay = ATA_DELAY;
232 1.16 bouyer else
233 1.17 bouyer ata_delay = ATA_DELAY;
234 1.2 bouyer again:
235 1.2 bouyer /*
236 1.2 bouyer *
237 1.2 bouyer * When starting a multi-sector transfer, or doing single-sector
238 1.2 bouyer * transfers...
239 1.2 bouyer */
240 1.2 bouyer if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
241 1.2 bouyer if (ata_bio->flags & ATA_SINGLE)
242 1.2 bouyer nblks = 1;
243 1.2 bouyer else
244 1.2 bouyer nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
245 1.2 bouyer /* Check for bad sectors and adjust transfer, if necessary. */
246 1.2 bouyer if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
247 1.2 bouyer long blkdiff;
248 1.2 bouyer int i;
249 1.2 bouyer for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
250 1.2 bouyer i++) {
251 1.2 bouyer blkdiff -= ata_bio->blkno;
252 1.2 bouyer if (blkdiff < 0)
253 1.2 bouyer continue;
254 1.2 bouyer if (blkdiff == 0) {
255 1.2 bouyer /* Replace current block of transfer. */
256 1.2 bouyer ata_bio->blkno =
257 1.2 bouyer ata_bio->lp->d_secperunit -
258 1.2 bouyer ata_bio->lp->d_nsectors - i - 1;
259 1.2 bouyer }
260 1.2 bouyer if (blkdiff < nblks) {
261 1.2 bouyer /* Bad block inside transfer. */
262 1.2 bouyer ata_bio->flags |= ATA_SINGLE;
263 1.2 bouyer nblks = 1;
264 1.2 bouyer }
265 1.2 bouyer break;
266 1.2 bouyer }
267 1.2 bouyer /* Transfer is okay now. */
268 1.2 bouyer }
269 1.2 bouyer if (ata_bio->flags & ATA_LBA) {
270 1.2 bouyer sect = (ata_bio->blkno >> 0) & 0xff;
271 1.2 bouyer cyl = (ata_bio->blkno >> 8) & 0xffff;
272 1.2 bouyer head = (ata_bio->blkno >> 24) & 0x0f;
273 1.2 bouyer head |= WDSD_LBA;
274 1.2 bouyer } else {
275 1.2 bouyer int blkno = ata_bio->blkno;
276 1.2 bouyer sect = blkno % ata_bio->lp->d_nsectors;
277 1.2 bouyer sect++; /* Sectors begin with 1, not 0. */
278 1.2 bouyer blkno /= ata_bio->lp->d_nsectors;
279 1.2 bouyer head = blkno % ata_bio->lp->d_ntracks;
280 1.2 bouyer blkno /= ata_bio->lp->d_ntracks;
281 1.2 bouyer cyl = blkno;
282 1.2 bouyer head |= WDSD_CHS;
283 1.2 bouyer }
284 1.2 bouyer if (xfer->c_flags & C_DMA) {
285 1.2 bouyer ata_bio->nblks = nblks;
286 1.2 bouyer ata_bio->nbytes = xfer->c_bcount;
287 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
288 1.2 bouyer WDCC_READDMA : WDCC_WRITEDMA;
289 1.2 bouyer /* Init the DMA channel. */
290 1.2 bouyer if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
291 1.2 bouyer chp->channel, xfer->drive,
292 1.11 augustss (char *)xfer->databuf + xfer->c_skip,
293 1.11 augustss ata_bio->nbytes, dma_flags) != 0) {
294 1.2 bouyer ata_bio->error = ERR_DMA;
295 1.2 bouyer ata_bio->r_error = 0;
296 1.2 bouyer wdc_ata_bio_done(chp, xfer);
297 1.2 bouyer return;
298 1.2 bouyer }
299 1.2 bouyer /* Initiate command */
300 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
301 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
302 1.16 bouyer if (wait_for_ready(chp, ata_delay) < 0)
303 1.2 bouyer goto timeout;
304 1.2 bouyer wdccommand(chp, xfer->drive, cmd, cyl,
305 1.2 bouyer head, sect, nblks, 0);
306 1.2 bouyer /* start the DMA channel */
307 1.2 bouyer (*chp->wdc->dma_start)(chp->wdc->dma_arg,
308 1.26 bouyer chp->channel, xfer->drive);
309 1.26 bouyer chp->ch_flags |= WDCF_DMA_WAIT;
310 1.2 bouyer /* wait for irq */
311 1.2 bouyer goto intr;
312 1.2 bouyer } /* else not DMA */
313 1.2 bouyer ata_bio->nblks = min(nblks, ata_bio->multi);
314 1.2 bouyer ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
315 1.2 bouyer if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
316 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
317 1.2 bouyer WDCC_READMULTI : WDCC_WRITEMULTI;
318 1.2 bouyer } else {
319 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
320 1.2 bouyer WDCC_READ : WDCC_WRITE;
321 1.2 bouyer }
322 1.2 bouyer /* Initiate command! */
323 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
324 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
325 1.16 bouyer if (wait_for_ready(chp, ata_delay) < 0)
326 1.2 bouyer goto timeout;
327 1.2 bouyer wdccommand(chp, xfer->drive, cmd, cyl,
328 1.2 bouyer head, sect, nblks,
329 1.2 bouyer (ata_bio->lp->d_type == DTYPE_ST506) ?
330 1.2 bouyer ata_bio->lp->d_precompcyl / 4 : 0);
331 1.2 bouyer } else if (ata_bio->nblks > 1) {
332 1.2 bouyer /* The number of blocks in the last stretch may be smaller. */
333 1.2 bouyer nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
334 1.2 bouyer if (ata_bio->nblks > nblks) {
335 1.2 bouyer ata_bio->nblks = nblks;
336 1.2 bouyer ata_bio->nbytes = xfer->c_bcount;
337 1.2 bouyer }
338 1.2 bouyer }
339 1.2 bouyer /* If this was a write and not using DMA, push the data. */
340 1.2 bouyer if ((ata_bio->flags & ATA_READ) == 0) {
341 1.16 bouyer if (wait_for_drq(chp, ata_delay) != 0) {
342 1.2 bouyer printf("%s:%d:%d: timeout waiting for DRQ, "
343 1.2 bouyer "st=0x%02x, err=0x%02x\n",
344 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
345 1.2 bouyer xfer->drive, chp->ch_status, chp->ch_error);
346 1.16 bouyer if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
347 1.2 bouyer ata_bio->error = TIMEOUT;
348 1.2 bouyer wdc_ata_bio_done(chp, xfer);
349 1.2 bouyer return;
350 1.2 bouyer }
351 1.16 bouyer if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
352 1.2 bouyer wdc_ata_bio_done(chp, xfer);
353 1.2 bouyer return;
354 1.2 bouyer }
355 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
356 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
357 1.2 bouyer bus_space_write_multi_4(chp->data32iot,
358 1.2 bouyer chp->data32ioh, 0,
359 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
360 1.12 thorpej xfer->c_skip),
361 1.2 bouyer ata_bio->nbytes >> 2);
362 1.2 bouyer } else {
363 1.2 bouyer bus_space_write_multi_2(chp->cmd_iot,
364 1.2 bouyer chp->cmd_ioh, wd_data,
365 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
366 1.12 thorpej xfer->c_skip),
367 1.2 bouyer ata_bio->nbytes >> 1);
368 1.2 bouyer }
369 1.2 bouyer } else {
370 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
371 1.2 bouyer bus_space_write_multi_stream_4(chp->data32iot,
372 1.2 bouyer chp->data32ioh, 0,
373 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
374 1.12 thorpej xfer->c_skip),
375 1.2 bouyer ata_bio->nbytes >> 2);
376 1.2 bouyer } else {
377 1.2 bouyer bus_space_write_multi_stream_2(chp->cmd_iot,
378 1.2 bouyer chp->cmd_ioh, wd_data,
379 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
380 1.12 thorpej xfer->c_skip),
381 1.2 bouyer ata_bio->nbytes >> 1);
382 1.2 bouyer }
383 1.2 bouyer }
384 1.2 bouyer }
385 1.2 bouyer
386 1.2 bouyer intr: /* Wait for IRQ (either real or polled) */
387 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
388 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
389 1.2 bouyer } else {
390 1.2 bouyer /* Wait for at last 400ns for status bit to be valid */
391 1.2 bouyer delay(1);
392 1.26 bouyer if (chp->ch_flags & WDCF_DMA_WAIT) {
393 1.26 bouyer wdc_dmawait(chp, xfer, ATA_DELAY);
394 1.26 bouyer chp->ch_flags &= ~WDCF_DMA_WAIT;
395 1.26 bouyer }
396 1.19 bouyer wdc_ata_bio_intr(chp, xfer, 0);
397 1.2 bouyer if ((ata_bio->flags & ATA_ITSDONE) == 0)
398 1.2 bouyer goto again;
399 1.2 bouyer }
400 1.2 bouyer return;
401 1.2 bouyer timeout:
402 1.2 bouyer printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
403 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
404 1.2 bouyer chp->ch_status, chp->ch_error);
405 1.16 bouyer if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
406 1.2 bouyer ata_bio->error = TIMEOUT;
407 1.2 bouyer wdc_ata_bio_done(chp, xfer);
408 1.2 bouyer return;
409 1.2 bouyer }
410 1.2 bouyer
411 1.2 bouyer int
412 1.19 bouyer wdc_ata_bio_intr(chp, xfer, irq)
413 1.2 bouyer struct channel_softc *chp;
414 1.2 bouyer struct wdc_xfer *xfer;
415 1.19 bouyer int irq;
416 1.2 bouyer {
417 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
418 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
419 1.2 bouyer int drv_err;
420 1.2 bouyer
421 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
422 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
423 1.2 bouyer DEBUG_INTR | DEBUG_XFERS);
424 1.2 bouyer
425 1.2 bouyer
426 1.2 bouyer /* Is it not a transfer, but a control operation? */
427 1.2 bouyer if (drvp->state < READY) {
428 1.2 bouyer printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
429 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
430 1.2 bouyer drvp->state);
431 1.2 bouyer panic("wdc_ata_bio_intr: bad state\n");
432 1.2 bouyer }
433 1.2 bouyer
434 1.20 bouyer /*
435 1.20 bouyer * if we missed an interrupt in a PIO transfer, reset and restart.
436 1.20 bouyer * Don't try to continue transfer, we may have missed cycles.
437 1.20 bouyer */
438 1.20 bouyer if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
439 1.20 bouyer ata_bio->error = TIMEOUT;
440 1.20 bouyer wdc_ata_bio_done(chp, xfer);
441 1.20 bouyer return 1;
442 1.20 bouyer }
443 1.20 bouyer
444 1.2 bouyer /* Ack interrupt done by wait_for_unbusy */
445 1.18 bouyer if (wait_for_unbusy(chp,
446 1.19 bouyer (irq == 0) ? ATA_DELAY : 0) < 0) {
447 1.19 bouyer if (irq && (xfer->c_flags & C_TIMEOU) == 0)
448 1.18 bouyer return 0; /* IRQ was not for us */
449 1.2 bouyer printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
450 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
451 1.2 bouyer xfer->c_bcount, xfer->c_skip);
452 1.26 bouyer /* if we were using DMA, flag a DMA error */
453 1.10 bouyer if (xfer->c_flags & C_DMA) {
454 1.23 bouyer ata_dmaerr(drvp);
455 1.10 bouyer }
456 1.2 bouyer ata_bio->error = TIMEOUT;
457 1.2 bouyer wdc_ata_bio_done(chp, xfer);
458 1.2 bouyer return 1;
459 1.2 bouyer }
460 1.28 bouyer if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
461 1.28 bouyer chp->wdc->irqack(chp);
462 1.2 bouyer
463 1.16 bouyer drv_err = wdc_ata_err(drvp, ata_bio);
464 1.2 bouyer
465 1.2 bouyer /* If we were using DMA, Turn off the DMA channel and check for error */
466 1.2 bouyer if (xfer->c_flags & C_DMA) {
467 1.2 bouyer if (ata_bio->flags & ATA_POLL) {
468 1.2 bouyer /*
469 1.13 bouyer * IDE drives deassert WDCS_BSY before transfer is
470 1.2 bouyer * complete when using DMA. Polling for DRQ to deassert
471 1.2 bouyer * is not enouth DRQ is not required to be
472 1.7 bouyer * asserted for DMA transfers, so poll for DRDY.
473 1.2 bouyer */
474 1.2 bouyer if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
475 1.17 bouyer ATA_DELAY) < 0) {
476 1.7 bouyer printf("%s:%d:%d: polled transfer timed out "
477 1.2 bouyer "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
478 1.2 bouyer chp->channel, xfer->drive, chp->ch_status);
479 1.2 bouyer ata_bio->error = TIMEOUT;
480 1.10 bouyer drv_err = WDC_ATA_ERR;
481 1.10 bouyer }
482 1.10 bouyer }
483 1.26 bouyer if (chp->wdc->dma_status != 0) {
484 1.10 bouyer if (drv_err != WDC_ATA_ERR) {
485 1.10 bouyer ata_bio->error = ERR_DMA;
486 1.10 bouyer drv_err = WDC_ATA_ERR;
487 1.2 bouyer }
488 1.2 bouyer }
489 1.2 bouyer if (chp->ch_status & WDCS_DRQ) {
490 1.2 bouyer if (drv_err != WDC_ATA_ERR) {
491 1.2 bouyer printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
492 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
493 1.2 bouyer xfer->drive, chp->ch_status);
494 1.2 bouyer ata_bio->error = TIMEOUT;
495 1.2 bouyer drv_err = WDC_ATA_ERR;
496 1.2 bouyer }
497 1.2 bouyer }
498 1.2 bouyer if (drv_err != WDC_ATA_ERR)
499 1.2 bouyer goto end;
500 1.23 bouyer ata_dmaerr(drvp);
501 1.2 bouyer }
502 1.2 bouyer
503 1.2 bouyer /* if we had an error, end */
504 1.2 bouyer if (drv_err == WDC_ATA_ERR) {
505 1.2 bouyer wdc_ata_bio_done(chp, xfer);
506 1.2 bouyer return 1;
507 1.2 bouyer }
508 1.2 bouyer
509 1.2 bouyer /* If this was a read and not using DMA, fetch the data. */
510 1.2 bouyer if ((ata_bio->flags & ATA_READ) != 0) {
511 1.14 bouyer if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
512 1.2 bouyer printf("%s:%d:%d: read intr before drq\n",
513 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
514 1.2 bouyer xfer->drive);
515 1.2 bouyer ata_bio->error = TIMEOUT;
516 1.2 bouyer wdc_ata_bio_done(chp, xfer);
517 1.2 bouyer return 1;
518 1.2 bouyer }
519 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
520 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
521 1.2 bouyer bus_space_read_multi_4(chp->data32iot,
522 1.2 bouyer chp->data32ioh, 0,
523 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
524 1.12 thorpej xfer->c_skip),
525 1.2 bouyer ata_bio->nbytes >> 2);
526 1.2 bouyer } else {
527 1.2 bouyer bus_space_read_multi_2(chp->cmd_iot,
528 1.2 bouyer chp->cmd_ioh, wd_data,
529 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
530 1.12 thorpej xfer->c_skip),
531 1.2 bouyer ata_bio->nbytes >> 1);
532 1.2 bouyer }
533 1.2 bouyer } else {
534 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
535 1.2 bouyer bus_space_read_multi_stream_4(chp->data32iot,
536 1.2 bouyer chp->data32ioh, 0,
537 1.12 thorpej (u_int32_t *)((char *)xfer->databuf +
538 1.12 thorpej xfer->c_skip),
539 1.2 bouyer ata_bio->nbytes >> 2);
540 1.2 bouyer } else {
541 1.2 bouyer bus_space_read_multi_stream_2(chp->cmd_iot,
542 1.2 bouyer chp->cmd_ioh, wd_data,
543 1.12 thorpej (u_int16_t *)((char *)xfer->databuf +
544 1.12 thorpej xfer->c_skip),
545 1.2 bouyer ata_bio->nbytes >> 1);
546 1.2 bouyer }
547 1.2 bouyer }
548 1.2 bouyer }
549 1.2 bouyer
550 1.2 bouyer end:
551 1.2 bouyer ata_bio->blkno += ata_bio->nblks;
552 1.2 bouyer ata_bio->blkdone += ata_bio->nblks;
553 1.2 bouyer xfer->c_skip += ata_bio->nbytes;
554 1.2 bouyer xfer->c_bcount -= ata_bio->nbytes;
555 1.2 bouyer /* See if this transfer is complete. */
556 1.2 bouyer if (xfer->c_bcount > 0) {
557 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
558 1.2 bouyer /* Start the next operation */
559 1.20 bouyer _wdc_ata_bio_start(chp, xfer);
560 1.2 bouyer } else {
561 1.20 bouyer /* Let _wdc_ata_bio_start do the loop */
562 1.2 bouyer return 1;
563 1.2 bouyer }
564 1.2 bouyer } else { /* Done with this transfer */
565 1.2 bouyer ata_bio->error = NOERROR;
566 1.2 bouyer wdc_ata_bio_done(chp, xfer);
567 1.2 bouyer }
568 1.2 bouyer return 1;
569 1.22 enami }
570 1.22 enami
571 1.22 enami void
572 1.22 enami wdc_ata_kill_pending(drvp)
573 1.22 enami struct ata_drive_datas *drvp;
574 1.22 enami {
575 1.22 enami struct channel_softc *chp = drvp->chnl_softc;
576 1.22 enami
577 1.22 enami wdc_kill_pending(chp);
578 1.22 enami }
579 1.22 enami
580 1.22 enami void
581 1.22 enami wdc_ata_bio_kill_xfer(chp, xfer)
582 1.22 enami struct channel_softc *chp;
583 1.22 enami struct wdc_xfer *xfer;
584 1.22 enami {
585 1.22 enami struct ata_bio *ata_bio = xfer->cmd;
586 1.22 enami int drive = xfer->drive;
587 1.22 enami
588 1.24 thorpej callout_stop(&chp->ch_callout);
589 1.22 enami /* remove this command from xfer queue */
590 1.22 enami wdc_free_xfer(chp, xfer);
591 1.22 enami
592 1.22 enami ata_bio->flags |= ATA_ITSDONE;
593 1.22 enami ata_bio->error = ERR_NODEV;
594 1.22 enami ata_bio->r_error = WDCE_ABRT;
595 1.22 enami if ((ata_bio->flags & ATA_POLL) == 0) {
596 1.22 enami WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
597 1.22 enami wddone(chp->ch_drive[drive].drv_softc);
598 1.22 enami }
599 1.2 bouyer }
600 1.2 bouyer
601 1.2 bouyer void
602 1.2 bouyer wdc_ata_bio_done(chp, xfer)
603 1.2 bouyer struct channel_softc *chp;
604 1.2 bouyer struct wdc_xfer *xfer;
605 1.2 bouyer {
606 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
607 1.2 bouyer int drive = xfer->drive;
608 1.2 bouyer
609 1.5 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
610 1.5 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
611 1.5 bouyer (u_int)xfer->c_flags),
612 1.4 bouyer DEBUG_XFERS);
613 1.10 bouyer
614 1.24 thorpej callout_stop(&chp->ch_callout);
615 1.2 bouyer
616 1.2 bouyer /* feed back residual bcount to our caller */
617 1.2 bouyer ata_bio->bcount = xfer->c_bcount;
618 1.2 bouyer
619 1.2 bouyer /* remove this command from xfer queue */
620 1.2 bouyer wdc_free_xfer(chp, xfer);
621 1.2 bouyer
622 1.2 bouyer ata_bio->flags |= ATA_ITSDONE;
623 1.21 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
624 1.4 bouyer WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
625 1.2 bouyer wddone(chp->ch_drive[drive].drv_softc);
626 1.2 bouyer }
627 1.2 bouyer WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
628 1.4 bouyer chp->ch_flags), DEBUG_XFERS);
629 1.9 drochner wdcstart(chp);
630 1.2 bouyer }
631 1.2 bouyer
632 1.2 bouyer /*
633 1.2 bouyer * Implement operations needed before read/write.
634 1.2 bouyer */
635 1.2 bouyer int
636 1.19 bouyer wdc_ata_ctrl_intr(chp, xfer, irq)
637 1.2 bouyer struct channel_softc *chp;
638 1.2 bouyer struct wdc_xfer *xfer;
639 1.19 bouyer int irq;
640 1.2 bouyer {
641 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
642 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
643 1.2 bouyer char *errstring = NULL;
644 1.19 bouyer int delay = (irq == 0) ? ATA_DELAY : 0;
645 1.18 bouyer
646 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
647 1.18 bouyer DEBUG_FUNCS);
648 1.2 bouyer
649 1.2 bouyer again:
650 1.2 bouyer switch (drvp->state) {
651 1.2 bouyer case RECAL: /* Should not be in this state here */
652 1.2 bouyer panic("wdc_ata_ctrl_intr: state==RECAL");
653 1.2 bouyer break;
654 1.2 bouyer
655 1.2 bouyer case RECAL_WAIT:
656 1.2 bouyer errstring = "recal";
657 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
658 1.2 bouyer goto timeout;
659 1.28 bouyer if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
660 1.28 bouyer chp->wdc->irqack(chp);
661 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
662 1.2 bouyer goto error;
663 1.2 bouyer /* fall through */
664 1.2 bouyer
665 1.2 bouyer case PIOMODE:
666 1.2 bouyer /* Don't try to set modes if controller can't be adjusted */
667 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
668 1.6 bouyer goto geometry;
669 1.6 bouyer /* Also don't try if the drive didn't report its mode */
670 1.6 bouyer if ((drvp->drive_flags & DRIVE_MODE) == 0)
671 1.2 bouyer goto geometry;
672 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
673 1.2 bouyer 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
674 1.2 bouyer drvp->state = PIOMODE_WAIT;
675 1.2 bouyer break;
676 1.2 bouyer
677 1.2 bouyer case PIOMODE_WAIT:
678 1.2 bouyer errstring = "piomode";
679 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
680 1.2 bouyer goto timeout;
681 1.28 bouyer if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
682 1.28 bouyer chp->wdc->irqack(chp);
683 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
684 1.2 bouyer goto error;
685 1.2 bouyer /* fall through */
686 1.2 bouyer
687 1.2 bouyer case DMAMODE:
688 1.2 bouyer if (drvp->drive_flags & DRIVE_UDMA) {
689 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
690 1.2 bouyer 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
691 1.2 bouyer } else if (drvp->drive_flags & DRIVE_DMA) {
692 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
693 1.2 bouyer 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
694 1.2 bouyer } else {
695 1.2 bouyer goto geometry;
696 1.2 bouyer }
697 1.2 bouyer drvp->state = DMAMODE_WAIT;
698 1.2 bouyer break;
699 1.2 bouyer case DMAMODE_WAIT:
700 1.2 bouyer errstring = "dmamode";
701 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
702 1.2 bouyer goto timeout;
703 1.28 bouyer if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
704 1.28 bouyer chp->wdc->irqack(chp);
705 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
706 1.2 bouyer goto error;
707 1.2 bouyer /* fall through */
708 1.2 bouyer
709 1.2 bouyer case GEOMETRY:
710 1.2 bouyer geometry:
711 1.2 bouyer if (ata_bio->flags & ATA_LBA)
712 1.2 bouyer goto multimode;
713 1.2 bouyer wdccommand(chp, xfer->drive, WDCC_IDP,
714 1.2 bouyer ata_bio->lp->d_ncylinders,
715 1.2 bouyer ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
716 1.2 bouyer (ata_bio->lp->d_type == DTYPE_ST506) ?
717 1.2 bouyer ata_bio->lp->d_precompcyl / 4 : 0);
718 1.2 bouyer drvp->state = GEOMETRY_WAIT;
719 1.2 bouyer break;
720 1.2 bouyer
721 1.2 bouyer case GEOMETRY_WAIT:
722 1.2 bouyer errstring = "geometry";
723 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
724 1.2 bouyer goto timeout;
725 1.28 bouyer if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
726 1.28 bouyer chp->wdc->irqack(chp);
727 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
728 1.2 bouyer goto error;
729 1.2 bouyer /* fall through */
730 1.2 bouyer
731 1.2 bouyer case MULTIMODE:
732 1.2 bouyer multimode:
733 1.2 bouyer if (ata_bio->multi == 1)
734 1.2 bouyer goto ready;
735 1.2 bouyer wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
736 1.2 bouyer ata_bio->multi, 0);
737 1.2 bouyer drvp->state = MULTIMODE_WAIT;
738 1.2 bouyer break;
739 1.2 bouyer
740 1.2 bouyer case MULTIMODE_WAIT:
741 1.2 bouyer errstring = "setmulti";
742 1.18 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
743 1.2 bouyer goto timeout;
744 1.28 bouyer if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
745 1.28 bouyer chp->wdc->irqack(chp);
746 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
747 1.2 bouyer goto error;
748 1.2 bouyer /* fall through */
749 1.2 bouyer
750 1.2 bouyer case READY:
751 1.2 bouyer ready:
752 1.2 bouyer drvp->state = READY;
753 1.2 bouyer /*
754 1.2 bouyer * The drive is usable now
755 1.2 bouyer */
756 1.2 bouyer xfer->c_intr = wdc_ata_bio_intr;
757 1.20 bouyer _wdc_ata_bio_start(chp, xfer);
758 1.2 bouyer return 1;
759 1.2 bouyer }
760 1.2 bouyer
761 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
762 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
763 1.2 bouyer } else {
764 1.2 bouyer goto again;
765 1.2 bouyer }
766 1.2 bouyer return 1;
767 1.2 bouyer
768 1.2 bouyer timeout:
769 1.19 bouyer if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
770 1.2 bouyer return 0; /* IRQ was not for us */
771 1.2 bouyer }
772 1.2 bouyer printf("%s:%d:%d: %s timed out\n",
773 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
774 1.2 bouyer ata_bio->error = TIMEOUT;
775 1.2 bouyer drvp->state = 0;
776 1.2 bouyer wdc_ata_bio_done(chp, xfer);
777 1.2 bouyer return 0;
778 1.2 bouyer error:
779 1.2 bouyer printf("%s:%d:%d: %s ",
780 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
781 1.2 bouyer errstring);
782 1.2 bouyer if (chp->ch_status & WDCS_DWF) {
783 1.2 bouyer printf("drive fault\n");
784 1.2 bouyer ata_bio->error = ERR_DF;
785 1.2 bouyer } else {
786 1.2 bouyer printf("error (%x)\n", chp->ch_error);
787 1.2 bouyer ata_bio->r_error = chp->ch_error;
788 1.2 bouyer ata_bio->error = ERROR;
789 1.2 bouyer }
790 1.2 bouyer drvp->state = 0;
791 1.2 bouyer wdc_ata_bio_done(chp, xfer);
792 1.2 bouyer return 1;
793 1.2 bouyer }
794 1.2 bouyer
795 1.2 bouyer int
796 1.16 bouyer wdc_ata_err(drvp, ata_bio)
797 1.16 bouyer struct ata_drive_datas *drvp;
798 1.2 bouyer struct ata_bio *ata_bio;
799 1.2 bouyer {
800 1.16 bouyer struct channel_softc *chp = drvp->chnl_softc;
801 1.2 bouyer ata_bio->error = 0;
802 1.2 bouyer if (chp->ch_status & WDCS_BSY) {
803 1.2 bouyer ata_bio->error = TIMEOUT;
804 1.2 bouyer return WDC_ATA_ERR;
805 1.2 bouyer }
806 1.2 bouyer
807 1.2 bouyer if (chp->ch_status & WDCS_DWF) {
808 1.2 bouyer ata_bio->error = ERR_DF;
809 1.2 bouyer return WDC_ATA_ERR;
810 1.2 bouyer }
811 1.2 bouyer
812 1.2 bouyer if (chp->ch_status & WDCS_ERR) {
813 1.2 bouyer ata_bio->error = ERROR;
814 1.2 bouyer ata_bio->r_error = chp->ch_error;
815 1.16 bouyer if (drvp->drive_flags & DRIVE_UDMA &&
816 1.16 bouyer (ata_bio->r_error & WDCE_CRC)) {
817 1.16 bouyer /*
818 1.16 bouyer * Record the CRC error, to avoid downgrading to
819 1.16 bouyer * multiword DMA
820 1.16 bouyer */
821 1.16 bouyer drvp->drive_flags |= DRIVE_DMAERR;
822 1.16 bouyer }
823 1.2 bouyer if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
824 1.2 bouyer WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
825 1.2 bouyer return WDC_ATA_ERR;
826 1.2 bouyer return WDC_ATA_NOERR;
827 1.2 bouyer }
828 1.2 bouyer
829 1.2 bouyer if (chp->ch_status & WDCS_CORR)
830 1.2 bouyer ata_bio->flags |= ATA_CORR;
831 1.2 bouyer return WDC_ATA_NOERR;
832 1.8 thorpej }
833 1.8 thorpej
834 1.8 thorpej int
835 1.8 thorpej wdc_ata_addref(drvp)
836 1.8 thorpej struct ata_drive_datas *drvp;
837 1.8 thorpej {
838 1.8 thorpej struct channel_softc *chp = drvp->chnl_softc;
839 1.8 thorpej
840 1.8 thorpej return (wdc_addref(chp));
841 1.8 thorpej }
842 1.8 thorpej
843 1.8 thorpej void
844 1.8 thorpej wdc_ata_delref(drvp)
845 1.8 thorpej struct ata_drive_datas *drvp;
846 1.8 thorpej {
847 1.8 thorpej struct channel_softc *chp = drvp->chnl_softc;
848 1.8 thorpej
849 1.8 thorpej wdc_delref(chp);
850 1.2 bouyer }
851