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ata_wdc.c revision 1.39.2.1
      1  1.39.2.1     skrll /*	$NetBSD: ata_wdc.c,v 1.39.2.1 2004/08/03 10:45:46 skrll Exp $	*/
      2       1.2    bouyer 
      3       1.2    bouyer /*
      4  1.39.2.1     skrll  * Copyright (c) 1998, 2001, 2003 Manuel Bouyer.
      5       1.2    bouyer  *
      6       1.2    bouyer  * Redistribution and use in source and binary forms, with or without
      7       1.2    bouyer  * modification, are permitted provided that the following conditions
      8       1.2    bouyer  * are met:
      9       1.2    bouyer  * 1. Redistributions of source code must retain the above copyright
     10       1.2    bouyer  *    notice, this list of conditions and the following disclaimer.
     11       1.2    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.2    bouyer  *    notice, this list of conditions and the following disclaimer in the
     13       1.2    bouyer  *    documentation and/or other materials provided with the distribution.
     14       1.2    bouyer  * 3. All advertising materials mentioning features or use of this software
     15       1.2    bouyer  *    must display the following acknowledgement:
     16      1.36    bouyer  *	This product includes software developed by Manuel Bouyer.
     17  1.39.2.1     skrll  * 4. The name of the author may not be used to endorse or promote products
     18  1.39.2.1     skrll  *    derived from this software without specific prior written permission.
     19       1.2    bouyer  *
     20      1.27    bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21      1.27    bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22      1.27    bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23      1.27    bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24      1.27    bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25      1.27    bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26      1.27    bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27      1.27    bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28      1.27    bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29      1.27    bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30       1.2    bouyer  */
     31       1.2    bouyer 
     32       1.2    bouyer /*-
     33  1.39.2.1     skrll  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
     34       1.2    bouyer  * All rights reserved.
     35       1.2    bouyer  *
     36       1.2    bouyer  * This code is derived from software contributed to The NetBSD Foundation
     37       1.2    bouyer  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
     38       1.2    bouyer  *
     39       1.2    bouyer  * Redistribution and use in source and binary forms, with or without
     40       1.2    bouyer  * modification, are permitted provided that the following conditions
     41       1.2    bouyer  * are met:
     42       1.2    bouyer  * 1. Redistributions of source code must retain the above copyright
     43       1.2    bouyer  *    notice, this list of conditions and the following disclaimer.
     44       1.2    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     45       1.2    bouyer  *    notice, this list of conditions and the following disclaimer in the
     46       1.2    bouyer  *    documentation and/or other materials provided with the distribution.
     47       1.2    bouyer  * 3. All advertising materials mentioning features or use of this software
     48       1.2    bouyer  *    must display the following acknowledgement:
     49       1.2    bouyer  *        This product includes software developed by the NetBSD
     50       1.2    bouyer  *        Foundation, Inc. and its contributors.
     51       1.2    bouyer  * 4. Neither the name of The NetBSD Foundation nor the names of its
     52       1.2    bouyer  *    contributors may be used to endorse or promote products derived
     53       1.2    bouyer  *    from this software without specific prior written permission.
     54       1.2    bouyer  *
     55       1.2    bouyer  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     56       1.2    bouyer  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     57       1.2    bouyer  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     58       1.2    bouyer  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     59       1.2    bouyer  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     60       1.2    bouyer  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     61       1.2    bouyer  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     62       1.2    bouyer  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     63       1.2    bouyer  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     64       1.2    bouyer  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     65       1.2    bouyer  * POSSIBILITY OF SUCH DAMAGE.
     66       1.2    bouyer  */
     67      1.31     lukem 
     68      1.31     lukem #include <sys/cdefs.h>
     69  1.39.2.1     skrll __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.39.2.1 2004/08/03 10:45:46 skrll Exp $");
     70       1.2    bouyer 
     71      1.15   hubertf #ifndef WDCDEBUG
     72       1.2    bouyer #define WDCDEBUG
     73      1.15   hubertf #endif /* WDCDEBUG */
     74       1.2    bouyer 
     75       1.2    bouyer #include <sys/param.h>
     76       1.2    bouyer #include <sys/systm.h>
     77       1.2    bouyer #include <sys/kernel.h>
     78       1.2    bouyer #include <sys/file.h>
     79       1.2    bouyer #include <sys/stat.h>
     80       1.2    bouyer #include <sys/buf.h>
     81       1.2    bouyer #include <sys/malloc.h>
     82       1.2    bouyer #include <sys/device.h>
     83       1.2    bouyer #include <sys/disklabel.h>
     84       1.2    bouyer #include <sys/syslog.h>
     85       1.2    bouyer #include <sys/proc.h>
     86       1.2    bouyer 
     87       1.2    bouyer #include <machine/intr.h>
     88       1.2    bouyer #include <machine/bus.h>
     89       1.2    bouyer #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     90       1.2    bouyer #define    bus_space_write_multi_stream_2    bus_space_write_multi_2
     91       1.2    bouyer #define    bus_space_write_multi_stream_4    bus_space_write_multi_4
     92       1.2    bouyer #define    bus_space_read_multi_stream_2    bus_space_read_multi_2
     93       1.2    bouyer #define    bus_space_read_multi_stream_4    bus_space_read_multi_4
     94       1.2    bouyer #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     95       1.2    bouyer 
     96       1.2    bouyer #include <dev/ata/atareg.h>
     97       1.2    bouyer #include <dev/ata/atavar.h>
     98       1.2    bouyer #include <dev/ic/wdcreg.h>
     99       1.2    bouyer #include <dev/ic/wdcvar.h>
    100       1.2    bouyer 
    101       1.2    bouyer #define DEBUG_INTR   0x01
    102       1.2    bouyer #define DEBUG_XFERS  0x02
    103       1.2    bouyer #define DEBUG_STATUS 0x04
    104       1.2    bouyer #define DEBUG_FUNCS  0x08
    105       1.2    bouyer #define DEBUG_PROBE  0x10
    106       1.2    bouyer #ifdef WDCDEBUG
    107  1.39.2.1     skrll extern int wdcdebug_wd_mask; /* inited in wd.c */
    108       1.2    bouyer #define WDCDEBUG_PRINT(args, level) \
    109       1.2    bouyer 	if (wdcdebug_wd_mask & (level)) \
    110       1.2    bouyer 		printf args
    111       1.2    bouyer #else
    112       1.2    bouyer #define WDCDEBUG_PRINT(args, level)
    113       1.2    bouyer #endif
    114       1.2    bouyer 
    115      1.17    bouyer #define ATA_DELAY 10000 /* 10s for a drive I/O */
    116       1.2    bouyer 
    117  1.39.2.1     skrll static int	wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*);
    118  1.39.2.1     skrll static void	wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *);
    119  1.39.2.1     skrll static void	_wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *);
    120  1.39.2.1     skrll static int	wdc_ata_bio_intr(struct wdc_channel *, struct ata_xfer *,
    121  1.39.2.1     skrll 				 int);
    122  1.39.2.1     skrll static void	wdc_ata_bio_kill_xfer(struct wdc_channel *,
    123  1.39.2.1     skrll 				      struct ata_xfer *, int);
    124  1.39.2.1     skrll static void	wdc_ata_bio_done(struct wdc_channel *, struct ata_xfer *);
    125  1.39.2.1     skrll static int	wdc_ata_err(struct ata_drive_datas *, struct ata_bio *);
    126       1.2    bouyer #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
    127       1.2    bouyer #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
    128       1.2    bouyer #define WDC_ATA_ERR   0x02 /* Drive reports an error */
    129  1.39.2.1     skrll static int	wdc_ata_addref(struct ata_drive_datas *);
    130  1.39.2.1     skrll static void	wdc_ata_delref(struct ata_drive_datas *);
    131  1.39.2.1     skrll static void	wdc_ata_kill_pending(struct ata_drive_datas *);
    132      1.32    bouyer 
    133      1.32    bouyer const struct ata_bustype wdc_ata_bustype = {
    134      1.32    bouyer 	SCSIPI_BUSTYPE_ATA,
    135      1.32    bouyer 	wdc_ata_bio,
    136  1.39.2.1     skrll 	wdc_reset_drive,
    137      1.32    bouyer 	wdc_exec_command,
    138      1.32    bouyer 	ata_get_params,
    139      1.32    bouyer 	wdc_ata_addref,
    140      1.32    bouyer 	wdc_ata_delref,
    141      1.32    bouyer 	wdc_ata_kill_pending,
    142      1.32    bouyer };
    143      1.32    bouyer 
    144       1.2    bouyer /*
    145      1.34  christos  * Convert a 32 bit command to a 48 bit command.
    146      1.34  christos  */
    147  1.39.2.1     skrll static __inline
    148      1.34  christos int to48(int cmd32)
    149      1.34  christos {
    150      1.34  christos 	switch (cmd32) {
    151      1.34  christos 	case WDCC_READ:
    152      1.34  christos 		return WDCC_READ_EXT;
    153      1.34  christos 	case WDCC_WRITE:
    154      1.34  christos 		return WDCC_WRITE_EXT;
    155      1.34  christos 	case WDCC_READMULTI:
    156      1.34  christos 		return WDCC_READMULTI_EXT;
    157      1.34  christos 	case WDCC_WRITEMULTI:
    158      1.34  christos 		return WDCC_WRITEMULTI_EXT;
    159      1.35  christos 	case WDCC_READDMA:
    160      1.35  christos 		return WDCC_READDMA_EXT;
    161      1.35  christos 	case WDCC_WRITEDMA:
    162      1.35  christos 		return WDCC_WRITEDMA_EXT;
    163      1.34  christos 	default:
    164      1.34  christos 		panic("ata_wdc: illegal 32 bit command %d", cmd32);
    165      1.34  christos 		/*NOTREACHED*/
    166      1.34  christos 	}
    167      1.34  christos }
    168      1.34  christos 
    169      1.34  christos /*
    170       1.2    bouyer  * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
    171      1.29  jdolecek  * WDC_TRY_AGAIN. Must be called at splbio().
    172       1.2    bouyer  */
    173  1.39.2.1     skrll static int
    174  1.39.2.1     skrll wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
    175       1.2    bouyer {
    176  1.39.2.1     skrll 	struct ata_xfer *xfer;
    177  1.39.2.1     skrll 	struct wdc_channel *chp = drvp->chnl_softc;
    178  1.39.2.1     skrll 	struct wdc_softc *wdc = chp->ch_wdc;
    179       1.2    bouyer 
    180       1.2    bouyer 	xfer = wdc_get_xfer(WDC_NOSLEEP);
    181       1.2    bouyer 	if (xfer == NULL)
    182       1.2    bouyer 		return WDC_TRY_AGAIN;
    183  1.39.2.1     skrll 	if (wdc->cap & WDC_CAPABILITY_NOIRQ)
    184      1.30     bjh21 		ata_bio->flags |= ATA_POLL;
    185       1.2    bouyer 	if (ata_bio->flags & ATA_POLL)
    186       1.2    bouyer 		xfer->c_flags |= C_POLL;
    187       1.2    bouyer 	if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
    188       1.2    bouyer 	    (ata_bio->flags & ATA_SINGLE) == 0)
    189       1.2    bouyer 		xfer->c_flags |= C_DMA;
    190  1.39.2.1     skrll 	xfer->c_drive = drvp->drive;
    191  1.39.2.1     skrll 	xfer->c_cmd = ata_bio;
    192  1.39.2.1     skrll 	xfer->c_databuf = ata_bio->databuf;
    193       1.2    bouyer 	xfer->c_bcount = ata_bio->bcount;
    194       1.2    bouyer 	xfer->c_start = wdc_ata_bio_start;
    195       1.2    bouyer 	xfer->c_intr = wdc_ata_bio_intr;
    196      1.22     enami 	xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
    197       1.2    bouyer 	wdc_exec_xfer(chp, xfer);
    198       1.2    bouyer 	return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
    199       1.2    bouyer }
    200       1.2    bouyer 
    201  1.39.2.1     skrll static void
    202  1.39.2.1     skrll wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer)
    203       1.2    bouyer {
    204  1.39.2.1     skrll 	struct wdc_softc *wdc = chp->ch_wdc;
    205  1.39.2.1     skrll 	struct ata_bio *ata_bio = xfer->c_cmd;
    206  1.39.2.1     skrll 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    207  1.39.2.1     skrll 	int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
    208  1.39.2.1     skrll 	char *errstring;
    209  1.39.2.1     skrll 
    210      1.20    bouyer 	WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
    211  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    212      1.20    bouyer 	    DEBUG_XFERS);
    213      1.20    bouyer 
    214  1.39.2.1     skrll 	/* Do control operations specially. */
    215  1.39.2.1     skrll 	if (__predict_false(drvp->state < READY)) {
    216  1.39.2.1     skrll 		/*
    217  1.39.2.1     skrll 		 * Actually, we want to be careful not to mess with the control
    218  1.39.2.1     skrll 		 * state if the device is currently busy, but we can assume
    219  1.39.2.1     skrll 		 * that we never get to this point if that's the case.
    220  1.39.2.1     skrll 		 */
    221  1.39.2.1     skrll 		/* If it's not a polled command, we need the kenrel thread */
    222  1.39.2.1     skrll 		if ((xfer->c_flags & C_POLL) == 0 &&
    223  1.39.2.1     skrll 		    (chp->ch_flags & WDCF_TH_RUN) == 0) {
    224  1.39.2.1     skrll 			chp->ch_queue->queue_freeze++;
    225  1.39.2.1     skrll 			wakeup(&chp->ch_thread);
    226  1.39.2.1     skrll 			return;
    227  1.39.2.1     skrll 		}
    228  1.39.2.1     skrll 		/*
    229  1.39.2.1     skrll 		 * disable interrupts, all commands here should be quick
    230  1.39.2.1     skrll 		 * enouth to be able to poll, and we don't go here that often
    231  1.39.2.1     skrll 		 */
    232  1.39.2.1     skrll 		bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    233  1.39.2.1     skrll 		    WDCTL_4BIT | WDCTL_IDS);
    234  1.39.2.1     skrll 		if (wdc->cap & WDC_CAPABILITY_SELECT)
    235  1.39.2.1     skrll 			wdc->select(chp, xfer->c_drive);
    236  1.39.2.1     skrll 		bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
    237  1.39.2.1     skrll 		    WDSD_IBM | (xfer->c_drive << 4));
    238  1.39.2.1     skrll 		DELAY(10);
    239  1.39.2.1     skrll 		errstring = "wait";
    240  1.39.2.1     skrll 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    241  1.39.2.1     skrll 			goto ctrltimeout;
    242  1.39.2.1     skrll 		wdccommandshort(chp, xfer->c_drive, WDCC_RECAL);
    243  1.39.2.1     skrll 		/* Wait for at last 400ns for status bit to be valid */
    244  1.39.2.1     skrll 		DELAY(1);
    245  1.39.2.1     skrll 		errstring = "recal";
    246  1.39.2.1     skrll 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    247  1.39.2.1     skrll 			goto ctrltimeout;
    248  1.39.2.1     skrll 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    249  1.39.2.1     skrll 			goto ctrlerror;
    250  1.39.2.1     skrll 		/* Don't try to set modes if controller can't be adjusted */
    251  1.39.2.1     skrll 		if ((wdc->cap & WDC_CAPABILITY_MODE) == 0)
    252  1.39.2.1     skrll 			goto geometry;
    253  1.39.2.1     skrll 		/* Also don't try if the drive didn't report its mode */
    254  1.39.2.1     skrll 		if ((drvp->drive_flags & DRIVE_MODE) == 0)
    255  1.39.2.1     skrll 			goto geometry;
    256  1.39.2.1     skrll 		wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    257  1.39.2.1     skrll 		    0x08 | drvp->PIO_mode, WDSF_SET_MODE);
    258  1.39.2.1     skrll 		errstring = "piomode";
    259  1.39.2.1     skrll 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    260  1.39.2.1     skrll 			goto ctrltimeout;
    261  1.39.2.1     skrll 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    262  1.39.2.1     skrll 			goto ctrlerror;
    263  1.39.2.1     skrll 		if (drvp->drive_flags & DRIVE_UDMA) {
    264  1.39.2.1     skrll 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    265  1.39.2.1     skrll 			    0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
    266  1.39.2.1     skrll 		} else if (drvp->drive_flags & DRIVE_DMA) {
    267  1.39.2.1     skrll 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    268  1.39.2.1     skrll 			    0x20 | drvp->DMA_mode, WDSF_SET_MODE);
    269  1.39.2.1     skrll 		} else {
    270  1.39.2.1     skrll 			goto geometry;
    271  1.39.2.1     skrll 		}
    272  1.39.2.1     skrll 		errstring = "dmamode";
    273  1.39.2.1     skrll 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    274  1.39.2.1     skrll 			goto ctrltimeout;
    275  1.39.2.1     skrll 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    276  1.39.2.1     skrll 			goto ctrlerror;
    277  1.39.2.1     skrll geometry:
    278  1.39.2.1     skrll 		if (ata_bio->flags & ATA_LBA)
    279  1.39.2.1     skrll 			goto multimode;
    280  1.39.2.1     skrll 		wdccommand(chp, xfer->c_drive, WDCC_IDP,
    281  1.39.2.1     skrll 		    ata_bio->lp->d_ncylinders,
    282  1.39.2.1     skrll 		    ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
    283  1.39.2.1     skrll 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    284  1.39.2.1     skrll 			ata_bio->lp->d_precompcyl / 4 : 0);
    285  1.39.2.1     skrll 		errstring = "geometry";
    286  1.39.2.1     skrll 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    287  1.39.2.1     skrll 			goto ctrltimeout;
    288  1.39.2.1     skrll 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    289  1.39.2.1     skrll 			goto ctrlerror;
    290  1.39.2.1     skrll multimode:
    291  1.39.2.1     skrll 		if (ata_bio->multi == 1)
    292  1.39.2.1     skrll 			goto ready;
    293  1.39.2.1     skrll 		wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0,
    294  1.39.2.1     skrll 		    ata_bio->multi, 0);
    295  1.39.2.1     skrll 		errstring = "setmulti";
    296  1.39.2.1     skrll 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    297  1.39.2.1     skrll 			goto ctrltimeout;
    298  1.39.2.1     skrll 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    299  1.39.2.1     skrll 			goto ctrlerror;
    300  1.39.2.1     skrll ready:
    301  1.39.2.1     skrll 		drvp->state = READY;
    302  1.39.2.1     skrll 		/*
    303  1.39.2.1     skrll 		 * The drive is usable now
    304  1.39.2.1     skrll 		 */
    305  1.39.2.1     skrll 		bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr,
    306  1.39.2.1     skrll 		    WDCTL_4BIT);
    307  1.39.2.1     skrll 		delay(10); /* some drives need a little delay here */
    308  1.39.2.1     skrll 	}
    309  1.39.2.1     skrll 
    310      1.20    bouyer 	_wdc_ata_bio_start(chp, xfer);
    311  1.39.2.1     skrll 	return;
    312  1.39.2.1     skrll ctrltimeout:
    313  1.39.2.1     skrll 	printf("%s:%d:%d: %s timed out\n",
    314  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    315  1.39.2.1     skrll 	    errstring);
    316  1.39.2.1     skrll 	ata_bio->error = TIMEOUT;
    317  1.39.2.1     skrll 	goto ctrldone;
    318  1.39.2.1     skrll ctrlerror:
    319  1.39.2.1     skrll 	printf("%s:%d:%d: %s ",
    320  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    321  1.39.2.1     skrll 	    errstring);
    322  1.39.2.1     skrll 	if (chp->ch_status & WDCS_DWF) {
    323  1.39.2.1     skrll 		printf("drive fault\n");
    324  1.39.2.1     skrll 		ata_bio->error = ERR_DF;
    325  1.39.2.1     skrll 	} else {
    326  1.39.2.1     skrll 		printf("error (%x)\n", chp->ch_error);
    327  1.39.2.1     skrll 		ata_bio->r_error = chp->ch_error;
    328  1.39.2.1     skrll 		ata_bio->error = ERROR;
    329  1.39.2.1     skrll 	}
    330  1.39.2.1     skrll ctrldone:
    331  1.39.2.1     skrll 	drvp->state = 0;
    332  1.39.2.1     skrll 	wdc_ata_bio_done(chp, xfer);
    333  1.39.2.1     skrll 	bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
    334  1.39.2.1     skrll 	return;
    335      1.20    bouyer }
    336      1.20    bouyer 
    337  1.39.2.1     skrll static void
    338  1.39.2.1     skrll _wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer)
    339      1.20    bouyer {
    340  1.39.2.1     skrll 	struct wdc_softc *wdc = chp->ch_wdc;
    341  1.39.2.1     skrll 	struct ata_bio *ata_bio = xfer->c_cmd;
    342  1.39.2.1     skrll 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    343  1.39.2.1     skrll 	int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
    344       1.2    bouyer 	u_int16_t cyl;
    345       1.2    bouyer 	u_int8_t head, sect, cmd = 0;
    346       1.2    bouyer 	int nblks;
    347       1.2    bouyer 	int dma_flags = 0;
    348       1.2    bouyer 
    349      1.20    bouyer 	WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
    350  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    351      1.20    bouyer 	    DEBUG_INTR | DEBUG_XFERS);
    352       1.2    bouyer 
    353       1.2    bouyer 	if (xfer->c_flags & C_DMA) {
    354      1.23    bouyer 		if (drvp->n_xfers <= NXFER)
    355      1.23    bouyer 			drvp->n_xfers++;
    356       1.2    bouyer 		dma_flags = (ata_bio->flags & ATA_READ) ?  WDC_DMA_READ : 0;
    357      1.39  nakayama 		if (ata_bio->flags & ATA_LBA48)
    358      1.39  nakayama 			dma_flags |= WDC_DMA_LBA48;
    359       1.2    bouyer 	}
    360       1.2    bouyer again:
    361       1.2    bouyer 	/*
    362       1.2    bouyer 	 *
    363       1.2    bouyer 	 * When starting a multi-sector transfer, or doing single-sector
    364       1.2    bouyer 	 * transfers...
    365       1.2    bouyer 	 */
    366       1.2    bouyer 	if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
    367       1.2    bouyer 		if (ata_bio->flags & ATA_SINGLE)
    368       1.2    bouyer 			nblks = 1;
    369       1.2    bouyer 		else
    370       1.2    bouyer 			nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    371       1.2    bouyer 		/* Check for bad sectors and adjust transfer, if necessary. */
    372       1.2    bouyer 		if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
    373       1.2    bouyer 			long blkdiff;
    374       1.2    bouyer 			int i;
    375       1.2    bouyer 			for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
    376       1.2    bouyer 			    i++) {
    377       1.2    bouyer 				blkdiff -= ata_bio->blkno;
    378       1.2    bouyer 				if (blkdiff < 0)
    379       1.2    bouyer 					continue;
    380       1.2    bouyer 				if (blkdiff == 0) {
    381       1.2    bouyer 					/* Replace current block of transfer. */
    382       1.2    bouyer 					ata_bio->blkno =
    383       1.2    bouyer 					    ata_bio->lp->d_secperunit -
    384       1.2    bouyer 					    ata_bio->lp->d_nsectors - i - 1;
    385       1.2    bouyer 				}
    386       1.2    bouyer 				if (blkdiff < nblks) {
    387       1.2    bouyer 					/* Bad block inside transfer. */
    388       1.2    bouyer 					ata_bio->flags |= ATA_SINGLE;
    389       1.2    bouyer 					nblks = 1;
    390       1.2    bouyer 				}
    391       1.2    bouyer 				break;
    392       1.2    bouyer 			}
    393       1.2    bouyer 		/* Transfer is okay now. */
    394       1.2    bouyer 		}
    395      1.34  christos 		if (ata_bio->flags & ATA_LBA48) {
    396      1.34  christos 			sect = 0;
    397      1.34  christos 			cyl =  0;
    398      1.34  christos 			head = 0;
    399      1.34  christos 		} else if (ata_bio->flags & ATA_LBA) {
    400       1.2    bouyer 			sect = (ata_bio->blkno >> 0) & 0xff;
    401       1.2    bouyer 			cyl = (ata_bio->blkno >> 8) & 0xffff;
    402       1.2    bouyer 			head = (ata_bio->blkno >> 24) & 0x0f;
    403       1.2    bouyer 			head |= WDSD_LBA;
    404       1.2    bouyer 		} else {
    405       1.2    bouyer 			int blkno = ata_bio->blkno;
    406       1.2    bouyer 			sect = blkno % ata_bio->lp->d_nsectors;
    407       1.2    bouyer 			sect++;    /* Sectors begin with 1, not 0. */
    408       1.2    bouyer 			blkno /= ata_bio->lp->d_nsectors;
    409       1.2    bouyer 			head = blkno % ata_bio->lp->d_ntracks;
    410       1.2    bouyer 			blkno /= ata_bio->lp->d_ntracks;
    411       1.2    bouyer 			cyl = blkno;
    412       1.2    bouyer 			head |= WDSD_CHS;
    413       1.2    bouyer 		}
    414       1.2    bouyer 		if (xfer->c_flags & C_DMA) {
    415       1.2    bouyer 			ata_bio->nblks = nblks;
    416       1.2    bouyer 			ata_bio->nbytes = xfer->c_bcount;
    417       1.2    bouyer 			cmd = (ata_bio->flags & ATA_READ) ?
    418       1.2    bouyer 			    WDCC_READDMA : WDCC_WRITEDMA;
    419       1.2    bouyer 	    		/* Init the DMA channel. */
    420  1.39.2.1     skrll 			if ((*wdc->dma_init)(wdc->dma_arg,
    421  1.39.2.1     skrll 			    chp->ch_channel, xfer->c_drive,
    422  1.39.2.1     skrll 			    (char *)xfer->c_databuf + xfer->c_skip,
    423      1.11  augustss 			    ata_bio->nbytes, dma_flags) != 0) {
    424       1.2    bouyer 				ata_bio->error = ERR_DMA;
    425       1.2    bouyer 				ata_bio->r_error = 0;
    426       1.2    bouyer 				wdc_ata_bio_done(chp, xfer);
    427       1.2    bouyer 				return;
    428       1.2    bouyer 			}
    429       1.2    bouyer 			/* Initiate command */
    430  1.39.2.1     skrll 			if (wdc->cap & WDC_CAPABILITY_SELECT)
    431  1.39.2.1     skrll 				wdc->select(chp, xfer->c_drive);
    432  1.39.2.1     skrll 			bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh],
    433  1.39.2.1     skrll 			    0, WDSD_IBM | (xfer->c_drive << 4));
    434  1.39.2.1     skrll 			switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
    435  1.39.2.1     skrll 			case WDCWAIT_OK:
    436  1.39.2.1     skrll 				break;
    437  1.39.2.1     skrll 			case WDCWAIT_TOUT:
    438       1.2    bouyer 				goto timeout;
    439  1.39.2.1     skrll 			case WDCWAIT_THR:
    440  1.39.2.1     skrll 				return;
    441  1.39.2.1     skrll 			}
    442      1.34  christos 			if (ata_bio->flags & ATA_LBA48) {
    443  1.39.2.1     skrll 			    wdccommandext(chp, xfer->c_drive, to48(cmd),
    444      1.34  christos 				(u_int64_t)ata_bio->blkno, nblks);
    445      1.34  christos 			} else {
    446  1.39.2.1     skrll 			    wdccommand(chp, xfer->c_drive, cmd, cyl,
    447      1.34  christos 				head, sect, nblks, 0);
    448      1.34  christos 			}
    449       1.2    bouyer 			/* start the DMA channel */
    450  1.39.2.1     skrll 			(*wdc->dma_start)(wdc->dma_arg,
    451  1.39.2.1     skrll 			    chp->ch_channel, xfer->c_drive);
    452      1.26    bouyer 			chp->ch_flags |= WDCF_DMA_WAIT;
    453  1.39.2.1     skrll 			/* start timeout machinery */
    454  1.39.2.1     skrll 			if ((xfer->c_flags & C_POLL) == 0)
    455  1.39.2.1     skrll 				callout_reset(&chp->ch_callout,
    456  1.39.2.1     skrll 				    ATA_DELAY / 1000 * hz, wdctimeout, chp);
    457       1.2    bouyer 			/* wait for irq */
    458       1.2    bouyer 			goto intr;
    459       1.2    bouyer 		} /* else not DMA */
    460       1.2    bouyer 		ata_bio->nblks = min(nblks, ata_bio->multi);
    461       1.2    bouyer 		ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
    462  1.39.2.1     skrll 		KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0);
    463  1.39.2.1     skrll 		if (ata_bio->nblks > 1) {
    464       1.2    bouyer 			cmd = (ata_bio->flags & ATA_READ) ?
    465       1.2    bouyer 			    WDCC_READMULTI : WDCC_WRITEMULTI;
    466       1.2    bouyer 		} else {
    467       1.2    bouyer 			cmd = (ata_bio->flags & ATA_READ) ?
    468       1.2    bouyer 			    WDCC_READ : WDCC_WRITE;
    469       1.2    bouyer 		}
    470       1.2    bouyer 		/* Initiate command! */
    471  1.39.2.1     skrll 		if (wdc->cap & WDC_CAPABILITY_SELECT)
    472  1.39.2.1     skrll 			wdc->select(chp, xfer->c_drive);
    473  1.39.2.1     skrll 		bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0,
    474  1.39.2.1     skrll 		    WDSD_IBM | (xfer->c_drive << 4));
    475  1.39.2.1     skrll 		switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
    476  1.39.2.1     skrll 		case WDCWAIT_OK:
    477  1.39.2.1     skrll 			break;
    478  1.39.2.1     skrll 		case WDCWAIT_TOUT:
    479       1.2    bouyer 			goto timeout;
    480  1.39.2.1     skrll 		case WDCWAIT_THR:
    481  1.39.2.1     skrll 			return;
    482  1.39.2.1     skrll 		}
    483      1.34  christos 		if (ata_bio->flags & ATA_LBA48) {
    484  1.39.2.1     skrll 		    wdccommandext(chp, xfer->c_drive, to48(cmd),
    485      1.34  christos 			(u_int64_t) ata_bio->blkno, nblks);
    486      1.34  christos 		} else {
    487  1.39.2.1     skrll 		    wdccommand(chp, xfer->c_drive, cmd, cyl,
    488      1.34  christos 			head, sect, nblks,
    489      1.34  christos 			(ata_bio->lp->d_type == DTYPE_ST506) ?
    490      1.34  christos 			ata_bio->lp->d_precompcyl / 4 : 0);
    491      1.34  christos 		}
    492  1.39.2.1     skrll 		/* start timeout machinery */
    493  1.39.2.1     skrll 		if ((xfer->c_flags & C_POLL) == 0)
    494  1.39.2.1     skrll 			callout_reset(&chp->ch_callout,
    495  1.39.2.1     skrll 			    ATA_DELAY / 1000 * hz, wdctimeout, chp);
    496       1.2    bouyer 	} else if (ata_bio->nblks > 1) {
    497       1.2    bouyer 		/* The number of blocks in the last stretch may be smaller. */
    498       1.2    bouyer 		nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    499       1.2    bouyer 		if (ata_bio->nblks > nblks) {
    500       1.2    bouyer 		ata_bio->nblks = nblks;
    501       1.2    bouyer 		ata_bio->nbytes = xfer->c_bcount;
    502       1.2    bouyer 		}
    503       1.2    bouyer 	}
    504       1.2    bouyer 	/* If this was a write and not using DMA, push the data. */
    505       1.2    bouyer 	if ((ata_bio->flags & ATA_READ) == 0) {
    506  1.39.2.1     skrll 		/*
    507  1.39.2.1     skrll 		 * we have to busy-wait here, we can't rely on running in
    508  1.39.2.1     skrll 		 * thread context.
    509  1.39.2.1     skrll 		 */
    510  1.39.2.1     skrll 		if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) {
    511       1.2    bouyer 			printf("%s:%d:%d: timeout waiting for DRQ, "
    512       1.2    bouyer 			    "st=0x%02x, err=0x%02x\n",
    513  1.39.2.1     skrll 			    wdc->sc_dev.dv_xname, chp->ch_channel,
    514  1.39.2.1     skrll 			    xfer->c_drive, chp->ch_status, chp->ch_error);
    515      1.16    bouyer 			if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    516       1.2    bouyer 				ata_bio->error = TIMEOUT;
    517       1.2    bouyer 			wdc_ata_bio_done(chp, xfer);
    518       1.2    bouyer 			return;
    519       1.2    bouyer 		}
    520      1.16    bouyer 		if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
    521       1.2    bouyer 			wdc_ata_bio_done(chp, xfer);
    522       1.2    bouyer 			return;
    523       1.2    bouyer 		}
    524  1.39.2.1     skrll 		if ((wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
    525       1.2    bouyer 			if (drvp->drive_flags & DRIVE_CAP32) {
    526       1.2    bouyer 				bus_space_write_multi_4(chp->data32iot,
    527       1.2    bouyer 				    chp->data32ioh, 0,
    528  1.39.2.1     skrll 				    (u_int32_t *)((char *)xfer->c_databuf +
    529      1.12   thorpej 				                  xfer->c_skip),
    530       1.2    bouyer 				    ata_bio->nbytes >> 2);
    531       1.2    bouyer 			} else {
    532       1.2    bouyer 				bus_space_write_multi_2(chp->cmd_iot,
    533  1.39.2.1     skrll 				    chp->cmd_iohs[wd_data], 0,
    534  1.39.2.1     skrll 				    (u_int16_t *)((char *)xfer->c_databuf +
    535      1.12   thorpej 				                  xfer->c_skip),
    536       1.2    bouyer 				    ata_bio->nbytes >> 1);
    537       1.2    bouyer 			}
    538       1.2    bouyer 		} else {
    539       1.2    bouyer 			if (drvp->drive_flags & DRIVE_CAP32) {
    540       1.2    bouyer 				bus_space_write_multi_stream_4(chp->data32iot,
    541       1.2    bouyer 				    chp->data32ioh, 0,
    542  1.39.2.1     skrll 				    (u_int32_t *)((char *)xfer->c_databuf +
    543      1.12   thorpej 				                  xfer->c_skip),
    544       1.2    bouyer 				    ata_bio->nbytes >> 2);
    545       1.2    bouyer 			} else {
    546       1.2    bouyer 				bus_space_write_multi_stream_2(chp->cmd_iot,
    547  1.39.2.1     skrll 				    chp->cmd_iohs[wd_data], 0,
    548  1.39.2.1     skrll 				    (u_int16_t *)((char *)xfer->c_databuf +
    549      1.12   thorpej 				                  xfer->c_skip),
    550       1.2    bouyer 				    ata_bio->nbytes >> 1);
    551       1.2    bouyer 			}
    552       1.2    bouyer 		}
    553       1.2    bouyer 	}
    554       1.2    bouyer 
    555       1.2    bouyer intr:	/* Wait for IRQ (either real or polled) */
    556       1.2    bouyer 	if ((ata_bio->flags & ATA_POLL) == 0) {
    557       1.2    bouyer 		chp->ch_flags |= WDCF_IRQ_WAIT;
    558       1.2    bouyer 	} else {
    559       1.2    bouyer 		/* Wait for at last 400ns for status bit to be valid */
    560       1.2    bouyer 		delay(1);
    561      1.26    bouyer 		if (chp->ch_flags & WDCF_DMA_WAIT) {
    562      1.26    bouyer 			wdc_dmawait(chp, xfer, ATA_DELAY);
    563      1.26    bouyer 			chp->ch_flags &= ~WDCF_DMA_WAIT;
    564      1.26    bouyer 		}
    565      1.19    bouyer 		wdc_ata_bio_intr(chp, xfer, 0);
    566       1.2    bouyer 		if ((ata_bio->flags & ATA_ITSDONE) == 0)
    567       1.2    bouyer 			goto again;
    568       1.2    bouyer 	}
    569       1.2    bouyer 	return;
    570       1.2    bouyer timeout:
    571       1.2    bouyer 	printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
    572  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    573       1.2    bouyer 	    chp->ch_status, chp->ch_error);
    574      1.16    bouyer 	if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    575       1.2    bouyer 		ata_bio->error = TIMEOUT;
    576       1.2    bouyer 	wdc_ata_bio_done(chp, xfer);
    577       1.2    bouyer 	return;
    578       1.2    bouyer }
    579       1.2    bouyer 
    580  1.39.2.1     skrll static int
    581  1.39.2.1     skrll wdc_ata_bio_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq)
    582       1.2    bouyer {
    583  1.39.2.1     skrll 	struct wdc_softc *wdc = chp->ch_wdc;
    584  1.39.2.1     skrll 	struct ata_bio *ata_bio = xfer->c_cmd;
    585  1.39.2.1     skrll 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    586       1.2    bouyer 	int drv_err;
    587       1.2    bouyer 
    588       1.2    bouyer 	WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
    589  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    590       1.2    bouyer 	    DEBUG_INTR | DEBUG_XFERS);
    591       1.2    bouyer 
    592       1.2    bouyer 
    593       1.2    bouyer 	/* Is it not a transfer, but a control operation? */
    594       1.2    bouyer 	if (drvp->state < READY) {
    595       1.2    bouyer 		printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
    596  1.39.2.1     skrll 		    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    597       1.2    bouyer 		    drvp->state);
    598      1.38    provos 		panic("wdc_ata_bio_intr: bad state");
    599       1.2    bouyer 	}
    600       1.2    bouyer 
    601      1.20    bouyer 	/*
    602      1.20    bouyer 	 * if we missed an interrupt in a PIO transfer, reset and restart.
    603      1.20    bouyer 	 * Don't try to continue transfer, we may have missed cycles.
    604      1.20    bouyer 	 */
    605      1.20    bouyer 	if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
    606      1.20    bouyer 		ata_bio->error = TIMEOUT;
    607      1.20    bouyer 		wdc_ata_bio_done(chp, xfer);
    608      1.20    bouyer 		return 1;
    609      1.20    bouyer 	}
    610      1.20    bouyer 
    611  1.39.2.1     skrll 	/* Ack interrupt done by wdc_wait_for_unbusy */
    612  1.39.2.1     skrll 	if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) {
    613      1.19    bouyer 		if (irq && (xfer->c_flags & C_TIMEOU) == 0)
    614      1.18    bouyer 			return 0; /* IRQ was not for us */
    615       1.2    bouyer 		printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
    616  1.39.2.1     skrll 		    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    617       1.2    bouyer 		    xfer->c_bcount, xfer->c_skip);
    618       1.2    bouyer 		ata_bio->error = TIMEOUT;
    619       1.2    bouyer 		wdc_ata_bio_done(chp, xfer);
    620       1.2    bouyer 		return 1;
    621       1.2    bouyer 	}
    622  1.39.2.1     skrll 	if (wdc->cap & WDC_CAPABILITY_IRQACK)
    623  1.39.2.1     skrll 		wdc->irqack(chp);
    624       1.2    bouyer 
    625      1.16    bouyer 	drv_err = wdc_ata_err(drvp, ata_bio);
    626       1.2    bouyer 
    627       1.2    bouyer 	/* If we were using DMA, Turn off the DMA channel and check for error */
    628       1.2    bouyer 	if (xfer->c_flags & C_DMA) {
    629       1.2    bouyer 		if (ata_bio->flags & ATA_POLL) {
    630       1.2    bouyer 			/*
    631      1.13    bouyer 			 * IDE drives deassert WDCS_BSY before transfer is
    632       1.2    bouyer 			 * complete when using DMA. Polling for DRQ to deassert
    633      1.37       wiz 			 * is not enough DRQ is not required to be
    634       1.7    bouyer 			 * asserted for DMA transfers, so poll for DRDY.
    635       1.2    bouyer 			 */
    636       1.2    bouyer 			if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
    637  1.39.2.1     skrll 			    ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) {
    638       1.7    bouyer 				printf("%s:%d:%d: polled transfer timed out "
    639  1.39.2.1     skrll 				    "(st=0x%x)\n", wdc->sc_dev.dv_xname,
    640  1.39.2.1     skrll 				    chp->ch_channel, xfer->c_drive,
    641  1.39.2.1     skrll 				    chp->ch_status);
    642       1.2    bouyer 				ata_bio->error = TIMEOUT;
    643      1.10    bouyer 				drv_err = WDC_ATA_ERR;
    644      1.10    bouyer 			}
    645      1.10    bouyer 		}
    646  1.39.2.1     skrll 		if (wdc->dma_status != 0) {
    647      1.10    bouyer 			if (drv_err != WDC_ATA_ERR) {
    648      1.10    bouyer 				ata_bio->error = ERR_DMA;
    649      1.10    bouyer 				drv_err = WDC_ATA_ERR;
    650       1.2    bouyer 			}
    651       1.2    bouyer 		}
    652       1.2    bouyer 		if (chp->ch_status & WDCS_DRQ) {
    653       1.2    bouyer 			if (drv_err != WDC_ATA_ERR) {
    654       1.2    bouyer 				printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
    655  1.39.2.1     skrll 				    wdc->sc_dev.dv_xname, chp->ch_channel,
    656  1.39.2.1     skrll 				    xfer->c_drive, chp->ch_status);
    657       1.2    bouyer 				ata_bio->error = TIMEOUT;
    658       1.2    bouyer 				drv_err = WDC_ATA_ERR;
    659       1.2    bouyer 			}
    660       1.2    bouyer 		}
    661  1.39.2.1     skrll 		if (ata_bio->r_error & WDCE_CRC)
    662  1.39.2.1     skrll 			ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0);
    663       1.2    bouyer 		if (drv_err != WDC_ATA_ERR)
    664       1.2    bouyer 			goto end;
    665       1.2    bouyer 	}
    666       1.2    bouyer 
    667       1.2    bouyer 	/* if we had an error, end */
    668       1.2    bouyer 	if (drv_err == WDC_ATA_ERR) {
    669       1.2    bouyer 		wdc_ata_bio_done(chp, xfer);
    670       1.2    bouyer 		return 1;
    671       1.2    bouyer 	}
    672       1.2    bouyer 
    673       1.2    bouyer 	/* If this was a read and not using DMA, fetch the data. */
    674       1.2    bouyer 	if ((ata_bio->flags & ATA_READ) != 0) {
    675      1.14    bouyer 		if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
    676       1.2    bouyer 			printf("%s:%d:%d: read intr before drq\n",
    677  1.39.2.1     skrll 			    wdc->sc_dev.dv_xname, chp->ch_channel,
    678  1.39.2.1     skrll 			    xfer->c_drive);
    679       1.2    bouyer 			ata_bio->error = TIMEOUT;
    680       1.2    bouyer 			wdc_ata_bio_done(chp, xfer);
    681       1.2    bouyer 			return 1;
    682       1.2    bouyer 		}
    683  1.39.2.1     skrll 		if ((wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
    684       1.2    bouyer 			if (drvp->drive_flags & DRIVE_CAP32) {
    685       1.2    bouyer 				bus_space_read_multi_4(chp->data32iot,
    686       1.2    bouyer 				    chp->data32ioh, 0,
    687  1.39.2.1     skrll 				    (u_int32_t *)((char *)xfer->c_databuf +
    688      1.12   thorpej 				                  xfer->c_skip),
    689       1.2    bouyer 				    ata_bio->nbytes >> 2);
    690       1.2    bouyer 			} else {
    691       1.2    bouyer 				bus_space_read_multi_2(chp->cmd_iot,
    692  1.39.2.1     skrll 				    chp->cmd_iohs[wd_data], 0,
    693  1.39.2.1     skrll 				    (u_int16_t *)((char *)xfer->c_databuf +
    694      1.12   thorpej 				                  xfer->c_skip),
    695       1.2    bouyer 				    ata_bio->nbytes >> 1);
    696       1.2    bouyer 			}
    697       1.2    bouyer 		} else {
    698       1.2    bouyer 			if (drvp->drive_flags & DRIVE_CAP32) {
    699       1.2    bouyer 				bus_space_read_multi_stream_4(chp->data32iot,
    700       1.2    bouyer 				    chp->data32ioh, 0,
    701  1.39.2.1     skrll 				    (u_int32_t *)((char *)xfer->c_databuf +
    702      1.12   thorpej 				                  xfer->c_skip),
    703       1.2    bouyer 				    ata_bio->nbytes >> 2);
    704       1.2    bouyer 			} else {
    705       1.2    bouyer 				bus_space_read_multi_stream_2(chp->cmd_iot,
    706  1.39.2.1     skrll 				    chp->cmd_iohs[wd_data], 0,
    707  1.39.2.1     skrll 				    (u_int16_t *)((char *)xfer->c_databuf +
    708      1.12   thorpej 				                  xfer->c_skip),
    709       1.2    bouyer 				    ata_bio->nbytes >> 1);
    710       1.2    bouyer 			}
    711       1.2    bouyer 		}
    712       1.2    bouyer 	}
    713       1.2    bouyer 
    714       1.2    bouyer end:
    715       1.2    bouyer 	ata_bio->blkno += ata_bio->nblks;
    716       1.2    bouyer 	ata_bio->blkdone += ata_bio->nblks;
    717       1.2    bouyer 	xfer->c_skip += ata_bio->nbytes;
    718       1.2    bouyer 	xfer->c_bcount -= ata_bio->nbytes;
    719       1.2    bouyer 	/* See if this transfer is complete. */
    720       1.2    bouyer 	if (xfer->c_bcount > 0) {
    721       1.2    bouyer 		if ((ata_bio->flags & ATA_POLL) == 0) {
    722       1.2    bouyer 			/* Start the next operation */
    723      1.20    bouyer 			_wdc_ata_bio_start(chp, xfer);
    724       1.2    bouyer 		} else {
    725      1.20    bouyer 			/* Let _wdc_ata_bio_start do the loop */
    726       1.2    bouyer 			return 1;
    727       1.2    bouyer 		}
    728       1.2    bouyer 	} else { /* Done with this transfer */
    729       1.2    bouyer 		ata_bio->error = NOERROR;
    730       1.2    bouyer 		wdc_ata_bio_done(chp, xfer);
    731       1.2    bouyer 	}
    732       1.2    bouyer 	return 1;
    733      1.22     enami }
    734      1.22     enami 
    735  1.39.2.1     skrll static void
    736  1.39.2.1     skrll wdc_ata_kill_pending(struct ata_drive_datas *drvp)
    737      1.22     enami {
    738  1.39.2.1     skrll 	struct wdc_channel *chp = drvp->chnl_softc;
    739      1.22     enami 
    740      1.22     enami 	wdc_kill_pending(chp);
    741      1.22     enami }
    742      1.22     enami 
    743  1.39.2.1     skrll static void
    744  1.39.2.1     skrll wdc_ata_bio_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer,
    745  1.39.2.1     skrll     int reason)
    746      1.22     enami {
    747  1.39.2.1     skrll 	struct ata_bio *ata_bio = xfer->c_cmd;
    748  1.39.2.1     skrll 	int drive = xfer->c_drive;
    749      1.22     enami 
    750      1.24   thorpej 	callout_stop(&chp->ch_callout);
    751      1.22     enami 	/* remove this command from xfer queue */
    752      1.22     enami 	wdc_free_xfer(chp, xfer);
    753      1.22     enami 
    754      1.22     enami 	ata_bio->flags |= ATA_ITSDONE;
    755  1.39.2.1     skrll 	switch (reason) {
    756  1.39.2.1     skrll 	case KILL_GONE:
    757  1.39.2.1     skrll 		ata_bio->error = ERR_NODEV;
    758  1.39.2.1     skrll 		break;
    759  1.39.2.1     skrll 	case KILL_RESET:
    760  1.39.2.1     skrll 		ata_bio->error = ERR_RESET;
    761  1.39.2.1     skrll 		break;
    762  1.39.2.1     skrll 	default:
    763  1.39.2.1     skrll 		printf("wdc_ata_bio_kill_xfer: unknown reason %d\n",
    764  1.39.2.1     skrll 		    reason);
    765  1.39.2.1     skrll 		panic("wdc_ata_bio_kill_xfer");
    766  1.39.2.1     skrll 	}
    767      1.22     enami 	ata_bio->r_error = WDCE_ABRT;
    768  1.39.2.1     skrll 	WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
    769  1.39.2.1     skrll 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
    770       1.2    bouyer }
    771       1.2    bouyer 
    772  1.39.2.1     skrll static void
    773  1.39.2.1     skrll wdc_ata_bio_done(struct wdc_channel *chp, struct ata_xfer *xfer)
    774       1.2    bouyer {
    775  1.39.2.1     skrll 	struct wdc_softc *wdc = chp->ch_wdc;
    776  1.39.2.1     skrll 	struct ata_bio *ata_bio = xfer->c_cmd;
    777  1.39.2.1     skrll 	int drive = xfer->c_drive;
    778       1.2    bouyer 
    779       1.5    bouyer 	WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
    780  1.39.2.1     skrll 	    wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    781       1.5    bouyer 	    (u_int)xfer->c_flags),
    782       1.4    bouyer 	    DEBUG_XFERS);
    783      1.10    bouyer 
    784      1.24   thorpej 	callout_stop(&chp->ch_callout);
    785       1.2    bouyer 
    786       1.2    bouyer 	/* feed back residual bcount to our caller */
    787       1.2    bouyer 	ata_bio->bcount = xfer->c_bcount;
    788       1.2    bouyer 
    789       1.2    bouyer 	/* remove this command from xfer queue */
    790       1.2    bouyer 	wdc_free_xfer(chp, xfer);
    791       1.2    bouyer 
    792       1.2    bouyer 	ata_bio->flags |= ATA_ITSDONE;
    793  1.39.2.1     skrll 	WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
    794  1.39.2.1     skrll 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
    795       1.2    bouyer 	WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
    796       1.4    bouyer 	    chp->ch_flags), DEBUG_XFERS);
    797       1.9  drochner 	wdcstart(chp);
    798       1.2    bouyer }
    799       1.2    bouyer 
    800  1.39.2.1     skrll static int
    801  1.39.2.1     skrll wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
    802       1.2    bouyer {
    803  1.39.2.1     skrll 	struct wdc_channel *chp = drvp->chnl_softc;
    804       1.2    bouyer 	ata_bio->error = 0;
    805       1.2    bouyer 	if (chp->ch_status & WDCS_BSY) {
    806       1.2    bouyer 		ata_bio->error = TIMEOUT;
    807       1.2    bouyer 		return WDC_ATA_ERR;
    808       1.2    bouyer 	}
    809       1.2    bouyer 
    810       1.2    bouyer 	if (chp->ch_status & WDCS_DWF) {
    811       1.2    bouyer 		ata_bio->error = ERR_DF;
    812       1.2    bouyer 		return WDC_ATA_ERR;
    813       1.2    bouyer 	}
    814       1.2    bouyer 
    815       1.2    bouyer 	if (chp->ch_status & WDCS_ERR) {
    816       1.2    bouyer 		ata_bio->error = ERROR;
    817       1.2    bouyer 		ata_bio->r_error = chp->ch_error;
    818       1.2    bouyer 		if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
    819       1.2    bouyer 		    WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
    820       1.2    bouyer 			return WDC_ATA_ERR;
    821       1.2    bouyer 		return WDC_ATA_NOERR;
    822       1.2    bouyer 	}
    823       1.2    bouyer 
    824       1.2    bouyer 	if (chp->ch_status & WDCS_CORR)
    825       1.2    bouyer 		ata_bio->flags |= ATA_CORR;
    826       1.2    bouyer 	return WDC_ATA_NOERR;
    827       1.8   thorpej }
    828       1.8   thorpej 
    829  1.39.2.1     skrll static int
    830  1.39.2.1     skrll wdc_ata_addref(struct ata_drive_datas *drvp)
    831       1.8   thorpej {
    832  1.39.2.1     skrll 	struct wdc_channel *chp = drvp->chnl_softc;
    833       1.8   thorpej 
    834       1.8   thorpej 	return (wdc_addref(chp));
    835       1.8   thorpej }
    836       1.8   thorpej 
    837  1.39.2.1     skrll static void
    838  1.39.2.1     skrll wdc_ata_delref(struct ata_drive_datas *drvp)
    839       1.8   thorpej {
    840  1.39.2.1     skrll 	struct wdc_channel *chp = drvp->chnl_softc;
    841       1.8   thorpej 
    842       1.8   thorpej 	wdc_delref(chp);
    843       1.2    bouyer }
    844