ata_wdc.c revision 1.7 1 1.7 bouyer /* $NetBSD: ata_wdc.c,v 1.7 1998/11/11 19:38:27 bouyer Exp $ */
2 1.2 bouyer
3 1.2 bouyer /*
4 1.2 bouyer * Copyright (c) 1998 Manuel Bouyer.
5 1.2 bouyer *
6 1.2 bouyer * Redistribution and use in source and binary forms, with or without
7 1.2 bouyer * modification, are permitted provided that the following conditions
8 1.2 bouyer * are met:
9 1.2 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.2 bouyer * notice, this list of conditions and the following disclaimer.
11 1.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.2 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.2 bouyer * documentation and/or other materials provided with the distribution.
14 1.2 bouyer * 3. All advertising materials mentioning features or use of this software
15 1.2 bouyer * must display the following acknowledgement:
16 1.2 bouyer * This product includes software developed by the University of
17 1.2 bouyer * California, Berkeley and its contributors.
18 1.2 bouyer * 4. Neither the name of the University nor the names of its contributors
19 1.2 bouyer * may be used to endorse or promote products derived from this software
20 1.2 bouyer * without specific prior written permission.
21 1.2 bouyer *
22 1.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 1.2 bouyer * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.2 bouyer * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.2 bouyer * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 1.2 bouyer * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.2 bouyer * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.2 bouyer * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.2 bouyer * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.2 bouyer * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.2 bouyer * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.2 bouyer * SUCH DAMAGE.
33 1.2 bouyer *
34 1.2 bouyer */
35 1.2 bouyer
36 1.2 bouyer /*-
37 1.2 bouyer * Copyright (c) 1998 The NetBSD Foundation, Inc.
38 1.2 bouyer * All rights reserved.
39 1.2 bouyer *
40 1.2 bouyer * This code is derived from software contributed to The NetBSD Foundation
41 1.2 bouyer * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
42 1.2 bouyer *
43 1.2 bouyer * Redistribution and use in source and binary forms, with or without
44 1.2 bouyer * modification, are permitted provided that the following conditions
45 1.2 bouyer * are met:
46 1.2 bouyer * 1. Redistributions of source code must retain the above copyright
47 1.2 bouyer * notice, this list of conditions and the following disclaimer.
48 1.2 bouyer * 2. Redistributions in binary form must reproduce the above copyright
49 1.2 bouyer * notice, this list of conditions and the following disclaimer in the
50 1.2 bouyer * documentation and/or other materials provided with the distribution.
51 1.2 bouyer * 3. All advertising materials mentioning features or use of this software
52 1.2 bouyer * must display the following acknowledgement:
53 1.2 bouyer * This product includes software developed by the NetBSD
54 1.2 bouyer * Foundation, Inc. and its contributors.
55 1.2 bouyer * 4. Neither the name of The NetBSD Foundation nor the names of its
56 1.2 bouyer * contributors may be used to endorse or promote products derived
57 1.2 bouyer * from this software without specific prior written permission.
58 1.2 bouyer *
59 1.2 bouyer * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
60 1.2 bouyer * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
61 1.2 bouyer * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
62 1.2 bouyer * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
63 1.2 bouyer * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
64 1.2 bouyer * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
65 1.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
66 1.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
67 1.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
68 1.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
69 1.2 bouyer * POSSIBILITY OF SUCH DAMAGE.
70 1.2 bouyer */
71 1.2 bouyer
72 1.2 bouyer #define WDCDEBUG
73 1.2 bouyer
74 1.2 bouyer #include <sys/param.h>
75 1.2 bouyer #include <sys/systm.h>
76 1.2 bouyer #include <sys/kernel.h>
77 1.2 bouyer #include <sys/file.h>
78 1.2 bouyer #include <sys/stat.h>
79 1.2 bouyer #include <sys/buf.h>
80 1.2 bouyer #include <sys/malloc.h>
81 1.2 bouyer #include <sys/device.h>
82 1.2 bouyer #include <sys/disklabel.h>
83 1.2 bouyer #include <sys/syslog.h>
84 1.2 bouyer #include <sys/proc.h>
85 1.2 bouyer
86 1.2 bouyer #include <machine/intr.h>
87 1.2 bouyer #include <machine/bus.h>
88 1.2 bouyer #ifndef __BUS_SPACE_HAS_STREAM_METHODS
89 1.2 bouyer #define bus_space_write_multi_stream_2 bus_space_write_multi_2
90 1.2 bouyer #define bus_space_write_multi_stream_4 bus_space_write_multi_4
91 1.2 bouyer #define bus_space_read_multi_stream_2 bus_space_read_multi_2
92 1.2 bouyer #define bus_space_read_multi_stream_4 bus_space_read_multi_4
93 1.2 bouyer #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
94 1.2 bouyer
95 1.2 bouyer #include <dev/ata/atareg.h>
96 1.2 bouyer #include <dev/ata/atavar.h>
97 1.2 bouyer #include <dev/ic/wdcreg.h>
98 1.2 bouyer #include <dev/ic/wdcvar.h>
99 1.2 bouyer #include <dev/ata/wdvar.h>
100 1.2 bouyer
101 1.2 bouyer #define DEBUG_INTR 0x01
102 1.2 bouyer #define DEBUG_XFERS 0x02
103 1.2 bouyer #define DEBUG_STATUS 0x04
104 1.2 bouyer #define DEBUG_FUNCS 0x08
105 1.2 bouyer #define DEBUG_PROBE 0x10
106 1.2 bouyer #ifdef WDCDEBUG
107 1.3 thorpej int wdcdebug_wd_mask = 0;
108 1.2 bouyer #define WDCDEBUG_PRINT(args, level) \
109 1.2 bouyer if (wdcdebug_wd_mask & (level)) \
110 1.2 bouyer printf args
111 1.2 bouyer #else
112 1.2 bouyer #define WDCDEBUG_PRINT(args, level)
113 1.2 bouyer #endif
114 1.2 bouyer
115 1.2 bouyer #define ATA_DELAY 10000 /* 10s for a drive I/O */
116 1.2 bouyer
117 1.2 bouyer void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
118 1.2 bouyer int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *));
119 1.2 bouyer void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *));
120 1.2 bouyer int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *));
121 1.2 bouyer int wdc_ata_err __P((struct channel_softc *, struct ata_bio *));
122 1.2 bouyer #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
123 1.2 bouyer #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
124 1.2 bouyer #define WDC_ATA_ERR 0x02 /* Drive reports an error */
125 1.2 bouyer
126 1.2 bouyer /*
127 1.2 bouyer * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
128 1.2 bouyer * WDC_TRY_AGAIN. Must be called at splio().
129 1.2 bouyer */
130 1.2 bouyer int
131 1.2 bouyer wdc_ata_bio(drvp, ata_bio)
132 1.2 bouyer struct ata_drive_datas *drvp;
133 1.2 bouyer struct ata_bio *ata_bio;
134 1.2 bouyer {
135 1.2 bouyer struct wdc_xfer *xfer;
136 1.2 bouyer struct channel_softc *chp = drvp->chnl_softc;
137 1.2 bouyer
138 1.2 bouyer xfer = wdc_get_xfer(WDC_NOSLEEP);
139 1.2 bouyer if (xfer == NULL)
140 1.2 bouyer return WDC_TRY_AGAIN;
141 1.2 bouyer if (ata_bio->flags & ATA_POLL)
142 1.2 bouyer xfer->c_flags |= C_POLL;
143 1.2 bouyer if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
144 1.2 bouyer (ata_bio->flags & ATA_SINGLE) == 0)
145 1.2 bouyer xfer->c_flags |= C_DMA;
146 1.2 bouyer xfer->drive = drvp->drive;
147 1.2 bouyer xfer->cmd = ata_bio;
148 1.2 bouyer xfer->databuf = ata_bio->databuf;
149 1.2 bouyer xfer->c_bcount = ata_bio->bcount;
150 1.2 bouyer xfer->c_start = wdc_ata_bio_start;
151 1.2 bouyer xfer->c_intr = wdc_ata_bio_intr;
152 1.2 bouyer wdc_exec_xfer(chp, xfer);
153 1.2 bouyer return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
154 1.2 bouyer }
155 1.2 bouyer
156 1.2 bouyer void
157 1.2 bouyer wdc_ata_bio_start(chp, xfer)
158 1.2 bouyer struct channel_softc *chp;
159 1.2 bouyer struct wdc_xfer *xfer;
160 1.2 bouyer {
161 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
162 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
163 1.2 bouyer u_int16_t cyl;
164 1.2 bouyer u_int8_t head, sect, cmd = 0;
165 1.2 bouyer int nblks;
166 1.2 bouyer int dma_flags = 0;
167 1.2 bouyer
168 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
169 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
170 1.4 bouyer DEBUG_XFERS);
171 1.2 bouyer
172 1.2 bouyer /* Do control operations specially. */
173 1.2 bouyer if (drvp->state < READY) {
174 1.2 bouyer /*
175 1.2 bouyer * Actually, we want to be careful not to mess with the control
176 1.2 bouyer * state if the device is currently busy, but we can assume
177 1.2 bouyer * that we never get to this point if that's the case.
178 1.2 bouyer */
179 1.2 bouyer /* at this point, we should only be in RECAL state */
180 1.2 bouyer if (drvp->state != RECAL) {
181 1.2 bouyer printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n",
182 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
183 1.2 bouyer xfer->drive, drvp->state);
184 1.2 bouyer panic("wdc_ata_bio_start: bad state");
185 1.2 bouyer }
186 1.2 bouyer xfer->c_intr = wdc_ata_ctrl_intr;
187 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
188 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
189 1.2 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
190 1.2 bouyer goto timeout;
191 1.2 bouyer wdccommandshort(chp, xfer->drive, WDCC_RECAL);
192 1.2 bouyer drvp->state = RECAL_WAIT;
193 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
194 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
195 1.2 bouyer timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
196 1.2 bouyer } else {
197 1.2 bouyer /* Wait for at last 400ns for status bit to be valid */
198 1.2 bouyer delay(1);
199 1.2 bouyer wdc_ata_ctrl_intr(chp, xfer);
200 1.2 bouyer }
201 1.2 bouyer return;
202 1.2 bouyer }
203 1.2 bouyer
204 1.2 bouyer if (xfer->c_flags & C_DMA) {
205 1.2 bouyer dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
206 1.2 bouyer dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0;
207 1.2 bouyer }
208 1.2 bouyer again:
209 1.2 bouyer /*
210 1.2 bouyer *
211 1.2 bouyer * When starting a multi-sector transfer, or doing single-sector
212 1.2 bouyer * transfers...
213 1.2 bouyer */
214 1.2 bouyer if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
215 1.2 bouyer if (ata_bio->flags & ATA_SINGLE)
216 1.2 bouyer nblks = 1;
217 1.2 bouyer else
218 1.2 bouyer nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
219 1.2 bouyer /* Check for bad sectors and adjust transfer, if necessary. */
220 1.2 bouyer if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
221 1.2 bouyer long blkdiff;
222 1.2 bouyer int i;
223 1.2 bouyer for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
224 1.2 bouyer i++) {
225 1.2 bouyer blkdiff -= ata_bio->blkno;
226 1.2 bouyer if (blkdiff < 0)
227 1.2 bouyer continue;
228 1.2 bouyer if (blkdiff == 0) {
229 1.2 bouyer /* Replace current block of transfer. */
230 1.2 bouyer ata_bio->blkno =
231 1.2 bouyer ata_bio->lp->d_secperunit -
232 1.2 bouyer ata_bio->lp->d_nsectors - i - 1;
233 1.2 bouyer }
234 1.2 bouyer if (blkdiff < nblks) {
235 1.2 bouyer /* Bad block inside transfer. */
236 1.2 bouyer ata_bio->flags |= ATA_SINGLE;
237 1.2 bouyer nblks = 1;
238 1.2 bouyer }
239 1.2 bouyer break;
240 1.2 bouyer }
241 1.2 bouyer /* Transfer is okay now. */
242 1.2 bouyer }
243 1.2 bouyer if (ata_bio->flags & ATA_LBA) {
244 1.2 bouyer sect = (ata_bio->blkno >> 0) & 0xff;
245 1.2 bouyer cyl = (ata_bio->blkno >> 8) & 0xffff;
246 1.2 bouyer head = (ata_bio->blkno >> 24) & 0x0f;
247 1.2 bouyer head |= WDSD_LBA;
248 1.2 bouyer } else {
249 1.2 bouyer int blkno = ata_bio->blkno;
250 1.2 bouyer sect = blkno % ata_bio->lp->d_nsectors;
251 1.2 bouyer sect++; /* Sectors begin with 1, not 0. */
252 1.2 bouyer blkno /= ata_bio->lp->d_nsectors;
253 1.2 bouyer head = blkno % ata_bio->lp->d_ntracks;
254 1.2 bouyer blkno /= ata_bio->lp->d_ntracks;
255 1.2 bouyer cyl = blkno;
256 1.2 bouyer head |= WDSD_CHS;
257 1.2 bouyer }
258 1.2 bouyer if (xfer->c_flags & C_DMA) {
259 1.2 bouyer ata_bio->nblks = nblks;
260 1.2 bouyer ata_bio->nbytes = xfer->c_bcount;
261 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
262 1.2 bouyer WDCC_READDMA : WDCC_WRITEDMA;
263 1.2 bouyer nblks = ata_bio->nblks;
264 1.2 bouyer /* Init the DMA channel. */
265 1.2 bouyer if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
266 1.2 bouyer chp->channel, xfer->drive,
267 1.2 bouyer xfer->databuf + xfer->c_skip, ata_bio->nbytes,
268 1.2 bouyer dma_flags) != 0) {
269 1.2 bouyer ata_bio->error = ERR_DMA;
270 1.2 bouyer ata_bio->r_error = 0;
271 1.2 bouyer wdc_ata_bio_done(chp, xfer);
272 1.2 bouyer return;
273 1.2 bouyer }
274 1.2 bouyer /* Initiate command */
275 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
276 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
277 1.2 bouyer if (wait_for_ready(chp, ATA_DELAY) < 0)
278 1.2 bouyer goto timeout;
279 1.2 bouyer wdccommand(chp, xfer->drive, cmd, cyl,
280 1.2 bouyer head, sect, nblks, 0);
281 1.2 bouyer /* start the DMA channel */
282 1.2 bouyer (*chp->wdc->dma_start)(chp->wdc->dma_arg,
283 1.2 bouyer chp->channel, xfer->drive, dma_flags);
284 1.2 bouyer /* wait for irq */
285 1.2 bouyer goto intr;
286 1.2 bouyer } /* else not DMA */
287 1.2 bouyer ata_bio->nblks = min(nblks, ata_bio->multi);
288 1.2 bouyer ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
289 1.2 bouyer if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
290 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
291 1.2 bouyer WDCC_READMULTI : WDCC_WRITEMULTI;
292 1.2 bouyer } else {
293 1.2 bouyer cmd = (ata_bio->flags & ATA_READ) ?
294 1.2 bouyer WDCC_READ : WDCC_WRITE;
295 1.2 bouyer }
296 1.2 bouyer /* Initiate command! */
297 1.2 bouyer bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
298 1.2 bouyer WDSD_IBM | (xfer->drive << 4));
299 1.2 bouyer if (wait_for_ready(chp, ATA_DELAY) < 0)
300 1.2 bouyer goto timeout;
301 1.2 bouyer wdccommand(chp, xfer->drive, cmd, cyl,
302 1.2 bouyer head, sect, nblks,
303 1.2 bouyer (ata_bio->lp->d_type == DTYPE_ST506) ?
304 1.2 bouyer ata_bio->lp->d_precompcyl / 4 : 0);
305 1.2 bouyer } else if (ata_bio->nblks > 1) {
306 1.2 bouyer /* The number of blocks in the last stretch may be smaller. */
307 1.2 bouyer nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
308 1.2 bouyer if (ata_bio->nblks > nblks) {
309 1.2 bouyer ata_bio->nblks = nblks;
310 1.2 bouyer ata_bio->nbytes = xfer->c_bcount;
311 1.2 bouyer }
312 1.2 bouyer }
313 1.2 bouyer /* If this was a write and not using DMA, push the data. */
314 1.2 bouyer if ((ata_bio->flags & ATA_READ) == 0) {
315 1.2 bouyer if (wait_for_drq(chp, ATA_DELAY) != 0) {
316 1.2 bouyer printf("%s:%d:%d: timeout waiting for DRQ, "
317 1.2 bouyer "st=0x%02x, err=0x%02x\n",
318 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
319 1.2 bouyer xfer->drive, chp->ch_status, chp->ch_error);
320 1.2 bouyer if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR)
321 1.2 bouyer ata_bio->error = TIMEOUT;
322 1.2 bouyer wdc_ata_bio_done(chp, xfer);
323 1.2 bouyer return;
324 1.2 bouyer }
325 1.2 bouyer if (wdc_ata_err(chp, ata_bio) == WDC_ATA_ERR) {
326 1.2 bouyer wdc_ata_bio_done(chp, xfer);
327 1.2 bouyer return;
328 1.2 bouyer }
329 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
330 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
331 1.2 bouyer bus_space_write_multi_4(chp->data32iot,
332 1.2 bouyer chp->data32ioh, 0,
333 1.2 bouyer xfer->databuf + xfer->c_skip,
334 1.2 bouyer ata_bio->nbytes >> 2);
335 1.2 bouyer } else {
336 1.2 bouyer bus_space_write_multi_2(chp->cmd_iot,
337 1.2 bouyer chp->cmd_ioh, wd_data,
338 1.2 bouyer xfer->databuf + xfer->c_skip,
339 1.2 bouyer ata_bio->nbytes >> 1);
340 1.2 bouyer }
341 1.2 bouyer } else {
342 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
343 1.2 bouyer bus_space_write_multi_stream_4(chp->data32iot,
344 1.2 bouyer chp->data32ioh, 0,
345 1.2 bouyer xfer->databuf + xfer->c_skip,
346 1.2 bouyer ata_bio->nbytes >> 2);
347 1.2 bouyer } else {
348 1.2 bouyer bus_space_write_multi_stream_2(chp->cmd_iot,
349 1.2 bouyer chp->cmd_ioh, wd_data,
350 1.2 bouyer xfer->databuf + xfer->c_skip,
351 1.2 bouyer ata_bio->nbytes >> 1);
352 1.2 bouyer }
353 1.2 bouyer }
354 1.2 bouyer }
355 1.2 bouyer
356 1.2 bouyer intr: /* Wait for IRQ (either real or polled) */
357 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
358 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
359 1.2 bouyer timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
360 1.2 bouyer } else {
361 1.2 bouyer /* Wait for at last 400ns for status bit to be valid */
362 1.2 bouyer delay(1);
363 1.2 bouyer wdc_ata_bio_intr(chp, xfer);
364 1.2 bouyer if ((ata_bio->flags & ATA_ITSDONE) == 0)
365 1.2 bouyer goto again;
366 1.2 bouyer }
367 1.2 bouyer return;
368 1.2 bouyer timeout:
369 1.2 bouyer printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
370 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
371 1.2 bouyer chp->ch_status, chp->ch_error);
372 1.2 bouyer if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR)
373 1.2 bouyer ata_bio->error = TIMEOUT;
374 1.2 bouyer wdc_ata_bio_done(chp, xfer);
375 1.2 bouyer return;
376 1.2 bouyer }
377 1.2 bouyer
378 1.2 bouyer int
379 1.2 bouyer wdc_ata_bio_intr(chp, xfer)
380 1.2 bouyer struct channel_softc *chp;
381 1.2 bouyer struct wdc_xfer *xfer;
382 1.2 bouyer {
383 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
384 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
385 1.2 bouyer int drv_err;
386 1.2 bouyer int dma_flags = 0;
387 1.2 bouyer
388 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
389 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
390 1.2 bouyer DEBUG_INTR | DEBUG_XFERS);
391 1.2 bouyer
392 1.2 bouyer
393 1.2 bouyer /* Is it not a transfer, but a control operation? */
394 1.2 bouyer if (drvp->state < READY) {
395 1.2 bouyer printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
396 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
397 1.2 bouyer drvp->state);
398 1.2 bouyer panic("wdc_ata_bio_intr: bad state\n");
399 1.2 bouyer }
400 1.2 bouyer
401 1.2 bouyer if (xfer->c_flags & C_DMA) {
402 1.2 bouyer dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
403 1.2 bouyer dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0;
404 1.2 bouyer }
405 1.2 bouyer
406 1.2 bouyer /* Ack interrupt done by wait_for_unbusy */
407 1.2 bouyer if (wait_for_unbusy(chp, ATA_DELAY) < 0) {
408 1.2 bouyer printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
409 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
410 1.2 bouyer xfer->c_bcount, xfer->c_skip);
411 1.2 bouyer /* if we were using DMA, turn off DMA channel */
412 1.2 bouyer if (xfer->c_flags & C_DMA)
413 1.2 bouyer (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
414 1.2 bouyer chp->channel, xfer->drive, dma_flags);
415 1.2 bouyer ata_bio->error = TIMEOUT;
416 1.2 bouyer wdc_ata_bio_done(chp, xfer);
417 1.2 bouyer return 1;
418 1.2 bouyer }
419 1.2 bouyer
420 1.2 bouyer drv_err = wdc_ata_err(chp, ata_bio);
421 1.2 bouyer
422 1.2 bouyer /* If we were using DMA, Turn off the DMA channel and check for error */
423 1.2 bouyer if (xfer->c_flags & C_DMA) {
424 1.2 bouyer if (ata_bio->flags & ATA_POLL) {
425 1.2 bouyer /*
426 1.2 bouyer * IDE drives deassert WDCS_BSY before trasfert is
427 1.2 bouyer * complete when using DMA. Polling for DRQ to deassert
428 1.2 bouyer * is not enouth DRQ is not required to be
429 1.7 bouyer * asserted for DMA transfers, so poll for DRDY.
430 1.2 bouyer */
431 1.2 bouyer if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
432 1.2 bouyer ATA_DELAY) < 0) {
433 1.7 bouyer printf("%s:%d:%d: polled transfer timed out "
434 1.2 bouyer "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
435 1.2 bouyer chp->channel, xfer->drive, chp->ch_status);
436 1.2 bouyer ata_bio->error = TIMEOUT;
437 1.2 bouyer wdc_ata_bio_done(chp, xfer);
438 1.2 bouyer return 1;
439 1.2 bouyer }
440 1.2 bouyer }
441 1.2 bouyer if (chp->ch_status & WDCS_DRQ) {
442 1.2 bouyer if (drv_err != WDC_ATA_ERR) {
443 1.2 bouyer printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
444 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
445 1.2 bouyer xfer->drive, chp->ch_status);
446 1.2 bouyer ata_bio->error = TIMEOUT;
447 1.2 bouyer drv_err = WDC_ATA_ERR;
448 1.2 bouyer }
449 1.2 bouyer }
450 1.2 bouyer if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg,
451 1.2 bouyer chp->channel, xfer->drive, dma_flags) != 0) {
452 1.2 bouyer if (drv_err != WDC_ATA_ERR) {
453 1.2 bouyer ata_bio->error = ERR_DMA;
454 1.2 bouyer drv_err = WDC_ATA_ERR;
455 1.2 bouyer }
456 1.2 bouyer }
457 1.2 bouyer if (drv_err != WDC_ATA_ERR)
458 1.2 bouyer goto end;
459 1.2 bouyer
460 1.2 bouyer }
461 1.2 bouyer
462 1.2 bouyer /* if we had an error, end */
463 1.2 bouyer if (drv_err == WDC_ATA_ERR) {
464 1.2 bouyer wdc_ata_bio_done(chp, xfer);
465 1.2 bouyer return 1;
466 1.2 bouyer }
467 1.2 bouyer
468 1.2 bouyer /* If this was a read and not using DMA, fetch the data. */
469 1.2 bouyer if ((ata_bio->flags & ATA_READ) != 0) {
470 1.2 bouyer if ((chp->ch_status & (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) !=
471 1.2 bouyer (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) {
472 1.2 bouyer printf("%s:%d:%d: read intr before drq\n",
473 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel,
474 1.2 bouyer xfer->drive);
475 1.2 bouyer ata_bio->error = TIMEOUT;
476 1.2 bouyer wdc_ata_bio_done(chp, xfer);
477 1.2 bouyer return 1;
478 1.2 bouyer }
479 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
480 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
481 1.2 bouyer bus_space_read_multi_4(chp->data32iot,
482 1.2 bouyer chp->data32ioh, 0,
483 1.2 bouyer xfer->databuf + xfer->c_skip,
484 1.2 bouyer ata_bio->nbytes >> 2);
485 1.2 bouyer } else {
486 1.2 bouyer bus_space_read_multi_2(chp->cmd_iot,
487 1.2 bouyer chp->cmd_ioh, wd_data,
488 1.2 bouyer xfer->databuf + xfer->c_skip,
489 1.2 bouyer ata_bio->nbytes >> 1);
490 1.2 bouyer }
491 1.2 bouyer } else {
492 1.2 bouyer if (drvp->drive_flags & DRIVE_CAP32) {
493 1.2 bouyer bus_space_read_multi_stream_4(chp->data32iot,
494 1.2 bouyer chp->data32ioh, 0,
495 1.2 bouyer xfer->databuf + xfer->c_skip,
496 1.2 bouyer ata_bio->nbytes >> 2);
497 1.2 bouyer } else {
498 1.2 bouyer bus_space_read_multi_stream_2(chp->cmd_iot,
499 1.2 bouyer chp->cmd_ioh, wd_data,
500 1.2 bouyer xfer->databuf + xfer->c_skip,
501 1.2 bouyer ata_bio->nbytes >> 1);
502 1.2 bouyer }
503 1.2 bouyer }
504 1.2 bouyer }
505 1.2 bouyer
506 1.2 bouyer end:
507 1.2 bouyer ata_bio->blkno += ata_bio->nblks;
508 1.2 bouyer ata_bio->blkdone += ata_bio->nblks;
509 1.2 bouyer xfer->c_skip += ata_bio->nbytes;
510 1.2 bouyer xfer->c_bcount -= ata_bio->nbytes;
511 1.2 bouyer /* See if this transfer is complete. */
512 1.2 bouyer if (xfer->c_bcount > 0) {
513 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
514 1.2 bouyer /* Start the next operation */
515 1.2 bouyer wdc_ata_bio_start(chp, xfer);
516 1.2 bouyer } else {
517 1.2 bouyer /* Let wdc_ata_bio_start do the loop */
518 1.2 bouyer return 1;
519 1.2 bouyer }
520 1.2 bouyer } else { /* Done with this transfer */
521 1.2 bouyer ata_bio->error = NOERROR;
522 1.2 bouyer wdc_ata_bio_done(chp, xfer);
523 1.2 bouyer }
524 1.2 bouyer return 1;
525 1.2 bouyer }
526 1.2 bouyer
527 1.2 bouyer void
528 1.2 bouyer wdc_ata_bio_done(chp, xfer)
529 1.2 bouyer struct channel_softc *chp;
530 1.2 bouyer struct wdc_xfer *xfer;
531 1.2 bouyer {
532 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
533 1.2 bouyer int need_done = xfer->c_flags & C_NEEDDONE;
534 1.2 bouyer int drive = xfer->drive;
535 1.2 bouyer
536 1.5 bouyer WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
537 1.5 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
538 1.5 bouyer (u_int)xfer->c_flags),
539 1.4 bouyer DEBUG_XFERS);
540 1.2 bouyer
541 1.2 bouyer /* feed back residual bcount to our caller */
542 1.2 bouyer ata_bio->bcount = xfer->c_bcount;
543 1.2 bouyer
544 1.2 bouyer /* remove this command from xfer queue */
545 1.2 bouyer wdc_free_xfer(chp, xfer);
546 1.2 bouyer
547 1.2 bouyer ata_bio->flags |= ATA_ITSDONE;
548 1.2 bouyer if (need_done) {
549 1.4 bouyer WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
550 1.2 bouyer wddone(chp->ch_drive[drive].drv_softc);
551 1.2 bouyer }
552 1.2 bouyer WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
553 1.4 bouyer chp->ch_flags), DEBUG_XFERS);
554 1.2 bouyer wdcstart(chp->wdc, chp->channel);
555 1.2 bouyer }
556 1.2 bouyer
557 1.2 bouyer /*
558 1.2 bouyer * Implement operations needed before read/write.
559 1.2 bouyer */
560 1.2 bouyer int
561 1.2 bouyer wdc_ata_ctrl_intr(chp, xfer)
562 1.2 bouyer struct channel_softc *chp;
563 1.2 bouyer struct wdc_xfer *xfer;
564 1.2 bouyer {
565 1.2 bouyer struct ata_bio *ata_bio = xfer->cmd;
566 1.2 bouyer struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
567 1.2 bouyer char *errstring = NULL;
568 1.2 bouyer WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
569 1.2 bouyer DEBUG_FUNCS);
570 1.2 bouyer
571 1.2 bouyer again:
572 1.2 bouyer switch (drvp->state) {
573 1.2 bouyer case RECAL: /* Should not be in this state here */
574 1.2 bouyer panic("wdc_ata_ctrl_intr: state==RECAL");
575 1.2 bouyer break;
576 1.2 bouyer
577 1.2 bouyer case RECAL_WAIT:
578 1.2 bouyer errstring = "recal";
579 1.2 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
580 1.2 bouyer goto timeout;
581 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
582 1.2 bouyer goto error;
583 1.2 bouyer /* fall through */
584 1.2 bouyer
585 1.2 bouyer case PIOMODE:
586 1.2 bouyer /* Don't try to set modes if controller can't be adjusted */
587 1.2 bouyer if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
588 1.6 bouyer goto geometry;
589 1.6 bouyer /* Also don't try if the drive didn't report its mode */
590 1.6 bouyer if ((drvp->drive_flags & DRIVE_MODE) == 0)
591 1.2 bouyer goto geometry;
592 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
593 1.2 bouyer 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
594 1.2 bouyer drvp->state = PIOMODE_WAIT;
595 1.2 bouyer break;
596 1.2 bouyer
597 1.2 bouyer case PIOMODE_WAIT:
598 1.2 bouyer errstring = "piomode";
599 1.2 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
600 1.2 bouyer goto timeout;
601 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
602 1.2 bouyer goto error;
603 1.2 bouyer /* fall through */
604 1.2 bouyer
605 1.2 bouyer case DMAMODE:
606 1.2 bouyer if (drvp->drive_flags & DRIVE_UDMA) {
607 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
608 1.2 bouyer 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
609 1.2 bouyer } else if (drvp->drive_flags & DRIVE_DMA) {
610 1.2 bouyer wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
611 1.2 bouyer 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
612 1.2 bouyer } else {
613 1.2 bouyer goto geometry;
614 1.2 bouyer }
615 1.2 bouyer drvp->state = DMAMODE_WAIT;
616 1.2 bouyer break;
617 1.2 bouyer case DMAMODE_WAIT:
618 1.2 bouyer errstring = "dmamode";
619 1.2 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
620 1.2 bouyer goto timeout;
621 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
622 1.2 bouyer goto error;
623 1.2 bouyer /* fall through */
624 1.2 bouyer
625 1.2 bouyer case GEOMETRY:
626 1.2 bouyer geometry:
627 1.2 bouyer if (ata_bio->flags & ATA_LBA)
628 1.2 bouyer goto multimode;
629 1.2 bouyer wdccommand(chp, xfer->drive, WDCC_IDP,
630 1.2 bouyer ata_bio->lp->d_ncylinders,
631 1.2 bouyer ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
632 1.2 bouyer (ata_bio->lp->d_type == DTYPE_ST506) ?
633 1.2 bouyer ata_bio->lp->d_precompcyl / 4 : 0);
634 1.2 bouyer drvp->state = GEOMETRY_WAIT;
635 1.2 bouyer break;
636 1.2 bouyer
637 1.2 bouyer case GEOMETRY_WAIT:
638 1.2 bouyer errstring = "geometry";
639 1.2 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
640 1.2 bouyer goto timeout;
641 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
642 1.2 bouyer goto error;
643 1.2 bouyer /* fall through */
644 1.2 bouyer
645 1.2 bouyer case MULTIMODE:
646 1.2 bouyer multimode:
647 1.2 bouyer if (ata_bio->multi == 1)
648 1.2 bouyer goto ready;
649 1.2 bouyer wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
650 1.2 bouyer ata_bio->multi, 0);
651 1.2 bouyer drvp->state = MULTIMODE_WAIT;
652 1.2 bouyer break;
653 1.2 bouyer
654 1.2 bouyer case MULTIMODE_WAIT:
655 1.2 bouyer errstring = "setmulti";
656 1.2 bouyer if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
657 1.2 bouyer goto timeout;
658 1.2 bouyer if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
659 1.2 bouyer goto error;
660 1.2 bouyer /* fall through */
661 1.2 bouyer
662 1.2 bouyer case READY:
663 1.2 bouyer ready:
664 1.2 bouyer drvp->state = READY;
665 1.2 bouyer /*
666 1.2 bouyer * The drive is usable now
667 1.2 bouyer */
668 1.2 bouyer xfer->c_intr = wdc_ata_bio_intr;
669 1.2 bouyer wdc_ata_bio_start(chp, xfer);
670 1.2 bouyer return 1;
671 1.2 bouyer }
672 1.2 bouyer
673 1.2 bouyer if ((ata_bio->flags & ATA_POLL) == 0) {
674 1.2 bouyer chp->ch_flags |= WDCF_IRQ_WAIT;
675 1.2 bouyer timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
676 1.2 bouyer } else {
677 1.2 bouyer goto again;
678 1.2 bouyer }
679 1.2 bouyer return 1;
680 1.2 bouyer
681 1.2 bouyer timeout:
682 1.2 bouyer if ((xfer->c_flags & C_TIMEOU) == 0 ) {
683 1.2 bouyer return 0; /* IRQ was not for us */
684 1.2 bouyer }
685 1.2 bouyer printf("%s:%d:%d: %s timed out\n",
686 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
687 1.2 bouyer ata_bio->error = TIMEOUT;
688 1.2 bouyer drvp->state = 0;
689 1.2 bouyer wdc_ata_bio_done(chp, xfer);
690 1.2 bouyer return 0;
691 1.2 bouyer error:
692 1.2 bouyer printf("%s:%d:%d: %s ",
693 1.2 bouyer chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
694 1.2 bouyer errstring);
695 1.2 bouyer if (chp->ch_status & WDCS_DWF) {
696 1.2 bouyer printf("drive fault\n");
697 1.2 bouyer ata_bio->error = ERR_DF;
698 1.2 bouyer } else {
699 1.2 bouyer printf("error (%x)\n", chp->ch_error);
700 1.2 bouyer ata_bio->r_error = chp->ch_error;
701 1.2 bouyer ata_bio->error = ERROR;
702 1.2 bouyer }
703 1.2 bouyer drvp->state = 0;
704 1.2 bouyer wdc_ata_bio_done(chp, xfer);
705 1.2 bouyer return 1;
706 1.2 bouyer }
707 1.2 bouyer
708 1.2 bouyer int
709 1.2 bouyer wdc_ata_err(chp, ata_bio)
710 1.2 bouyer struct channel_softc *chp;
711 1.2 bouyer struct ata_bio *ata_bio;
712 1.2 bouyer {
713 1.2 bouyer ata_bio->error = 0;
714 1.2 bouyer if (chp->ch_status & WDCS_BSY) {
715 1.2 bouyer ata_bio->error = TIMEOUT;
716 1.2 bouyer return WDC_ATA_ERR;
717 1.2 bouyer }
718 1.2 bouyer
719 1.2 bouyer if (chp->ch_status & WDCS_DWF) {
720 1.2 bouyer ata_bio->error = ERR_DF;
721 1.2 bouyer return WDC_ATA_ERR;
722 1.2 bouyer }
723 1.2 bouyer
724 1.2 bouyer if (chp->ch_status & WDCS_ERR) {
725 1.2 bouyer ata_bio->error = ERROR;
726 1.2 bouyer ata_bio->r_error = chp->ch_error;
727 1.2 bouyer if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
728 1.2 bouyer WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
729 1.2 bouyer return WDC_ATA_ERR;
730 1.2 bouyer return WDC_ATA_NOERR;
731 1.2 bouyer }
732 1.2 bouyer
733 1.2 bouyer if (chp->ch_status & WDCS_CORR)
734 1.2 bouyer ata_bio->flags |= ATA_CORR;
735 1.2 bouyer return WDC_ATA_NOERR;
736 1.2 bouyer }
737