ata_wdc.c revision 1.1.2.1
1 /* $NetBSD: ata_wdc.c,v 1.1.2.1 1998/06/04 16:52:34 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /* 37 * Copyright (c) 1994, 1995, 1998 Charles M. Hannum. All rights reserved. 38 * 39 * DMA and multi-sector PIO handling are derived from code contributed by 40 * Onno van der Linden. 41 * 42 * Bus_space-ified by Christopher G. Demetriou. 43 * 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Charles M. Hannum. 56 * 4. The name of the author may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 72 #define WDCDEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/file.h> 78 #include <sys/stat.h> 79 #include <sys/buf.h> 80 #include <sys/malloc.h> 81 #include <sys/device.h> 82 #include <sys/disklabel.h> 83 #include <sys/syslog.h> 84 #include <sys/proc.h> 85 86 #include <machine/intr.h> 87 #include <machine/bus.h> 88 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 89 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 90 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 91 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 92 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 93 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 94 95 #include <dev/ata/atareg.h> 96 #include <dev/ata/atavar.h> 97 #include <dev/ic/wdcreg.h> 98 #include <dev/ic/wdcvar.h> 99 #include <dev/ata/wdvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef WDCDEBUG 107 int wdcdebug_wd_mask = DEBUG_PROBE; 108 #define WDCDEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define WDCDEBUG_PRINT(args, level) 113 #endif 114 115 int wdprint __P((void *, const char *)); 116 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 117 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *)); 118 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 119 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *)); 120 121 int wdprint(aux, pnp) 122 void *aux; 123 const char *pnp; 124 { 125 struct ata_atapi_attach *aa_link = aux; 126 if (pnp) 127 printf("drive at %s", pnp); 128 printf(" channel %d drive %d", aa_link->aa_channel, 129 aa_link->aa_drv_data->drive); 130 return (UNCONF); 131 } 132 133 void 134 wdc_ata_attach(chp) 135 struct channel_softc *chp; 136 { 137 struct wdc_softc *wdc = chp->wdc; 138 int channel = chp->channel; 139 struct ata_atapi_attach aa_link; 140 int drive; 141 142 WDCDEBUG_PRINT(("wdc_ata_attach\n"), DEBUG_FUNCS | DEBUG_PROBE); 143 144 bzero(&aa_link,sizeof(struct ata_atapi_attach)); 145 aa_link.aa_type = T_ATA; 146 aa_link.aa_channel = channel; 147 aa_link.aa_openings = 1; 148 for (drive = 0; drive < 2; drive++) { 149 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATA) == 0) { 150 continue; 151 } 152 aa_link.aa_drv_data = &chp->ch_drive[drive]; 153 if (config_found(&wdc->sc_dev, (void *)&aa_link, wdprint)) 154 wdc_probe_caps(&chp->ch_drive[drive]); 155 } 156 } 157 158 /* 159 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 160 * WDC_TRY_AGAIN. Must be called at splio(). 161 */ 162 int 163 wdc_ata_bio(drvp, ata_bio) 164 struct ata_drive_datas *drvp; 165 struct ata_bio *ata_bio; 166 { 167 struct wdc_xfer *xfer; 168 struct channel_softc *chp = drvp->chnl_softc; 169 170 xfer = wdc_get_xfer((ata_bio->flags & ATA_POLL) ? 171 WDC_NOSLEEP : WDC_CANSLEEP); 172 if (xfer == NULL) 173 return WDC_TRY_AGAIN; 174 xfer->drive = drvp->drive; 175 xfer->cmd = ata_bio; 176 xfer->databuf = ata_bio->databuf; 177 xfer->c_bcount = ata_bio->bcount; 178 xfer->c_start = wdc_ata_bio_start; 179 xfer->c_intr = wdc_ata_bio_intr; 180 wdc_exec_xfer(chp, xfer); 181 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 182 } 183 184 void 185 wdc_ata_bio_start(chp, xfer) 186 struct channel_softc *chp; 187 struct wdc_xfer *xfer; 188 { 189 struct ata_bio *ata_bio = xfer->cmd; 190 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 191 u_int16_t cyl; 192 u_int8_t head, sect, cmd = 0; 193 int nblks; 194 195 WDCDEBUG_PRINT(("wdc_ata_bio_start\n"), 196 DEBUG_FUNCS | DEBUG_XFERS); 197 198 /* Do control operations specially. */ 199 if (drvp->state < READY) { 200 /* 201 * Actually, we want to be careful not to mess with the control 202 * state if the device is currently busy, but we can assume 203 * that we never get to this point if that's the case. 204 */ 205 /* at this point, we should only be in RECAL state */ 206 if (drvp->state != RECAL) { 207 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n", 208 chp->wdc->sc_dev.dv_xname, chp->channel, 209 xfer->drive, drvp->state); 210 panic("wdc_ata_bio_start: bad state"); 211 } 212 xfer->c_intr = wdc_ata_ctrl_intr; 213 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 214 WDSD_IBM | (xfer->drive << 4)); 215 if (wdcwait(chp, WDCS_DRDY) != 0) 216 goto timeout; 217 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 218 drvp->state = RECAL_WAIT; 219 if ((ata_bio->flags & ATA_POLL) == 0) { 220 chp->ch_flags |= WDCF_IRQ_WAIT; 221 timeout(wdctimeout, chp, WAITTIME); 222 } else { 223 /* Wait for at last 400ns for status bit to be valid */ 224 delay(1); 225 wdc_ata_ctrl_intr(chp, xfer); 226 } 227 return; 228 } 229 230 again: 231 /* 232 * 233 * When starting a multi-sector transfer, or doing single-sector 234 * transfers... 235 */ 236 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0 || 237 (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 238 != 0) { 239 if (ata_bio->flags & ATA_SINGLE) 240 nblks = 1; 241 else 242 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 243 /* Check for bad sectors and adjust transfer, if necessary. */ 244 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 245 long blkdiff; 246 int i; 247 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 248 i++) { 249 blkdiff -= ata_bio->blkno; 250 if (blkdiff < 0) 251 continue; 252 if (blkdiff == 0) { 253 /* Replace current block of transfer. */ 254 ata_bio->blkno = 255 ata_bio->lp->d_secperunit - 256 ata_bio->lp->d_nsectors - i - 1; 257 } 258 if (blkdiff < nblks) { 259 /* Bad block inside transfer. */ 260 ata_bio->flags |= ATA_SINGLE; 261 nblks = 1; 262 } 263 break; 264 } 265 /* Transfer is okay now. */ 266 } 267 if (ata_bio->flags & ATA_LBA) { 268 sect = (ata_bio->blkno >> 0) & 0xff; 269 cyl = (ata_bio->blkno >> 8) & 0xffff; 270 head = (ata_bio->blkno >> 24) & 0x0f; 271 head |= WDSD_LBA; 272 } else { 273 int blkno = ata_bio->blkno; 274 sect = blkno % ata_bio->lp->d_nsectors; 275 sect++; /* Sectors begin with 1, not 0. */ 276 blkno /= ata_bio->lp->d_nsectors; 277 head = blkno % ata_bio->lp->d_ntracks; 278 blkno /= ata_bio->lp->d_ntracks; 279 cyl = blkno; 280 head |= WDSD_CHS; 281 } 282 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_DMA)) { 283 ata_bio->nblks = nblks; 284 ata_bio->nbytes = xfer->c_bcount; 285 cmd = (ata_bio->flags & ATA_READ) ? 286 WDCC_READDMA : WDCC_WRITEDMA; 287 nblks = ata_bio->nblks; 288 /* Init the DMA channel. */ 289 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 290 chp->channel, xfer->drive, 291 xfer->databuf + xfer->c_skip, ata_bio->nbytes, 292 ata_bio->flags & ATA_READ) != 0) { 293 ata_bio->error = ERROR; 294 ata_bio->r_error = 0; 295 wdc_ata_bio_done(chp, xfer); 296 return; 297 } 298 /* Initiate command */ 299 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 300 WDSD_IBM | (xfer->drive << 4)); 301 if (wait_for_ready(chp) < 0) 302 goto timeout; 303 wdccommand(chp, xfer->drive, cmd, cyl, 304 head, sect, nblks, 0); 305 /* start the DMA channel */ 306 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 307 chp->channel, xfer->drive, 308 ata_bio->flags & ATA_READ); 309 /* wait for irq */ 310 goto intr; 311 } /* else not DMA */ 312 ata_bio->nblks = min(nblks, ata_bio->multi); 313 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 314 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 315 cmd = (ata_bio->flags & ATA_READ) ? 316 WDCC_READMULTI : WDCC_WRITEMULTI; 317 } else { 318 cmd = (ata_bio->flags & ATA_READ) ? 319 WDCC_READ : WDCC_WRITE; 320 } 321 /* Initiate command! */ 322 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 323 WDSD_IBM | (xfer->drive << 4)); 324 if (wait_for_ready(chp) < 0) 325 goto timeout; 326 wdccommand(chp, xfer->drive, cmd, cyl, 327 head, sect, nblks, 328 (ata_bio->lp->d_type == DTYPE_ST506) ? 329 ata_bio->lp->d_precompcyl / 4 : 0); 330 } else if (ata_bio->nblks > 1) { 331 /* The number of blocks in the last stretch may be smaller. */ 332 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 333 if (ata_bio->nblks > nblks) { 334 ata_bio->nblks = nblks; 335 ata_bio->nbytes = xfer->c_bcount; 336 } 337 } 338 /* If this was a write and not using DMA, push the data. */ 339 if ((ata_bio->flags & ATA_READ) == 0) { 340 /* Wait for at last 400ns for status bit to be valid */ 341 delay(1); 342 if (wait_for_drq(chp) != 0) { 343 printf("%s:%d:%d: timeout waiting for DRQ, " 344 "st=0x%02x, err=0x%02x\n", 345 chp->wdc->sc_dev.dv_xname, chp->channel, 346 xfer->drive, chp->ch_status, chp->ch_error); 347 if ((chp->ch_status & WDCS_BSY) == 0 && 348 (chp->ch_status & WDCS_ERR) != 0) { 349 ata_bio->r_error = chp->ch_error; 350 ata_bio->error = ERROR; 351 } else { 352 ata_bio->error = TIMEOUT; 353 } 354 wdc_ata_bio_done(chp, xfer); 355 return; 356 } 357 if (drvp->drive_flags & DRIVE_CAP32) { 358 bus_space_write_multi_stream_4(chp->cmd_iot, 359 chp->cmd_ioh, wd_data, 360 xfer->databuf + xfer->c_skip, 361 ata_bio->nbytes >> 2); 362 } else { 363 bus_space_write_multi_stream_2(chp->cmd_iot, 364 chp->cmd_ioh, wd_data, 365 xfer->databuf + xfer->c_skip, 366 ata_bio->nbytes >> 1); 367 } 368 } 369 370 intr: /* Wait for IRQ (either real or polled */ 371 if ((ata_bio->flags & ATA_POLL) == 0) { 372 chp->ch_flags |= WDCF_IRQ_WAIT; 373 timeout(wdctimeout, chp, WAITTIME); 374 } else { 375 /* Wait for at last 400ns for status bit to be valid */ 376 delay(1); 377 wdc_ata_bio_intr(chp, xfer); 378 if ((ata_bio->flags & ATA_ITSDONE) == 0) 379 goto again; 380 } 381 return; 382 timeout: 383 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 384 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 385 chp->ch_status, chp->ch_error); 386 if (chp->ch_status & WDCS_BSY) 387 ata_bio->error = TIMEOUT; 388 else { 389 if ((chp->ch_status & WDCS_ERR) != 0) { 390 ata_bio->r_error = chp->ch_error; 391 ata_bio->error = ERROR; 392 } else if (chp->ch_status & WDCS_DWF) 393 ata_bio->error = ERR_DF; 394 else 395 ata_bio->error = TIMEOUT; 396 } 397 wdc_ata_bio_done(chp, xfer); 398 return; 399 } 400 401 int 402 wdc_ata_bio_intr(chp, xfer) 403 struct channel_softc *chp; 404 struct wdc_xfer *xfer; 405 { 406 struct ata_bio *ata_bio = xfer->cmd; 407 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 408 int dma_err; 409 410 WDCDEBUG_PRINT(("wdc_ata_bio_intr\n"), DEBUG_INTR); 411 412 /* Is it not a transfer, but a control operation? */ 413 if (drvp->state < READY) { 414 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 415 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 416 drvp->state); 417 panic("wdc_ata_bio_intr: bad state\n"); 418 } 419 420 /* Ack interrupt done by wait_for_unbusy */ 421 if (wait_for_unbusy(chp) < 0) { 422 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 423 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 424 xfer->c_bcount, xfer->c_skip); 425 /* if we were using DMA, turn off DMA channel */ 426 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 427 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 428 chp->channel, xfer->drive, 429 ata_bio->flags & ATA_READ); 430 ata_bio->error = TIMEOUT; 431 wdc_ata_bio_done(chp, xfer); 432 return 1; 433 } 434 435 if (chp->ch_status & WDCS_CORR) 436 ata_bio->flags |= ATA_CORR; 437 438 /* If we were using DMA, Turn off the DMA channel and check for error */ 439 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 440 if (chp->ch_status & WDCS_DRQ) { 441 printf("%s:%d:%d: intr with DRQ\n", 442 chp->wdc->sc_dev.dv_xname, chp->channel, 443 xfer->drive); 444 ata_bio->error = TIMEOUT; 445 wdc_ata_bio_done(chp, xfer); 446 } 447 dma_err = (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 448 chp->channel, xfer->drive, ata_bio->flags & ATA_READ); 449 /* Error here only if command aborted (DMA or drive ) */ 450 if ((chp->ch_status & WDCS_ERR) != 0 && 451 (chp->ch_error & WDCE_ABRT) != 0) { 452 ata_bio->error = ERROR; 453 ata_bio->r_error = chp->ch_error; 454 wdc_ata_bio_done(chp, xfer); 455 } else if ((chp->ch_status & WDCS_DWF) != 0) { 456 ata_bio->error = ERR_DF; 457 wdc_ata_bio_done(chp, xfer); 458 } else if (dma_err != 0) { 459 ata_bio->error = ERR_DMA; 460 ata_bio->r_error = 0; 461 wdc_ata_bio_done(chp, xfer); 462 } else /* transfert ok, end it */ 463 goto end; 464 } 465 466 /* If this was a read and not using DMA, fetch the data. */ 467 if ((ata_bio->flags & ATA_READ) != 0) { 468 if ((chp->ch_status & (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) != 469 (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) { 470 if ((chp->ch_status & WDCS_ERR) != 0) { 471 ata_bio->error = ERROR; 472 ata_bio->r_error = chp->ch_error; 473 } else { 474 printf("%s:%d:%d: read intr before drq\n", 475 chp->wdc->sc_dev.dv_xname, chp->channel, 476 xfer->drive); 477 ata_bio->error = TIMEOUT; 478 } 479 wdc_ata_bio_done(chp, xfer); 480 return 1; 481 } 482 483 if (drvp->drive_flags & DRIVE_CAP32) { 484 bus_space_read_multi_stream_4(chp->cmd_iot, 485 chp->cmd_ioh, wd_data, 486 xfer->databuf + xfer->c_skip, 487 ata_bio->nbytes >> 2); 488 } else { 489 bus_space_read_multi_stream_2(chp->cmd_iot, 490 chp->cmd_ioh, wd_data, 491 xfer->databuf + xfer->c_skip, 492 ata_bio->nbytes >> 1); 493 } 494 } 495 496 end: 497 ata_bio->blkno += ata_bio->nblks; 498 xfer->c_skip += ata_bio->nbytes; 499 xfer->c_bcount -= ata_bio->nbytes; 500 /* See if this transfer is complete. */ 501 if (xfer->c_bcount > 0) { 502 if ((ata_bio->flags & ATA_POLL) == 0) { 503 /* Start the next operation */ 504 wdc_ata_bio_start(chp, xfer); 505 } else { 506 /* Let wdc_ata_bio_start do the loop */ 507 return 1; 508 } 509 } else { /* Done with this transfer */ 510 ata_bio->error = NOERROR; 511 wdc_ata_bio_done(chp, xfer); 512 } 513 return 1; 514 } 515 516 void 517 wdc_ata_bio_done(chp, xfer) 518 struct channel_softc *chp; 519 struct wdc_xfer *xfer; 520 { 521 struct ata_bio *ata_bio = xfer->cmd; 522 int need_done = xfer->c_flags & C_NEEDDONE; 523 int drive = xfer->drive; 524 525 WDCDEBUG_PRINT(("wdc_ata_bio_done: flags 0x%x\n", (u_int)xfer->c_flags), 526 DEBUG_FUNCS); 527 528 ata_bio->nbytes = xfer->c_bcount; 529 /* remove this command from xfer queue */ 530 wdc_free_xfer(chp, xfer); 531 532 ata_bio->flags |= ATA_ITSDONE; 533 if (need_done) { 534 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_FUNCS); 535 wddone(chp->ch_drive[drive].drv_softc); 536 } 537 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 538 chp->ch_flags), DEBUG_FUNCS); 539 wdcstart(chp->wdc, chp->channel); 540 } 541 542 /* 543 * Implement operations needed before read/write. 544 */ 545 int 546 wdc_ata_ctrl_intr(chp, xfer) 547 struct channel_softc *chp; 548 struct wdc_xfer *xfer; 549 { 550 struct ata_bio *ata_bio = xfer->cmd; 551 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 552 char *errstring = NULL; 553 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 554 DEBUG_FUNCS); 555 556 again: 557 switch (drvp->state) { 558 case RECAL: /* Should not be in this state here */ 559 panic("wdc_ata_ctrl_intr: state==RECAL"); 560 break; 561 562 case RECAL_WAIT: 563 errstring = "recal"; 564 if (wdcwait(chp, WDCS_DRDY)) 565 goto timeout; 566 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 567 goto error; 568 /* fall through */ 569 570 case PIOMODE: 571 if (drvp->PIO_mode <= 3) 572 goto dmamode; 573 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 574 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 575 drvp->state = PIOMODE_WAIT; 576 break; 577 578 case PIOMODE_WAIT: 579 errstring = "piomode"; 580 if (wdcwait(chp, WDCS_DRDY)) 581 goto timeout; 582 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 583 goto error; 584 /* fall through */ 585 586 case DMAMODE: 587 dmamode: 588 if (drvp->drive_flags & DRIVE_UDMA) { 589 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 590 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 591 } else if (drvp->drive_flags & DRIVE_DMA) { 592 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 593 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 594 } else { 595 goto geometry; 596 } 597 drvp->state = DMAMODE_WAIT; 598 break; 599 case DMAMODE_WAIT: 600 errstring = "dmamode"; 601 if (wdcwait(chp, WDCS_DRDY)) 602 goto timeout; 603 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 604 goto error; 605 /* fall through */ 606 607 case GEOMETRY: 608 geometry: 609 if (ata_bio->flags & ATA_LBA) 610 goto multimode; 611 wdccommand(chp, xfer->drive, WDCC_IDP, 612 ata_bio->lp->d_ncylinders, 613 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 614 (ata_bio->lp->d_type == DTYPE_ST506) ? 615 ata_bio->lp->d_precompcyl / 4 : 0); 616 drvp->state = GEOMETRY_WAIT; 617 break; 618 619 case GEOMETRY_WAIT: 620 errstring = "geometry"; 621 if (wdcwait(chp, WDCS_DRDY)) 622 goto timeout; 623 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 624 goto error; 625 /* fall through */ 626 627 case MULTIMODE: 628 multimode: 629 if (ata_bio->multi == 1) 630 goto ready; 631 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 632 ata_bio->multi, 0); 633 drvp->state = MULTIMODE_WAIT; 634 break; 635 636 case MULTIMODE_WAIT: 637 errstring = "setmulti"; 638 if (wdcwait(chp, WDCS_DRDY)) 639 goto timeout; 640 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 641 goto error; 642 /* fall through */ 643 644 case READY: 645 ready: 646 drvp->state = READY; 647 /* 648 * The drive is usable now 649 */ 650 xfer->c_intr = wdc_ata_bio_intr; 651 wdc_ata_bio_start(chp, xfer); 652 return 1; 653 } 654 655 if ((ata_bio->flags & ATA_POLL) == 0) { 656 chp->ch_flags |= WDCF_IRQ_WAIT; 657 timeout(wdctimeout, chp, WAITTIME); 658 } else { 659 goto again; 660 } 661 return 1; 662 663 timeout: 664 if ((xfer->c_flags & C_TIMEOU) == 0 ) { 665 return 0; /* IRQ was not for us */ 666 } 667 printf("%s:%d:%d: %s timed out\n", 668 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 669 ata_bio->error = TIMEOUT; 670 wdc_ata_bio_done(chp, xfer); 671 return 0; 672 error: 673 printf("%s:%d:%d: %s ", 674 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 675 errstring); 676 if (chp->ch_status & WDCS_DWF) { 677 printf("drive fault\n"); 678 ata_bio->error = ERR_DF; 679 } else { 680 printf("error (%x)\n", chp->ch_error); 681 ata_bio->r_error = chp->ch_error; 682 ata_bio->error = ERROR; 683 } 684 wdc_ata_bio_done(chp, xfer); 685 return 1; 686 } 687
Indexes created Thu Oct 23 22:10:10 GMT 2025