ata_wdc.c revision 1.1.2.12
1 /* $NetBSD: ata_wdc.c,v 1.1.2.12 1998/10/02 19:37:19 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #define WDCDEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/file.h> 78 #include <sys/stat.h> 79 #include <sys/buf.h> 80 #include <sys/malloc.h> 81 #include <sys/device.h> 82 #include <sys/disklabel.h> 83 #include <sys/syslog.h> 84 #include <sys/proc.h> 85 86 #include <machine/intr.h> 87 #include <machine/bus.h> 88 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 89 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 90 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 91 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 92 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 93 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 94 95 #include <dev/ata/atareg.h> 96 #include <dev/ata/atavar.h> 97 #include <dev/ic/wdcreg.h> 98 #include <dev/ic/wdcvar.h> 99 #include <dev/ata/wdvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef WDCDEBUG 107 int wdcdebug_wd_mask = DEBUG_PROBE; 108 #define WDCDEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define WDCDEBUG_PRINT(args, level) 113 #endif 114 115 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 116 117 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 118 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *)); 119 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 120 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *)); 121 int wdc_ata_err __P((struct channel_softc *, struct ata_bio *)); 122 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 123 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 124 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 125 126 /* 127 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 128 * WDC_TRY_AGAIN. Must be called at splio(). 129 */ 130 int 131 wdc_ata_bio(drvp, ata_bio) 132 struct ata_drive_datas *drvp; 133 struct ata_bio *ata_bio; 134 { 135 struct wdc_xfer *xfer; 136 struct channel_softc *chp = drvp->chnl_softc; 137 138 xfer = wdc_get_xfer(WDC_NOSLEEP); 139 if (xfer == NULL) 140 return WDC_TRY_AGAIN; 141 if (ata_bio->flags & ATA_POLL) 142 xfer->c_flags |= C_POLL; 143 xfer->drive = drvp->drive; 144 xfer->cmd = ata_bio; 145 xfer->databuf = ata_bio->databuf; 146 xfer->c_bcount = ata_bio->bcount; 147 xfer->c_start = wdc_ata_bio_start; 148 xfer->c_intr = wdc_ata_bio_intr; 149 wdc_exec_xfer(chp, xfer); 150 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 151 } 152 153 void 154 wdc_ata_bio_start(chp, xfer) 155 struct channel_softc *chp; 156 struct wdc_xfer *xfer; 157 { 158 struct ata_bio *ata_bio = xfer->cmd; 159 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 160 u_int16_t cyl; 161 u_int8_t head, sect, cmd = 0; 162 int nblks; 163 int dma_flags = 0; 164 165 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 166 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 167 DEBUG_FUNCS | DEBUG_XFERS); 168 169 /* Do control operations specially. */ 170 if (drvp->state < READY) { 171 /* 172 * Actually, we want to be careful not to mess with the control 173 * state if the device is currently busy, but we can assume 174 * that we never get to this point if that's the case. 175 */ 176 /* at this point, we should only be in RECAL state */ 177 if (drvp->state != RECAL) { 178 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n", 179 chp->wdc->sc_dev.dv_xname, chp->channel, 180 xfer->drive, drvp->state); 181 panic("wdc_ata_bio_start: bad state"); 182 } 183 xfer->c_intr = wdc_ata_ctrl_intr; 184 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 185 WDSD_IBM | (xfer->drive << 4)); 186 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 187 goto timeout; 188 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 189 drvp->state = RECAL_WAIT; 190 if ((ata_bio->flags & ATA_POLL) == 0) { 191 chp->ch_flags |= WDCF_IRQ_WAIT; 192 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 193 } else { 194 /* Wait for at last 400ns for status bit to be valid */ 195 delay(1); 196 wdc_ata_ctrl_intr(chp, xfer); 197 } 198 return; 199 } 200 201 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 202 (ata_bio->flags & ATA_SINGLE) == 0) { 203 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 204 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 205 } 206 again: 207 /* 208 * 209 * When starting a multi-sector transfer, or doing single-sector 210 * transfers... 211 */ 212 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0 || 213 (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) != 0) { 214 if (ata_bio->flags & ATA_SINGLE) 215 nblks = 1; 216 else 217 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 218 /* Check for bad sectors and adjust transfer, if necessary. */ 219 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 220 long blkdiff; 221 int i; 222 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 223 i++) { 224 blkdiff -= ata_bio->blkno; 225 if (blkdiff < 0) 226 continue; 227 if (blkdiff == 0) { 228 /* Replace current block of transfer. */ 229 ata_bio->blkno = 230 ata_bio->lp->d_secperunit - 231 ata_bio->lp->d_nsectors - i - 1; 232 } 233 if (blkdiff < nblks) { 234 /* Bad block inside transfer. */ 235 ata_bio->flags |= ATA_SINGLE; 236 nblks = 1; 237 } 238 break; 239 } 240 /* Transfer is okay now. */ 241 } 242 if (ata_bio->flags & ATA_LBA) { 243 sect = (ata_bio->blkno >> 0) & 0xff; 244 cyl = (ata_bio->blkno >> 8) & 0xffff; 245 head = (ata_bio->blkno >> 24) & 0x0f; 246 head |= WDSD_LBA; 247 } else { 248 int blkno = ata_bio->blkno; 249 sect = blkno % ata_bio->lp->d_nsectors; 250 sect++; /* Sectors begin with 1, not 0. */ 251 blkno /= ata_bio->lp->d_nsectors; 252 head = blkno % ata_bio->lp->d_ntracks; 253 blkno /= ata_bio->lp->d_ntracks; 254 cyl = blkno; 255 head |= WDSD_CHS; 256 } 257 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 258 (ata_bio->flags & ATA_SINGLE) == 0) { 259 ata_bio->nblks = nblks; 260 ata_bio->nbytes = xfer->c_bcount; 261 cmd = (ata_bio->flags & ATA_READ) ? 262 WDCC_READDMA : WDCC_WRITEDMA; 263 nblks = ata_bio->nblks; 264 /* Init the DMA channel. */ 265 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 266 chp->channel, xfer->drive, 267 xfer->databuf + xfer->c_skip, ata_bio->nbytes, 268 dma_flags) != 0) { 269 ata_bio->error = ERR_DMA; 270 ata_bio->r_error = 0; 271 wdc_ata_bio_done(chp, xfer); 272 return; 273 } 274 /* Initiate command */ 275 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 276 WDSD_IBM | (xfer->drive << 4)); 277 if (wait_for_ready(chp, ATA_DELAY) < 0) 278 goto timeout; 279 wdccommand(chp, xfer->drive, cmd, cyl, 280 head, sect, nblks, 0); 281 /* start the DMA channel */ 282 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 283 chp->channel, xfer->drive, dma_flags); 284 /* wait for irq */ 285 goto intr; 286 } /* else not DMA */ 287 ata_bio->nblks = min(nblks, ata_bio->multi); 288 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 289 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 290 cmd = (ata_bio->flags & ATA_READ) ? 291 WDCC_READMULTI : WDCC_WRITEMULTI; 292 } else { 293 cmd = (ata_bio->flags & ATA_READ) ? 294 WDCC_READ : WDCC_WRITE; 295 } 296 /* Initiate command! */ 297 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 298 WDSD_IBM | (xfer->drive << 4)); 299 if (wait_for_ready(chp, ATA_DELAY) < 0) 300 goto timeout; 301 wdccommand(chp, xfer->drive, cmd, cyl, 302 head, sect, nblks, 303 (ata_bio->lp->d_type == DTYPE_ST506) ? 304 ata_bio->lp->d_precompcyl / 4 : 0); 305 } else if (ata_bio->nblks > 1) { 306 /* The number of blocks in the last stretch may be smaller. */ 307 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 308 if (ata_bio->nblks > nblks) { 309 ata_bio->nblks = nblks; 310 ata_bio->nbytes = xfer->c_bcount; 311 } 312 } 313 /* If this was a write and not using DMA, push the data. */ 314 if ((ata_bio->flags & ATA_READ) == 0) { 315 /* Wait for at last 400ns for status bit to be valid */ 316 delay(1); 317 if (wait_for_drq(chp, ATA_DELAY) != 0) { 318 printf("%s:%d:%d: timeout waiting for DRQ, " 319 "st=0x%02x, err=0x%02x\n", 320 chp->wdc->sc_dev.dv_xname, chp->channel, 321 xfer->drive, chp->ch_status, chp->ch_error); 322 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR) 323 ata_bio->error = TIMEOUT; 324 wdc_ata_bio_done(chp, xfer); 325 return; 326 } 327 if (wdc_ata_err(chp, ata_bio) == WDC_ATA_ERR) { 328 wdc_ata_bio_done(chp, xfer); 329 return; 330 } 331 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 332 if (drvp->drive_flags & DRIVE_CAP32) { 333 bus_space_write_multi_4(chp->data32iot, 334 chp->data32ioh, 0, 335 xfer->databuf + xfer->c_skip, 336 ata_bio->nbytes >> 2); 337 } else { 338 bus_space_write_multi_2(chp->cmd_iot, 339 chp->cmd_ioh, wd_data, 340 xfer->databuf + xfer->c_skip, 341 ata_bio->nbytes >> 1); 342 } 343 } else { 344 if (drvp->drive_flags & DRIVE_CAP32) { 345 bus_space_write_multi_stream_4(chp->data32iot, 346 chp->data32ioh, 0, 347 xfer->databuf + xfer->c_skip, 348 ata_bio->nbytes >> 2); 349 } else { 350 bus_space_write_multi_stream_2(chp->cmd_iot, 351 chp->cmd_ioh, wd_data, 352 xfer->databuf + xfer->c_skip, 353 ata_bio->nbytes >> 1); 354 } 355 } 356 } 357 358 intr: /* Wait for IRQ (either real or polled) */ 359 if ((ata_bio->flags & ATA_POLL) == 0) { 360 chp->ch_flags |= WDCF_IRQ_WAIT; 361 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 362 } else { 363 /* Wait for at last 400ns for status bit to be valid */ 364 delay(1); 365 wdc_ata_bio_intr(chp, xfer); 366 if ((ata_bio->flags & ATA_ITSDONE) == 0) 367 goto again; 368 } 369 return; 370 timeout: 371 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 372 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 373 chp->ch_status, chp->ch_error); 374 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR) 375 ata_bio->error = TIMEOUT; 376 wdc_ata_bio_done(chp, xfer); 377 return; 378 } 379 380 int 381 wdc_ata_bio_intr(chp, xfer) 382 struct channel_softc *chp; 383 struct wdc_xfer *xfer; 384 { 385 struct ata_bio *ata_bio = xfer->cmd; 386 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 387 int drv_err; 388 int dma_flags = 0; 389 390 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 391 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 392 DEBUG_INTR | DEBUG_XFERS); 393 394 395 /* Is it not a transfer, but a control operation? */ 396 if (drvp->state < READY) { 397 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 398 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 399 drvp->state); 400 panic("wdc_ata_bio_intr: bad state\n"); 401 } 402 403 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 404 (ata_bio->flags & ATA_SINGLE) == 0) { 405 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 406 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 407 } 408 409 /* Ack interrupt done by wait_for_unbusy */ 410 if (wait_for_unbusy(chp, ATA_DELAY) < 0) { 411 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 412 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 413 xfer->c_bcount, xfer->c_skip); 414 /* if we were using DMA, turn off DMA channel */ 415 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 416 (ata_bio->flags & ATA_SINGLE) == 0) 417 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 418 chp->channel, xfer->drive, dma_flags); 419 ata_bio->error = TIMEOUT; 420 wdc_ata_bio_done(chp, xfer); 421 return 1; 422 } 423 424 drv_err = wdc_ata_err(chp, ata_bio); 425 426 /* If we were using DMA, Turn off the DMA channel and check for error */ 427 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 428 (ata_bio->flags & ATA_SINGLE) == 0) { 429 if (ata_bio->flags & ATA_POLL) { 430 /* 431 * IDE drives deassert WDCS_BSY before trasfert is 432 * complete when using DMA. Polling for DRQ to deassert 433 * is not enouth DRQ is not required to be 434 * asserted for DMA transferts, so poll for DRDY. 435 */ 436 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 437 ATA_DELAY) < 0) { 438 printf("%s:%d:%d: polled transfert timed out " 439 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 440 chp->channel, xfer->drive, chp->ch_status); 441 ata_bio->error = TIMEOUT; 442 wdc_ata_bio_done(chp, xfer); 443 return 1; 444 } 445 } 446 if (chp->ch_status & WDCS_DRQ) { 447 if (drv_err != WDC_ATA_ERR) { 448 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 449 chp->wdc->sc_dev.dv_xname, chp->channel, 450 xfer->drive, chp->ch_status); 451 ata_bio->error = TIMEOUT; 452 drv_err = WDC_ATA_ERR; 453 } 454 } 455 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg, 456 chp->channel, xfer->drive, dma_flags) != 0) { 457 if (drv_err != WDC_ATA_ERR) { 458 ata_bio->error = ERR_DMA; 459 drv_err = WDC_ATA_ERR; 460 } 461 } 462 if (drv_err != WDC_ATA_ERR) 463 goto end; 464 465 } 466 467 /* if we had an error, end */ 468 if (drv_err == WDC_ATA_ERR) { 469 wdc_ata_bio_done(chp, xfer); 470 return 1; 471 } 472 473 /* If this was a read and not using DMA, fetch the data. */ 474 if ((ata_bio->flags & ATA_READ) != 0) { 475 if ((chp->ch_status & (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) != 476 (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) { 477 printf("%s:%d:%d: read intr before drq\n", 478 chp->wdc->sc_dev.dv_xname, chp->channel, 479 xfer->drive); 480 ata_bio->error = TIMEOUT; 481 wdc_ata_bio_done(chp, xfer); 482 return 1; 483 } 484 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 485 if (drvp->drive_flags & DRIVE_CAP32) { 486 bus_space_read_multi_4(chp->data32iot, 487 chp->data32ioh, 0, 488 xfer->databuf + xfer->c_skip, 489 ata_bio->nbytes >> 2); 490 } else { 491 bus_space_read_multi_2(chp->cmd_iot, 492 chp->cmd_ioh, wd_data, 493 xfer->databuf + xfer->c_skip, 494 ata_bio->nbytes >> 1); 495 } 496 } else { 497 if (drvp->drive_flags & DRIVE_CAP32) { 498 bus_space_read_multi_stream_4(chp->data32iot, 499 chp->data32ioh, 0, 500 xfer->databuf + xfer->c_skip, 501 ata_bio->nbytes >> 2); 502 } else { 503 bus_space_read_multi_stream_2(chp->cmd_iot, 504 chp->cmd_ioh, wd_data, 505 xfer->databuf + xfer->c_skip, 506 ata_bio->nbytes >> 1); 507 } 508 } 509 } 510 511 end: 512 ata_bio->blkno += ata_bio->nblks; 513 ata_bio->blkdone += ata_bio->nblks; 514 xfer->c_skip += ata_bio->nbytes; 515 xfer->c_bcount -= ata_bio->nbytes; 516 /* See if this transfer is complete. */ 517 if (xfer->c_bcount > 0) { 518 if ((ata_bio->flags & ATA_POLL) == 0) { 519 /* Start the next operation */ 520 wdc_ata_bio_start(chp, xfer); 521 } else { 522 /* Let wdc_ata_bio_start do the loop */ 523 return 1; 524 } 525 } else { /* Done with this transfer */ 526 ata_bio->error = NOERROR; 527 wdc_ata_bio_done(chp, xfer); 528 } 529 return 1; 530 } 531 532 void 533 wdc_ata_bio_done(chp, xfer) 534 struct channel_softc *chp; 535 struct wdc_xfer *xfer; 536 { 537 struct ata_bio *ata_bio = xfer->cmd; 538 int need_done = xfer->c_flags & C_NEEDDONE; 539 int drive = xfer->drive; 540 541 WDCDEBUG_PRINT(("wdc_ata_bio_done: flags 0x%x\n", (u_int)xfer->c_flags), 542 DEBUG_FUNCS); 543 544 /* feed back residual bcount to our caller */ 545 ata_bio->bcount = xfer->c_bcount; 546 547 /* remove this command from xfer queue */ 548 wdc_free_xfer(chp, xfer); 549 550 ata_bio->flags |= ATA_ITSDONE; 551 if (need_done) { 552 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_FUNCS); 553 wddone(chp->ch_drive[drive].drv_softc); 554 } 555 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 556 chp->ch_flags), DEBUG_FUNCS); 557 wdcstart(chp->wdc, chp->channel); 558 } 559 560 /* 561 * Implement operations needed before read/write. 562 */ 563 int 564 wdc_ata_ctrl_intr(chp, xfer) 565 struct channel_softc *chp; 566 struct wdc_xfer *xfer; 567 { 568 struct ata_bio *ata_bio = xfer->cmd; 569 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 570 char *errstring = NULL; 571 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 572 DEBUG_FUNCS); 573 574 again: 575 switch (drvp->state) { 576 case RECAL: /* Should not be in this state here */ 577 panic("wdc_ata_ctrl_intr: state==RECAL"); 578 break; 579 580 case RECAL_WAIT: 581 errstring = "recal"; 582 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 583 goto timeout; 584 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 585 goto error; 586 /* fall through */ 587 588 case PIOMODE: 589 /* Don't try to set mode if controller can't be adjusted */ 590 if ((chp->wdc->cap & WDC_CAPABILITY_PIO) == 0) 591 goto dmamode; 592 /* 593 * if mode is < 3, it is unknown. Assume the defaults are 594 * good. 595 */ 596 if (drvp->PIO_mode < 3) 597 goto dmamode; 598 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 599 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 600 drvp->state = PIOMODE_WAIT; 601 break; 602 603 case PIOMODE_WAIT: 604 errstring = "piomode"; 605 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 606 goto timeout; 607 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 608 goto error; 609 /* fall through */ 610 611 case DMAMODE: 612 dmamode: 613 if (drvp->drive_flags & DRIVE_UDMA) { 614 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 615 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 616 } else if (drvp->drive_flags & DRIVE_DMA) { 617 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 618 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 619 } else { 620 goto geometry; 621 } 622 drvp->state = DMAMODE_WAIT; 623 break; 624 case DMAMODE_WAIT: 625 errstring = "dmamode"; 626 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 627 goto timeout; 628 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 629 goto error; 630 /* fall through */ 631 632 case GEOMETRY: 633 geometry: 634 if (ata_bio->flags & ATA_LBA) 635 goto multimode; 636 wdccommand(chp, xfer->drive, WDCC_IDP, 637 ata_bio->lp->d_ncylinders, 638 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 639 (ata_bio->lp->d_type == DTYPE_ST506) ? 640 ata_bio->lp->d_precompcyl / 4 : 0); 641 drvp->state = GEOMETRY_WAIT; 642 break; 643 644 case GEOMETRY_WAIT: 645 errstring = "geometry"; 646 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 647 goto timeout; 648 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 649 goto error; 650 /* fall through */ 651 652 case MULTIMODE: 653 multimode: 654 if (ata_bio->multi == 1) 655 goto ready; 656 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 657 ata_bio->multi, 0); 658 drvp->state = MULTIMODE_WAIT; 659 break; 660 661 case MULTIMODE_WAIT: 662 errstring = "setmulti"; 663 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 664 goto timeout; 665 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 666 goto error; 667 /* fall through */ 668 669 case READY: 670 ready: 671 drvp->state = READY; 672 /* 673 * The drive is usable now 674 */ 675 xfer->c_intr = wdc_ata_bio_intr; 676 wdc_ata_bio_start(chp, xfer); 677 return 1; 678 } 679 680 if ((ata_bio->flags & ATA_POLL) == 0) { 681 chp->ch_flags |= WDCF_IRQ_WAIT; 682 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 683 } else { 684 goto again; 685 } 686 return 1; 687 688 timeout: 689 if ((xfer->c_flags & C_TIMEOU) == 0 ) { 690 return 0; /* IRQ was not for us */ 691 } 692 printf("%s:%d:%d: %s timed out\n", 693 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 694 ata_bio->error = TIMEOUT; 695 drvp->state = 0; 696 wdc_ata_bio_done(chp, xfer); 697 return 0; 698 error: 699 printf("%s:%d:%d: %s ", 700 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 701 errstring); 702 if (chp->ch_status & WDCS_DWF) { 703 printf("drive fault\n"); 704 ata_bio->error = ERR_DF; 705 } else { 706 printf("error (%x)\n", chp->ch_error); 707 ata_bio->r_error = chp->ch_error; 708 ata_bio->error = ERROR; 709 } 710 drvp->state = 0; 711 wdc_ata_bio_done(chp, xfer); 712 return 1; 713 } 714 715 int 716 wdc_ata_err(chp, ata_bio) 717 struct channel_softc *chp; 718 struct ata_bio *ata_bio; 719 { 720 ata_bio->error = 0; 721 if (chp->ch_status & WDCS_BSY) { 722 ata_bio->error = TIMEOUT; 723 return WDC_ATA_ERR; 724 } 725 726 if (chp->ch_status & WDCS_DWF) { 727 ata_bio->error = ERR_DF; 728 return WDC_ATA_ERR; 729 } 730 731 if (chp->ch_status & WDCS_ERR) { 732 ata_bio->error = ERROR; 733 ata_bio->r_error = chp->ch_error; 734 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 735 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 736 return WDC_ATA_ERR; 737 return WDC_ATA_NOERR; 738 } 739 740 if (chp->ch_status & WDCS_CORR) 741 ata_bio->flags |= ATA_CORR; 742 return WDC_ATA_NOERR; 743 } 744
Indexes created Thu Oct 23 22:10:10 GMT 2025