ata_wdc.c revision 1.1.2.13 1 /* $NetBSD: ata_wdc.c,v 1.1.2.13 1998/10/04 15:50:23 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35
36 /*-
37 * Copyright (c) 1998 The NetBSD Foundation, Inc.
38 * All rights reserved.
39 *
40 * This code is derived from software contributed to The NetBSD Foundation
41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by the NetBSD
54 * Foundation, Inc. and its contributors.
55 * 4. Neither the name of The NetBSD Foundation nor the names of its
56 * contributors may be used to endorse or promote products derived
57 * from this software without specific prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
69 * POSSIBILITY OF SUCH DAMAGE.
70 */
71
72 #define WDCDEBUG
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/file.h>
78 #include <sys/stat.h>
79 #include <sys/buf.h>
80 #include <sys/malloc.h>
81 #include <sys/device.h>
82 #include <sys/disklabel.h>
83 #include <sys/syslog.h>
84 #include <sys/proc.h>
85
86 #include <machine/intr.h>
87 #include <machine/bus.h>
88 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
89 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
90 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
91 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
92 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
93 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
94
95 #include <dev/ata/atareg.h>
96 #include <dev/ata/atavar.h>
97 #include <dev/ic/wdcreg.h>
98 #include <dev/ic/wdcvar.h>
99 #include <dev/ata/wdvar.h>
100
101 #define DEBUG_INTR 0x01
102 #define DEBUG_XFERS 0x02
103 #define DEBUG_STATUS 0x04
104 #define DEBUG_FUNCS 0x08
105 #define DEBUG_PROBE 0x10
106 #ifdef WDCDEBUG
107 int wdcdebug_wd_mask = DEBUG_PROBE;
108 #define WDCDEBUG_PRINT(args, level) \
109 if (wdcdebug_wd_mask & (level)) \
110 printf args
111 #else
112 #define WDCDEBUG_PRINT(args, level)
113 #endif
114
115 #define ATA_DELAY 10000 /* 10s for a drive I/O */
116
117 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
118 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *));
119 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *));
120 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *));
121 int wdc_ata_err __P((struct channel_softc *, struct ata_bio *));
122 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
123 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
124 #define WDC_ATA_ERR 0x02 /* Drive reports an error */
125
126 /*
127 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
128 * WDC_TRY_AGAIN. Must be called at splio().
129 */
130 int
131 wdc_ata_bio(drvp, ata_bio)
132 struct ata_drive_datas *drvp;
133 struct ata_bio *ata_bio;
134 {
135 struct wdc_xfer *xfer;
136 struct channel_softc *chp = drvp->chnl_softc;
137
138 xfer = wdc_get_xfer(WDC_NOSLEEP);
139 if (xfer == NULL)
140 return WDC_TRY_AGAIN;
141 if (ata_bio->flags & ATA_POLL)
142 xfer->c_flags |= C_POLL;
143 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
144 (ata_bio->flags & ATA_SINGLE) == 0)
145 xfer->c_flags |= C_DMA;
146 xfer->drive = drvp->drive;
147 xfer->cmd = ata_bio;
148 xfer->databuf = ata_bio->databuf;
149 xfer->c_bcount = ata_bio->bcount;
150 xfer->c_start = wdc_ata_bio_start;
151 xfer->c_intr = wdc_ata_bio_intr;
152 wdc_exec_xfer(chp, xfer);
153 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
154 }
155
156 void
157 wdc_ata_bio_start(chp, xfer)
158 struct channel_softc *chp;
159 struct wdc_xfer *xfer;
160 {
161 struct ata_bio *ata_bio = xfer->cmd;
162 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
163 u_int16_t cyl;
164 u_int8_t head, sect, cmd = 0;
165 int nblks;
166 int dma_flags = 0;
167
168 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
169 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
170 DEBUG_FUNCS | DEBUG_XFERS);
171
172 /* Do control operations specially. */
173 if (drvp->state < READY) {
174 /*
175 * Actually, we want to be careful not to mess with the control
176 * state if the device is currently busy, but we can assume
177 * that we never get to this point if that's the case.
178 */
179 /* at this point, we should only be in RECAL state */
180 if (drvp->state != RECAL) {
181 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n",
182 chp->wdc->sc_dev.dv_xname, chp->channel,
183 xfer->drive, drvp->state);
184 panic("wdc_ata_bio_start: bad state");
185 }
186 xfer->c_intr = wdc_ata_ctrl_intr;
187 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
188 WDSD_IBM | (xfer->drive << 4));
189 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
190 goto timeout;
191 wdccommandshort(chp, xfer->drive, WDCC_RECAL);
192 drvp->state = RECAL_WAIT;
193 if ((ata_bio->flags & ATA_POLL) == 0) {
194 chp->ch_flags |= WDCF_IRQ_WAIT;
195 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
196 } else {
197 /* Wait for at last 400ns for status bit to be valid */
198 delay(1);
199 wdc_ata_ctrl_intr(chp, xfer);
200 }
201 return;
202 }
203
204 if (xfer->c_flags & C_DMA) {
205 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
206 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0;
207 }
208 again:
209 /*
210 *
211 * When starting a multi-sector transfer, or doing single-sector
212 * transfers...
213 */
214 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
215 if (ata_bio->flags & ATA_SINGLE)
216 nblks = 1;
217 else
218 nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
219 /* Check for bad sectors and adjust transfer, if necessary. */
220 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
221 long blkdiff;
222 int i;
223 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
224 i++) {
225 blkdiff -= ata_bio->blkno;
226 if (blkdiff < 0)
227 continue;
228 if (blkdiff == 0) {
229 /* Replace current block of transfer. */
230 ata_bio->blkno =
231 ata_bio->lp->d_secperunit -
232 ata_bio->lp->d_nsectors - i - 1;
233 }
234 if (blkdiff < nblks) {
235 /* Bad block inside transfer. */
236 ata_bio->flags |= ATA_SINGLE;
237 nblks = 1;
238 }
239 break;
240 }
241 /* Transfer is okay now. */
242 }
243 if (ata_bio->flags & ATA_LBA) {
244 sect = (ata_bio->blkno >> 0) & 0xff;
245 cyl = (ata_bio->blkno >> 8) & 0xffff;
246 head = (ata_bio->blkno >> 24) & 0x0f;
247 head |= WDSD_LBA;
248 } else {
249 int blkno = ata_bio->blkno;
250 sect = blkno % ata_bio->lp->d_nsectors;
251 sect++; /* Sectors begin with 1, not 0. */
252 blkno /= ata_bio->lp->d_nsectors;
253 head = blkno % ata_bio->lp->d_ntracks;
254 blkno /= ata_bio->lp->d_ntracks;
255 cyl = blkno;
256 head |= WDSD_CHS;
257 }
258 if (xfer->c_flags & C_DMA) {
259 ata_bio->nblks = nblks;
260 ata_bio->nbytes = xfer->c_bcount;
261 cmd = (ata_bio->flags & ATA_READ) ?
262 WDCC_READDMA : WDCC_WRITEDMA;
263 nblks = ata_bio->nblks;
264 /* Init the DMA channel. */
265 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
266 chp->channel, xfer->drive,
267 xfer->databuf + xfer->c_skip, ata_bio->nbytes,
268 dma_flags) != 0) {
269 ata_bio->error = ERR_DMA;
270 ata_bio->r_error = 0;
271 wdc_ata_bio_done(chp, xfer);
272 return;
273 }
274 /* Initiate command */
275 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
276 WDSD_IBM | (xfer->drive << 4));
277 if (wait_for_ready(chp, ATA_DELAY) < 0)
278 goto timeout;
279 wdccommand(chp, xfer->drive, cmd, cyl,
280 head, sect, nblks, 0);
281 /* start the DMA channel */
282 (*chp->wdc->dma_start)(chp->wdc->dma_arg,
283 chp->channel, xfer->drive, dma_flags);
284 /* wait for irq */
285 goto intr;
286 } /* else not DMA */
287 ata_bio->nblks = min(nblks, ata_bio->multi);
288 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
289 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
290 cmd = (ata_bio->flags & ATA_READ) ?
291 WDCC_READMULTI : WDCC_WRITEMULTI;
292 } else {
293 cmd = (ata_bio->flags & ATA_READ) ?
294 WDCC_READ : WDCC_WRITE;
295 }
296 /* Initiate command! */
297 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
298 WDSD_IBM | (xfer->drive << 4));
299 if (wait_for_ready(chp, ATA_DELAY) < 0)
300 goto timeout;
301 wdccommand(chp, xfer->drive, cmd, cyl,
302 head, sect, nblks,
303 (ata_bio->lp->d_type == DTYPE_ST506) ?
304 ata_bio->lp->d_precompcyl / 4 : 0);
305 } else if (ata_bio->nblks > 1) {
306 /* The number of blocks in the last stretch may be smaller. */
307 nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
308 if (ata_bio->nblks > nblks) {
309 ata_bio->nblks = nblks;
310 ata_bio->nbytes = xfer->c_bcount;
311 }
312 }
313 /* If this was a write and not using DMA, push the data. */
314 if ((ata_bio->flags & ATA_READ) == 0) {
315 /* Wait for at last 400ns for status bit to be valid */
316 delay(1);
317 if (wait_for_drq(chp, ATA_DELAY) != 0) {
318 printf("%s:%d:%d: timeout waiting for DRQ, "
319 "st=0x%02x, err=0x%02x\n",
320 chp->wdc->sc_dev.dv_xname, chp->channel,
321 xfer->drive, chp->ch_status, chp->ch_error);
322 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR)
323 ata_bio->error = TIMEOUT;
324 wdc_ata_bio_done(chp, xfer);
325 return;
326 }
327 if (wdc_ata_err(chp, ata_bio) == WDC_ATA_ERR) {
328 wdc_ata_bio_done(chp, xfer);
329 return;
330 }
331 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
332 if (drvp->drive_flags & DRIVE_CAP32) {
333 bus_space_write_multi_4(chp->data32iot,
334 chp->data32ioh, 0,
335 xfer->databuf + xfer->c_skip,
336 ata_bio->nbytes >> 2);
337 } else {
338 bus_space_write_multi_2(chp->cmd_iot,
339 chp->cmd_ioh, wd_data,
340 xfer->databuf + xfer->c_skip,
341 ata_bio->nbytes >> 1);
342 }
343 } else {
344 if (drvp->drive_flags & DRIVE_CAP32) {
345 bus_space_write_multi_stream_4(chp->data32iot,
346 chp->data32ioh, 0,
347 xfer->databuf + xfer->c_skip,
348 ata_bio->nbytes >> 2);
349 } else {
350 bus_space_write_multi_stream_2(chp->cmd_iot,
351 chp->cmd_ioh, wd_data,
352 xfer->databuf + xfer->c_skip,
353 ata_bio->nbytes >> 1);
354 }
355 }
356 }
357
358 intr: /* Wait for IRQ (either real or polled) */
359 if ((ata_bio->flags & ATA_POLL) == 0) {
360 chp->ch_flags |= WDCF_IRQ_WAIT;
361 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
362 } else {
363 /* Wait for at last 400ns for status bit to be valid */
364 delay(1);
365 wdc_ata_bio_intr(chp, xfer);
366 if ((ata_bio->flags & ATA_ITSDONE) == 0)
367 goto again;
368 }
369 return;
370 timeout:
371 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
372 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
373 chp->ch_status, chp->ch_error);
374 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR)
375 ata_bio->error = TIMEOUT;
376 wdc_ata_bio_done(chp, xfer);
377 return;
378 }
379
380 int
381 wdc_ata_bio_intr(chp, xfer)
382 struct channel_softc *chp;
383 struct wdc_xfer *xfer;
384 {
385 struct ata_bio *ata_bio = xfer->cmd;
386 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
387 int drv_err;
388 int dma_flags = 0;
389
390 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
391 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
392 DEBUG_INTR | DEBUG_XFERS);
393
394
395 /* Is it not a transfer, but a control operation? */
396 if (drvp->state < READY) {
397 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
398 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
399 drvp->state);
400 panic("wdc_ata_bio_intr: bad state\n");
401 }
402
403 if (xfer->c_flags & C_DMA) {
404 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
405 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0;
406 }
407
408 /* Ack interrupt done by wait_for_unbusy */
409 if (wait_for_unbusy(chp, ATA_DELAY) < 0) {
410 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
411 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
412 xfer->c_bcount, xfer->c_skip);
413 /* if we were using DMA, turn off DMA channel */
414 if (xfer->c_flags & C_DMA)
415 (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
416 chp->channel, xfer->drive, dma_flags);
417 ata_bio->error = TIMEOUT;
418 wdc_ata_bio_done(chp, xfer);
419 return 1;
420 }
421
422 drv_err = wdc_ata_err(chp, ata_bio);
423
424 /* If we were using DMA, Turn off the DMA channel and check for error */
425 if (xfer->c_flags & C_DMA) {
426 if (ata_bio->flags & ATA_POLL) {
427 /*
428 * IDE drives deassert WDCS_BSY before trasfert is
429 * complete when using DMA. Polling for DRQ to deassert
430 * is not enouth DRQ is not required to be
431 * asserted for DMA transferts, so poll for DRDY.
432 */
433 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
434 ATA_DELAY) < 0) {
435 printf("%s:%d:%d: polled transfert timed out "
436 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
437 chp->channel, xfer->drive, chp->ch_status);
438 ata_bio->error = TIMEOUT;
439 wdc_ata_bio_done(chp, xfer);
440 return 1;
441 }
442 }
443 if (chp->ch_status & WDCS_DRQ) {
444 if (drv_err != WDC_ATA_ERR) {
445 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
446 chp->wdc->sc_dev.dv_xname, chp->channel,
447 xfer->drive, chp->ch_status);
448 ata_bio->error = TIMEOUT;
449 drv_err = WDC_ATA_ERR;
450 }
451 }
452 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg,
453 chp->channel, xfer->drive, dma_flags) != 0) {
454 if (drv_err != WDC_ATA_ERR) {
455 ata_bio->error = ERR_DMA;
456 drv_err = WDC_ATA_ERR;
457 }
458 }
459 if (drv_err != WDC_ATA_ERR)
460 goto end;
461
462 }
463
464 /* if we had an error, end */
465 if (drv_err == WDC_ATA_ERR) {
466 wdc_ata_bio_done(chp, xfer);
467 return 1;
468 }
469
470 /* If this was a read and not using DMA, fetch the data. */
471 if ((ata_bio->flags & ATA_READ) != 0) {
472 if ((chp->ch_status & (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) !=
473 (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) {
474 printf("%s:%d:%d: read intr before drq\n",
475 chp->wdc->sc_dev.dv_xname, chp->channel,
476 xfer->drive);
477 ata_bio->error = TIMEOUT;
478 wdc_ata_bio_done(chp, xfer);
479 return 1;
480 }
481 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
482 if (drvp->drive_flags & DRIVE_CAP32) {
483 bus_space_read_multi_4(chp->data32iot,
484 chp->data32ioh, 0,
485 xfer->databuf + xfer->c_skip,
486 ata_bio->nbytes >> 2);
487 } else {
488 bus_space_read_multi_2(chp->cmd_iot,
489 chp->cmd_ioh, wd_data,
490 xfer->databuf + xfer->c_skip,
491 ata_bio->nbytes >> 1);
492 }
493 } else {
494 if (drvp->drive_flags & DRIVE_CAP32) {
495 bus_space_read_multi_stream_4(chp->data32iot,
496 chp->data32ioh, 0,
497 xfer->databuf + xfer->c_skip,
498 ata_bio->nbytes >> 2);
499 } else {
500 bus_space_read_multi_stream_2(chp->cmd_iot,
501 chp->cmd_ioh, wd_data,
502 xfer->databuf + xfer->c_skip,
503 ata_bio->nbytes >> 1);
504 }
505 }
506 }
507
508 end:
509 ata_bio->blkno += ata_bio->nblks;
510 ata_bio->blkdone += ata_bio->nblks;
511 xfer->c_skip += ata_bio->nbytes;
512 xfer->c_bcount -= ata_bio->nbytes;
513 /* See if this transfer is complete. */
514 if (xfer->c_bcount > 0) {
515 if ((ata_bio->flags & ATA_POLL) == 0) {
516 /* Start the next operation */
517 wdc_ata_bio_start(chp, xfer);
518 } else {
519 /* Let wdc_ata_bio_start do the loop */
520 return 1;
521 }
522 } else { /* Done with this transfer */
523 ata_bio->error = NOERROR;
524 wdc_ata_bio_done(chp, xfer);
525 }
526 return 1;
527 }
528
529 void
530 wdc_ata_bio_done(chp, xfer)
531 struct channel_softc *chp;
532 struct wdc_xfer *xfer;
533 {
534 struct ata_bio *ata_bio = xfer->cmd;
535 int need_done = xfer->c_flags & C_NEEDDONE;
536 int drive = xfer->drive;
537
538 WDCDEBUG_PRINT(("wdc_ata_bio_done: flags 0x%x\n", (u_int)xfer->c_flags),
539 DEBUG_FUNCS);
540
541 /* feed back residual bcount to our caller */
542 ata_bio->bcount = xfer->c_bcount;
543
544 /* remove this command from xfer queue */
545 wdc_free_xfer(chp, xfer);
546
547 ata_bio->flags |= ATA_ITSDONE;
548 if (need_done) {
549 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_FUNCS);
550 wddone(chp->ch_drive[drive].drv_softc);
551 }
552 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
553 chp->ch_flags), DEBUG_FUNCS);
554 wdcstart(chp->wdc, chp->channel);
555 }
556
557 /*
558 * Implement operations needed before read/write.
559 */
560 int
561 wdc_ata_ctrl_intr(chp, xfer)
562 struct channel_softc *chp;
563 struct wdc_xfer *xfer;
564 {
565 struct ata_bio *ata_bio = xfer->cmd;
566 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
567 char *errstring = NULL;
568 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
569 DEBUG_FUNCS);
570
571 again:
572 switch (drvp->state) {
573 case RECAL: /* Should not be in this state here */
574 panic("wdc_ata_ctrl_intr: state==RECAL");
575 break;
576
577 case RECAL_WAIT:
578 errstring = "recal";
579 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
580 goto timeout;
581 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
582 goto error;
583 /* fall through */
584
585 case PIOMODE:
586 /* Don't try to set mode if controller can't be adjusted */
587 if ((chp->wdc->cap & WDC_CAPABILITY_PIO) == 0)
588 goto dmamode;
589 /*
590 * if mode is < 3, it is unknown. Assume the defaults are
591 * good.
592 */
593 if (drvp->PIO_mode < 3)
594 goto dmamode;
595 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
596 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
597 drvp->state = PIOMODE_WAIT;
598 break;
599
600 case PIOMODE_WAIT:
601 errstring = "piomode";
602 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
603 goto timeout;
604 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
605 goto error;
606 /* fall through */
607
608 case DMAMODE:
609 dmamode:
610 if (drvp->drive_flags & DRIVE_UDMA) {
611 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
612 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
613 } else if (drvp->drive_flags & DRIVE_DMA) {
614 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
615 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
616 } else {
617 goto geometry;
618 }
619 drvp->state = DMAMODE_WAIT;
620 break;
621 case DMAMODE_WAIT:
622 errstring = "dmamode";
623 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
624 goto timeout;
625 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
626 goto error;
627 /* fall through */
628
629 case GEOMETRY:
630 geometry:
631 if (ata_bio->flags & ATA_LBA)
632 goto multimode;
633 wdccommand(chp, xfer->drive, WDCC_IDP,
634 ata_bio->lp->d_ncylinders,
635 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
636 (ata_bio->lp->d_type == DTYPE_ST506) ?
637 ata_bio->lp->d_precompcyl / 4 : 0);
638 drvp->state = GEOMETRY_WAIT;
639 break;
640
641 case GEOMETRY_WAIT:
642 errstring = "geometry";
643 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
644 goto timeout;
645 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
646 goto error;
647 /* fall through */
648
649 case MULTIMODE:
650 multimode:
651 if (ata_bio->multi == 1)
652 goto ready;
653 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
654 ata_bio->multi, 0);
655 drvp->state = MULTIMODE_WAIT;
656 break;
657
658 case MULTIMODE_WAIT:
659 errstring = "setmulti";
660 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
661 goto timeout;
662 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
663 goto error;
664 /* fall through */
665
666 case READY:
667 ready:
668 drvp->state = READY;
669 /*
670 * The drive is usable now
671 */
672 xfer->c_intr = wdc_ata_bio_intr;
673 wdc_ata_bio_start(chp, xfer);
674 return 1;
675 }
676
677 if ((ata_bio->flags & ATA_POLL) == 0) {
678 chp->ch_flags |= WDCF_IRQ_WAIT;
679 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
680 } else {
681 goto again;
682 }
683 return 1;
684
685 timeout:
686 if ((xfer->c_flags & C_TIMEOU) == 0 ) {
687 return 0; /* IRQ was not for us */
688 }
689 printf("%s:%d:%d: %s timed out\n",
690 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
691 ata_bio->error = TIMEOUT;
692 drvp->state = 0;
693 wdc_ata_bio_done(chp, xfer);
694 return 0;
695 error:
696 printf("%s:%d:%d: %s ",
697 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
698 errstring);
699 if (chp->ch_status & WDCS_DWF) {
700 printf("drive fault\n");
701 ata_bio->error = ERR_DF;
702 } else {
703 printf("error (%x)\n", chp->ch_error);
704 ata_bio->r_error = chp->ch_error;
705 ata_bio->error = ERROR;
706 }
707 drvp->state = 0;
708 wdc_ata_bio_done(chp, xfer);
709 return 1;
710 }
711
712 int
713 wdc_ata_err(chp, ata_bio)
714 struct channel_softc *chp;
715 struct ata_bio *ata_bio;
716 {
717 ata_bio->error = 0;
718 if (chp->ch_status & WDCS_BSY) {
719 ata_bio->error = TIMEOUT;
720 return WDC_ATA_ERR;
721 }
722
723 if (chp->ch_status & WDCS_DWF) {
724 ata_bio->error = ERR_DF;
725 return WDC_ATA_ERR;
726 }
727
728 if (chp->ch_status & WDCS_ERR) {
729 ata_bio->error = ERROR;
730 ata_bio->r_error = chp->ch_error;
731 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
732 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
733 return WDC_ATA_ERR;
734 return WDC_ATA_NOERR;
735 }
736
737 if (chp->ch_status & WDCS_CORR)
738 ata_bio->flags |= ATA_CORR;
739 return WDC_ATA_NOERR;
740 }
741