ata_wdc.c revision 1.1.2.9 1 /* $NetBSD: ata_wdc.c,v 1.1.2.9 1998/08/21 16:34:46 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35
36 /*-
37 * Copyright (c) 1998 The NetBSD Foundation, Inc.
38 * All rights reserved.
39 *
40 * This code is derived from software contributed to The NetBSD Foundation
41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by the NetBSD
54 * Foundation, Inc. and its contributors.
55 * 4. Neither the name of The NetBSD Foundation nor the names of its
56 * contributors may be used to endorse or promote products derived
57 * from this software without specific prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
69 * POSSIBILITY OF SUCH DAMAGE.
70 */
71
72 #define WDCDEBUG
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/file.h>
78 #include <sys/stat.h>
79 #include <sys/buf.h>
80 #include <sys/malloc.h>
81 #include <sys/device.h>
82 #include <sys/disklabel.h>
83 #include <sys/syslog.h>
84 #include <sys/proc.h>
85
86 #include <machine/intr.h>
87 #include <machine/bus.h>
88 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
89 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
90 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
91 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
92 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
93 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
94
95 #include <dev/ata/atareg.h>
96 #include <dev/ata/atavar.h>
97 #include <dev/ic/wdcreg.h>
98 #include <dev/ic/wdcvar.h>
99 #include <dev/ata/wdvar.h>
100
101 #define DEBUG_INTR 0x01
102 #define DEBUG_XFERS 0x02
103 #define DEBUG_STATUS 0x04
104 #define DEBUG_FUNCS 0x08
105 #define DEBUG_PROBE 0x10
106 #ifdef WDCDEBUG
107 int wdcdebug_wd_mask = DEBUG_PROBE;
108 #define WDCDEBUG_PRINT(args, level) \
109 if (wdcdebug_wd_mask & (level)) \
110 printf args
111 #else
112 #define WDCDEBUG_PRINT(args, level)
113 #endif
114
115 #define ATA_DELAY 10000 /* 10s for a drive I/O */
116
117 int wdprint __P((void *, const char *));
118 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *));
119 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *));
120 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *));
121 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *));
122 int wdc_ata_err __P((struct channel_softc *, struct ata_bio *));
123 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
124 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
125 #define WDC_ATA_ERR 0x02 /* Drive reports an error */
126
127 int wdprint(aux, pnp)
128 void *aux;
129 const char *pnp;
130 {
131 struct ata_atapi_attach *aa_link = aux;
132 if (pnp)
133 printf("drive at %s", pnp);
134 printf(" channel %d drive %d", aa_link->aa_channel,
135 aa_link->aa_drv_data->drive);
136 return (UNCONF);
137 }
138
139 void
140 wdc_ata_attach(chp)
141 struct channel_softc *chp;
142 {
143 struct wdc_softc *wdc = chp->wdc;
144 int channel = chp->channel;
145 struct ata_atapi_attach aa_link;
146 int drive;
147
148 WDCDEBUG_PRINT(("wdc_ata_attach\n"), DEBUG_FUNCS | DEBUG_PROBE);
149
150 memset(&aa_link, 0, sizeof(struct ata_atapi_attach));
151 aa_link.aa_type = T_ATA;
152 aa_link.aa_channel = channel;
153 aa_link.aa_openings = 1;
154 for (drive = 0; drive < 2; drive++) {
155 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATA) == 0) {
156 continue;
157 }
158 aa_link.aa_drv_data = &chp->ch_drive[drive];
159 if (config_found(&wdc->sc_dev, (void *)&aa_link, wdprint))
160 wdc_probe_caps(&chp->ch_drive[drive]);
161 }
162 }
163
164 /*
165 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
166 * WDC_TRY_AGAIN. Must be called at splio().
167 */
168 int
169 wdc_ata_bio(drvp, ata_bio)
170 struct ata_drive_datas *drvp;
171 struct ata_bio *ata_bio;
172 {
173 struct wdc_xfer *xfer;
174 struct channel_softc *chp = drvp->chnl_softc;
175
176 xfer = wdc_get_xfer(WDC_NOSLEEP);
177 if (xfer == NULL)
178 return WDC_TRY_AGAIN;
179 if (ata_bio->flags & ATA_POLL)
180 xfer->c_flags |= C_POLL;
181 xfer->drive = drvp->drive;
182 xfer->cmd = ata_bio;
183 xfer->databuf = ata_bio->databuf;
184 xfer->c_bcount = ata_bio->bcount;
185 xfer->c_start = wdc_ata_bio_start;
186 xfer->c_intr = wdc_ata_bio_intr;
187 wdc_exec_xfer(chp, xfer);
188 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
189 }
190
191 void
192 wdc_ata_bio_start(chp, xfer)
193 struct channel_softc *chp;
194 struct wdc_xfer *xfer;
195 {
196 struct ata_bio *ata_bio = xfer->cmd;
197 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
198 u_int16_t cyl;
199 u_int8_t head, sect, cmd = 0;
200 int nblks;
201
202 WDCDEBUG_PRINT(("wdc_ata_bio_start\n"),
203 DEBUG_FUNCS | DEBUG_XFERS);
204
205 /* Do control operations specially. */
206 if (drvp->state < READY) {
207 /*
208 * Actually, we want to be careful not to mess with the control
209 * state if the device is currently busy, but we can assume
210 * that we never get to this point if that's the case.
211 */
212 /* at this point, we should only be in RECAL state */
213 if (drvp->state != RECAL) {
214 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n",
215 chp->wdc->sc_dev.dv_xname, chp->channel,
216 xfer->drive, drvp->state);
217 panic("wdc_ata_bio_start: bad state");
218 }
219 xfer->c_intr = wdc_ata_ctrl_intr;
220 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
221 WDSD_IBM | (xfer->drive << 4));
222 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
223 goto timeout;
224 wdccommandshort(chp, xfer->drive, WDCC_RECAL);
225 drvp->state = RECAL_WAIT;
226 if ((ata_bio->flags & ATA_POLL) == 0) {
227 chp->ch_flags |= WDCF_IRQ_WAIT;
228 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
229 } else {
230 /* Wait for at last 400ns for status bit to be valid */
231 delay(1);
232 wdc_ata_ctrl_intr(chp, xfer);
233 }
234 return;
235 }
236
237 again:
238 /*
239 *
240 * When starting a multi-sector transfer, or doing single-sector
241 * transfers...
242 */
243 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0 ||
244 (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) != 0) {
245 if (ata_bio->flags & ATA_SINGLE)
246 nblks = 1;
247 else
248 nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
249 /* Check for bad sectors and adjust transfer, if necessary. */
250 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
251 long blkdiff;
252 int i;
253 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
254 i++) {
255 blkdiff -= ata_bio->blkno;
256 if (blkdiff < 0)
257 continue;
258 if (blkdiff == 0) {
259 /* Replace current block of transfer. */
260 ata_bio->blkno =
261 ata_bio->lp->d_secperunit -
262 ata_bio->lp->d_nsectors - i - 1;
263 }
264 if (blkdiff < nblks) {
265 /* Bad block inside transfer. */
266 ata_bio->flags |= ATA_SINGLE;
267 nblks = 1;
268 }
269 break;
270 }
271 /* Transfer is okay now. */
272 }
273 if (ata_bio->flags & ATA_LBA) {
274 sect = (ata_bio->blkno >> 0) & 0xff;
275 cyl = (ata_bio->blkno >> 8) & 0xffff;
276 head = (ata_bio->blkno >> 24) & 0x0f;
277 head |= WDSD_LBA;
278 } else {
279 int blkno = ata_bio->blkno;
280 sect = blkno % ata_bio->lp->d_nsectors;
281 sect++; /* Sectors begin with 1, not 0. */
282 blkno /= ata_bio->lp->d_nsectors;
283 head = blkno % ata_bio->lp->d_ntracks;
284 blkno /= ata_bio->lp->d_ntracks;
285 cyl = blkno;
286 head |= WDSD_CHS;
287 }
288 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
289 (ata_bio->flags & ATA_SINGLE) == 0) {
290 ata_bio->nblks = nblks;
291 ata_bio->nbytes = xfer->c_bcount;
292 cmd = (ata_bio->flags & ATA_READ) ?
293 WDCC_READDMA : WDCC_WRITEDMA;
294 nblks = ata_bio->nblks;
295 /* Init the DMA channel. */
296 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
297 chp->channel, xfer->drive,
298 xfer->databuf + xfer->c_skip, ata_bio->nbytes,
299 ata_bio->flags & ATA_READ) != 0) {
300 ata_bio->error = ERR_DMA;
301 ata_bio->r_error = 0;
302 wdc_ata_bio_done(chp, xfer);
303 return;
304 }
305 /* Initiate command */
306 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
307 WDSD_IBM | (xfer->drive << 4));
308 if (wait_for_ready(chp, ATA_DELAY) < 0)
309 goto timeout;
310 wdccommand(chp, xfer->drive, cmd, cyl,
311 head, sect, nblks, 0);
312 /* start the DMA channel */
313 (*chp->wdc->dma_start)(chp->wdc->dma_arg,
314 chp->channel, xfer->drive,
315 ata_bio->flags & ATA_READ);
316 /* wait for irq */
317 goto intr;
318 } /* else not DMA */
319 ata_bio->nblks = min(nblks, ata_bio->multi);
320 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
321 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
322 cmd = (ata_bio->flags & ATA_READ) ?
323 WDCC_READMULTI : WDCC_WRITEMULTI;
324 } else {
325 cmd = (ata_bio->flags & ATA_READ) ?
326 WDCC_READ : WDCC_WRITE;
327 }
328 /* Initiate command! */
329 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
330 WDSD_IBM | (xfer->drive << 4));
331 if (wait_for_ready(chp, ATA_DELAY) < 0)
332 goto timeout;
333 wdccommand(chp, xfer->drive, cmd, cyl,
334 head, sect, nblks,
335 (ata_bio->lp->d_type == DTYPE_ST506) ?
336 ata_bio->lp->d_precompcyl / 4 : 0);
337 } else if (ata_bio->nblks > 1) {
338 /* The number of blocks in the last stretch may be smaller. */
339 nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
340 if (ata_bio->nblks > nblks) {
341 ata_bio->nblks = nblks;
342 ata_bio->nbytes = xfer->c_bcount;
343 }
344 }
345 /* If this was a write and not using DMA, push the data. */
346 if ((ata_bio->flags & ATA_READ) == 0) {
347 /* Wait for at last 400ns for status bit to be valid */
348 delay(1);
349 if (wait_for_drq(chp, ATA_DELAY) != 0) {
350 printf("%s:%d:%d: timeout waiting for DRQ, "
351 "st=0x%02x, err=0x%02x\n",
352 chp->wdc->sc_dev.dv_xname, chp->channel,
353 xfer->drive, chp->ch_status, chp->ch_error);
354 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR)
355 ata_bio->error = TIMEOUT;
356 wdc_ata_bio_done(chp, xfer);
357 return;
358 }
359 if (wdc_ata_err(chp, ata_bio) == WDC_ATA_ERR) {
360 wdc_ata_bio_done(chp, xfer);
361 return;
362 }
363 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
364 if (drvp->drive_flags & DRIVE_CAP32) {
365 bus_space_write_multi_4(chp->cmd_iot,
366 chp->cmd_ioh, wd_data,
367 xfer->databuf + xfer->c_skip,
368 ata_bio->nbytes >> 2);
369 } else {
370 bus_space_write_multi_2(chp->cmd_iot,
371 chp->cmd_ioh, wd_data,
372 xfer->databuf + xfer->c_skip,
373 ata_bio->nbytes >> 1);
374 }
375 } else {
376 if (drvp->drive_flags & DRIVE_CAP32) {
377 bus_space_write_multi_stream_4(chp->cmd_iot,
378 chp->cmd_ioh, wd_data,
379 xfer->databuf + xfer->c_skip,
380 ata_bio->nbytes >> 2);
381 } else {
382 bus_space_write_multi_stream_2(chp->cmd_iot,
383 chp->cmd_ioh, wd_data,
384 xfer->databuf + xfer->c_skip,
385 ata_bio->nbytes >> 1);
386 }
387 }
388 }
389
390 intr: /* Wait for IRQ (either real or polled) */
391 if ((ata_bio->flags & ATA_POLL) == 0) {
392 chp->ch_flags |= WDCF_IRQ_WAIT;
393 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
394 } else {
395 /* Wait for at last 400ns for status bit to be valid */
396 delay(1);
397 wdc_ata_bio_intr(chp, xfer);
398 if ((ata_bio->flags & ATA_ITSDONE) == 0)
399 goto again;
400 }
401 return;
402 timeout:
403 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
404 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
405 chp->ch_status, chp->ch_error);
406 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR)
407 ata_bio->error = TIMEOUT;
408 wdc_ata_bio_done(chp, xfer);
409 return;
410 }
411
412 int
413 wdc_ata_bio_intr(chp, xfer)
414 struct channel_softc *chp;
415 struct wdc_xfer *xfer;
416 {
417 struct ata_bio *ata_bio = xfer->cmd;
418 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
419 int drv_err;
420
421 WDCDEBUG_PRINT(("wdc_ata_bio_intr\n"), DEBUG_INTR);
422
423 /* Is it not a transfer, but a control operation? */
424 if (drvp->state < READY) {
425 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
426 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
427 drvp->state);
428 panic("wdc_ata_bio_intr: bad state\n");
429 }
430
431 /* Ack interrupt done by wait_for_unbusy */
432 if (wait_for_unbusy(chp, ATA_DELAY) < 0) {
433 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
434 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
435 xfer->c_bcount, xfer->c_skip);
436 /* if we were using DMA, turn off DMA channel */
437 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
438 (ata_bio->flags & ATA_SINGLE) == 0)
439 (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
440 chp->channel, xfer->drive,
441 ata_bio->flags & ATA_READ);
442 ata_bio->error = TIMEOUT;
443 wdc_ata_bio_done(chp, xfer);
444 return 1;
445 }
446
447 drv_err = wdc_ata_err(chp, ata_bio);
448
449 /* If we were using DMA, Turn off the DMA channel and check for error */
450 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
451 (ata_bio->flags & ATA_SINGLE) == 0) {
452 if (ata_bio->flags & ATA_POLL) {
453 /*
454 * IDE drives deassert WDCS_BSY before trasfert is
455 * complete when using DMA. Polling for DRQ to deassert
456 * is not enouth because INTR may not be
457 * flagged in the DMA status, so poll for DRDY.
458 */
459 wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
460 ATA_DELAY);
461 delay(50);
462 }
463 if (chp->ch_status & WDCS_DRQ) {
464 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
465 chp->wdc->sc_dev.dv_xname, chp->channel,
466 xfer->drive, chp->ch_status);
467 ata_bio->error = TIMEOUT;
468 wdc_ata_bio_done(chp, xfer);
469 return 1;
470 }
471 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg,
472 chp->channel, xfer->drive, ata_bio->flags & ATA_READ)) {
473 if (drv_err != WDC_ATA_ERR) {
474 ata_bio->error = ERR_DMA;
475 drv_err = WDC_ATA_ERR;
476 }
477 }
478 if (drv_err != WDC_ATA_ERR)
479 goto end;
480
481 }
482
483 /* if we had an error, end */
484 if (drv_err == WDC_ATA_ERR) {
485 wdc_ata_bio_done(chp, xfer);
486 return 1;
487 }
488
489 /* If this was a read and not using DMA, fetch the data. */
490 if ((ata_bio->flags & ATA_READ) != 0) {
491 if ((chp->ch_status & (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) !=
492 (WDCS_DRDY | WDCS_DSC | WDCS_DRQ)) {
493 printf("%s:%d:%d: read intr before drq\n",
494 chp->wdc->sc_dev.dv_xname, chp->channel,
495 xfer->drive);
496 ata_bio->error = TIMEOUT;
497 wdc_ata_bio_done(chp, xfer);
498 return 1;
499 }
500 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
501 if (drvp->drive_flags & DRIVE_CAP32) {
502 bus_space_read_multi_4(chp->cmd_iot,
503 chp->cmd_ioh, wd_data,
504 xfer->databuf + xfer->c_skip,
505 ata_bio->nbytes >> 2);
506 } else {
507 bus_space_read_multi_2(chp->cmd_iot,
508 chp->cmd_ioh, wd_data,
509 xfer->databuf + xfer->c_skip,
510 ata_bio->nbytes >> 1);
511 }
512 } else {
513 if (drvp->drive_flags & DRIVE_CAP32) {
514 bus_space_read_multi_stream_4(chp->cmd_iot,
515 chp->cmd_ioh, wd_data,
516 xfer->databuf + xfer->c_skip,
517 ata_bio->nbytes >> 2);
518 } else {
519 bus_space_read_multi_stream_2(chp->cmd_iot,
520 chp->cmd_ioh, wd_data,
521 xfer->databuf + xfer->c_skip,
522 ata_bio->nbytes >> 1);
523 }
524 }
525 }
526
527 end:
528 ata_bio->blkno += ata_bio->nblks;
529 ata_bio->blkdone += ata_bio->nblks;
530 xfer->c_skip += ata_bio->nbytes;
531 xfer->c_bcount -= ata_bio->nbytes;
532 /* See if this transfer is complete. */
533 if (xfer->c_bcount > 0) {
534 if ((ata_bio->flags & ATA_POLL) == 0) {
535 /* Start the next operation */
536 wdc_ata_bio_start(chp, xfer);
537 } else {
538 /* Let wdc_ata_bio_start do the loop */
539 return 1;
540 }
541 } else { /* Done with this transfer */
542 ata_bio->error = NOERROR;
543 wdc_ata_bio_done(chp, xfer);
544 }
545 return 1;
546 }
547
548 void
549 wdc_ata_bio_done(chp, xfer)
550 struct channel_softc *chp;
551 struct wdc_xfer *xfer;
552 {
553 struct ata_bio *ata_bio = xfer->cmd;
554 int need_done = xfer->c_flags & C_NEEDDONE;
555 int drive = xfer->drive;
556
557 WDCDEBUG_PRINT(("wdc_ata_bio_done: flags 0x%x\n", (u_int)xfer->c_flags),
558 DEBUG_FUNCS);
559
560 /* feed back residual bcount to our caller */
561 ata_bio->bcount = xfer->c_bcount;
562
563 /* remove this command from xfer queue */
564 wdc_free_xfer(chp, xfer);
565
566 ata_bio->flags |= ATA_ITSDONE;
567 if (need_done) {
568 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_FUNCS);
569 wddone(chp->ch_drive[drive].drv_softc);
570 }
571 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
572 chp->ch_flags), DEBUG_FUNCS);
573 wdcstart(chp->wdc, chp->channel);
574 }
575
576 /*
577 * Implement operations needed before read/write.
578 */
579 int
580 wdc_ata_ctrl_intr(chp, xfer)
581 struct channel_softc *chp;
582 struct wdc_xfer *xfer;
583 {
584 struct ata_bio *ata_bio = xfer->cmd;
585 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
586 char *errstring = NULL;
587 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
588 DEBUG_FUNCS);
589
590 again:
591 switch (drvp->state) {
592 case RECAL: /* Should not be in this state here */
593 panic("wdc_ata_ctrl_intr: state==RECAL");
594 break;
595
596 case RECAL_WAIT:
597 errstring = "recal";
598 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
599 goto timeout;
600 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
601 goto error;
602 /* fall through */
603
604 case PIOMODE:
605 /* Don't try to set mode if controller can't be adjusted */
606 if ((chp->wdc->cap & WDC_CAPABILITY_PIO) == 0)
607 goto dmamode;
608 /*
609 * if mode is < 3, it is unknown. Assume the defaults are
610 * good.
611 */
612 if (drvp->PIO_mode < 3)
613 goto dmamode;
614 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
615 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
616 drvp->state = PIOMODE_WAIT;
617 break;
618
619 case PIOMODE_WAIT:
620 errstring = "piomode";
621 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
622 goto timeout;
623 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
624 goto error;
625 /* fall through */
626
627 case DMAMODE:
628 dmamode:
629 if (drvp->drive_flags & DRIVE_UDMA) {
630 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
631 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
632 } else if (drvp->drive_flags & DRIVE_DMA) {
633 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
634 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
635 } else {
636 goto geometry;
637 }
638 drvp->state = DMAMODE_WAIT;
639 break;
640 case DMAMODE_WAIT:
641 errstring = "dmamode";
642 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
643 goto timeout;
644 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
645 goto error;
646 /* fall through */
647
648 case GEOMETRY:
649 geometry:
650 if (ata_bio->flags & ATA_LBA)
651 goto multimode;
652 wdccommand(chp, xfer->drive, WDCC_IDP,
653 ata_bio->lp->d_ncylinders,
654 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
655 (ata_bio->lp->d_type == DTYPE_ST506) ?
656 ata_bio->lp->d_precompcyl / 4 : 0);
657 drvp->state = GEOMETRY_WAIT;
658 break;
659
660 case GEOMETRY_WAIT:
661 errstring = "geometry";
662 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
663 goto timeout;
664 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
665 goto error;
666 /* fall through */
667
668 case MULTIMODE:
669 multimode:
670 if (ata_bio->multi == 1)
671 goto ready;
672 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
673 ata_bio->multi, 0);
674 drvp->state = MULTIMODE_WAIT;
675 break;
676
677 case MULTIMODE_WAIT:
678 errstring = "setmulti";
679 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY))
680 goto timeout;
681 if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
682 goto error;
683 /* fall through */
684
685 case READY:
686 ready:
687 drvp->state = READY;
688 /*
689 * The drive is usable now
690 */
691 xfer->c_intr = wdc_ata_bio_intr;
692 wdc_ata_bio_start(chp, xfer);
693 return 1;
694 }
695
696 if ((ata_bio->flags & ATA_POLL) == 0) {
697 chp->ch_flags |= WDCF_IRQ_WAIT;
698 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz);
699 } else {
700 goto again;
701 }
702 return 1;
703
704 timeout:
705 if ((xfer->c_flags & C_TIMEOU) == 0 ) {
706 return 0; /* IRQ was not for us */
707 }
708 printf("%s:%d:%d: %s timed out\n",
709 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
710 ata_bio->error = TIMEOUT;
711 drvp->state = 0;
712 wdc_ata_bio_done(chp, xfer);
713 return 0;
714 error:
715 printf("%s:%d:%d: %s ",
716 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
717 errstring);
718 if (chp->ch_status & WDCS_DWF) {
719 printf("drive fault\n");
720 ata_bio->error = ERR_DF;
721 } else {
722 printf("error (%x)\n", chp->ch_error);
723 ata_bio->r_error = chp->ch_error;
724 ata_bio->error = ERROR;
725 }
726 drvp->state = 0;
727 wdc_ata_bio_done(chp, xfer);
728 return 1;
729 }
730
731 int
732 wdc_ata_err(chp, ata_bio)
733 struct channel_softc *chp;
734 struct ata_bio *ata_bio;
735 {
736 ata_bio->error = 0;
737 if (chp->ch_status & WDCS_BSY) {
738 ata_bio->error = TIMEOUT;
739 return WDC_ATA_ERR;
740 }
741
742 if (chp->ch_status & WDCS_DWF) {
743 ata_bio->error = ERR_DF;
744 return WDC_ATA_ERR;
745 }
746
747 if (chp->ch_status & WDCS_ERR) {
748 ata_bio->error = ERROR;
749 ata_bio->r_error = chp->ch_error;
750 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
751 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
752 return WDC_ATA_ERR;
753 return WDC_ATA_NOERR;
754 }
755
756 if (chp->ch_status & WDCS_CORR)
757 ata_bio->flags |= ATA_CORR;
758 return WDC_ATA_NOERR;
759 }
760