ata_wdc.c revision 1.15
1 /* $NetBSD: ata_wdc.c,v 1.15 1999/02/21 00:52:04 hubertf Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *)); 121 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 122 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *)); 123 int wdc_ata_err __P((struct channel_softc *, struct ata_bio *)); 124 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 125 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 126 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 127 128 /* 129 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 130 * WDC_TRY_AGAIN. Must be called at splio(). 131 */ 132 int 133 wdc_ata_bio(drvp, ata_bio) 134 struct ata_drive_datas *drvp; 135 struct ata_bio *ata_bio; 136 { 137 struct wdc_xfer *xfer; 138 struct channel_softc *chp = drvp->chnl_softc; 139 140 xfer = wdc_get_xfer(WDC_NOSLEEP); 141 if (xfer == NULL) 142 return WDC_TRY_AGAIN; 143 if (ata_bio->flags & ATA_POLL) 144 xfer->c_flags |= C_POLL; 145 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 146 (ata_bio->flags & ATA_SINGLE) == 0) 147 xfer->c_flags |= C_DMA; 148 xfer->drive = drvp->drive; 149 xfer->cmd = ata_bio; 150 xfer->databuf = ata_bio->databuf; 151 xfer->c_bcount = ata_bio->bcount; 152 xfer->c_start = wdc_ata_bio_start; 153 xfer->c_intr = wdc_ata_bio_intr; 154 wdc_exec_xfer(chp, xfer); 155 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 156 } 157 158 void 159 wdc_ata_bio_start(chp, xfer) 160 struct channel_softc *chp; 161 struct wdc_xfer *xfer; 162 { 163 struct ata_bio *ata_bio = xfer->cmd; 164 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 165 u_int16_t cyl; 166 u_int8_t head, sect, cmd = 0; 167 int nblks; 168 int dma_flags = 0; 169 170 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 171 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 172 DEBUG_XFERS); 173 174 /* Do control operations specially. */ 175 if (drvp->state < READY) { 176 /* 177 * Actually, we want to be careful not to mess with the control 178 * state if the device is currently busy, but we can assume 179 * that we never get to this point if that's the case. 180 */ 181 /* at this point, we should only be in RECAL state */ 182 if (drvp->state != RECAL) { 183 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n", 184 chp->wdc->sc_dev.dv_xname, chp->channel, 185 xfer->drive, drvp->state); 186 panic("wdc_ata_bio_start: bad state"); 187 } 188 xfer->c_intr = wdc_ata_ctrl_intr; 189 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 190 WDSD_IBM | (xfer->drive << 4)); 191 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 192 goto timeout; 193 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 194 drvp->state = RECAL_WAIT; 195 if ((ata_bio->flags & ATA_POLL) == 0) { 196 chp->ch_flags |= WDCF_IRQ_WAIT; 197 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 198 } else { 199 /* Wait for at last 400ns for status bit to be valid */ 200 delay(1); 201 wdc_ata_ctrl_intr(chp, xfer); 202 } 203 return; 204 } 205 206 if (xfer->c_flags & C_DMA) { 207 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 208 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 209 } 210 again: 211 /* 212 * 213 * When starting a multi-sector transfer, or doing single-sector 214 * transfers... 215 */ 216 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 217 if (ata_bio->flags & ATA_SINGLE) 218 nblks = 1; 219 else 220 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 221 /* Check for bad sectors and adjust transfer, if necessary. */ 222 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 223 long blkdiff; 224 int i; 225 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 226 i++) { 227 blkdiff -= ata_bio->blkno; 228 if (blkdiff < 0) 229 continue; 230 if (blkdiff == 0) { 231 /* Replace current block of transfer. */ 232 ata_bio->blkno = 233 ata_bio->lp->d_secperunit - 234 ata_bio->lp->d_nsectors - i - 1; 235 } 236 if (blkdiff < nblks) { 237 /* Bad block inside transfer. */ 238 ata_bio->flags |= ATA_SINGLE; 239 nblks = 1; 240 } 241 break; 242 } 243 /* Transfer is okay now. */ 244 } 245 if (ata_bio->flags & ATA_LBA) { 246 sect = (ata_bio->blkno >> 0) & 0xff; 247 cyl = (ata_bio->blkno >> 8) & 0xffff; 248 head = (ata_bio->blkno >> 24) & 0x0f; 249 head |= WDSD_LBA; 250 } else { 251 int blkno = ata_bio->blkno; 252 sect = blkno % ata_bio->lp->d_nsectors; 253 sect++; /* Sectors begin with 1, not 0. */ 254 blkno /= ata_bio->lp->d_nsectors; 255 head = blkno % ata_bio->lp->d_ntracks; 256 blkno /= ata_bio->lp->d_ntracks; 257 cyl = blkno; 258 head |= WDSD_CHS; 259 } 260 if (xfer->c_flags & C_DMA) { 261 ata_bio->nblks = nblks; 262 ata_bio->nbytes = xfer->c_bcount; 263 cmd = (ata_bio->flags & ATA_READ) ? 264 WDCC_READDMA : WDCC_WRITEDMA; 265 nblks = ata_bio->nblks; 266 /* Init the DMA channel. */ 267 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 268 chp->channel, xfer->drive, 269 (char *)xfer->databuf + xfer->c_skip, 270 ata_bio->nbytes, dma_flags) != 0) { 271 ata_bio->error = ERR_DMA; 272 ata_bio->r_error = 0; 273 wdc_ata_bio_done(chp, xfer); 274 return; 275 } 276 /* Initiate command */ 277 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 278 WDSD_IBM | (xfer->drive << 4)); 279 if (wait_for_ready(chp, ATA_DELAY) < 0) 280 goto timeout; 281 wdccommand(chp, xfer->drive, cmd, cyl, 282 head, sect, nblks, 0); 283 /* start the DMA channel */ 284 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 285 chp->channel, xfer->drive, dma_flags); 286 /* wait for irq */ 287 goto intr; 288 } /* else not DMA */ 289 ata_bio->nblks = min(nblks, ata_bio->multi); 290 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 291 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 292 cmd = (ata_bio->flags & ATA_READ) ? 293 WDCC_READMULTI : WDCC_WRITEMULTI; 294 } else { 295 cmd = (ata_bio->flags & ATA_READ) ? 296 WDCC_READ : WDCC_WRITE; 297 } 298 /* Initiate command! */ 299 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 300 WDSD_IBM | (xfer->drive << 4)); 301 if (wait_for_ready(chp, ATA_DELAY) < 0) 302 goto timeout; 303 wdccommand(chp, xfer->drive, cmd, cyl, 304 head, sect, nblks, 305 (ata_bio->lp->d_type == DTYPE_ST506) ? 306 ata_bio->lp->d_precompcyl / 4 : 0); 307 } else if (ata_bio->nblks > 1) { 308 /* The number of blocks in the last stretch may be smaller. */ 309 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 310 if (ata_bio->nblks > nblks) { 311 ata_bio->nblks = nblks; 312 ata_bio->nbytes = xfer->c_bcount; 313 } 314 } 315 /* If this was a write and not using DMA, push the data. */ 316 if ((ata_bio->flags & ATA_READ) == 0) { 317 if (wait_for_drq(chp, ATA_DELAY) != 0) { 318 printf("%s:%d:%d: timeout waiting for DRQ, " 319 "st=0x%02x, err=0x%02x\n", 320 chp->wdc->sc_dev.dv_xname, chp->channel, 321 xfer->drive, chp->ch_status, chp->ch_error); 322 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR) 323 ata_bio->error = TIMEOUT; 324 wdc_ata_bio_done(chp, xfer); 325 return; 326 } 327 if (wdc_ata_err(chp, ata_bio) == WDC_ATA_ERR) { 328 wdc_ata_bio_done(chp, xfer); 329 return; 330 } 331 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 332 if (drvp->drive_flags & DRIVE_CAP32) { 333 bus_space_write_multi_4(chp->data32iot, 334 chp->data32ioh, 0, 335 (u_int32_t *)((char *)xfer->databuf + 336 xfer->c_skip), 337 ata_bio->nbytes >> 2); 338 } else { 339 bus_space_write_multi_2(chp->cmd_iot, 340 chp->cmd_ioh, wd_data, 341 (u_int16_t *)((char *)xfer->databuf + 342 xfer->c_skip), 343 ata_bio->nbytes >> 1); 344 } 345 } else { 346 if (drvp->drive_flags & DRIVE_CAP32) { 347 bus_space_write_multi_stream_4(chp->data32iot, 348 chp->data32ioh, 0, 349 (u_int32_t *)((char *)xfer->databuf + 350 xfer->c_skip), 351 ata_bio->nbytes >> 2); 352 } else { 353 bus_space_write_multi_stream_2(chp->cmd_iot, 354 chp->cmd_ioh, wd_data, 355 (u_int16_t *)((char *)xfer->databuf + 356 xfer->c_skip), 357 ata_bio->nbytes >> 1); 358 } 359 } 360 } 361 362 intr: /* Wait for IRQ (either real or polled) */ 363 if ((ata_bio->flags & ATA_POLL) == 0) { 364 chp->ch_flags |= WDCF_IRQ_WAIT; 365 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 366 } else { 367 /* Wait for at last 400ns for status bit to be valid */ 368 delay(1); 369 wdc_ata_bio_intr(chp, xfer); 370 if ((ata_bio->flags & ATA_ITSDONE) == 0) 371 goto again; 372 } 373 return; 374 timeout: 375 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 376 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 377 chp->ch_status, chp->ch_error); 378 if (wdc_ata_err(chp, ata_bio) != WDC_ATA_ERR) 379 ata_bio->error = TIMEOUT; 380 wdc_ata_bio_done(chp, xfer); 381 return; 382 } 383 384 int 385 wdc_ata_bio_intr(chp, xfer) 386 struct channel_softc *chp; 387 struct wdc_xfer *xfer; 388 { 389 struct ata_bio *ata_bio = xfer->cmd; 390 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 391 int drv_err; 392 int dma_flags = 0; 393 394 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 395 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 396 DEBUG_INTR | DEBUG_XFERS); 397 398 399 /* Is it not a transfer, but a control operation? */ 400 if (drvp->state < READY) { 401 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 402 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 403 drvp->state); 404 panic("wdc_ata_bio_intr: bad state\n"); 405 } 406 407 if (xfer->c_flags & C_DMA) { 408 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 409 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 410 } 411 412 /* Ack interrupt done by wait_for_unbusy */ 413 if (wait_for_unbusy(chp, ATA_DELAY) < 0) { 414 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 415 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 416 xfer->c_bcount, xfer->c_skip); 417 /* if we were using DMA, turn off DMA channel */ 418 if (xfer->c_flags & C_DMA) { 419 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 420 chp->channel, xfer->drive, dma_flags); 421 drvp->n_dmaerrs++; 422 } 423 ata_bio->error = TIMEOUT; 424 wdc_ata_bio_done(chp, xfer); 425 return 1; 426 } 427 428 drv_err = wdc_ata_err(chp, ata_bio); 429 430 /* If we were using DMA, Turn off the DMA channel and check for error */ 431 if (xfer->c_flags & C_DMA) { 432 if (ata_bio->flags & ATA_POLL) { 433 /* 434 * IDE drives deassert WDCS_BSY before transfer is 435 * complete when using DMA. Polling for DRQ to deassert 436 * is not enouth DRQ is not required to be 437 * asserted for DMA transfers, so poll for DRDY. 438 */ 439 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 440 ATA_DELAY) < 0) { 441 printf("%s:%d:%d: polled transfer timed out " 442 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 443 chp->channel, xfer->drive, chp->ch_status); 444 ata_bio->error = TIMEOUT; 445 drv_err = WDC_ATA_ERR; 446 } 447 } 448 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg, 449 chp->channel, xfer->drive, dma_flags) != 0) { 450 if (drv_err != WDC_ATA_ERR) { 451 ata_bio->error = ERR_DMA; 452 drv_err = WDC_ATA_ERR; 453 } 454 } 455 if (chp->ch_status & WDCS_DRQ) { 456 if (drv_err != WDC_ATA_ERR) { 457 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 458 chp->wdc->sc_dev.dv_xname, chp->channel, 459 xfer->drive, chp->ch_status); 460 ata_bio->error = TIMEOUT; 461 drv_err = WDC_ATA_ERR; 462 } 463 } 464 if (drv_err != WDC_ATA_ERR) 465 goto end; 466 drvp->n_dmaerrs++; 467 } 468 469 /* if we had an error, end */ 470 if (drv_err == WDC_ATA_ERR) { 471 wdc_ata_bio_done(chp, xfer); 472 return 1; 473 } 474 475 /* If this was a read and not using DMA, fetch the data. */ 476 if ((ata_bio->flags & ATA_READ) != 0) { 477 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 478 printf("%s:%d:%d: read intr before drq\n", 479 chp->wdc->sc_dev.dv_xname, chp->channel, 480 xfer->drive); 481 ata_bio->error = TIMEOUT; 482 wdc_ata_bio_done(chp, xfer); 483 return 1; 484 } 485 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 486 if (drvp->drive_flags & DRIVE_CAP32) { 487 bus_space_read_multi_4(chp->data32iot, 488 chp->data32ioh, 0, 489 (u_int32_t *)((char *)xfer->databuf + 490 xfer->c_skip), 491 ata_bio->nbytes >> 2); 492 } else { 493 bus_space_read_multi_2(chp->cmd_iot, 494 chp->cmd_ioh, wd_data, 495 (u_int16_t *)((char *)xfer->databuf + 496 xfer->c_skip), 497 ata_bio->nbytes >> 1); 498 } 499 } else { 500 if (drvp->drive_flags & DRIVE_CAP32) { 501 bus_space_read_multi_stream_4(chp->data32iot, 502 chp->data32ioh, 0, 503 (u_int32_t *)((char *)xfer->databuf + 504 xfer->c_skip), 505 ata_bio->nbytes >> 2); 506 } else { 507 bus_space_read_multi_stream_2(chp->cmd_iot, 508 chp->cmd_ioh, wd_data, 509 (u_int16_t *)((char *)xfer->databuf + 510 xfer->c_skip), 511 ata_bio->nbytes >> 1); 512 } 513 } 514 } 515 516 end: 517 ata_bio->blkno += ata_bio->nblks; 518 ata_bio->blkdone += ata_bio->nblks; 519 xfer->c_skip += ata_bio->nbytes; 520 xfer->c_bcount -= ata_bio->nbytes; 521 /* See if this transfer is complete. */ 522 if (xfer->c_bcount > 0) { 523 if ((ata_bio->flags & ATA_POLL) == 0) { 524 /* Start the next operation */ 525 wdc_ata_bio_start(chp, xfer); 526 } else { 527 /* Let wdc_ata_bio_start do the loop */ 528 return 1; 529 } 530 } else { /* Done with this transfer */ 531 ata_bio->error = NOERROR; 532 wdc_ata_bio_done(chp, xfer); 533 } 534 return 1; 535 } 536 537 void 538 wdc_ata_bio_done(chp, xfer) 539 struct channel_softc *chp; 540 struct wdc_xfer *xfer; 541 { 542 struct ata_bio *ata_bio = xfer->cmd; 543 int need_done = xfer->c_flags & C_NEEDDONE; 544 int drive = xfer->drive; 545 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 546 547 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 548 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 549 (u_int)xfer->c_flags), 550 DEBUG_XFERS); 551 552 if (ata_bio->error == NOERROR) 553 drvp->n_dmaerrs = 0; 554 else if (drvp->n_dmaerrs >= NERRS_MAX) { 555 wdc_downgrade_mode(drvp); 556 } 557 558 /* feed back residual bcount to our caller */ 559 ata_bio->bcount = xfer->c_bcount; 560 561 /* remove this command from xfer queue */ 562 wdc_free_xfer(chp, xfer); 563 564 ata_bio->flags |= ATA_ITSDONE; 565 if (need_done) { 566 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 567 wddone(chp->ch_drive[drive].drv_softc); 568 } 569 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 570 chp->ch_flags), DEBUG_XFERS); 571 wdcstart(chp); 572 } 573 574 /* 575 * Implement operations needed before read/write. 576 */ 577 int 578 wdc_ata_ctrl_intr(chp, xfer) 579 struct channel_softc *chp; 580 struct wdc_xfer *xfer; 581 { 582 struct ata_bio *ata_bio = xfer->cmd; 583 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 584 char *errstring = NULL; 585 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 586 DEBUG_FUNCS); 587 588 again: 589 switch (drvp->state) { 590 case RECAL: /* Should not be in this state here */ 591 panic("wdc_ata_ctrl_intr: state==RECAL"); 592 break; 593 594 case RECAL_WAIT: 595 errstring = "recal"; 596 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 597 goto timeout; 598 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 599 goto error; 600 /* fall through */ 601 602 case PIOMODE: 603 /* Don't try to set modes if controller can't be adjusted */ 604 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 605 goto geometry; 606 /* Also don't try if the drive didn't report its mode */ 607 if ((drvp->drive_flags & DRIVE_MODE) == 0) 608 goto geometry; 609 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 610 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 611 drvp->state = PIOMODE_WAIT; 612 break; 613 614 case PIOMODE_WAIT: 615 errstring = "piomode"; 616 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 617 goto timeout; 618 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 619 goto error; 620 /* fall through */ 621 622 case DMAMODE: 623 if (drvp->drive_flags & DRIVE_UDMA) { 624 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 625 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 626 } else if (drvp->drive_flags & DRIVE_DMA) { 627 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 628 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 629 } else { 630 goto geometry; 631 } 632 drvp->state = DMAMODE_WAIT; 633 break; 634 case DMAMODE_WAIT: 635 errstring = "dmamode"; 636 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 637 goto timeout; 638 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 639 goto error; 640 /* fall through */ 641 642 case GEOMETRY: 643 geometry: 644 if (ata_bio->flags & ATA_LBA) 645 goto multimode; 646 wdccommand(chp, xfer->drive, WDCC_IDP, 647 ata_bio->lp->d_ncylinders, 648 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 649 (ata_bio->lp->d_type == DTYPE_ST506) ? 650 ata_bio->lp->d_precompcyl / 4 : 0); 651 drvp->state = GEOMETRY_WAIT; 652 break; 653 654 case GEOMETRY_WAIT: 655 errstring = "geometry"; 656 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 657 goto timeout; 658 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 659 goto error; 660 /* fall through */ 661 662 case MULTIMODE: 663 multimode: 664 if (ata_bio->multi == 1) 665 goto ready; 666 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 667 ata_bio->multi, 0); 668 drvp->state = MULTIMODE_WAIT; 669 break; 670 671 case MULTIMODE_WAIT: 672 errstring = "setmulti"; 673 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 674 goto timeout; 675 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 676 goto error; 677 /* fall through */ 678 679 case READY: 680 ready: 681 drvp->state = READY; 682 /* 683 * The drive is usable now 684 */ 685 xfer->c_intr = wdc_ata_bio_intr; 686 wdc_ata_bio_start(chp, xfer); 687 return 1; 688 } 689 690 if ((ata_bio->flags & ATA_POLL) == 0) { 691 chp->ch_flags |= WDCF_IRQ_WAIT; 692 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 693 } else { 694 goto again; 695 } 696 return 1; 697 698 timeout: 699 if ((xfer->c_flags & C_TIMEOU) == 0 ) { 700 return 0; /* IRQ was not for us */ 701 } 702 printf("%s:%d:%d: %s timed out\n", 703 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 704 ata_bio->error = TIMEOUT; 705 drvp->state = 0; 706 wdc_ata_bio_done(chp, xfer); 707 return 0; 708 error: 709 printf("%s:%d:%d: %s ", 710 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 711 errstring); 712 if (chp->ch_status & WDCS_DWF) { 713 printf("drive fault\n"); 714 ata_bio->error = ERR_DF; 715 } else { 716 printf("error (%x)\n", chp->ch_error); 717 ata_bio->r_error = chp->ch_error; 718 ata_bio->error = ERROR; 719 } 720 drvp->state = 0; 721 wdc_ata_bio_done(chp, xfer); 722 return 1; 723 } 724 725 int 726 wdc_ata_err(chp, ata_bio) 727 struct channel_softc *chp; 728 struct ata_bio *ata_bio; 729 { 730 ata_bio->error = 0; 731 if (chp->ch_status & WDCS_BSY) { 732 ata_bio->error = TIMEOUT; 733 return WDC_ATA_ERR; 734 } 735 736 if (chp->ch_status & WDCS_DWF) { 737 ata_bio->error = ERR_DF; 738 return WDC_ATA_ERR; 739 } 740 741 if (chp->ch_status & WDCS_ERR) { 742 ata_bio->error = ERROR; 743 ata_bio->r_error = chp->ch_error; 744 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 745 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 746 return WDC_ATA_ERR; 747 return WDC_ATA_NOERR; 748 } 749 750 if (chp->ch_status & WDCS_CORR) 751 ata_bio->flags |= ATA_CORR; 752 return WDC_ATA_NOERR; 753 } 754 755 int 756 wdc_ata_addref(drvp) 757 struct ata_drive_datas *drvp; 758 { 759 struct channel_softc *chp = drvp->chnl_softc; 760 761 return (wdc_addref(chp)); 762 } 763 764 void 765 wdc_ata_delref(drvp) 766 struct ata_drive_datas *drvp; 767 { 768 struct channel_softc *chp = drvp->chnl_softc; 769 770 wdc_delref(chp); 771 } 772
Indexes created Tue Sep 30 11:09:46 GMT 2025