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ata_wdc.c revision 1.16
      1 /*	$NetBSD: ata_wdc.c,v 1.16 1999/03/07 14:02:53 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by the University of
     17  *	California, Berkeley and its contributors.
     18  * 4. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  */
     35 
     36 /*-
     37  * Copyright (c) 1998 The NetBSD Foundation, Inc.
     38  * All rights reserved.
     39  *
     40  * This code is derived from software contributed to The NetBSD Foundation
     41  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *        This product includes software developed by the NetBSD
     54  *        Foundation, Inc. and its contributors.
     55  * 4. Neither the name of The NetBSD Foundation nor the names of its
     56  *    contributors may be used to endorse or promote products derived
     57  *    from this software without specific prior written permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     60  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     61  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     62  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     63  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     64  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     65  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     66  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     67  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     68  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     69  * POSSIBILITY OF SUCH DAMAGE.
     70  */
     71 
     72 #ifndef WDCDEBUG
     73 #define WDCDEBUG
     74 #endif /* WDCDEBUG */
     75 
     76 #include <sys/param.h>
     77 #include <sys/systm.h>
     78 #include <sys/kernel.h>
     79 #include <sys/file.h>
     80 #include <sys/stat.h>
     81 #include <sys/buf.h>
     82 #include <sys/malloc.h>
     83 #include <sys/device.h>
     84 #include <sys/disklabel.h>
     85 #include <sys/syslog.h>
     86 #include <sys/proc.h>
     87 
     88 #include <machine/intr.h>
     89 #include <machine/bus.h>
     90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     91 #define    bus_space_write_multi_stream_2    bus_space_write_multi_2
     92 #define    bus_space_write_multi_stream_4    bus_space_write_multi_4
     93 #define    bus_space_read_multi_stream_2    bus_space_read_multi_2
     94 #define    bus_space_read_multi_stream_4    bus_space_read_multi_4
     95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     96 
     97 #include <dev/ata/atareg.h>
     98 #include <dev/ata/atavar.h>
     99 #include <dev/ic/wdcreg.h>
    100 #include <dev/ic/wdcvar.h>
    101 #include <dev/ata/wdvar.h>
    102 
    103 #define DEBUG_INTR   0x01
    104 #define DEBUG_XFERS  0x02
    105 #define DEBUG_STATUS 0x04
    106 #define DEBUG_FUNCS  0x08
    107 #define DEBUG_PROBE  0x10
    108 #ifdef WDCDEBUG
    109 int wdcdebug_wd_mask = 0;
    110 #define WDCDEBUG_PRINT(args, level) \
    111 	if (wdcdebug_wd_mask & (level)) \
    112 		printf args
    113 #else
    114 #define WDCDEBUG_PRINT(args, level)
    115 #endif
    116 
    117 #define ATA_DELAY_NORMAL 1000 /* 1s for a normal drive I/O */
    118 #define ATA_DELAY_RECOVERY 10000 /* 10s for setup or recovery drive I/O */
    119 
    120 void  wdc_ata_bio_start  __P((struct channel_softc *,struct wdc_xfer *));
    121 int   wdc_ata_bio_intr   __P((struct channel_softc *, struct wdc_xfer *));
    122 void  wdc_ata_bio_done   __P((struct channel_softc *, struct wdc_xfer *));
    123 int   wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *));
    124 int   wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *));
    125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
    126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
    127 #define WDC_ATA_ERR   0x02 /* Drive reports an error */
    128 
    129 /*
    130  * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
    131  * WDC_TRY_AGAIN. Must be called at splio().
    132  */
    133 int
    134 wdc_ata_bio(drvp, ata_bio)
    135 	struct ata_drive_datas *drvp;
    136 	struct ata_bio *ata_bio;
    137 {
    138 	struct wdc_xfer *xfer;
    139 	struct channel_softc *chp = drvp->chnl_softc;
    140 
    141 	xfer = wdc_get_xfer(WDC_NOSLEEP);
    142 	if (xfer == NULL)
    143 		return WDC_TRY_AGAIN;
    144 	if (ata_bio->flags & ATA_POLL)
    145 		xfer->c_flags |= C_POLL;
    146 	if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
    147 	    (ata_bio->flags & ATA_SINGLE) == 0)
    148 		xfer->c_flags |= C_DMA;
    149 	xfer->drive = drvp->drive;
    150 	xfer->cmd = ata_bio;
    151 	xfer->databuf = ata_bio->databuf;
    152 	xfer->c_bcount = ata_bio->bcount;
    153 	xfer->c_start = wdc_ata_bio_start;
    154 	xfer->c_intr = wdc_ata_bio_intr;
    155 	wdc_exec_xfer(chp, xfer);
    156 	return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
    157 }
    158 
    159 void
    160 wdc_ata_bio_start(chp, xfer)
    161 	struct channel_softc *chp;
    162 	struct wdc_xfer *xfer;
    163 {
    164 	struct ata_bio *ata_bio = xfer->cmd;
    165 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    166 	u_int16_t cyl;
    167 	u_int8_t head, sect, cmd = 0;
    168 	int nblks;
    169 	int ata_delay;
    170 	int dma_flags = 0;
    171 
    172 	WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
    173 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
    174 	    DEBUG_XFERS);
    175 
    176 	/* Do control operations specially. */
    177 	if (drvp->state < READY) {
    178 		/*
    179 		 * Actually, we want to be careful not to mess with the control
    180 		 * state if the device is currently busy, but we can assume
    181 		 * that we never get to this point if that's the case.
    182 		 */
    183 		/* at this point, we should only be in RECAL state */
    184 		if (drvp->state != RECAL) {
    185 			printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n",
    186 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    187 			    xfer->drive, drvp->state);
    188 			panic("wdc_ata_bio_start: bad state");
    189 		}
    190 		xfer->c_intr = wdc_ata_ctrl_intr;
    191 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    192 		    WDSD_IBM | (xfer->drive << 4));
    193 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY_RECOVERY) != 0)
    194 			goto timeout;
    195 		wdccommandshort(chp, xfer->drive, WDCC_RECAL);
    196 		drvp->state = RECAL_WAIT;
    197 		if ((ata_bio->flags & ATA_POLL) == 0) {
    198 			chp->ch_flags |= WDCF_IRQ_WAIT;
    199 			timeout(wdctimeout, chp,
    200 			    ATA_DELAY_RECOVERY / 1000 * hz);
    201 		} else {
    202 			/* Wait for at last 400ns for status bit to be valid */
    203 			delay(1);
    204 			wdc_ata_ctrl_intr(chp, xfer);
    205 		}
    206 		return;
    207 	}
    208 
    209 	if (xfer->c_flags & C_DMA) {
    210 		dma_flags = (ata_bio->flags & ATA_READ) ?  WDC_DMA_READ : 0;
    211 		dma_flags |= (ata_bio->flags & ATA_POLL) ?  WDC_DMA_POLL : 0;
    212 	}
    213 	if (ata_bio->flags & ATA_SINGLE)
    214 		ata_delay = ATA_DELAY_RECOVERY;
    215 	else
    216 		ata_delay = ATA_DELAY_NORMAL;
    217 again:
    218 	/*
    219 	 *
    220 	 * When starting a multi-sector transfer, or doing single-sector
    221 	 * transfers...
    222 	 */
    223 	if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
    224 		if (ata_bio->flags & ATA_SINGLE)
    225 			nblks = 1;
    226 		else
    227 			nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    228 		/* Check for bad sectors and adjust transfer, if necessary. */
    229 		if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
    230 			long blkdiff;
    231 			int i;
    232 			for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
    233 			    i++) {
    234 				blkdiff -= ata_bio->blkno;
    235 				if (blkdiff < 0)
    236 					continue;
    237 				if (blkdiff == 0) {
    238 					/* Replace current block of transfer. */
    239 					ata_bio->blkno =
    240 					    ata_bio->lp->d_secperunit -
    241 					    ata_bio->lp->d_nsectors - i - 1;
    242 				}
    243 				if (blkdiff < nblks) {
    244 					/* Bad block inside transfer. */
    245 					ata_bio->flags |= ATA_SINGLE;
    246 					nblks = 1;
    247 				}
    248 				break;
    249 			}
    250 		/* Transfer is okay now. */
    251 		}
    252 		if (ata_bio->flags & ATA_LBA) {
    253 			sect = (ata_bio->blkno >> 0) & 0xff;
    254 			cyl = (ata_bio->blkno >> 8) & 0xffff;
    255 			head = (ata_bio->blkno >> 24) & 0x0f;
    256 			head |= WDSD_LBA;
    257 		} else {
    258 			int blkno = ata_bio->blkno;
    259 			sect = blkno % ata_bio->lp->d_nsectors;
    260 			sect++;    /* Sectors begin with 1, not 0. */
    261 			blkno /= ata_bio->lp->d_nsectors;
    262 			head = blkno % ata_bio->lp->d_ntracks;
    263 			blkno /= ata_bio->lp->d_ntracks;
    264 			cyl = blkno;
    265 			head |= WDSD_CHS;
    266 		}
    267 		if (xfer->c_flags & C_DMA) {
    268 			ata_bio->nblks = nblks;
    269 			ata_bio->nbytes = xfer->c_bcount;
    270 			cmd = (ata_bio->flags & ATA_READ) ?
    271 			    WDCC_READDMA : WDCC_WRITEDMA;
    272 			nblks = ata_bio->nblks;
    273 	    		/* Init the DMA channel. */
    274 			if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
    275 			    chp->channel, xfer->drive,
    276 			    (char *)xfer->databuf + xfer->c_skip,
    277 			    ata_bio->nbytes, dma_flags) != 0) {
    278 				ata_bio->error = ERR_DMA;
    279 				ata_bio->r_error = 0;
    280 				wdc_ata_bio_done(chp, xfer);
    281 				return;
    282 			}
    283 			/* Initiate command */
    284 			bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    285 			    WDSD_IBM | (xfer->drive << 4));
    286 			if (wait_for_ready(chp, ata_delay) < 0)
    287 				goto timeout;
    288 			wdccommand(chp, xfer->drive, cmd, cyl,
    289 			    head, sect, nblks, 0);
    290 			/* start the DMA channel */
    291 			(*chp->wdc->dma_start)(chp->wdc->dma_arg,
    292 			    chp->channel, xfer->drive, dma_flags);
    293 			/* wait for irq */
    294 			goto intr;
    295 		} /* else not DMA */
    296 		ata_bio->nblks = min(nblks, ata_bio->multi);
    297 		ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
    298 		if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
    299 			cmd = (ata_bio->flags & ATA_READ) ?
    300 			    WDCC_READMULTI : WDCC_WRITEMULTI;
    301 		} else {
    302 			cmd = (ata_bio->flags & ATA_READ) ?
    303 			    WDCC_READ : WDCC_WRITE;
    304 		}
    305 		/* Initiate command! */
    306 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    307 		    WDSD_IBM | (xfer->drive << 4));
    308 		if (wait_for_ready(chp, ata_delay) < 0)
    309 			goto timeout;
    310 		wdccommand(chp, xfer->drive, cmd, cyl,
    311 		    head, sect, nblks,
    312 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    313 		    ata_bio->lp->d_precompcyl / 4 : 0);
    314 	} else if (ata_bio->nblks > 1) {
    315 		/* The number of blocks in the last stretch may be smaller. */
    316 		nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    317 		if (ata_bio->nblks > nblks) {
    318 		ata_bio->nblks = nblks;
    319 		ata_bio->nbytes = xfer->c_bcount;
    320 		}
    321 	}
    322 	/* If this was a write and not using DMA, push the data. */
    323 	if ((ata_bio->flags & ATA_READ) == 0) {
    324 		if (wait_for_drq(chp, ata_delay) != 0) {
    325 			printf("%s:%d:%d: timeout waiting for DRQ, "
    326 			    "st=0x%02x, err=0x%02x\n",
    327 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    328 			    xfer->drive, chp->ch_status, chp->ch_error);
    329 			if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    330 				ata_bio->error = TIMEOUT;
    331 			wdc_ata_bio_done(chp, xfer);
    332 			return;
    333 		}
    334 		if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
    335 			wdc_ata_bio_done(chp, xfer);
    336 			return;
    337 		}
    338 		if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
    339 			if (drvp->drive_flags & DRIVE_CAP32) {
    340 				bus_space_write_multi_4(chp->data32iot,
    341 				    chp->data32ioh, 0,
    342 				    (u_int32_t *)((char *)xfer->databuf +
    343 				                  xfer->c_skip),
    344 				    ata_bio->nbytes >> 2);
    345 			} else {
    346 				bus_space_write_multi_2(chp->cmd_iot,
    347 				    chp->cmd_ioh, wd_data,
    348 				    (u_int16_t *)((char *)xfer->databuf +
    349 				                  xfer->c_skip),
    350 				    ata_bio->nbytes >> 1);
    351 			}
    352 		} else {
    353 			if (drvp->drive_flags & DRIVE_CAP32) {
    354 				bus_space_write_multi_stream_4(chp->data32iot,
    355 				    chp->data32ioh, 0,
    356 				    (u_int32_t *)((char *)xfer->databuf +
    357 				                  xfer->c_skip),
    358 				    ata_bio->nbytes >> 2);
    359 			} else {
    360 				bus_space_write_multi_stream_2(chp->cmd_iot,
    361 				    chp->cmd_ioh, wd_data,
    362 				    (u_int16_t *)((char *)xfer->databuf +
    363 				                  xfer->c_skip),
    364 				    ata_bio->nbytes >> 1);
    365 			}
    366 		}
    367 	}
    368 
    369 intr:	/* Wait for IRQ (either real or polled) */
    370 	if ((ata_bio->flags & ATA_POLL) == 0) {
    371 		chp->ch_flags |= WDCF_IRQ_WAIT;
    372 		timeout(wdctimeout, chp, ata_delay / 1000 * hz);
    373 	} else {
    374 		/* Wait for at last 400ns for status bit to be valid */
    375 		delay(1);
    376 		wdc_ata_bio_intr(chp, xfer);
    377 		if ((ata_bio->flags & ATA_ITSDONE) == 0)
    378 			goto again;
    379 	}
    380 	return;
    381 timeout:
    382 	printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
    383 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    384 	    chp->ch_status, chp->ch_error);
    385 	if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    386 		ata_bio->error = TIMEOUT;
    387 	wdc_ata_bio_done(chp, xfer);
    388 	return;
    389 }
    390 
    391 int
    392 wdc_ata_bio_intr(chp, xfer)
    393 	struct channel_softc *chp;
    394 	struct wdc_xfer *xfer;
    395 {
    396 	struct ata_bio *ata_bio = xfer->cmd;
    397 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    398 	int drv_err;
    399 	int dma_flags = 0;
    400 
    401 	WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
    402 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
    403 	    DEBUG_INTR | DEBUG_XFERS);
    404 
    405 
    406 	/* Is it not a transfer, but a control operation? */
    407 	if (drvp->state < READY) {
    408 		printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
    409 		    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    410 		    drvp->state);
    411 		panic("wdc_ata_bio_intr: bad state\n");
    412 	}
    413 
    414 	if (xfer->c_flags & C_DMA) {
    415 		dma_flags = (ata_bio->flags & ATA_READ) ?  WDC_DMA_READ : 0;
    416 		dma_flags |= (ata_bio->flags & ATA_POLL) ?  WDC_DMA_POLL : 0;
    417 	}
    418 
    419 	/* Ack interrupt done by wait_for_unbusy */
    420 	if (wait_for_unbusy(chp, ATA_DELAY_NORMAL) < 0) {
    421 		printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
    422 		    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    423 		    xfer->c_bcount, xfer->c_skip);
    424 		/* if we were using DMA, turn off DMA channel */
    425 		if (xfer->c_flags & C_DMA) {
    426 			(*chp->wdc->dma_finish)(chp->wdc->dma_arg,
    427 			    chp->channel, xfer->drive, dma_flags);
    428 			drvp->n_dmaerrs++;
    429 		}
    430 		ata_bio->error = TIMEOUT;
    431 		wdc_ata_bio_done(chp, xfer);
    432 		return 1;
    433 	}
    434 
    435 	drv_err = wdc_ata_err(drvp, ata_bio);
    436 
    437 	/* If we were using DMA, Turn off the DMA channel and check for error */
    438 	if (xfer->c_flags & C_DMA) {
    439 		if (ata_bio->flags & ATA_POLL) {
    440 			/*
    441 			 * IDE drives deassert WDCS_BSY before transfer is
    442 			 * complete when using DMA. Polling for DRQ to deassert
    443 			 * is not enouth DRQ is not required to be
    444 			 * asserted for DMA transfers, so poll for DRDY.
    445 			 */
    446 			if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
    447 			    ATA_DELAY_NORMAL) < 0) {
    448 				printf("%s:%d:%d: polled transfer timed out "
    449 				    "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
    450 				    chp->channel, xfer->drive, chp->ch_status);
    451 				ata_bio->error = TIMEOUT;
    452 				drv_err = WDC_ATA_ERR;
    453 			}
    454 		}
    455 		if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg,
    456 		    chp->channel, xfer->drive, dma_flags) != 0) {
    457 			if (drv_err != WDC_ATA_ERR) {
    458 				ata_bio->error = ERR_DMA;
    459 				drv_err = WDC_ATA_ERR;
    460 			}
    461 		}
    462 		if (chp->ch_status & WDCS_DRQ) {
    463 			if (drv_err != WDC_ATA_ERR) {
    464 				printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
    465 				    chp->wdc->sc_dev.dv_xname, chp->channel,
    466 				    xfer->drive, chp->ch_status);
    467 				ata_bio->error = TIMEOUT;
    468 				drv_err = WDC_ATA_ERR;
    469 			}
    470 		}
    471 		if (drv_err != WDC_ATA_ERR)
    472 			goto end;
    473 		drvp->n_dmaerrs++;
    474 	}
    475 
    476 	/* if we had an error, end */
    477 	if (drv_err == WDC_ATA_ERR) {
    478 		wdc_ata_bio_done(chp, xfer);
    479 		return 1;
    480 	}
    481 
    482 	/* If this was a read and not using DMA, fetch the data. */
    483 	if ((ata_bio->flags & ATA_READ) != 0) {
    484 		if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
    485 			printf("%s:%d:%d: read intr before drq\n",
    486 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    487 			    xfer->drive);
    488 			ata_bio->error = TIMEOUT;
    489 			wdc_ata_bio_done(chp, xfer);
    490 			return 1;
    491 		}
    492 		if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
    493 			if (drvp->drive_flags & DRIVE_CAP32) {
    494 				bus_space_read_multi_4(chp->data32iot,
    495 				    chp->data32ioh, 0,
    496 				    (u_int32_t *)((char *)xfer->databuf +
    497 				                  xfer->c_skip),
    498 				    ata_bio->nbytes >> 2);
    499 			} else {
    500 				bus_space_read_multi_2(chp->cmd_iot,
    501 				    chp->cmd_ioh, wd_data,
    502 				    (u_int16_t *)((char *)xfer->databuf +
    503 				                  xfer->c_skip),
    504 				    ata_bio->nbytes >> 1);
    505 			}
    506 		} else {
    507 			if (drvp->drive_flags & DRIVE_CAP32) {
    508 				bus_space_read_multi_stream_4(chp->data32iot,
    509 				    chp->data32ioh, 0,
    510 				    (u_int32_t *)((char *)xfer->databuf +
    511 				                  xfer->c_skip),
    512 				    ata_bio->nbytes >> 2);
    513 			} else {
    514 				bus_space_read_multi_stream_2(chp->cmd_iot,
    515 				    chp->cmd_ioh, wd_data,
    516 				    (u_int16_t *)((char *)xfer->databuf +
    517 				                  xfer->c_skip),
    518 				    ata_bio->nbytes >> 1);
    519 			}
    520 		}
    521 	}
    522 
    523 end:
    524 	ata_bio->blkno += ata_bio->nblks;
    525 	ata_bio->blkdone += ata_bio->nblks;
    526 	xfer->c_skip += ata_bio->nbytes;
    527 	xfer->c_bcount -= ata_bio->nbytes;
    528 	/* See if this transfer is complete. */
    529 	if (xfer->c_bcount > 0) {
    530 		if ((ata_bio->flags & ATA_POLL) == 0) {
    531 			/* Start the next operation */
    532 			wdc_ata_bio_start(chp, xfer);
    533 		} else {
    534 			/* Let wdc_ata_bio_start do the loop */
    535 			return 1;
    536 		}
    537 	} else { /* Done with this transfer */
    538 		ata_bio->error = NOERROR;
    539 		wdc_ata_bio_done(chp, xfer);
    540 	}
    541 	return 1;
    542 }
    543 
    544 void
    545 wdc_ata_bio_done(chp, xfer)
    546 	struct channel_softc *chp;
    547 	struct wdc_xfer *xfer;
    548 {
    549 	struct ata_bio *ata_bio = xfer->cmd;
    550 	int need_done = xfer->c_flags & C_NEEDDONE;
    551 	int drive = xfer->drive;
    552 	struct ata_drive_datas *drvp = &chp->ch_drive[drive];
    553 
    554 	WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
    555 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    556 	    (u_int)xfer->c_flags),
    557 	    DEBUG_XFERS);
    558 
    559 	if (ata_bio->error == NOERROR)
    560 		drvp->n_dmaerrs = 0;
    561 	else if (drvp->n_dmaerrs >= NERRS_MAX) {
    562 		wdc_downgrade_mode(drvp);
    563 	}
    564 
    565 	/* feed back residual bcount to our caller */
    566 	ata_bio->bcount = xfer->c_bcount;
    567 
    568 	/* remove this command from xfer queue */
    569 	wdc_free_xfer(chp, xfer);
    570 
    571 	ata_bio->flags |= ATA_ITSDONE;
    572 	if (need_done) {
    573 		WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
    574 		wddone(chp->ch_drive[drive].drv_softc);
    575 	}
    576 	WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
    577 	    chp->ch_flags), DEBUG_XFERS);
    578 	wdcstart(chp);
    579 }
    580 
    581 /*
    582  * Implement operations needed before read/write.
    583  */
    584 int
    585 wdc_ata_ctrl_intr(chp, xfer)
    586 	struct channel_softc *chp;
    587 	struct wdc_xfer *xfer;
    588 {
    589 	struct ata_bio *ata_bio = xfer->cmd;
    590 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    591 	char *errstring = NULL;
    592 	WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
    593 	DEBUG_FUNCS);
    594 
    595 again:
    596 	switch (drvp->state) {
    597 	case RECAL:    /* Should not be in this state here */
    598 		panic("wdc_ata_ctrl_intr: state==RECAL");
    599 		break;
    600 
    601 	case RECAL_WAIT:
    602 		errstring = "recal";
    603 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY_RECOVERY))
    604 			goto timeout;
    605 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    606 			goto error;
    607 	/* fall through */
    608 
    609 	case PIOMODE:
    610 		/* Don't try to set modes if controller can't be adjusted */
    611 		if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
    612 			goto geometry;
    613 		/* Also don't try if the drive didn't report its mode */
    614 		if ((drvp->drive_flags & DRIVE_MODE) == 0)
    615 			goto geometry;
    616 		wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    617 		    0x08 | drvp->PIO_mode, WDSF_SET_MODE);
    618 		drvp->state = PIOMODE_WAIT;
    619 		break;
    620 
    621 	case PIOMODE_WAIT:
    622 		errstring = "piomode";
    623 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY_RECOVERY))
    624 			goto timeout;
    625 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    626 			goto error;
    627 	/* fall through */
    628 
    629 	case DMAMODE:
    630 		if (drvp->drive_flags & DRIVE_UDMA) {
    631 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    632 			    0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
    633 		} else if (drvp->drive_flags & DRIVE_DMA) {
    634 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    635 			    0x20 | drvp->DMA_mode, WDSF_SET_MODE);
    636 		} else {
    637 			goto geometry;
    638 		}
    639 		drvp->state = DMAMODE_WAIT;
    640 		break;
    641 	case DMAMODE_WAIT:
    642 		errstring = "dmamode";
    643 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY_RECOVERY))
    644 			goto timeout;
    645 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    646 			goto error;
    647 	/* fall through */
    648 
    649 	case GEOMETRY:
    650 	geometry:
    651 		if (ata_bio->flags & ATA_LBA)
    652 			goto multimode;
    653 		wdccommand(chp, xfer->drive, WDCC_IDP,
    654 		    ata_bio->lp->d_ncylinders,
    655 		    ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
    656 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    657 			ata_bio->lp->d_precompcyl / 4 : 0);
    658 		drvp->state = GEOMETRY_WAIT;
    659 		break;
    660 
    661 	case GEOMETRY_WAIT:
    662 		errstring = "geometry";
    663 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY_RECOVERY))
    664 			goto timeout;
    665 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    666 			goto error;
    667 		/* fall through */
    668 
    669 	case MULTIMODE:
    670 	multimode:
    671 		if (ata_bio->multi == 1)
    672 			goto ready;
    673 		wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
    674 		    ata_bio->multi, 0);
    675 		drvp->state = MULTIMODE_WAIT;
    676 		break;
    677 
    678 	case MULTIMODE_WAIT:
    679 		errstring = "setmulti";
    680 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY_RECOVERY))
    681 			goto timeout;
    682 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    683 			goto error;
    684 		/* fall through */
    685 
    686 	case READY:
    687 	ready:
    688 		drvp->state = READY;
    689 		/*
    690 		 * The drive is usable now
    691 		 */
    692 		xfer->c_intr = wdc_ata_bio_intr;
    693 		wdc_ata_bio_start(chp, xfer);
    694 		return 1;
    695 	}
    696 
    697 	if ((ata_bio->flags & ATA_POLL) == 0) {
    698 		chp->ch_flags |= WDCF_IRQ_WAIT;
    699 		timeout(wdctimeout, chp, ATA_DELAY_RECOVERY / 1000 * hz);
    700 	} else {
    701 		goto again;
    702 	}
    703 	return 1;
    704 
    705 timeout:
    706 	if ((xfer->c_flags & C_TIMEOU) == 0 ) {
    707 		return 0; /* IRQ was not for us */
    708 	}
    709 	printf("%s:%d:%d: %s timed out\n",
    710 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
    711 	ata_bio->error = TIMEOUT;
    712 	drvp->state = 0;
    713 	wdc_ata_bio_done(chp, xfer);
    714 	return 0;
    715 error:
    716 	printf("%s:%d:%d: %s ",
    717 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    718 	    errstring);
    719 	if (chp->ch_status & WDCS_DWF) {
    720 		printf("drive fault\n");
    721 		ata_bio->error = ERR_DF;
    722 	} else {
    723 		printf("error (%x)\n", chp->ch_error);
    724 		ata_bio->r_error = chp->ch_error;
    725 		ata_bio->error = ERROR;
    726 	}
    727 	drvp->state = 0;
    728 	wdc_ata_bio_done(chp, xfer);
    729 	return 1;
    730 }
    731 
    732 int
    733 wdc_ata_err(drvp, ata_bio)
    734 	struct ata_drive_datas *drvp;
    735 	struct ata_bio *ata_bio;
    736 {
    737 	struct channel_softc *chp = drvp->chnl_softc;
    738 	ata_bio->error = 0;
    739 	if (chp->ch_status & WDCS_BSY) {
    740 		ata_bio->error = TIMEOUT;
    741 		return WDC_ATA_ERR;
    742 	}
    743 
    744 	if (chp->ch_status & WDCS_DWF) {
    745 		ata_bio->error = ERR_DF;
    746 		return WDC_ATA_ERR;
    747 	}
    748 
    749 	if (chp->ch_status & WDCS_ERR) {
    750 		ata_bio->error = ERROR;
    751 		ata_bio->r_error = chp->ch_error;
    752 		if (drvp->drive_flags & DRIVE_UDMA &&
    753 		    (ata_bio->r_error & WDCE_CRC)) {
    754 			/*
    755 			 * Record the CRC error, to avoid downgrading to
    756 			 * multiword DMA
    757 			 */
    758 			drvp->drive_flags |= DRIVE_DMAERR;
    759 		}
    760 		if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
    761 		    WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
    762 			return WDC_ATA_ERR;
    763 		return WDC_ATA_NOERR;
    764 	}
    765 
    766 	if (chp->ch_status & WDCS_CORR)
    767 		ata_bio->flags |= ATA_CORR;
    768 	return WDC_ATA_NOERR;
    769 }
    770 
    771 int
    772 wdc_ata_addref(drvp)
    773 	struct ata_drive_datas *drvp;
    774 {
    775 	struct channel_softc *chp = drvp->chnl_softc;
    776 
    777 	return (wdc_addref(chp));
    778 }
    779 
    780 void
    781 wdc_ata_delref(drvp)
    782 	struct ata_drive_datas *drvp;
    783 {
    784 	struct channel_softc *chp = drvp->chnl_softc;
    785 
    786 	wdc_delref(chp);
    787 }
    788