ata_wdc.c revision 1.17
1 /* $NetBSD: ata_wdc.c,v 1.17 1999/03/17 10:13:56 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *)); 121 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 122 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *)); 123 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 124 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 125 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 126 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 127 128 /* 129 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 130 * WDC_TRY_AGAIN. Must be called at splio(). 131 */ 132 int 133 wdc_ata_bio(drvp, ata_bio) 134 struct ata_drive_datas *drvp; 135 struct ata_bio *ata_bio; 136 { 137 struct wdc_xfer *xfer; 138 struct channel_softc *chp = drvp->chnl_softc; 139 140 xfer = wdc_get_xfer(WDC_NOSLEEP); 141 if (xfer == NULL) 142 return WDC_TRY_AGAIN; 143 if (ata_bio->flags & ATA_POLL) 144 xfer->c_flags |= C_POLL; 145 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 146 (ata_bio->flags & ATA_SINGLE) == 0) 147 xfer->c_flags |= C_DMA; 148 xfer->drive = drvp->drive; 149 xfer->cmd = ata_bio; 150 xfer->databuf = ata_bio->databuf; 151 xfer->c_bcount = ata_bio->bcount; 152 xfer->c_start = wdc_ata_bio_start; 153 xfer->c_intr = wdc_ata_bio_intr; 154 wdc_exec_xfer(chp, xfer); 155 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 156 } 157 158 void 159 wdc_ata_bio_start(chp, xfer) 160 struct channel_softc *chp; 161 struct wdc_xfer *xfer; 162 { 163 struct ata_bio *ata_bio = xfer->cmd; 164 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 165 u_int16_t cyl; 166 u_int8_t head, sect, cmd = 0; 167 int nblks; 168 int ata_delay; 169 int dma_flags = 0; 170 171 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 172 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 173 DEBUG_XFERS); 174 175 /* Do control operations specially. */ 176 if (drvp->state < READY) { 177 /* 178 * Actually, we want to be careful not to mess with the control 179 * state if the device is currently busy, but we can assume 180 * that we never get to this point if that's the case. 181 */ 182 /* at this point, we should only be in RECAL state */ 183 if (drvp->state != RECAL) { 184 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n", 185 chp->wdc->sc_dev.dv_xname, chp->channel, 186 xfer->drive, drvp->state); 187 panic("wdc_ata_bio_start: bad state"); 188 } 189 xfer->c_intr = wdc_ata_ctrl_intr; 190 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 191 WDSD_IBM | (xfer->drive << 4)); 192 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 193 goto timeout; 194 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 195 drvp->state = RECAL_WAIT; 196 if ((ata_bio->flags & ATA_POLL) == 0) { 197 chp->ch_flags |= WDCF_IRQ_WAIT; 198 timeout(wdctimeout, chp, 199 ATA_DELAY / 1000 * hz); 200 } else { 201 /* Wait for at last 400ns for status bit to be valid */ 202 delay(1); 203 wdc_ata_ctrl_intr(chp, xfer); 204 } 205 return; 206 } 207 208 if (xfer->c_flags & C_DMA) { 209 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 210 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 211 } 212 if (ata_bio->flags & ATA_SINGLE) 213 ata_delay = ATA_DELAY; 214 else 215 ata_delay = ATA_DELAY; 216 again: 217 /* 218 * 219 * When starting a multi-sector transfer, or doing single-sector 220 * transfers... 221 */ 222 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 223 if (ata_bio->flags & ATA_SINGLE) 224 nblks = 1; 225 else 226 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 227 /* Check for bad sectors and adjust transfer, if necessary. */ 228 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 229 long blkdiff; 230 int i; 231 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 232 i++) { 233 blkdiff -= ata_bio->blkno; 234 if (blkdiff < 0) 235 continue; 236 if (blkdiff == 0) { 237 /* Replace current block of transfer. */ 238 ata_bio->blkno = 239 ata_bio->lp->d_secperunit - 240 ata_bio->lp->d_nsectors - i - 1; 241 } 242 if (blkdiff < nblks) { 243 /* Bad block inside transfer. */ 244 ata_bio->flags |= ATA_SINGLE; 245 nblks = 1; 246 } 247 break; 248 } 249 /* Transfer is okay now. */ 250 } 251 if (ata_bio->flags & ATA_LBA) { 252 sect = (ata_bio->blkno >> 0) & 0xff; 253 cyl = (ata_bio->blkno >> 8) & 0xffff; 254 head = (ata_bio->blkno >> 24) & 0x0f; 255 head |= WDSD_LBA; 256 } else { 257 int blkno = ata_bio->blkno; 258 sect = blkno % ata_bio->lp->d_nsectors; 259 sect++; /* Sectors begin with 1, not 0. */ 260 blkno /= ata_bio->lp->d_nsectors; 261 head = blkno % ata_bio->lp->d_ntracks; 262 blkno /= ata_bio->lp->d_ntracks; 263 cyl = blkno; 264 head |= WDSD_CHS; 265 } 266 if (xfer->c_flags & C_DMA) { 267 ata_bio->nblks = nblks; 268 ata_bio->nbytes = xfer->c_bcount; 269 cmd = (ata_bio->flags & ATA_READ) ? 270 WDCC_READDMA : WDCC_WRITEDMA; 271 nblks = ata_bio->nblks; 272 /* Init the DMA channel. */ 273 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 274 chp->channel, xfer->drive, 275 (char *)xfer->databuf + xfer->c_skip, 276 ata_bio->nbytes, dma_flags) != 0) { 277 ata_bio->error = ERR_DMA; 278 ata_bio->r_error = 0; 279 wdc_ata_bio_done(chp, xfer); 280 return; 281 } 282 /* Initiate command */ 283 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 284 WDSD_IBM | (xfer->drive << 4)); 285 if (wait_for_ready(chp, ata_delay) < 0) 286 goto timeout; 287 wdccommand(chp, xfer->drive, cmd, cyl, 288 head, sect, nblks, 0); 289 /* start the DMA channel */ 290 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 291 chp->channel, xfer->drive, dma_flags); 292 /* wait for irq */ 293 goto intr; 294 } /* else not DMA */ 295 ata_bio->nblks = min(nblks, ata_bio->multi); 296 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 297 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 298 cmd = (ata_bio->flags & ATA_READ) ? 299 WDCC_READMULTI : WDCC_WRITEMULTI; 300 } else { 301 cmd = (ata_bio->flags & ATA_READ) ? 302 WDCC_READ : WDCC_WRITE; 303 } 304 /* Initiate command! */ 305 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 306 WDSD_IBM | (xfer->drive << 4)); 307 if (wait_for_ready(chp, ata_delay) < 0) 308 goto timeout; 309 wdccommand(chp, xfer->drive, cmd, cyl, 310 head, sect, nblks, 311 (ata_bio->lp->d_type == DTYPE_ST506) ? 312 ata_bio->lp->d_precompcyl / 4 : 0); 313 } else if (ata_bio->nblks > 1) { 314 /* The number of blocks in the last stretch may be smaller. */ 315 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 316 if (ata_bio->nblks > nblks) { 317 ata_bio->nblks = nblks; 318 ata_bio->nbytes = xfer->c_bcount; 319 } 320 } 321 /* If this was a write and not using DMA, push the data. */ 322 if ((ata_bio->flags & ATA_READ) == 0) { 323 if (wait_for_drq(chp, ata_delay) != 0) { 324 printf("%s:%d:%d: timeout waiting for DRQ, " 325 "st=0x%02x, err=0x%02x\n", 326 chp->wdc->sc_dev.dv_xname, chp->channel, 327 xfer->drive, chp->ch_status, chp->ch_error); 328 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 329 ata_bio->error = TIMEOUT; 330 wdc_ata_bio_done(chp, xfer); 331 return; 332 } 333 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 334 wdc_ata_bio_done(chp, xfer); 335 return; 336 } 337 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 338 if (drvp->drive_flags & DRIVE_CAP32) { 339 bus_space_write_multi_4(chp->data32iot, 340 chp->data32ioh, 0, 341 (u_int32_t *)((char *)xfer->databuf + 342 xfer->c_skip), 343 ata_bio->nbytes >> 2); 344 } else { 345 bus_space_write_multi_2(chp->cmd_iot, 346 chp->cmd_ioh, wd_data, 347 (u_int16_t *)((char *)xfer->databuf + 348 xfer->c_skip), 349 ata_bio->nbytes >> 1); 350 } 351 } else { 352 if (drvp->drive_flags & DRIVE_CAP32) { 353 bus_space_write_multi_stream_4(chp->data32iot, 354 chp->data32ioh, 0, 355 (u_int32_t *)((char *)xfer->databuf + 356 xfer->c_skip), 357 ata_bio->nbytes >> 2); 358 } else { 359 bus_space_write_multi_stream_2(chp->cmd_iot, 360 chp->cmd_ioh, wd_data, 361 (u_int16_t *)((char *)xfer->databuf + 362 xfer->c_skip), 363 ata_bio->nbytes >> 1); 364 } 365 } 366 } 367 368 intr: /* Wait for IRQ (either real or polled) */ 369 if ((ata_bio->flags & ATA_POLL) == 0) { 370 chp->ch_flags |= WDCF_IRQ_WAIT; 371 timeout(wdctimeout, chp, ata_delay / 1000 * hz); 372 } else { 373 /* Wait for at last 400ns for status bit to be valid */ 374 delay(1); 375 wdc_ata_bio_intr(chp, xfer); 376 if ((ata_bio->flags & ATA_ITSDONE) == 0) 377 goto again; 378 } 379 return; 380 timeout: 381 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 382 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 383 chp->ch_status, chp->ch_error); 384 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 385 ata_bio->error = TIMEOUT; 386 wdc_ata_bio_done(chp, xfer); 387 return; 388 } 389 390 int 391 wdc_ata_bio_intr(chp, xfer) 392 struct channel_softc *chp; 393 struct wdc_xfer *xfer; 394 { 395 struct ata_bio *ata_bio = xfer->cmd; 396 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 397 int drv_err; 398 int dma_flags = 0; 399 400 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 401 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 402 DEBUG_INTR | DEBUG_XFERS); 403 404 405 /* Is it not a transfer, but a control operation? */ 406 if (drvp->state < READY) { 407 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 408 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 409 drvp->state); 410 panic("wdc_ata_bio_intr: bad state\n"); 411 } 412 413 if (xfer->c_flags & C_DMA) { 414 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 415 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 416 } 417 418 /* Ack interrupt done by wait_for_unbusy */ 419 if (wait_for_unbusy(chp, ATA_DELAY) < 0) { 420 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 421 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 422 xfer->c_bcount, xfer->c_skip); 423 /* if we were using DMA, turn off DMA channel */ 424 if (xfer->c_flags & C_DMA) { 425 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 426 chp->channel, xfer->drive, dma_flags); 427 drvp->n_dmaerrs++; 428 } 429 ata_bio->error = TIMEOUT; 430 wdc_ata_bio_done(chp, xfer); 431 return 1; 432 } 433 434 drv_err = wdc_ata_err(drvp, ata_bio); 435 436 /* If we were using DMA, Turn off the DMA channel and check for error */ 437 if (xfer->c_flags & C_DMA) { 438 if (ata_bio->flags & ATA_POLL) { 439 /* 440 * IDE drives deassert WDCS_BSY before transfer is 441 * complete when using DMA. Polling for DRQ to deassert 442 * is not enouth DRQ is not required to be 443 * asserted for DMA transfers, so poll for DRDY. 444 */ 445 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 446 ATA_DELAY) < 0) { 447 printf("%s:%d:%d: polled transfer timed out " 448 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 449 chp->channel, xfer->drive, chp->ch_status); 450 ata_bio->error = TIMEOUT; 451 drv_err = WDC_ATA_ERR; 452 } 453 } 454 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg, 455 chp->channel, xfer->drive, dma_flags) != 0) { 456 if (drv_err != WDC_ATA_ERR) { 457 ata_bio->error = ERR_DMA; 458 drv_err = WDC_ATA_ERR; 459 } 460 } 461 if (chp->ch_status & WDCS_DRQ) { 462 if (drv_err != WDC_ATA_ERR) { 463 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 464 chp->wdc->sc_dev.dv_xname, chp->channel, 465 xfer->drive, chp->ch_status); 466 ata_bio->error = TIMEOUT; 467 drv_err = WDC_ATA_ERR; 468 } 469 } 470 if (drv_err != WDC_ATA_ERR) 471 goto end; 472 drvp->n_dmaerrs++; 473 } 474 475 /* if we had an error, end */ 476 if (drv_err == WDC_ATA_ERR) { 477 wdc_ata_bio_done(chp, xfer); 478 return 1; 479 } 480 481 /* If this was a read and not using DMA, fetch the data. */ 482 if ((ata_bio->flags & ATA_READ) != 0) { 483 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 484 printf("%s:%d:%d: read intr before drq\n", 485 chp->wdc->sc_dev.dv_xname, chp->channel, 486 xfer->drive); 487 ata_bio->error = TIMEOUT; 488 wdc_ata_bio_done(chp, xfer); 489 return 1; 490 } 491 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 492 if (drvp->drive_flags & DRIVE_CAP32) { 493 bus_space_read_multi_4(chp->data32iot, 494 chp->data32ioh, 0, 495 (u_int32_t *)((char *)xfer->databuf + 496 xfer->c_skip), 497 ata_bio->nbytes >> 2); 498 } else { 499 bus_space_read_multi_2(chp->cmd_iot, 500 chp->cmd_ioh, wd_data, 501 (u_int16_t *)((char *)xfer->databuf + 502 xfer->c_skip), 503 ata_bio->nbytes >> 1); 504 } 505 } else { 506 if (drvp->drive_flags & DRIVE_CAP32) { 507 bus_space_read_multi_stream_4(chp->data32iot, 508 chp->data32ioh, 0, 509 (u_int32_t *)((char *)xfer->databuf + 510 xfer->c_skip), 511 ata_bio->nbytes >> 2); 512 } else { 513 bus_space_read_multi_stream_2(chp->cmd_iot, 514 chp->cmd_ioh, wd_data, 515 (u_int16_t *)((char *)xfer->databuf + 516 xfer->c_skip), 517 ata_bio->nbytes >> 1); 518 } 519 } 520 } 521 522 end: 523 ata_bio->blkno += ata_bio->nblks; 524 ata_bio->blkdone += ata_bio->nblks; 525 xfer->c_skip += ata_bio->nbytes; 526 xfer->c_bcount -= ata_bio->nbytes; 527 /* See if this transfer is complete. */ 528 if (xfer->c_bcount > 0) { 529 if ((ata_bio->flags & ATA_POLL) == 0) { 530 /* Start the next operation */ 531 wdc_ata_bio_start(chp, xfer); 532 } else { 533 /* Let wdc_ata_bio_start do the loop */ 534 return 1; 535 } 536 } else { /* Done with this transfer */ 537 ata_bio->error = NOERROR; 538 wdc_ata_bio_done(chp, xfer); 539 } 540 return 1; 541 } 542 543 void 544 wdc_ata_bio_done(chp, xfer) 545 struct channel_softc *chp; 546 struct wdc_xfer *xfer; 547 { 548 struct ata_bio *ata_bio = xfer->cmd; 549 int need_done = xfer->c_flags & C_NEEDDONE; 550 int drive = xfer->drive; 551 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 552 553 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 554 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 555 (u_int)xfer->c_flags), 556 DEBUG_XFERS); 557 558 if (ata_bio->error == NOERROR) 559 drvp->n_dmaerrs = 0; 560 else if (drvp->n_dmaerrs >= NERRS_MAX) { 561 wdc_downgrade_mode(drvp); 562 } 563 564 /* feed back residual bcount to our caller */ 565 ata_bio->bcount = xfer->c_bcount; 566 567 /* remove this command from xfer queue */ 568 wdc_free_xfer(chp, xfer); 569 570 ata_bio->flags |= ATA_ITSDONE; 571 if (need_done) { 572 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 573 wddone(chp->ch_drive[drive].drv_softc); 574 } 575 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 576 chp->ch_flags), DEBUG_XFERS); 577 wdcstart(chp); 578 } 579 580 /* 581 * Implement operations needed before read/write. 582 */ 583 int 584 wdc_ata_ctrl_intr(chp, xfer) 585 struct channel_softc *chp; 586 struct wdc_xfer *xfer; 587 { 588 struct ata_bio *ata_bio = xfer->cmd; 589 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 590 char *errstring = NULL; 591 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 592 DEBUG_FUNCS); 593 594 again: 595 switch (drvp->state) { 596 case RECAL: /* Should not be in this state here */ 597 panic("wdc_ata_ctrl_intr: state==RECAL"); 598 break; 599 600 case RECAL_WAIT: 601 errstring = "recal"; 602 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 603 goto timeout; 604 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 605 goto error; 606 /* fall through */ 607 608 case PIOMODE: 609 /* Don't try to set modes if controller can't be adjusted */ 610 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 611 goto geometry; 612 /* Also don't try if the drive didn't report its mode */ 613 if ((drvp->drive_flags & DRIVE_MODE) == 0) 614 goto geometry; 615 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 616 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 617 drvp->state = PIOMODE_WAIT; 618 break; 619 620 case PIOMODE_WAIT: 621 errstring = "piomode"; 622 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 623 goto timeout; 624 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 625 goto error; 626 /* fall through */ 627 628 case DMAMODE: 629 if (drvp->drive_flags & DRIVE_UDMA) { 630 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 631 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 632 } else if (drvp->drive_flags & DRIVE_DMA) { 633 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 634 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 635 } else { 636 goto geometry; 637 } 638 drvp->state = DMAMODE_WAIT; 639 break; 640 case DMAMODE_WAIT: 641 errstring = "dmamode"; 642 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 643 goto timeout; 644 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 645 goto error; 646 /* fall through */ 647 648 case GEOMETRY: 649 geometry: 650 if (ata_bio->flags & ATA_LBA) 651 goto multimode; 652 wdccommand(chp, xfer->drive, WDCC_IDP, 653 ata_bio->lp->d_ncylinders, 654 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 655 (ata_bio->lp->d_type == DTYPE_ST506) ? 656 ata_bio->lp->d_precompcyl / 4 : 0); 657 drvp->state = GEOMETRY_WAIT; 658 break; 659 660 case GEOMETRY_WAIT: 661 errstring = "geometry"; 662 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 663 goto timeout; 664 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 665 goto error; 666 /* fall through */ 667 668 case MULTIMODE: 669 multimode: 670 if (ata_bio->multi == 1) 671 goto ready; 672 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 673 ata_bio->multi, 0); 674 drvp->state = MULTIMODE_WAIT; 675 break; 676 677 case MULTIMODE_WAIT: 678 errstring = "setmulti"; 679 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY)) 680 goto timeout; 681 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 682 goto error; 683 /* fall through */ 684 685 case READY: 686 ready: 687 drvp->state = READY; 688 /* 689 * The drive is usable now 690 */ 691 xfer->c_intr = wdc_ata_bio_intr; 692 wdc_ata_bio_start(chp, xfer); 693 return 1; 694 } 695 696 if ((ata_bio->flags & ATA_POLL) == 0) { 697 chp->ch_flags |= WDCF_IRQ_WAIT; 698 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 699 } else { 700 goto again; 701 } 702 return 1; 703 704 timeout: 705 if ((xfer->c_flags & C_TIMEOU) == 0 ) { 706 return 0; /* IRQ was not for us */ 707 } 708 printf("%s:%d:%d: %s timed out\n", 709 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 710 ata_bio->error = TIMEOUT; 711 drvp->state = 0; 712 wdc_ata_bio_done(chp, xfer); 713 return 0; 714 error: 715 printf("%s:%d:%d: %s ", 716 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 717 errstring); 718 if (chp->ch_status & WDCS_DWF) { 719 printf("drive fault\n"); 720 ata_bio->error = ERR_DF; 721 } else { 722 printf("error (%x)\n", chp->ch_error); 723 ata_bio->r_error = chp->ch_error; 724 ata_bio->error = ERROR; 725 } 726 drvp->state = 0; 727 wdc_ata_bio_done(chp, xfer); 728 return 1; 729 } 730 731 int 732 wdc_ata_err(drvp, ata_bio) 733 struct ata_drive_datas *drvp; 734 struct ata_bio *ata_bio; 735 { 736 struct channel_softc *chp = drvp->chnl_softc; 737 ata_bio->error = 0; 738 if (chp->ch_status & WDCS_BSY) { 739 ata_bio->error = TIMEOUT; 740 return WDC_ATA_ERR; 741 } 742 743 if (chp->ch_status & WDCS_DWF) { 744 ata_bio->error = ERR_DF; 745 return WDC_ATA_ERR; 746 } 747 748 if (chp->ch_status & WDCS_ERR) { 749 ata_bio->error = ERROR; 750 ata_bio->r_error = chp->ch_error; 751 if (drvp->drive_flags & DRIVE_UDMA && 752 (ata_bio->r_error & WDCE_CRC)) { 753 /* 754 * Record the CRC error, to avoid downgrading to 755 * multiword DMA 756 */ 757 drvp->drive_flags |= DRIVE_DMAERR; 758 } 759 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 760 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 761 return WDC_ATA_ERR; 762 return WDC_ATA_NOERR; 763 } 764 765 if (chp->ch_status & WDCS_CORR) 766 ata_bio->flags |= ATA_CORR; 767 return WDC_ATA_NOERR; 768 } 769 770 int 771 wdc_ata_addref(drvp) 772 struct ata_drive_datas *drvp; 773 { 774 struct channel_softc *chp = drvp->chnl_softc; 775 776 return (wdc_addref(chp)); 777 } 778 779 void 780 wdc_ata_delref(drvp) 781 struct ata_drive_datas *drvp; 782 { 783 struct channel_softc *chp = drvp->chnl_softc; 784 785 wdc_delref(chp); 786 } 787
Indexes created Mon Sep 29 21:09:56 GMT 2025