ata_wdc.c revision 1.19
1 /* $NetBSD: ata_wdc.c,v 1.19 1999/04/01 21:46:28 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 121 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 122 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 123 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 124 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 125 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 126 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 127 128 /* 129 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 130 * WDC_TRY_AGAIN. Must be called at splio(). 131 */ 132 int 133 wdc_ata_bio(drvp, ata_bio) 134 struct ata_drive_datas *drvp; 135 struct ata_bio *ata_bio; 136 { 137 struct wdc_xfer *xfer; 138 struct channel_softc *chp = drvp->chnl_softc; 139 140 xfer = wdc_get_xfer(WDC_NOSLEEP); 141 if (xfer == NULL) 142 return WDC_TRY_AGAIN; 143 if (ata_bio->flags & ATA_POLL) 144 xfer->c_flags |= C_POLL; 145 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 146 (ata_bio->flags & ATA_SINGLE) == 0) 147 xfer->c_flags |= C_DMA; 148 xfer->drive = drvp->drive; 149 xfer->cmd = ata_bio; 150 xfer->databuf = ata_bio->databuf; 151 xfer->c_bcount = ata_bio->bcount; 152 xfer->c_start = wdc_ata_bio_start; 153 xfer->c_intr = wdc_ata_bio_intr; 154 wdc_exec_xfer(chp, xfer); 155 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 156 } 157 158 void 159 wdc_ata_bio_start(chp, xfer) 160 struct channel_softc *chp; 161 struct wdc_xfer *xfer; 162 { 163 struct ata_bio *ata_bio = xfer->cmd; 164 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 165 u_int16_t cyl; 166 u_int8_t head, sect, cmd = 0; 167 int nblks; 168 int ata_delay; 169 int dma_flags = 0; 170 171 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 172 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 173 DEBUG_XFERS); 174 175 /* Do control operations specially. */ 176 if (drvp->state < READY) { 177 /* 178 * Actually, we want to be careful not to mess with the control 179 * state if the device is currently busy, but we can assume 180 * that we never get to this point if that's the case. 181 */ 182 /* at this point, we should only be in RECAL state */ 183 if (drvp->state != RECAL) { 184 printf("%s:%d:%d: bad state %d in wdc_ata_bio_start\n", 185 chp->wdc->sc_dev.dv_xname, chp->channel, 186 xfer->drive, drvp->state); 187 panic("wdc_ata_bio_start: bad state"); 188 } 189 xfer->c_intr = wdc_ata_ctrl_intr; 190 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 191 WDSD_IBM | (xfer->drive << 4)); 192 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 193 goto timeout; 194 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 195 drvp->state = RECAL_WAIT; 196 if ((ata_bio->flags & ATA_POLL) == 0) { 197 chp->ch_flags |= WDCF_IRQ_WAIT; 198 timeout(wdctimeout, chp, 199 ATA_DELAY / 1000 * hz); 200 } else { 201 /* Wait for at last 400ns for status bit to be valid */ 202 DELAY(1); 203 wdc_ata_ctrl_intr(chp, xfer, 0); 204 } 205 return; 206 } 207 208 if (xfer->c_flags & C_DMA) { 209 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 210 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 211 } 212 if (ata_bio->flags & ATA_SINGLE) 213 ata_delay = ATA_DELAY; 214 else 215 ata_delay = ATA_DELAY; 216 again: 217 /* 218 * 219 * When starting a multi-sector transfer, or doing single-sector 220 * transfers... 221 */ 222 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 223 if (ata_bio->flags & ATA_SINGLE) 224 nblks = 1; 225 else 226 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 227 /* Check for bad sectors and adjust transfer, if necessary. */ 228 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 229 long blkdiff; 230 int i; 231 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 232 i++) { 233 blkdiff -= ata_bio->blkno; 234 if (blkdiff < 0) 235 continue; 236 if (blkdiff == 0) { 237 /* Replace current block of transfer. */ 238 ata_bio->blkno = 239 ata_bio->lp->d_secperunit - 240 ata_bio->lp->d_nsectors - i - 1; 241 } 242 if (blkdiff < nblks) { 243 /* Bad block inside transfer. */ 244 ata_bio->flags |= ATA_SINGLE; 245 nblks = 1; 246 } 247 break; 248 } 249 /* Transfer is okay now. */ 250 } 251 if (ata_bio->flags & ATA_LBA) { 252 sect = (ata_bio->blkno >> 0) & 0xff; 253 cyl = (ata_bio->blkno >> 8) & 0xffff; 254 head = (ata_bio->blkno >> 24) & 0x0f; 255 head |= WDSD_LBA; 256 } else { 257 int blkno = ata_bio->blkno; 258 sect = blkno % ata_bio->lp->d_nsectors; 259 sect++; /* Sectors begin with 1, not 0. */ 260 blkno /= ata_bio->lp->d_nsectors; 261 head = blkno % ata_bio->lp->d_ntracks; 262 blkno /= ata_bio->lp->d_ntracks; 263 cyl = blkno; 264 head |= WDSD_CHS; 265 } 266 if (xfer->c_flags & C_DMA) { 267 ata_bio->nblks = nblks; 268 ata_bio->nbytes = xfer->c_bcount; 269 cmd = (ata_bio->flags & ATA_READ) ? 270 WDCC_READDMA : WDCC_WRITEDMA; 271 nblks = ata_bio->nblks; 272 /* Init the DMA channel. */ 273 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 274 chp->channel, xfer->drive, 275 (char *)xfer->databuf + xfer->c_skip, 276 ata_bio->nbytes, dma_flags) != 0) { 277 ata_bio->error = ERR_DMA; 278 ata_bio->r_error = 0; 279 wdc_ata_bio_done(chp, xfer); 280 return; 281 } 282 /* Initiate command */ 283 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 284 WDSD_IBM | (xfer->drive << 4)); 285 if (wait_for_ready(chp, ata_delay) < 0) 286 goto timeout; 287 wdccommand(chp, xfer->drive, cmd, cyl, 288 head, sect, nblks, 0); 289 /* start the DMA channel */ 290 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 291 chp->channel, xfer->drive, dma_flags); 292 /* wait for irq */ 293 goto intr; 294 } /* else not DMA */ 295 ata_bio->nblks = min(nblks, ata_bio->multi); 296 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 297 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 298 cmd = (ata_bio->flags & ATA_READ) ? 299 WDCC_READMULTI : WDCC_WRITEMULTI; 300 } else { 301 cmd = (ata_bio->flags & ATA_READ) ? 302 WDCC_READ : WDCC_WRITE; 303 } 304 /* Initiate command! */ 305 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 306 WDSD_IBM | (xfer->drive << 4)); 307 if (wait_for_ready(chp, ata_delay) < 0) 308 goto timeout; 309 wdccommand(chp, xfer->drive, cmd, cyl, 310 head, sect, nblks, 311 (ata_bio->lp->d_type == DTYPE_ST506) ? 312 ata_bio->lp->d_precompcyl / 4 : 0); 313 } else if (ata_bio->nblks > 1) { 314 /* The number of blocks in the last stretch may be smaller. */ 315 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 316 if (ata_bio->nblks > nblks) { 317 ata_bio->nblks = nblks; 318 ata_bio->nbytes = xfer->c_bcount; 319 } 320 } 321 /* If this was a write and not using DMA, push the data. */ 322 if ((ata_bio->flags & ATA_READ) == 0) { 323 if (wait_for_drq(chp, ata_delay) != 0) { 324 printf("%s:%d:%d: timeout waiting for DRQ, " 325 "st=0x%02x, err=0x%02x\n", 326 chp->wdc->sc_dev.dv_xname, chp->channel, 327 xfer->drive, chp->ch_status, chp->ch_error); 328 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 329 ata_bio->error = TIMEOUT; 330 wdc_ata_bio_done(chp, xfer); 331 return; 332 } 333 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 334 wdc_ata_bio_done(chp, xfer); 335 return; 336 } 337 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 338 if (drvp->drive_flags & DRIVE_CAP32) { 339 bus_space_write_multi_4(chp->data32iot, 340 chp->data32ioh, 0, 341 (u_int32_t *)((char *)xfer->databuf + 342 xfer->c_skip), 343 ata_bio->nbytes >> 2); 344 } else { 345 bus_space_write_multi_2(chp->cmd_iot, 346 chp->cmd_ioh, wd_data, 347 (u_int16_t *)((char *)xfer->databuf + 348 xfer->c_skip), 349 ata_bio->nbytes >> 1); 350 } 351 } else { 352 if (drvp->drive_flags & DRIVE_CAP32) { 353 bus_space_write_multi_stream_4(chp->data32iot, 354 chp->data32ioh, 0, 355 (u_int32_t *)((char *)xfer->databuf + 356 xfer->c_skip), 357 ata_bio->nbytes >> 2); 358 } else { 359 bus_space_write_multi_stream_2(chp->cmd_iot, 360 chp->cmd_ioh, wd_data, 361 (u_int16_t *)((char *)xfer->databuf + 362 xfer->c_skip), 363 ata_bio->nbytes >> 1); 364 } 365 } 366 } 367 368 intr: /* Wait for IRQ (either real or polled) */ 369 if ((ata_bio->flags & ATA_POLL) == 0) { 370 chp->ch_flags |= WDCF_IRQ_WAIT; 371 timeout(wdctimeout, chp, ata_delay / 1000 * hz); 372 } else { 373 /* Wait for at last 400ns for status bit to be valid */ 374 delay(1); 375 wdc_ata_bio_intr(chp, xfer, 0); 376 if ((ata_bio->flags & ATA_ITSDONE) == 0) 377 goto again; 378 } 379 return; 380 timeout: 381 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 382 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 383 chp->ch_status, chp->ch_error); 384 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 385 ata_bio->error = TIMEOUT; 386 wdc_ata_bio_done(chp, xfer); 387 return; 388 } 389 390 int 391 wdc_ata_bio_intr(chp, xfer, irq) 392 struct channel_softc *chp; 393 struct wdc_xfer *xfer; 394 int irq; 395 { 396 struct ata_bio *ata_bio = xfer->cmd; 397 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 398 int drv_err; 399 int dma_flags = 0; 400 401 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 402 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 403 DEBUG_INTR | DEBUG_XFERS); 404 405 406 /* Is it not a transfer, but a control operation? */ 407 if (drvp->state < READY) { 408 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 409 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 410 drvp->state); 411 panic("wdc_ata_bio_intr: bad state\n"); 412 } 413 414 if (xfer->c_flags & C_DMA) { 415 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 416 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 417 } 418 419 /* Ack interrupt done by wait_for_unbusy */ 420 if (wait_for_unbusy(chp, 421 (irq == 0) ? ATA_DELAY : 0) < 0) { 422 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 423 return 0; /* IRQ was not for us */ 424 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 425 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 426 xfer->c_bcount, xfer->c_skip); 427 /* if we were using DMA, turn off DMA channel */ 428 if (xfer->c_flags & C_DMA) { 429 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 430 chp->channel, xfer->drive, dma_flags); 431 drvp->n_dmaerrs++; 432 } 433 ata_bio->error = TIMEOUT; 434 wdc_ata_bio_done(chp, xfer); 435 return 1; 436 } 437 438 drv_err = wdc_ata_err(drvp, ata_bio); 439 440 /* If we were using DMA, Turn off the DMA channel and check for error */ 441 if (xfer->c_flags & C_DMA) { 442 if (ata_bio->flags & ATA_POLL) { 443 /* 444 * IDE drives deassert WDCS_BSY before transfer is 445 * complete when using DMA. Polling for DRQ to deassert 446 * is not enouth DRQ is not required to be 447 * asserted for DMA transfers, so poll for DRDY. 448 */ 449 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 450 ATA_DELAY) < 0) { 451 printf("%s:%d:%d: polled transfer timed out " 452 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 453 chp->channel, xfer->drive, chp->ch_status); 454 ata_bio->error = TIMEOUT; 455 drv_err = WDC_ATA_ERR; 456 } 457 } 458 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg, 459 chp->channel, xfer->drive, dma_flags) != 0) { 460 if (drv_err != WDC_ATA_ERR) { 461 ata_bio->error = ERR_DMA; 462 drv_err = WDC_ATA_ERR; 463 } 464 } 465 if (chp->ch_status & WDCS_DRQ) { 466 if (drv_err != WDC_ATA_ERR) { 467 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 468 chp->wdc->sc_dev.dv_xname, chp->channel, 469 xfer->drive, chp->ch_status); 470 ata_bio->error = TIMEOUT; 471 drv_err = WDC_ATA_ERR; 472 } 473 } 474 if (drv_err != WDC_ATA_ERR) 475 goto end; 476 drvp->n_dmaerrs++; 477 } 478 479 /* if we had an error, end */ 480 if (drv_err == WDC_ATA_ERR) { 481 wdc_ata_bio_done(chp, xfer); 482 return 1; 483 } 484 485 /* If this was a read and not using DMA, fetch the data. */ 486 if ((ata_bio->flags & ATA_READ) != 0) { 487 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 488 printf("%s:%d:%d: read intr before drq\n", 489 chp->wdc->sc_dev.dv_xname, chp->channel, 490 xfer->drive); 491 ata_bio->error = TIMEOUT; 492 wdc_ata_bio_done(chp, xfer); 493 return 1; 494 } 495 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 496 if (drvp->drive_flags & DRIVE_CAP32) { 497 bus_space_read_multi_4(chp->data32iot, 498 chp->data32ioh, 0, 499 (u_int32_t *)((char *)xfer->databuf + 500 xfer->c_skip), 501 ata_bio->nbytes >> 2); 502 } else { 503 bus_space_read_multi_2(chp->cmd_iot, 504 chp->cmd_ioh, wd_data, 505 (u_int16_t *)((char *)xfer->databuf + 506 xfer->c_skip), 507 ata_bio->nbytes >> 1); 508 } 509 } else { 510 if (drvp->drive_flags & DRIVE_CAP32) { 511 bus_space_read_multi_stream_4(chp->data32iot, 512 chp->data32ioh, 0, 513 (u_int32_t *)((char *)xfer->databuf + 514 xfer->c_skip), 515 ata_bio->nbytes >> 2); 516 } else { 517 bus_space_read_multi_stream_2(chp->cmd_iot, 518 chp->cmd_ioh, wd_data, 519 (u_int16_t *)((char *)xfer->databuf + 520 xfer->c_skip), 521 ata_bio->nbytes >> 1); 522 } 523 } 524 } 525 526 end: 527 ata_bio->blkno += ata_bio->nblks; 528 ata_bio->blkdone += ata_bio->nblks; 529 xfer->c_skip += ata_bio->nbytes; 530 xfer->c_bcount -= ata_bio->nbytes; 531 /* See if this transfer is complete. */ 532 if (xfer->c_bcount > 0) { 533 if ((ata_bio->flags & ATA_POLL) == 0) { 534 /* Start the next operation */ 535 wdc_ata_bio_start(chp, xfer); 536 } else { 537 /* Let wdc_ata_bio_start do the loop */ 538 return 1; 539 } 540 } else { /* Done with this transfer */ 541 ata_bio->error = NOERROR; 542 wdc_ata_bio_done(chp, xfer); 543 } 544 return 1; 545 } 546 547 void 548 wdc_ata_bio_done(chp, xfer) 549 struct channel_softc *chp; 550 struct wdc_xfer *xfer; 551 { 552 struct ata_bio *ata_bio = xfer->cmd; 553 int need_done = xfer->c_flags & C_NEEDDONE; 554 int drive = xfer->drive; 555 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 556 557 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 558 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 559 (u_int)xfer->c_flags), 560 DEBUG_XFERS); 561 562 if (ata_bio->error == NOERROR) 563 drvp->n_dmaerrs = 0; 564 else if (drvp->n_dmaerrs >= NERRS_MAX) { 565 wdc_downgrade_mode(drvp); 566 } 567 568 /* feed back residual bcount to our caller */ 569 ata_bio->bcount = xfer->c_bcount; 570 571 /* remove this command from xfer queue */ 572 wdc_free_xfer(chp, xfer); 573 574 ata_bio->flags |= ATA_ITSDONE; 575 if (need_done) { 576 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 577 wddone(chp->ch_drive[drive].drv_softc); 578 } 579 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 580 chp->ch_flags), DEBUG_XFERS); 581 wdcstart(chp); 582 } 583 584 /* 585 * Implement operations needed before read/write. 586 */ 587 int 588 wdc_ata_ctrl_intr(chp, xfer, irq) 589 struct channel_softc *chp; 590 struct wdc_xfer *xfer; 591 int irq; 592 { 593 struct ata_bio *ata_bio = xfer->cmd; 594 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 595 char *errstring = NULL; 596 int delay = (irq == 0) ? ATA_DELAY : 0; 597 598 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 599 DEBUG_FUNCS); 600 601 again: 602 switch (drvp->state) { 603 case RECAL: /* Should not be in this state here */ 604 panic("wdc_ata_ctrl_intr: state==RECAL"); 605 break; 606 607 case RECAL_WAIT: 608 errstring = "recal"; 609 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 610 goto timeout; 611 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 612 goto error; 613 /* fall through */ 614 615 case PIOMODE: 616 /* Don't try to set modes if controller can't be adjusted */ 617 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 618 goto geometry; 619 /* Also don't try if the drive didn't report its mode */ 620 if ((drvp->drive_flags & DRIVE_MODE) == 0) 621 goto geometry; 622 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 623 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 624 drvp->state = PIOMODE_WAIT; 625 break; 626 627 case PIOMODE_WAIT: 628 errstring = "piomode"; 629 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 630 goto timeout; 631 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 632 goto error; 633 /* fall through */ 634 635 case DMAMODE: 636 if (drvp->drive_flags & DRIVE_UDMA) { 637 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 638 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 639 } else if (drvp->drive_flags & DRIVE_DMA) { 640 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 641 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 642 } else { 643 goto geometry; 644 } 645 drvp->state = DMAMODE_WAIT; 646 break; 647 case DMAMODE_WAIT: 648 errstring = "dmamode"; 649 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 650 goto timeout; 651 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 652 goto error; 653 /* fall through */ 654 655 case GEOMETRY: 656 geometry: 657 if (ata_bio->flags & ATA_LBA) 658 goto multimode; 659 wdccommand(chp, xfer->drive, WDCC_IDP, 660 ata_bio->lp->d_ncylinders, 661 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 662 (ata_bio->lp->d_type == DTYPE_ST506) ? 663 ata_bio->lp->d_precompcyl / 4 : 0); 664 drvp->state = GEOMETRY_WAIT; 665 break; 666 667 case GEOMETRY_WAIT: 668 errstring = "geometry"; 669 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 670 goto timeout; 671 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 672 goto error; 673 /* fall through */ 674 675 case MULTIMODE: 676 multimode: 677 if (ata_bio->multi == 1) 678 goto ready; 679 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 680 ata_bio->multi, 0); 681 drvp->state = MULTIMODE_WAIT; 682 break; 683 684 case MULTIMODE_WAIT: 685 errstring = "setmulti"; 686 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 687 goto timeout; 688 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 689 goto error; 690 /* fall through */ 691 692 case READY: 693 ready: 694 drvp->state = READY; 695 /* 696 * The drive is usable now 697 */ 698 xfer->c_intr = wdc_ata_bio_intr; 699 wdc_ata_bio_start(chp, xfer); 700 return 1; 701 } 702 703 if ((ata_bio->flags & ATA_POLL) == 0) { 704 chp->ch_flags |= WDCF_IRQ_WAIT; 705 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 706 } else { 707 goto again; 708 } 709 return 1; 710 711 timeout: 712 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 713 return 0; /* IRQ was not for us */ 714 } 715 printf("%s:%d:%d: %s timed out\n", 716 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 717 ata_bio->error = TIMEOUT; 718 drvp->state = 0; 719 wdc_ata_bio_done(chp, xfer); 720 return 0; 721 error: 722 printf("%s:%d:%d: %s ", 723 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 724 errstring); 725 if (chp->ch_status & WDCS_DWF) { 726 printf("drive fault\n"); 727 ata_bio->error = ERR_DF; 728 } else { 729 printf("error (%x)\n", chp->ch_error); 730 ata_bio->r_error = chp->ch_error; 731 ata_bio->error = ERROR; 732 } 733 drvp->state = 0; 734 wdc_ata_bio_done(chp, xfer); 735 return 1; 736 } 737 738 int 739 wdc_ata_err(drvp, ata_bio) 740 struct ata_drive_datas *drvp; 741 struct ata_bio *ata_bio; 742 { 743 struct channel_softc *chp = drvp->chnl_softc; 744 ata_bio->error = 0; 745 if (chp->ch_status & WDCS_BSY) { 746 ata_bio->error = TIMEOUT; 747 return WDC_ATA_ERR; 748 } 749 750 if (chp->ch_status & WDCS_DWF) { 751 ata_bio->error = ERR_DF; 752 return WDC_ATA_ERR; 753 } 754 755 if (chp->ch_status & WDCS_ERR) { 756 ata_bio->error = ERROR; 757 ata_bio->r_error = chp->ch_error; 758 if (drvp->drive_flags & DRIVE_UDMA && 759 (ata_bio->r_error & WDCE_CRC)) { 760 /* 761 * Record the CRC error, to avoid downgrading to 762 * multiword DMA 763 */ 764 drvp->drive_flags |= DRIVE_DMAERR; 765 } 766 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 767 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 768 return WDC_ATA_ERR; 769 return WDC_ATA_NOERR; 770 } 771 772 if (chp->ch_status & WDCS_CORR) 773 ata_bio->flags |= ATA_CORR; 774 return WDC_ATA_NOERR; 775 } 776 777 int 778 wdc_ata_addref(drvp) 779 struct ata_drive_datas *drvp; 780 { 781 struct channel_softc *chp = drvp->chnl_softc; 782 783 return (wdc_addref(chp)); 784 } 785 786 void 787 wdc_ata_delref(drvp) 788 struct ata_drive_datas *drvp; 789 { 790 struct channel_softc *chp = drvp->chnl_softc; 791 792 wdc_delref(chp); 793 } 794
Indexes created Mon Sep 29 21:09:56 GMT 2025