ata_wdc.c revision 1.21
1 /* $NetBSD: ata_wdc.c,v 1.21 1999/08/09 09:43:11 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 121 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 122 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 123 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 129 /* 130 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 131 * WDC_TRY_AGAIN. Must be called at splio(). 132 */ 133 int 134 wdc_ata_bio(drvp, ata_bio) 135 struct ata_drive_datas *drvp; 136 struct ata_bio *ata_bio; 137 { 138 struct wdc_xfer *xfer; 139 struct channel_softc *chp = drvp->chnl_softc; 140 141 xfer = wdc_get_xfer(WDC_NOSLEEP); 142 if (xfer == NULL) 143 return WDC_TRY_AGAIN; 144 if (ata_bio->flags & ATA_POLL) 145 xfer->c_flags |= C_POLL; 146 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 147 (ata_bio->flags & ATA_SINGLE) == 0) 148 xfer->c_flags |= C_DMA; 149 xfer->drive = drvp->drive; 150 xfer->cmd = ata_bio; 151 xfer->databuf = ata_bio->databuf; 152 xfer->c_bcount = ata_bio->bcount; 153 xfer->c_start = wdc_ata_bio_start; 154 xfer->c_intr = wdc_ata_bio_intr; 155 wdc_exec_xfer(chp, xfer); 156 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 157 } 158 159 void 160 wdc_ata_bio_start(chp, xfer) 161 struct channel_softc *chp; 162 struct wdc_xfer *xfer; 163 { 164 struct ata_bio *ata_bio = xfer->cmd; 165 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 166 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 167 DEBUG_XFERS); 168 169 /* start timeout machinery */ 170 if ((ata_bio->flags & ATA_POLL) == 0) 171 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 172 _wdc_ata_bio_start(chp, xfer); 173 } 174 175 void 176 _wdc_ata_bio_start(chp, xfer) 177 struct channel_softc *chp; 178 struct wdc_xfer *xfer; 179 { 180 struct ata_bio *ata_bio = xfer->cmd; 181 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 182 u_int16_t cyl; 183 u_int8_t head, sect, cmd = 0; 184 int nblks; 185 int ata_delay; 186 int dma_flags = 0; 187 188 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 189 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 190 DEBUG_INTR | DEBUG_XFERS); 191 /* Do control operations specially. */ 192 if (drvp->state < READY) { 193 /* 194 * Actually, we want to be careful not to mess with the control 195 * state if the device is currently busy, but we can assume 196 * that we never get to this point if that's the case. 197 */ 198 /* at this point, we should only be in RECAL state */ 199 if (drvp->state != RECAL) { 200 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 201 chp->wdc->sc_dev.dv_xname, chp->channel, 202 xfer->drive, drvp->state); 203 panic("_wdc_ata_bio_start: bad state"); 204 } 205 xfer->c_intr = wdc_ata_ctrl_intr; 206 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 207 WDSD_IBM | (xfer->drive << 4)); 208 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 209 goto timeout; 210 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 211 drvp->state = RECAL_WAIT; 212 if ((ata_bio->flags & ATA_POLL) == 0) { 213 chp->ch_flags |= WDCF_IRQ_WAIT; 214 } else { 215 /* Wait for at last 400ns for status bit to be valid */ 216 DELAY(1); 217 wdc_ata_ctrl_intr(chp, xfer, 0); 218 } 219 return; 220 } 221 222 if (xfer->c_flags & C_DMA) { 223 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 224 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 225 } 226 if (ata_bio->flags & ATA_SINGLE) 227 ata_delay = ATA_DELAY; 228 else 229 ata_delay = ATA_DELAY; 230 again: 231 /* 232 * 233 * When starting a multi-sector transfer, or doing single-sector 234 * transfers... 235 */ 236 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 237 if (ata_bio->flags & ATA_SINGLE) 238 nblks = 1; 239 else 240 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 241 /* Check for bad sectors and adjust transfer, if necessary. */ 242 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 243 long blkdiff; 244 int i; 245 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 246 i++) { 247 blkdiff -= ata_bio->blkno; 248 if (blkdiff < 0) 249 continue; 250 if (blkdiff == 0) { 251 /* Replace current block of transfer. */ 252 ata_bio->blkno = 253 ata_bio->lp->d_secperunit - 254 ata_bio->lp->d_nsectors - i - 1; 255 } 256 if (blkdiff < nblks) { 257 /* Bad block inside transfer. */ 258 ata_bio->flags |= ATA_SINGLE; 259 nblks = 1; 260 } 261 break; 262 } 263 /* Transfer is okay now. */ 264 } 265 if (ata_bio->flags & ATA_LBA) { 266 sect = (ata_bio->blkno >> 0) & 0xff; 267 cyl = (ata_bio->blkno >> 8) & 0xffff; 268 head = (ata_bio->blkno >> 24) & 0x0f; 269 head |= WDSD_LBA; 270 } else { 271 int blkno = ata_bio->blkno; 272 sect = blkno % ata_bio->lp->d_nsectors; 273 sect++; /* Sectors begin with 1, not 0. */ 274 blkno /= ata_bio->lp->d_nsectors; 275 head = blkno % ata_bio->lp->d_ntracks; 276 blkno /= ata_bio->lp->d_ntracks; 277 cyl = blkno; 278 head |= WDSD_CHS; 279 } 280 if (xfer->c_flags & C_DMA) { 281 ata_bio->nblks = nblks; 282 ata_bio->nbytes = xfer->c_bcount; 283 cmd = (ata_bio->flags & ATA_READ) ? 284 WDCC_READDMA : WDCC_WRITEDMA; 285 nblks = ata_bio->nblks; 286 /* Init the DMA channel. */ 287 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 288 chp->channel, xfer->drive, 289 (char *)xfer->databuf + xfer->c_skip, 290 ata_bio->nbytes, dma_flags) != 0) { 291 ata_bio->error = ERR_DMA; 292 ata_bio->r_error = 0; 293 wdc_ata_bio_done(chp, xfer); 294 return; 295 } 296 /* Initiate command */ 297 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 298 WDSD_IBM | (xfer->drive << 4)); 299 if (wait_for_ready(chp, ata_delay) < 0) 300 goto timeout; 301 wdccommand(chp, xfer->drive, cmd, cyl, 302 head, sect, nblks, 0); 303 /* start the DMA channel */ 304 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 305 chp->channel, xfer->drive, dma_flags); 306 /* wait for irq */ 307 goto intr; 308 } /* else not DMA */ 309 ata_bio->nblks = min(nblks, ata_bio->multi); 310 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 311 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 312 cmd = (ata_bio->flags & ATA_READ) ? 313 WDCC_READMULTI : WDCC_WRITEMULTI; 314 } else { 315 cmd = (ata_bio->flags & ATA_READ) ? 316 WDCC_READ : WDCC_WRITE; 317 } 318 /* Initiate command! */ 319 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 320 WDSD_IBM | (xfer->drive << 4)); 321 if (wait_for_ready(chp, ata_delay) < 0) 322 goto timeout; 323 wdccommand(chp, xfer->drive, cmd, cyl, 324 head, sect, nblks, 325 (ata_bio->lp->d_type == DTYPE_ST506) ? 326 ata_bio->lp->d_precompcyl / 4 : 0); 327 } else if (ata_bio->nblks > 1) { 328 /* The number of blocks in the last stretch may be smaller. */ 329 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 330 if (ata_bio->nblks > nblks) { 331 ata_bio->nblks = nblks; 332 ata_bio->nbytes = xfer->c_bcount; 333 } 334 } 335 /* If this was a write and not using DMA, push the data. */ 336 if ((ata_bio->flags & ATA_READ) == 0) { 337 if (wait_for_drq(chp, ata_delay) != 0) { 338 printf("%s:%d:%d: timeout waiting for DRQ, " 339 "st=0x%02x, err=0x%02x\n", 340 chp->wdc->sc_dev.dv_xname, chp->channel, 341 xfer->drive, chp->ch_status, chp->ch_error); 342 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 343 ata_bio->error = TIMEOUT; 344 wdc_ata_bio_done(chp, xfer); 345 return; 346 } 347 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 348 wdc_ata_bio_done(chp, xfer); 349 return; 350 } 351 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 352 if (drvp->drive_flags & DRIVE_CAP32) { 353 bus_space_write_multi_4(chp->data32iot, 354 chp->data32ioh, 0, 355 (u_int32_t *)((char *)xfer->databuf + 356 xfer->c_skip), 357 ata_bio->nbytes >> 2); 358 } else { 359 bus_space_write_multi_2(chp->cmd_iot, 360 chp->cmd_ioh, wd_data, 361 (u_int16_t *)((char *)xfer->databuf + 362 xfer->c_skip), 363 ata_bio->nbytes >> 1); 364 } 365 } else { 366 if (drvp->drive_flags & DRIVE_CAP32) { 367 bus_space_write_multi_stream_4(chp->data32iot, 368 chp->data32ioh, 0, 369 (u_int32_t *)((char *)xfer->databuf + 370 xfer->c_skip), 371 ata_bio->nbytes >> 2); 372 } else { 373 bus_space_write_multi_stream_2(chp->cmd_iot, 374 chp->cmd_ioh, wd_data, 375 (u_int16_t *)((char *)xfer->databuf + 376 xfer->c_skip), 377 ata_bio->nbytes >> 1); 378 } 379 } 380 } 381 382 intr: /* Wait for IRQ (either real or polled) */ 383 if ((ata_bio->flags & ATA_POLL) == 0) { 384 chp->ch_flags |= WDCF_IRQ_WAIT; 385 } else { 386 /* Wait for at last 400ns for status bit to be valid */ 387 delay(1); 388 wdc_ata_bio_intr(chp, xfer, 0); 389 if ((ata_bio->flags & ATA_ITSDONE) == 0) 390 goto again; 391 } 392 return; 393 timeout: 394 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 395 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 396 chp->ch_status, chp->ch_error); 397 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 398 ata_bio->error = TIMEOUT; 399 wdc_ata_bio_done(chp, xfer); 400 return; 401 } 402 403 int 404 wdc_ata_bio_intr(chp, xfer, irq) 405 struct channel_softc *chp; 406 struct wdc_xfer *xfer; 407 int irq; 408 { 409 struct ata_bio *ata_bio = xfer->cmd; 410 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 411 int drv_err; 412 int dma_flags = 0; 413 414 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 415 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 416 DEBUG_INTR | DEBUG_XFERS); 417 418 419 /* Is it not a transfer, but a control operation? */ 420 if (drvp->state < READY) { 421 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 422 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 423 drvp->state); 424 panic("wdc_ata_bio_intr: bad state\n"); 425 } 426 427 if (xfer->c_flags & C_DMA) { 428 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 429 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 430 } 431 432 /* 433 * if we missed an interrupt in a PIO transfer, reset and restart. 434 * Don't try to continue transfer, we may have missed cycles. 435 */ 436 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 437 ata_bio->error = TIMEOUT; 438 wdc_ata_bio_done(chp, xfer); 439 return 1; 440 } 441 442 /* Ack interrupt done by wait_for_unbusy */ 443 if (wait_for_unbusy(chp, 444 (irq == 0) ? ATA_DELAY : 0) < 0) { 445 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 446 return 0; /* IRQ was not for us */ 447 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 448 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 449 xfer->c_bcount, xfer->c_skip); 450 /* if we were using DMA, turn off DMA channel */ 451 if (xfer->c_flags & C_DMA) { 452 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 453 chp->channel, xfer->drive, dma_flags); 454 drvp->n_dmaerrs++; 455 } 456 ata_bio->error = TIMEOUT; 457 wdc_ata_bio_done(chp, xfer); 458 return 1; 459 } 460 461 drv_err = wdc_ata_err(drvp, ata_bio); 462 463 /* If we were using DMA, Turn off the DMA channel and check for error */ 464 if (xfer->c_flags & C_DMA) { 465 if (ata_bio->flags & ATA_POLL) { 466 /* 467 * IDE drives deassert WDCS_BSY before transfer is 468 * complete when using DMA. Polling for DRQ to deassert 469 * is not enouth DRQ is not required to be 470 * asserted for DMA transfers, so poll for DRDY. 471 */ 472 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 473 ATA_DELAY) < 0) { 474 printf("%s:%d:%d: polled transfer timed out " 475 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 476 chp->channel, xfer->drive, chp->ch_status); 477 ata_bio->error = TIMEOUT; 478 drv_err = WDC_ATA_ERR; 479 } 480 } 481 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg, 482 chp->channel, xfer->drive, dma_flags) != 0) { 483 if (drv_err != WDC_ATA_ERR) { 484 ata_bio->error = ERR_DMA; 485 drv_err = WDC_ATA_ERR; 486 } 487 } 488 if (chp->ch_status & WDCS_DRQ) { 489 if (drv_err != WDC_ATA_ERR) { 490 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 491 chp->wdc->sc_dev.dv_xname, chp->channel, 492 xfer->drive, chp->ch_status); 493 ata_bio->error = TIMEOUT; 494 drv_err = WDC_ATA_ERR; 495 } 496 } 497 if (drv_err != WDC_ATA_ERR) 498 goto end; 499 drvp->n_dmaerrs++; 500 } 501 502 /* if we had an error, end */ 503 if (drv_err == WDC_ATA_ERR) { 504 wdc_ata_bio_done(chp, xfer); 505 return 1; 506 } 507 508 /* If this was a read and not using DMA, fetch the data. */ 509 if ((ata_bio->flags & ATA_READ) != 0) { 510 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 511 printf("%s:%d:%d: read intr before drq\n", 512 chp->wdc->sc_dev.dv_xname, chp->channel, 513 xfer->drive); 514 ata_bio->error = TIMEOUT; 515 wdc_ata_bio_done(chp, xfer); 516 return 1; 517 } 518 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 519 if (drvp->drive_flags & DRIVE_CAP32) { 520 bus_space_read_multi_4(chp->data32iot, 521 chp->data32ioh, 0, 522 (u_int32_t *)((char *)xfer->databuf + 523 xfer->c_skip), 524 ata_bio->nbytes >> 2); 525 } else { 526 bus_space_read_multi_2(chp->cmd_iot, 527 chp->cmd_ioh, wd_data, 528 (u_int16_t *)((char *)xfer->databuf + 529 xfer->c_skip), 530 ata_bio->nbytes >> 1); 531 } 532 } else { 533 if (drvp->drive_flags & DRIVE_CAP32) { 534 bus_space_read_multi_stream_4(chp->data32iot, 535 chp->data32ioh, 0, 536 (u_int32_t *)((char *)xfer->databuf + 537 xfer->c_skip), 538 ata_bio->nbytes >> 2); 539 } else { 540 bus_space_read_multi_stream_2(chp->cmd_iot, 541 chp->cmd_ioh, wd_data, 542 (u_int16_t *)((char *)xfer->databuf + 543 xfer->c_skip), 544 ata_bio->nbytes >> 1); 545 } 546 } 547 } 548 549 end: 550 ata_bio->blkno += ata_bio->nblks; 551 ata_bio->blkdone += ata_bio->nblks; 552 xfer->c_skip += ata_bio->nbytes; 553 xfer->c_bcount -= ata_bio->nbytes; 554 /* See if this transfer is complete. */ 555 if (xfer->c_bcount > 0) { 556 if ((ata_bio->flags & ATA_POLL) == 0) { 557 /* Start the next operation */ 558 _wdc_ata_bio_start(chp, xfer); 559 } else { 560 /* Let _wdc_ata_bio_start do the loop */ 561 return 1; 562 } 563 } else { /* Done with this transfer */ 564 ata_bio->error = NOERROR; 565 wdc_ata_bio_done(chp, xfer); 566 } 567 return 1; 568 } 569 570 void 571 wdc_ata_bio_done(chp, xfer) 572 struct channel_softc *chp; 573 struct wdc_xfer *xfer; 574 { 575 struct ata_bio *ata_bio = xfer->cmd; 576 int drive = xfer->drive; 577 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 578 579 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 580 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 581 (u_int)xfer->c_flags), 582 DEBUG_XFERS); 583 584 untimeout(wdctimeout, chp); 585 if (ata_bio->error == NOERROR) 586 drvp->n_dmaerrs = 0; 587 else if (drvp->n_dmaerrs >= NERRS_MAX) { 588 wdc_downgrade_mode(drvp); 589 } 590 591 /* feed back residual bcount to our caller */ 592 ata_bio->bcount = xfer->c_bcount; 593 594 /* remove this command from xfer queue */ 595 wdc_free_xfer(chp, xfer); 596 597 ata_bio->flags |= ATA_ITSDONE; 598 if ((ata_bio->flags & ATA_POLL) == 0) { 599 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 600 wddone(chp->ch_drive[drive].drv_softc); 601 } 602 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 603 chp->ch_flags), DEBUG_XFERS); 604 wdcstart(chp); 605 } 606 607 /* 608 * Implement operations needed before read/write. 609 */ 610 int 611 wdc_ata_ctrl_intr(chp, xfer, irq) 612 struct channel_softc *chp; 613 struct wdc_xfer *xfer; 614 int irq; 615 { 616 struct ata_bio *ata_bio = xfer->cmd; 617 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 618 char *errstring = NULL; 619 int delay = (irq == 0) ? ATA_DELAY : 0; 620 621 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 622 DEBUG_FUNCS); 623 624 again: 625 switch (drvp->state) { 626 case RECAL: /* Should not be in this state here */ 627 panic("wdc_ata_ctrl_intr: state==RECAL"); 628 break; 629 630 case RECAL_WAIT: 631 errstring = "recal"; 632 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 633 goto timeout; 634 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 635 goto error; 636 /* fall through */ 637 638 case PIOMODE: 639 /* Don't try to set modes if controller can't be adjusted */ 640 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 641 goto geometry; 642 /* Also don't try if the drive didn't report its mode */ 643 if ((drvp->drive_flags & DRIVE_MODE) == 0) 644 goto geometry; 645 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 646 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 647 drvp->state = PIOMODE_WAIT; 648 break; 649 650 case PIOMODE_WAIT: 651 errstring = "piomode"; 652 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 653 goto timeout; 654 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 655 goto error; 656 /* fall through */ 657 658 case DMAMODE: 659 if (drvp->drive_flags & DRIVE_UDMA) { 660 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 661 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 662 } else if (drvp->drive_flags & DRIVE_DMA) { 663 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 664 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 665 } else { 666 goto geometry; 667 } 668 drvp->state = DMAMODE_WAIT; 669 break; 670 case DMAMODE_WAIT: 671 errstring = "dmamode"; 672 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 673 goto timeout; 674 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 675 goto error; 676 /* fall through */ 677 678 case GEOMETRY: 679 geometry: 680 if (ata_bio->flags & ATA_LBA) 681 goto multimode; 682 wdccommand(chp, xfer->drive, WDCC_IDP, 683 ata_bio->lp->d_ncylinders, 684 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 685 (ata_bio->lp->d_type == DTYPE_ST506) ? 686 ata_bio->lp->d_precompcyl / 4 : 0); 687 drvp->state = GEOMETRY_WAIT; 688 break; 689 690 case GEOMETRY_WAIT: 691 errstring = "geometry"; 692 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 693 goto timeout; 694 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 695 goto error; 696 /* fall through */ 697 698 case MULTIMODE: 699 multimode: 700 if (ata_bio->multi == 1) 701 goto ready; 702 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 703 ata_bio->multi, 0); 704 drvp->state = MULTIMODE_WAIT; 705 break; 706 707 case MULTIMODE_WAIT: 708 errstring = "setmulti"; 709 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 710 goto timeout; 711 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 712 goto error; 713 /* fall through */ 714 715 case READY: 716 ready: 717 drvp->state = READY; 718 /* 719 * The drive is usable now 720 */ 721 xfer->c_intr = wdc_ata_bio_intr; 722 _wdc_ata_bio_start(chp, xfer); 723 return 1; 724 } 725 726 if ((ata_bio->flags & ATA_POLL) == 0) { 727 chp->ch_flags |= WDCF_IRQ_WAIT; 728 } else { 729 goto again; 730 } 731 return 1; 732 733 timeout: 734 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 735 return 0; /* IRQ was not for us */ 736 } 737 printf("%s:%d:%d: %s timed out\n", 738 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 739 ata_bio->error = TIMEOUT; 740 drvp->state = 0; 741 wdc_ata_bio_done(chp, xfer); 742 return 0; 743 error: 744 printf("%s:%d:%d: %s ", 745 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 746 errstring); 747 if (chp->ch_status & WDCS_DWF) { 748 printf("drive fault\n"); 749 ata_bio->error = ERR_DF; 750 } else { 751 printf("error (%x)\n", chp->ch_error); 752 ata_bio->r_error = chp->ch_error; 753 ata_bio->error = ERROR; 754 } 755 drvp->state = 0; 756 wdc_ata_bio_done(chp, xfer); 757 return 1; 758 } 759 760 int 761 wdc_ata_err(drvp, ata_bio) 762 struct ata_drive_datas *drvp; 763 struct ata_bio *ata_bio; 764 { 765 struct channel_softc *chp = drvp->chnl_softc; 766 ata_bio->error = 0; 767 if (chp->ch_status & WDCS_BSY) { 768 ata_bio->error = TIMEOUT; 769 return WDC_ATA_ERR; 770 } 771 772 if (chp->ch_status & WDCS_DWF) { 773 ata_bio->error = ERR_DF; 774 return WDC_ATA_ERR; 775 } 776 777 if (chp->ch_status & WDCS_ERR) { 778 ata_bio->error = ERROR; 779 ata_bio->r_error = chp->ch_error; 780 if (drvp->drive_flags & DRIVE_UDMA && 781 (ata_bio->r_error & WDCE_CRC)) { 782 /* 783 * Record the CRC error, to avoid downgrading to 784 * multiword DMA 785 */ 786 drvp->drive_flags |= DRIVE_DMAERR; 787 } 788 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 789 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 790 return WDC_ATA_ERR; 791 return WDC_ATA_NOERR; 792 } 793 794 if (chp->ch_status & WDCS_CORR) 795 ata_bio->flags |= ATA_CORR; 796 return WDC_ATA_NOERR; 797 } 798 799 int 800 wdc_ata_addref(drvp) 801 struct ata_drive_datas *drvp; 802 { 803 struct channel_softc *chp = drvp->chnl_softc; 804 805 return (wdc_addref(chp)); 806 } 807 808 void 809 wdc_ata_delref(drvp) 810 struct ata_drive_datas *drvp; 811 { 812 struct channel_softc *chp = drvp->chnl_softc; 813 814 wdc_delref(chp); 815 } 816
Indexes created Mon Sep 29 21:09:56 GMT 2025