ata_wdc.c revision 1.23
1 /* $NetBSD: ata_wdc.c,v 1.23 2000/01/17 00:01:00 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 121 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 122 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 123 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 124 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 125 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 128 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 129 130 /* 131 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 132 * WDC_TRY_AGAIN. Must be called at splio(). 133 */ 134 int 135 wdc_ata_bio(drvp, ata_bio) 136 struct ata_drive_datas *drvp; 137 struct ata_bio *ata_bio; 138 { 139 struct wdc_xfer *xfer; 140 struct channel_softc *chp = drvp->chnl_softc; 141 142 xfer = wdc_get_xfer(WDC_NOSLEEP); 143 if (xfer == NULL) 144 return WDC_TRY_AGAIN; 145 if (ata_bio->flags & ATA_POLL) 146 xfer->c_flags |= C_POLL; 147 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 148 (ata_bio->flags & ATA_SINGLE) == 0) 149 xfer->c_flags |= C_DMA; 150 xfer->drive = drvp->drive; 151 xfer->cmd = ata_bio; 152 xfer->databuf = ata_bio->databuf; 153 xfer->c_bcount = ata_bio->bcount; 154 xfer->c_start = wdc_ata_bio_start; 155 xfer->c_intr = wdc_ata_bio_intr; 156 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 157 wdc_exec_xfer(chp, xfer); 158 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 159 } 160 161 void 162 wdc_ata_bio_start(chp, xfer) 163 struct channel_softc *chp; 164 struct wdc_xfer *xfer; 165 { 166 struct ata_bio *ata_bio = xfer->cmd; 167 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 168 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 169 DEBUG_XFERS); 170 171 /* start timeout machinery */ 172 if ((ata_bio->flags & ATA_POLL) == 0) 173 timeout(wdctimeout, chp, ATA_DELAY / 1000 * hz); 174 _wdc_ata_bio_start(chp, xfer); 175 } 176 177 void 178 _wdc_ata_bio_start(chp, xfer) 179 struct channel_softc *chp; 180 struct wdc_xfer *xfer; 181 { 182 struct ata_bio *ata_bio = xfer->cmd; 183 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 184 u_int16_t cyl; 185 u_int8_t head, sect, cmd = 0; 186 int nblks; 187 int ata_delay; 188 int dma_flags = 0; 189 190 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 191 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 192 DEBUG_INTR | DEBUG_XFERS); 193 /* Do control operations specially. */ 194 if (drvp->state < READY) { 195 /* 196 * Actually, we want to be careful not to mess with the control 197 * state if the device is currently busy, but we can assume 198 * that we never get to this point if that's the case. 199 */ 200 /* at this point, we should only be in RECAL state */ 201 if (drvp->state != RECAL) { 202 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 203 chp->wdc->sc_dev.dv_xname, chp->channel, 204 xfer->drive, drvp->state); 205 panic("_wdc_ata_bio_start: bad state"); 206 } 207 xfer->c_intr = wdc_ata_ctrl_intr; 208 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 209 WDSD_IBM | (xfer->drive << 4)); 210 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 211 goto timeout; 212 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 213 drvp->state = RECAL_WAIT; 214 if ((ata_bio->flags & ATA_POLL) == 0) { 215 chp->ch_flags |= WDCF_IRQ_WAIT; 216 } else { 217 /* Wait for at last 400ns for status bit to be valid */ 218 DELAY(1); 219 wdc_ata_ctrl_intr(chp, xfer, 0); 220 } 221 return; 222 } 223 224 if (xfer->c_flags & C_DMA) { 225 if (drvp->n_xfers <= NXFER) 226 drvp->n_xfers++; 227 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 228 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 229 } 230 if (ata_bio->flags & ATA_SINGLE) 231 ata_delay = ATA_DELAY; 232 else 233 ata_delay = ATA_DELAY; 234 again: 235 /* 236 * 237 * When starting a multi-sector transfer, or doing single-sector 238 * transfers... 239 */ 240 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 241 if (ata_bio->flags & ATA_SINGLE) 242 nblks = 1; 243 else 244 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 245 /* Check for bad sectors and adjust transfer, if necessary. */ 246 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 247 long blkdiff; 248 int i; 249 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 250 i++) { 251 blkdiff -= ata_bio->blkno; 252 if (blkdiff < 0) 253 continue; 254 if (blkdiff == 0) { 255 /* Replace current block of transfer. */ 256 ata_bio->blkno = 257 ata_bio->lp->d_secperunit - 258 ata_bio->lp->d_nsectors - i - 1; 259 } 260 if (blkdiff < nblks) { 261 /* Bad block inside transfer. */ 262 ata_bio->flags |= ATA_SINGLE; 263 nblks = 1; 264 } 265 break; 266 } 267 /* Transfer is okay now. */ 268 } 269 if (ata_bio->flags & ATA_LBA) { 270 sect = (ata_bio->blkno >> 0) & 0xff; 271 cyl = (ata_bio->blkno >> 8) & 0xffff; 272 head = (ata_bio->blkno >> 24) & 0x0f; 273 head |= WDSD_LBA; 274 } else { 275 int blkno = ata_bio->blkno; 276 sect = blkno % ata_bio->lp->d_nsectors; 277 sect++; /* Sectors begin with 1, not 0. */ 278 blkno /= ata_bio->lp->d_nsectors; 279 head = blkno % ata_bio->lp->d_ntracks; 280 blkno /= ata_bio->lp->d_ntracks; 281 cyl = blkno; 282 head |= WDSD_CHS; 283 } 284 if (xfer->c_flags & C_DMA) { 285 ata_bio->nblks = nblks; 286 ata_bio->nbytes = xfer->c_bcount; 287 cmd = (ata_bio->flags & ATA_READ) ? 288 WDCC_READDMA : WDCC_WRITEDMA; 289 nblks = ata_bio->nblks; 290 /* Init the DMA channel. */ 291 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 292 chp->channel, xfer->drive, 293 (char *)xfer->databuf + xfer->c_skip, 294 ata_bio->nbytes, dma_flags) != 0) { 295 ata_bio->error = ERR_DMA; 296 ata_bio->r_error = 0; 297 wdc_ata_bio_done(chp, xfer); 298 return; 299 } 300 /* Initiate command */ 301 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 302 WDSD_IBM | (xfer->drive << 4)); 303 if (wait_for_ready(chp, ata_delay) < 0) 304 goto timeout; 305 wdccommand(chp, xfer->drive, cmd, cyl, 306 head, sect, nblks, 0); 307 /* start the DMA channel */ 308 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 309 chp->channel, xfer->drive, dma_flags); 310 /* wait for irq */ 311 goto intr; 312 } /* else not DMA */ 313 ata_bio->nblks = min(nblks, ata_bio->multi); 314 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 315 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 316 cmd = (ata_bio->flags & ATA_READ) ? 317 WDCC_READMULTI : WDCC_WRITEMULTI; 318 } else { 319 cmd = (ata_bio->flags & ATA_READ) ? 320 WDCC_READ : WDCC_WRITE; 321 } 322 /* Initiate command! */ 323 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 324 WDSD_IBM | (xfer->drive << 4)); 325 if (wait_for_ready(chp, ata_delay) < 0) 326 goto timeout; 327 wdccommand(chp, xfer->drive, cmd, cyl, 328 head, sect, nblks, 329 (ata_bio->lp->d_type == DTYPE_ST506) ? 330 ata_bio->lp->d_precompcyl / 4 : 0); 331 } else if (ata_bio->nblks > 1) { 332 /* The number of blocks in the last stretch may be smaller. */ 333 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 334 if (ata_bio->nblks > nblks) { 335 ata_bio->nblks = nblks; 336 ata_bio->nbytes = xfer->c_bcount; 337 } 338 } 339 /* If this was a write and not using DMA, push the data. */ 340 if ((ata_bio->flags & ATA_READ) == 0) { 341 if (wait_for_drq(chp, ata_delay) != 0) { 342 printf("%s:%d:%d: timeout waiting for DRQ, " 343 "st=0x%02x, err=0x%02x\n", 344 chp->wdc->sc_dev.dv_xname, chp->channel, 345 xfer->drive, chp->ch_status, chp->ch_error); 346 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 347 ata_bio->error = TIMEOUT; 348 wdc_ata_bio_done(chp, xfer); 349 return; 350 } 351 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 352 wdc_ata_bio_done(chp, xfer); 353 return; 354 } 355 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 356 if (drvp->drive_flags & DRIVE_CAP32) { 357 bus_space_write_multi_4(chp->data32iot, 358 chp->data32ioh, 0, 359 (u_int32_t *)((char *)xfer->databuf + 360 xfer->c_skip), 361 ata_bio->nbytes >> 2); 362 } else { 363 bus_space_write_multi_2(chp->cmd_iot, 364 chp->cmd_ioh, wd_data, 365 (u_int16_t *)((char *)xfer->databuf + 366 xfer->c_skip), 367 ata_bio->nbytes >> 1); 368 } 369 } else { 370 if (drvp->drive_flags & DRIVE_CAP32) { 371 bus_space_write_multi_stream_4(chp->data32iot, 372 chp->data32ioh, 0, 373 (u_int32_t *)((char *)xfer->databuf + 374 xfer->c_skip), 375 ata_bio->nbytes >> 2); 376 } else { 377 bus_space_write_multi_stream_2(chp->cmd_iot, 378 chp->cmd_ioh, wd_data, 379 (u_int16_t *)((char *)xfer->databuf + 380 xfer->c_skip), 381 ata_bio->nbytes >> 1); 382 } 383 } 384 } 385 386 intr: /* Wait for IRQ (either real or polled) */ 387 if ((ata_bio->flags & ATA_POLL) == 0) { 388 chp->ch_flags |= WDCF_IRQ_WAIT; 389 } else { 390 /* Wait for at last 400ns for status bit to be valid */ 391 delay(1); 392 wdc_ata_bio_intr(chp, xfer, 0); 393 if ((ata_bio->flags & ATA_ITSDONE) == 0) 394 goto again; 395 } 396 return; 397 timeout: 398 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 399 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 400 chp->ch_status, chp->ch_error); 401 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 402 ata_bio->error = TIMEOUT; 403 wdc_ata_bio_done(chp, xfer); 404 return; 405 } 406 407 int 408 wdc_ata_bio_intr(chp, xfer, irq) 409 struct channel_softc *chp; 410 struct wdc_xfer *xfer; 411 int irq; 412 { 413 struct ata_bio *ata_bio = xfer->cmd; 414 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 415 int drv_err; 416 int dma_flags = 0; 417 418 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 419 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 420 DEBUG_INTR | DEBUG_XFERS); 421 422 423 /* Is it not a transfer, but a control operation? */ 424 if (drvp->state < READY) { 425 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 426 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 427 drvp->state); 428 panic("wdc_ata_bio_intr: bad state\n"); 429 } 430 431 if (xfer->c_flags & C_DMA) { 432 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 433 dma_flags |= (ata_bio->flags & ATA_POLL) ? WDC_DMA_POLL : 0; 434 } 435 436 /* 437 * if we missed an interrupt in a PIO transfer, reset and restart. 438 * Don't try to continue transfer, we may have missed cycles. 439 */ 440 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 441 ata_bio->error = TIMEOUT; 442 wdc_ata_bio_done(chp, xfer); 443 return 1; 444 } 445 446 /* Ack interrupt done by wait_for_unbusy */ 447 if (wait_for_unbusy(chp, 448 (irq == 0) ? ATA_DELAY : 0) < 0) { 449 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 450 return 0; /* IRQ was not for us */ 451 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 452 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 453 xfer->c_bcount, xfer->c_skip); 454 /* if we were using DMA, turn off DMA channel */ 455 if (xfer->c_flags & C_DMA) { 456 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 457 chp->channel, xfer->drive, dma_flags); 458 ata_dmaerr(drvp); 459 } 460 ata_bio->error = TIMEOUT; 461 wdc_ata_bio_done(chp, xfer); 462 return 1; 463 } 464 465 drv_err = wdc_ata_err(drvp, ata_bio); 466 467 /* If we were using DMA, Turn off the DMA channel and check for error */ 468 if (xfer->c_flags & C_DMA) { 469 if (ata_bio->flags & ATA_POLL) { 470 /* 471 * IDE drives deassert WDCS_BSY before transfer is 472 * complete when using DMA. Polling for DRQ to deassert 473 * is not enouth DRQ is not required to be 474 * asserted for DMA transfers, so poll for DRDY. 475 */ 476 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 477 ATA_DELAY) < 0) { 478 printf("%s:%d:%d: polled transfer timed out " 479 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 480 chp->channel, xfer->drive, chp->ch_status); 481 ata_bio->error = TIMEOUT; 482 drv_err = WDC_ATA_ERR; 483 } 484 } 485 if ((*chp->wdc->dma_finish)(chp->wdc->dma_arg, 486 chp->channel, xfer->drive, dma_flags) != 0) { 487 if (drv_err != WDC_ATA_ERR) { 488 ata_bio->error = ERR_DMA; 489 drv_err = WDC_ATA_ERR; 490 } 491 } 492 if (chp->ch_status & WDCS_DRQ) { 493 if (drv_err != WDC_ATA_ERR) { 494 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 495 chp->wdc->sc_dev.dv_xname, chp->channel, 496 xfer->drive, chp->ch_status); 497 ata_bio->error = TIMEOUT; 498 drv_err = WDC_ATA_ERR; 499 } 500 } 501 if (drv_err != WDC_ATA_ERR) 502 goto end; 503 ata_dmaerr(drvp); 504 } 505 506 /* if we had an error, end */ 507 if (drv_err == WDC_ATA_ERR) { 508 wdc_ata_bio_done(chp, xfer); 509 return 1; 510 } 511 512 /* If this was a read and not using DMA, fetch the data. */ 513 if ((ata_bio->flags & ATA_READ) != 0) { 514 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 515 printf("%s:%d:%d: read intr before drq\n", 516 chp->wdc->sc_dev.dv_xname, chp->channel, 517 xfer->drive); 518 ata_bio->error = TIMEOUT; 519 wdc_ata_bio_done(chp, xfer); 520 return 1; 521 } 522 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 523 if (drvp->drive_flags & DRIVE_CAP32) { 524 bus_space_read_multi_4(chp->data32iot, 525 chp->data32ioh, 0, 526 (u_int32_t *)((char *)xfer->databuf + 527 xfer->c_skip), 528 ata_bio->nbytes >> 2); 529 } else { 530 bus_space_read_multi_2(chp->cmd_iot, 531 chp->cmd_ioh, wd_data, 532 (u_int16_t *)((char *)xfer->databuf + 533 xfer->c_skip), 534 ata_bio->nbytes >> 1); 535 } 536 } else { 537 if (drvp->drive_flags & DRIVE_CAP32) { 538 bus_space_read_multi_stream_4(chp->data32iot, 539 chp->data32ioh, 0, 540 (u_int32_t *)((char *)xfer->databuf + 541 xfer->c_skip), 542 ata_bio->nbytes >> 2); 543 } else { 544 bus_space_read_multi_stream_2(chp->cmd_iot, 545 chp->cmd_ioh, wd_data, 546 (u_int16_t *)((char *)xfer->databuf + 547 xfer->c_skip), 548 ata_bio->nbytes >> 1); 549 } 550 } 551 } 552 553 end: 554 ata_bio->blkno += ata_bio->nblks; 555 ata_bio->blkdone += ata_bio->nblks; 556 xfer->c_skip += ata_bio->nbytes; 557 xfer->c_bcount -= ata_bio->nbytes; 558 /* See if this transfer is complete. */ 559 if (xfer->c_bcount > 0) { 560 if ((ata_bio->flags & ATA_POLL) == 0) { 561 /* Start the next operation */ 562 _wdc_ata_bio_start(chp, xfer); 563 } else { 564 /* Let _wdc_ata_bio_start do the loop */ 565 return 1; 566 } 567 } else { /* Done with this transfer */ 568 ata_bio->error = NOERROR; 569 wdc_ata_bio_done(chp, xfer); 570 } 571 return 1; 572 } 573 574 void 575 wdc_ata_kill_pending(drvp) 576 struct ata_drive_datas *drvp; 577 { 578 struct channel_softc *chp = drvp->chnl_softc; 579 580 wdc_kill_pending(chp); 581 } 582 583 void 584 wdc_ata_bio_kill_xfer(chp, xfer) 585 struct channel_softc *chp; 586 struct wdc_xfer *xfer; 587 { 588 struct ata_bio *ata_bio = xfer->cmd; 589 int drive = xfer->drive; 590 591 untimeout(wdctimeout, chp); 592 /* remove this command from xfer queue */ 593 wdc_free_xfer(chp, xfer); 594 595 ata_bio->flags |= ATA_ITSDONE; 596 ata_bio->error = ERR_NODEV; 597 ata_bio->r_error = WDCE_ABRT; 598 if ((ata_bio->flags & ATA_POLL) == 0) { 599 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 600 wddone(chp->ch_drive[drive].drv_softc); 601 } 602 } 603 604 void 605 wdc_ata_bio_done(chp, xfer) 606 struct channel_softc *chp; 607 struct wdc_xfer *xfer; 608 { 609 struct ata_bio *ata_bio = xfer->cmd; 610 int drive = xfer->drive; 611 612 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 613 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 614 (u_int)xfer->c_flags), 615 DEBUG_XFERS); 616 617 untimeout(wdctimeout, chp); 618 619 /* feed back residual bcount to our caller */ 620 ata_bio->bcount = xfer->c_bcount; 621 622 /* remove this command from xfer queue */ 623 wdc_free_xfer(chp, xfer); 624 625 ata_bio->flags |= ATA_ITSDONE; 626 if ((ata_bio->flags & ATA_POLL) == 0) { 627 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 628 wddone(chp->ch_drive[drive].drv_softc); 629 } 630 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 631 chp->ch_flags), DEBUG_XFERS); 632 wdcstart(chp); 633 } 634 635 /* 636 * Implement operations needed before read/write. 637 */ 638 int 639 wdc_ata_ctrl_intr(chp, xfer, irq) 640 struct channel_softc *chp; 641 struct wdc_xfer *xfer; 642 int irq; 643 { 644 struct ata_bio *ata_bio = xfer->cmd; 645 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 646 char *errstring = NULL; 647 int delay = (irq == 0) ? ATA_DELAY : 0; 648 649 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 650 DEBUG_FUNCS); 651 652 again: 653 switch (drvp->state) { 654 case RECAL: /* Should not be in this state here */ 655 panic("wdc_ata_ctrl_intr: state==RECAL"); 656 break; 657 658 case RECAL_WAIT: 659 errstring = "recal"; 660 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 661 goto timeout; 662 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 663 goto error; 664 /* fall through */ 665 666 case PIOMODE: 667 /* Don't try to set modes if controller can't be adjusted */ 668 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 669 goto geometry; 670 /* Also don't try if the drive didn't report its mode */ 671 if ((drvp->drive_flags & DRIVE_MODE) == 0) 672 goto geometry; 673 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 674 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 675 drvp->state = PIOMODE_WAIT; 676 break; 677 678 case PIOMODE_WAIT: 679 errstring = "piomode"; 680 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 681 goto timeout; 682 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 683 goto error; 684 /* fall through */ 685 686 case DMAMODE: 687 if (drvp->drive_flags & DRIVE_UDMA) { 688 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 689 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 690 } else if (drvp->drive_flags & DRIVE_DMA) { 691 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 692 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 693 } else { 694 goto geometry; 695 } 696 drvp->state = DMAMODE_WAIT; 697 break; 698 case DMAMODE_WAIT: 699 errstring = "dmamode"; 700 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 701 goto timeout; 702 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 703 goto error; 704 /* fall through */ 705 706 case GEOMETRY: 707 geometry: 708 if (ata_bio->flags & ATA_LBA) 709 goto multimode; 710 wdccommand(chp, xfer->drive, WDCC_IDP, 711 ata_bio->lp->d_ncylinders, 712 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 713 (ata_bio->lp->d_type == DTYPE_ST506) ? 714 ata_bio->lp->d_precompcyl / 4 : 0); 715 drvp->state = GEOMETRY_WAIT; 716 break; 717 718 case GEOMETRY_WAIT: 719 errstring = "geometry"; 720 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 721 goto timeout; 722 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 723 goto error; 724 /* fall through */ 725 726 case MULTIMODE: 727 multimode: 728 if (ata_bio->multi == 1) 729 goto ready; 730 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 731 ata_bio->multi, 0); 732 drvp->state = MULTIMODE_WAIT; 733 break; 734 735 case MULTIMODE_WAIT: 736 errstring = "setmulti"; 737 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 738 goto timeout; 739 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 740 goto error; 741 /* fall through */ 742 743 case READY: 744 ready: 745 drvp->state = READY; 746 /* 747 * The drive is usable now 748 */ 749 xfer->c_intr = wdc_ata_bio_intr; 750 _wdc_ata_bio_start(chp, xfer); 751 return 1; 752 } 753 754 if ((ata_bio->flags & ATA_POLL) == 0) { 755 chp->ch_flags |= WDCF_IRQ_WAIT; 756 } else { 757 goto again; 758 } 759 return 1; 760 761 timeout: 762 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 763 return 0; /* IRQ was not for us */ 764 } 765 printf("%s:%d:%d: %s timed out\n", 766 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 767 ata_bio->error = TIMEOUT; 768 drvp->state = 0; 769 wdc_ata_bio_done(chp, xfer); 770 return 0; 771 error: 772 printf("%s:%d:%d: %s ", 773 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 774 errstring); 775 if (chp->ch_status & WDCS_DWF) { 776 printf("drive fault\n"); 777 ata_bio->error = ERR_DF; 778 } else { 779 printf("error (%x)\n", chp->ch_error); 780 ata_bio->r_error = chp->ch_error; 781 ata_bio->error = ERROR; 782 } 783 drvp->state = 0; 784 wdc_ata_bio_done(chp, xfer); 785 return 1; 786 } 787 788 int 789 wdc_ata_err(drvp, ata_bio) 790 struct ata_drive_datas *drvp; 791 struct ata_bio *ata_bio; 792 { 793 struct channel_softc *chp = drvp->chnl_softc; 794 ata_bio->error = 0; 795 if (chp->ch_status & WDCS_BSY) { 796 ata_bio->error = TIMEOUT; 797 return WDC_ATA_ERR; 798 } 799 800 if (chp->ch_status & WDCS_DWF) { 801 ata_bio->error = ERR_DF; 802 return WDC_ATA_ERR; 803 } 804 805 if (chp->ch_status & WDCS_ERR) { 806 ata_bio->error = ERROR; 807 ata_bio->r_error = chp->ch_error; 808 if (drvp->drive_flags & DRIVE_UDMA && 809 (ata_bio->r_error & WDCE_CRC)) { 810 /* 811 * Record the CRC error, to avoid downgrading to 812 * multiword DMA 813 */ 814 drvp->drive_flags |= DRIVE_DMAERR; 815 } 816 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 817 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 818 return WDC_ATA_ERR; 819 return WDC_ATA_NOERR; 820 } 821 822 if (chp->ch_status & WDCS_CORR) 823 ata_bio->flags |= ATA_CORR; 824 return WDC_ATA_NOERR; 825 } 826 827 int 828 wdc_ata_addref(drvp) 829 struct ata_drive_datas *drvp; 830 { 831 struct channel_softc *chp = drvp->chnl_softc; 832 833 return (wdc_addref(chp)); 834 } 835 836 void 837 wdc_ata_delref(drvp) 838 struct ata_drive_datas *drvp; 839 { 840 struct channel_softc *chp = drvp->chnl_softc; 841 842 wdc_delref(chp); 843 } 844
Indexes created Mon Sep 29 21:09:56 GMT 2025