ata_wdc.c revision 1.26
1 /* $NetBSD: ata_wdc.c,v 1.26 2000/04/01 14:32:24 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 /*- 37 * Copyright (c) 1998 The NetBSD Foundation, Inc. 38 * All rights reserved. 39 * 40 * This code is derived from software contributed to The NetBSD Foundation 41 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the NetBSD 54 * Foundation, Inc. and its contributors. 55 * 4. Neither the name of The NetBSD Foundation nor the names of its 56 * contributors may be used to endorse or promote products derived 57 * from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 60 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 61 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 62 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 63 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 * POSSIBILITY OF SUCH DAMAGE. 70 */ 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 121 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 122 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 123 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 124 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 125 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 128 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 129 130 /* 131 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 132 * WDC_TRY_AGAIN. Must be called at splio(). 133 */ 134 int 135 wdc_ata_bio(drvp, ata_bio) 136 struct ata_drive_datas *drvp; 137 struct ata_bio *ata_bio; 138 { 139 struct wdc_xfer *xfer; 140 struct channel_softc *chp = drvp->chnl_softc; 141 142 xfer = wdc_get_xfer(WDC_NOSLEEP); 143 if (xfer == NULL) 144 return WDC_TRY_AGAIN; 145 if (ata_bio->flags & ATA_POLL) 146 xfer->c_flags |= C_POLL; 147 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 148 (ata_bio->flags & ATA_SINGLE) == 0) 149 xfer->c_flags |= C_DMA; 150 xfer->drive = drvp->drive; 151 xfer->cmd = ata_bio; 152 xfer->databuf = ata_bio->databuf; 153 xfer->c_bcount = ata_bio->bcount; 154 xfer->c_start = wdc_ata_bio_start; 155 xfer->c_intr = wdc_ata_bio_intr; 156 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 157 wdc_exec_xfer(chp, xfer); 158 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 159 } 160 161 void 162 wdc_ata_bio_start(chp, xfer) 163 struct channel_softc *chp; 164 struct wdc_xfer *xfer; 165 { 166 struct ata_bio *ata_bio = xfer->cmd; 167 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 168 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 169 DEBUG_XFERS); 170 171 /* start timeout machinery */ 172 if ((ata_bio->flags & ATA_POLL) == 0) 173 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 174 wdctimeout, chp); 175 _wdc_ata_bio_start(chp, xfer); 176 } 177 178 void 179 _wdc_ata_bio_start(chp, xfer) 180 struct channel_softc *chp; 181 struct wdc_xfer *xfer; 182 { 183 struct ata_bio *ata_bio = xfer->cmd; 184 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 185 u_int16_t cyl; 186 u_int8_t head, sect, cmd = 0; 187 int nblks; 188 int ata_delay; 189 int dma_flags = 0; 190 191 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 192 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 193 DEBUG_INTR | DEBUG_XFERS); 194 /* Do control operations specially. */ 195 if (drvp->state < READY) { 196 /* 197 * Actually, we want to be careful not to mess with the control 198 * state if the device is currently busy, but we can assume 199 * that we never get to this point if that's the case. 200 */ 201 /* at this point, we should only be in RECAL state */ 202 if (drvp->state != RESET) { 203 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 204 chp->wdc->sc_dev.dv_xname, chp->channel, 205 xfer->drive, drvp->state); 206 panic("_wdc_ata_bio_start: bad state"); 207 } 208 drvp->state = RECAL; 209 xfer->c_intr = wdc_ata_ctrl_intr; 210 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 211 WDSD_IBM | (xfer->drive << 4)); 212 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 213 goto timeout; 214 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 215 drvp->state = RECAL_WAIT; 216 if ((ata_bio->flags & ATA_POLL) == 0) { 217 chp->ch_flags |= WDCF_IRQ_WAIT; 218 } else { 219 /* Wait for at last 400ns for status bit to be valid */ 220 DELAY(1); 221 wdc_ata_ctrl_intr(chp, xfer, 0); 222 } 223 return; 224 } 225 226 if (xfer->c_flags & C_DMA) { 227 if (drvp->n_xfers <= NXFER) 228 drvp->n_xfers++; 229 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 230 } 231 if (ata_bio->flags & ATA_SINGLE) 232 ata_delay = ATA_DELAY; 233 else 234 ata_delay = ATA_DELAY; 235 again: 236 /* 237 * 238 * When starting a multi-sector transfer, or doing single-sector 239 * transfers... 240 */ 241 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 242 if (ata_bio->flags & ATA_SINGLE) 243 nblks = 1; 244 else 245 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 246 /* Check for bad sectors and adjust transfer, if necessary. */ 247 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 248 long blkdiff; 249 int i; 250 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 251 i++) { 252 blkdiff -= ata_bio->blkno; 253 if (blkdiff < 0) 254 continue; 255 if (blkdiff == 0) { 256 /* Replace current block of transfer. */ 257 ata_bio->blkno = 258 ata_bio->lp->d_secperunit - 259 ata_bio->lp->d_nsectors - i - 1; 260 } 261 if (blkdiff < nblks) { 262 /* Bad block inside transfer. */ 263 ata_bio->flags |= ATA_SINGLE; 264 nblks = 1; 265 } 266 break; 267 } 268 /* Transfer is okay now. */ 269 } 270 if (ata_bio->flags & ATA_LBA) { 271 sect = (ata_bio->blkno >> 0) & 0xff; 272 cyl = (ata_bio->blkno >> 8) & 0xffff; 273 head = (ata_bio->blkno >> 24) & 0x0f; 274 head |= WDSD_LBA; 275 } else { 276 int blkno = ata_bio->blkno; 277 sect = blkno % ata_bio->lp->d_nsectors; 278 sect++; /* Sectors begin with 1, not 0. */ 279 blkno /= ata_bio->lp->d_nsectors; 280 head = blkno % ata_bio->lp->d_ntracks; 281 blkno /= ata_bio->lp->d_ntracks; 282 cyl = blkno; 283 head |= WDSD_CHS; 284 } 285 if (xfer->c_flags & C_DMA) { 286 ata_bio->nblks = nblks; 287 ata_bio->nbytes = xfer->c_bcount; 288 cmd = (ata_bio->flags & ATA_READ) ? 289 WDCC_READDMA : WDCC_WRITEDMA; 290 /* Init the DMA channel. */ 291 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 292 chp->channel, xfer->drive, 293 (char *)xfer->databuf + xfer->c_skip, 294 ata_bio->nbytes, dma_flags) != 0) { 295 ata_bio->error = ERR_DMA; 296 ata_bio->r_error = 0; 297 wdc_ata_bio_done(chp, xfer); 298 return; 299 } 300 /* Initiate command */ 301 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 302 WDSD_IBM | (xfer->drive << 4)); 303 if (wait_for_ready(chp, ata_delay) < 0) 304 goto timeout; 305 wdccommand(chp, xfer->drive, cmd, cyl, 306 head, sect, nblks, 0); 307 /* start the DMA channel */ 308 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 309 chp->channel, xfer->drive); 310 chp->ch_flags |= WDCF_DMA_WAIT; 311 /* wait for irq */ 312 goto intr; 313 } /* else not DMA */ 314 ata_bio->nblks = min(nblks, ata_bio->multi); 315 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 316 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 317 cmd = (ata_bio->flags & ATA_READ) ? 318 WDCC_READMULTI : WDCC_WRITEMULTI; 319 } else { 320 cmd = (ata_bio->flags & ATA_READ) ? 321 WDCC_READ : WDCC_WRITE; 322 } 323 /* Initiate command! */ 324 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 325 WDSD_IBM | (xfer->drive << 4)); 326 if (wait_for_ready(chp, ata_delay) < 0) 327 goto timeout; 328 wdccommand(chp, xfer->drive, cmd, cyl, 329 head, sect, nblks, 330 (ata_bio->lp->d_type == DTYPE_ST506) ? 331 ata_bio->lp->d_precompcyl / 4 : 0); 332 } else if (ata_bio->nblks > 1) { 333 /* The number of blocks in the last stretch may be smaller. */ 334 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 335 if (ata_bio->nblks > nblks) { 336 ata_bio->nblks = nblks; 337 ata_bio->nbytes = xfer->c_bcount; 338 } 339 } 340 /* If this was a write and not using DMA, push the data. */ 341 if ((ata_bio->flags & ATA_READ) == 0) { 342 if (wait_for_drq(chp, ata_delay) != 0) { 343 printf("%s:%d:%d: timeout waiting for DRQ, " 344 "st=0x%02x, err=0x%02x\n", 345 chp->wdc->sc_dev.dv_xname, chp->channel, 346 xfer->drive, chp->ch_status, chp->ch_error); 347 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 348 ata_bio->error = TIMEOUT; 349 wdc_ata_bio_done(chp, xfer); 350 return; 351 } 352 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 353 wdc_ata_bio_done(chp, xfer); 354 return; 355 } 356 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 357 if (drvp->drive_flags & DRIVE_CAP32) { 358 bus_space_write_multi_4(chp->data32iot, 359 chp->data32ioh, 0, 360 (u_int32_t *)((char *)xfer->databuf + 361 xfer->c_skip), 362 ata_bio->nbytes >> 2); 363 } else { 364 bus_space_write_multi_2(chp->cmd_iot, 365 chp->cmd_ioh, wd_data, 366 (u_int16_t *)((char *)xfer->databuf + 367 xfer->c_skip), 368 ata_bio->nbytes >> 1); 369 } 370 } else { 371 if (drvp->drive_flags & DRIVE_CAP32) { 372 bus_space_write_multi_stream_4(chp->data32iot, 373 chp->data32ioh, 0, 374 (u_int32_t *)((char *)xfer->databuf + 375 xfer->c_skip), 376 ata_bio->nbytes >> 2); 377 } else { 378 bus_space_write_multi_stream_2(chp->cmd_iot, 379 chp->cmd_ioh, wd_data, 380 (u_int16_t *)((char *)xfer->databuf + 381 xfer->c_skip), 382 ata_bio->nbytes >> 1); 383 } 384 } 385 } 386 387 intr: /* Wait for IRQ (either real or polled) */ 388 if ((ata_bio->flags & ATA_POLL) == 0) { 389 chp->ch_flags |= WDCF_IRQ_WAIT; 390 } else { 391 /* Wait for at last 400ns for status bit to be valid */ 392 delay(1); 393 if (chp->ch_flags & WDCF_DMA_WAIT) { 394 wdc_dmawait(chp, xfer, ATA_DELAY); 395 chp->ch_flags &= ~WDCF_DMA_WAIT; 396 } 397 wdc_ata_bio_intr(chp, xfer, 0); 398 if ((ata_bio->flags & ATA_ITSDONE) == 0) 399 goto again; 400 } 401 return; 402 timeout: 403 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 404 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 405 chp->ch_status, chp->ch_error); 406 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 407 ata_bio->error = TIMEOUT; 408 wdc_ata_bio_done(chp, xfer); 409 return; 410 } 411 412 int 413 wdc_ata_bio_intr(chp, xfer, irq) 414 struct channel_softc *chp; 415 struct wdc_xfer *xfer; 416 int irq; 417 { 418 struct ata_bio *ata_bio = xfer->cmd; 419 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 420 int drv_err; 421 422 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 423 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 424 DEBUG_INTR | DEBUG_XFERS); 425 426 427 /* Is it not a transfer, but a control operation? */ 428 if (drvp->state < READY) { 429 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 430 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 431 drvp->state); 432 panic("wdc_ata_bio_intr: bad state\n"); 433 } 434 435 /* 436 * if we missed an interrupt in a PIO transfer, reset and restart. 437 * Don't try to continue transfer, we may have missed cycles. 438 */ 439 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 440 ata_bio->error = TIMEOUT; 441 wdc_ata_bio_done(chp, xfer); 442 return 1; 443 } 444 445 /* Ack interrupt done by wait_for_unbusy */ 446 if (wait_for_unbusy(chp, 447 (irq == 0) ? ATA_DELAY : 0) < 0) { 448 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 449 return 0; /* IRQ was not for us */ 450 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 451 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 452 xfer->c_bcount, xfer->c_skip); 453 /* if we were using DMA, flag a DMA error */ 454 if (xfer->c_flags & C_DMA) { 455 ata_dmaerr(drvp); 456 } 457 ata_bio->error = TIMEOUT; 458 wdc_ata_bio_done(chp, xfer); 459 return 1; 460 } 461 462 drv_err = wdc_ata_err(drvp, ata_bio); 463 464 /* If we were using DMA, Turn off the DMA channel and check for error */ 465 if (xfer->c_flags & C_DMA) { 466 if (ata_bio->flags & ATA_POLL) { 467 /* 468 * IDE drives deassert WDCS_BSY before transfer is 469 * complete when using DMA. Polling for DRQ to deassert 470 * is not enouth DRQ is not required to be 471 * asserted for DMA transfers, so poll for DRDY. 472 */ 473 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 474 ATA_DELAY) < 0) { 475 printf("%s:%d:%d: polled transfer timed out " 476 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 477 chp->channel, xfer->drive, chp->ch_status); 478 ata_bio->error = TIMEOUT; 479 drv_err = WDC_ATA_ERR; 480 } 481 } 482 if (chp->wdc->dma_status != 0) { 483 if (drv_err != WDC_ATA_ERR) { 484 ata_bio->error = ERR_DMA; 485 drv_err = WDC_ATA_ERR; 486 } 487 } 488 if (chp->ch_status & WDCS_DRQ) { 489 if (drv_err != WDC_ATA_ERR) { 490 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 491 chp->wdc->sc_dev.dv_xname, chp->channel, 492 xfer->drive, chp->ch_status); 493 ata_bio->error = TIMEOUT; 494 drv_err = WDC_ATA_ERR; 495 } 496 } 497 if (drv_err != WDC_ATA_ERR) 498 goto end; 499 ata_dmaerr(drvp); 500 } 501 502 /* if we had an error, end */ 503 if (drv_err == WDC_ATA_ERR) { 504 wdc_ata_bio_done(chp, xfer); 505 return 1; 506 } 507 508 /* If this was a read and not using DMA, fetch the data. */ 509 if ((ata_bio->flags & ATA_READ) != 0) { 510 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 511 printf("%s:%d:%d: read intr before drq\n", 512 chp->wdc->sc_dev.dv_xname, chp->channel, 513 xfer->drive); 514 ata_bio->error = TIMEOUT; 515 wdc_ata_bio_done(chp, xfer); 516 return 1; 517 } 518 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 519 if (drvp->drive_flags & DRIVE_CAP32) { 520 bus_space_read_multi_4(chp->data32iot, 521 chp->data32ioh, 0, 522 (u_int32_t *)((char *)xfer->databuf + 523 xfer->c_skip), 524 ata_bio->nbytes >> 2); 525 } else { 526 bus_space_read_multi_2(chp->cmd_iot, 527 chp->cmd_ioh, wd_data, 528 (u_int16_t *)((char *)xfer->databuf + 529 xfer->c_skip), 530 ata_bio->nbytes >> 1); 531 } 532 } else { 533 if (drvp->drive_flags & DRIVE_CAP32) { 534 bus_space_read_multi_stream_4(chp->data32iot, 535 chp->data32ioh, 0, 536 (u_int32_t *)((char *)xfer->databuf + 537 xfer->c_skip), 538 ata_bio->nbytes >> 2); 539 } else { 540 bus_space_read_multi_stream_2(chp->cmd_iot, 541 chp->cmd_ioh, wd_data, 542 (u_int16_t *)((char *)xfer->databuf + 543 xfer->c_skip), 544 ata_bio->nbytes >> 1); 545 } 546 } 547 } 548 549 end: 550 ata_bio->blkno += ata_bio->nblks; 551 ata_bio->blkdone += ata_bio->nblks; 552 xfer->c_skip += ata_bio->nbytes; 553 xfer->c_bcount -= ata_bio->nbytes; 554 /* See if this transfer is complete. */ 555 if (xfer->c_bcount > 0) { 556 if ((ata_bio->flags & ATA_POLL) == 0) { 557 /* Start the next operation */ 558 _wdc_ata_bio_start(chp, xfer); 559 } else { 560 /* Let _wdc_ata_bio_start do the loop */ 561 return 1; 562 } 563 } else { /* Done with this transfer */ 564 ata_bio->error = NOERROR; 565 wdc_ata_bio_done(chp, xfer); 566 } 567 return 1; 568 } 569 570 void 571 wdc_ata_kill_pending(drvp) 572 struct ata_drive_datas *drvp; 573 { 574 struct channel_softc *chp = drvp->chnl_softc; 575 576 wdc_kill_pending(chp); 577 } 578 579 void 580 wdc_ata_bio_kill_xfer(chp, xfer) 581 struct channel_softc *chp; 582 struct wdc_xfer *xfer; 583 { 584 struct ata_bio *ata_bio = xfer->cmd; 585 int drive = xfer->drive; 586 587 callout_stop(&chp->ch_callout); 588 /* remove this command from xfer queue */ 589 wdc_free_xfer(chp, xfer); 590 591 ata_bio->flags |= ATA_ITSDONE; 592 ata_bio->error = ERR_NODEV; 593 ata_bio->r_error = WDCE_ABRT; 594 if ((ata_bio->flags & ATA_POLL) == 0) { 595 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 596 wddone(chp->ch_drive[drive].drv_softc); 597 } 598 } 599 600 void 601 wdc_ata_bio_done(chp, xfer) 602 struct channel_softc *chp; 603 struct wdc_xfer *xfer; 604 { 605 struct ata_bio *ata_bio = xfer->cmd; 606 int drive = xfer->drive; 607 608 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 609 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 610 (u_int)xfer->c_flags), 611 DEBUG_XFERS); 612 613 callout_stop(&chp->ch_callout); 614 615 /* feed back residual bcount to our caller */ 616 ata_bio->bcount = xfer->c_bcount; 617 618 /* remove this command from xfer queue */ 619 wdc_free_xfer(chp, xfer); 620 621 ata_bio->flags |= ATA_ITSDONE; 622 if ((ata_bio->flags & ATA_POLL) == 0) { 623 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 624 wddone(chp->ch_drive[drive].drv_softc); 625 } 626 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 627 chp->ch_flags), DEBUG_XFERS); 628 wdcstart(chp); 629 } 630 631 /* 632 * Implement operations needed before read/write. 633 */ 634 int 635 wdc_ata_ctrl_intr(chp, xfer, irq) 636 struct channel_softc *chp; 637 struct wdc_xfer *xfer; 638 int irq; 639 { 640 struct ata_bio *ata_bio = xfer->cmd; 641 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 642 char *errstring = NULL; 643 int delay = (irq == 0) ? ATA_DELAY : 0; 644 645 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 646 DEBUG_FUNCS); 647 648 again: 649 switch (drvp->state) { 650 case RECAL: /* Should not be in this state here */ 651 panic("wdc_ata_ctrl_intr: state==RECAL"); 652 break; 653 654 case RECAL_WAIT: 655 errstring = "recal"; 656 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 657 goto timeout; 658 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 659 goto error; 660 /* fall through */ 661 662 case PIOMODE: 663 /* Don't try to set modes if controller can't be adjusted */ 664 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 665 goto geometry; 666 /* Also don't try if the drive didn't report its mode */ 667 if ((drvp->drive_flags & DRIVE_MODE) == 0) 668 goto geometry; 669 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 670 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 671 drvp->state = PIOMODE_WAIT; 672 break; 673 674 case PIOMODE_WAIT: 675 errstring = "piomode"; 676 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 677 goto timeout; 678 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 679 goto error; 680 /* fall through */ 681 682 case DMAMODE: 683 if (drvp->drive_flags & DRIVE_UDMA) { 684 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 685 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 686 } else if (drvp->drive_flags & DRIVE_DMA) { 687 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 688 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 689 } else { 690 goto geometry; 691 } 692 drvp->state = DMAMODE_WAIT; 693 break; 694 case DMAMODE_WAIT: 695 errstring = "dmamode"; 696 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 697 goto timeout; 698 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 699 goto error; 700 /* fall through */ 701 702 case GEOMETRY: 703 geometry: 704 if (ata_bio->flags & ATA_LBA) 705 goto multimode; 706 wdccommand(chp, xfer->drive, WDCC_IDP, 707 ata_bio->lp->d_ncylinders, 708 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 709 (ata_bio->lp->d_type == DTYPE_ST506) ? 710 ata_bio->lp->d_precompcyl / 4 : 0); 711 drvp->state = GEOMETRY_WAIT; 712 break; 713 714 case GEOMETRY_WAIT: 715 errstring = "geometry"; 716 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 717 goto timeout; 718 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 719 goto error; 720 /* fall through */ 721 722 case MULTIMODE: 723 multimode: 724 if (ata_bio->multi == 1) 725 goto ready; 726 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 727 ata_bio->multi, 0); 728 drvp->state = MULTIMODE_WAIT; 729 break; 730 731 case MULTIMODE_WAIT: 732 errstring = "setmulti"; 733 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 734 goto timeout; 735 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 736 goto error; 737 /* fall through */ 738 739 case READY: 740 ready: 741 drvp->state = READY; 742 /* 743 * The drive is usable now 744 */ 745 xfer->c_intr = wdc_ata_bio_intr; 746 _wdc_ata_bio_start(chp, xfer); 747 return 1; 748 } 749 750 if ((ata_bio->flags & ATA_POLL) == 0) { 751 chp->ch_flags |= WDCF_IRQ_WAIT; 752 } else { 753 goto again; 754 } 755 return 1; 756 757 timeout: 758 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 759 return 0; /* IRQ was not for us */ 760 } 761 printf("%s:%d:%d: %s timed out\n", 762 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 763 ata_bio->error = TIMEOUT; 764 drvp->state = 0; 765 wdc_ata_bio_done(chp, xfer); 766 return 0; 767 error: 768 printf("%s:%d:%d: %s ", 769 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 770 errstring); 771 if (chp->ch_status & WDCS_DWF) { 772 printf("drive fault\n"); 773 ata_bio->error = ERR_DF; 774 } else { 775 printf("error (%x)\n", chp->ch_error); 776 ata_bio->r_error = chp->ch_error; 777 ata_bio->error = ERROR; 778 } 779 drvp->state = 0; 780 wdc_ata_bio_done(chp, xfer); 781 return 1; 782 } 783 784 int 785 wdc_ata_err(drvp, ata_bio) 786 struct ata_drive_datas *drvp; 787 struct ata_bio *ata_bio; 788 { 789 struct channel_softc *chp = drvp->chnl_softc; 790 ata_bio->error = 0; 791 if (chp->ch_status & WDCS_BSY) { 792 ata_bio->error = TIMEOUT; 793 return WDC_ATA_ERR; 794 } 795 796 if (chp->ch_status & WDCS_DWF) { 797 ata_bio->error = ERR_DF; 798 return WDC_ATA_ERR; 799 } 800 801 if (chp->ch_status & WDCS_ERR) { 802 ata_bio->error = ERROR; 803 ata_bio->r_error = chp->ch_error; 804 if (drvp->drive_flags & DRIVE_UDMA && 805 (ata_bio->r_error & WDCE_CRC)) { 806 /* 807 * Record the CRC error, to avoid downgrading to 808 * multiword DMA 809 */ 810 drvp->drive_flags |= DRIVE_DMAERR; 811 } 812 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 813 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 814 return WDC_ATA_ERR; 815 return WDC_ATA_NOERR; 816 } 817 818 if (chp->ch_status & WDCS_CORR) 819 ata_bio->flags |= ATA_CORR; 820 return WDC_ATA_NOERR; 821 } 822 823 int 824 wdc_ata_addref(drvp) 825 struct ata_drive_datas *drvp; 826 { 827 struct channel_softc *chp = drvp->chnl_softc; 828 829 return (wdc_addref(chp)); 830 } 831 832 void 833 wdc_ata_delref(drvp) 834 struct ata_drive_datas *drvp; 835 { 836 struct channel_softc *chp = drvp->chnl_softc; 837 838 wdc_delref(chp); 839 } 840
Indexes created Mon Sep 29 03:10:08 GMT 2025