ata_wdc.c revision 1.27
1 /* $NetBSD: ata_wdc.c,v 1.27 2000/05/15 08:32:07 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 /*- 36 * Copyright (c) 1998 The NetBSD Foundation, Inc. 37 * All rights reserved. 38 * 39 * This code is derived from software contributed to The NetBSD Foundation 40 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the NetBSD 53 * Foundation, Inc. and its contributors. 54 * 4. Neither the name of The NetBSD Foundation nor the names of its 55 * contributors may be used to endorse or promote products derived 56 * from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 #include <dev/ata/wdvar.h> 101 102 #define DEBUG_INTR 0x01 103 #define DEBUG_XFERS 0x02 104 #define DEBUG_STATUS 0x04 105 #define DEBUG_FUNCS 0x08 106 #define DEBUG_PROBE 0x10 107 #ifdef WDCDEBUG 108 int wdcdebug_wd_mask = 0; 109 #define WDCDEBUG_PRINT(args, level) \ 110 if (wdcdebug_wd_mask & (level)) \ 111 printf args 112 #else 113 #define WDCDEBUG_PRINT(args, level) 114 #endif 115 116 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 117 118 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 119 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 121 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 122 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 123 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 129 /* 130 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 131 * WDC_TRY_AGAIN. Must be called at splio(). 132 */ 133 int 134 wdc_ata_bio(drvp, ata_bio) 135 struct ata_drive_datas *drvp; 136 struct ata_bio *ata_bio; 137 { 138 struct wdc_xfer *xfer; 139 struct channel_softc *chp = drvp->chnl_softc; 140 141 xfer = wdc_get_xfer(WDC_NOSLEEP); 142 if (xfer == NULL) 143 return WDC_TRY_AGAIN; 144 if (ata_bio->flags & ATA_POLL) 145 xfer->c_flags |= C_POLL; 146 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 147 (ata_bio->flags & ATA_SINGLE) == 0) 148 xfer->c_flags |= C_DMA; 149 xfer->drive = drvp->drive; 150 xfer->cmd = ata_bio; 151 xfer->databuf = ata_bio->databuf; 152 xfer->c_bcount = ata_bio->bcount; 153 xfer->c_start = wdc_ata_bio_start; 154 xfer->c_intr = wdc_ata_bio_intr; 155 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 156 wdc_exec_xfer(chp, xfer); 157 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 158 } 159 160 void 161 wdc_ata_bio_start(chp, xfer) 162 struct channel_softc *chp; 163 struct wdc_xfer *xfer; 164 { 165 struct ata_bio *ata_bio = xfer->cmd; 166 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 167 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 168 DEBUG_XFERS); 169 170 /* start timeout machinery */ 171 if ((ata_bio->flags & ATA_POLL) == 0) 172 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 173 wdctimeout, chp); 174 _wdc_ata_bio_start(chp, xfer); 175 } 176 177 void 178 _wdc_ata_bio_start(chp, xfer) 179 struct channel_softc *chp; 180 struct wdc_xfer *xfer; 181 { 182 struct ata_bio *ata_bio = xfer->cmd; 183 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 184 u_int16_t cyl; 185 u_int8_t head, sect, cmd = 0; 186 int nblks; 187 int ata_delay; 188 int dma_flags = 0; 189 190 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 191 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 192 DEBUG_INTR | DEBUG_XFERS); 193 /* Do control operations specially. */ 194 if (drvp->state < READY) { 195 /* 196 * Actually, we want to be careful not to mess with the control 197 * state if the device is currently busy, but we can assume 198 * that we never get to this point if that's the case. 199 */ 200 /* at this point, we should only be in RECAL state */ 201 if (drvp->state != RESET) { 202 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 203 chp->wdc->sc_dev.dv_xname, chp->channel, 204 xfer->drive, drvp->state); 205 panic("_wdc_ata_bio_start: bad state"); 206 } 207 drvp->state = RECAL; 208 xfer->c_intr = wdc_ata_ctrl_intr; 209 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 210 WDSD_IBM | (xfer->drive << 4)); 211 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 212 goto timeout; 213 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 214 drvp->state = RECAL_WAIT; 215 if ((ata_bio->flags & ATA_POLL) == 0) { 216 chp->ch_flags |= WDCF_IRQ_WAIT; 217 } else { 218 /* Wait for at last 400ns for status bit to be valid */ 219 DELAY(1); 220 wdc_ata_ctrl_intr(chp, xfer, 0); 221 } 222 return; 223 } 224 225 if (xfer->c_flags & C_DMA) { 226 if (drvp->n_xfers <= NXFER) 227 drvp->n_xfers++; 228 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 229 } 230 if (ata_bio->flags & ATA_SINGLE) 231 ata_delay = ATA_DELAY; 232 else 233 ata_delay = ATA_DELAY; 234 again: 235 /* 236 * 237 * When starting a multi-sector transfer, or doing single-sector 238 * transfers... 239 */ 240 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 241 if (ata_bio->flags & ATA_SINGLE) 242 nblks = 1; 243 else 244 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 245 /* Check for bad sectors and adjust transfer, if necessary. */ 246 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 247 long blkdiff; 248 int i; 249 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 250 i++) { 251 blkdiff -= ata_bio->blkno; 252 if (blkdiff < 0) 253 continue; 254 if (blkdiff == 0) { 255 /* Replace current block of transfer. */ 256 ata_bio->blkno = 257 ata_bio->lp->d_secperunit - 258 ata_bio->lp->d_nsectors - i - 1; 259 } 260 if (blkdiff < nblks) { 261 /* Bad block inside transfer. */ 262 ata_bio->flags |= ATA_SINGLE; 263 nblks = 1; 264 } 265 break; 266 } 267 /* Transfer is okay now. */ 268 } 269 if (ata_bio->flags & ATA_LBA) { 270 sect = (ata_bio->blkno >> 0) & 0xff; 271 cyl = (ata_bio->blkno >> 8) & 0xffff; 272 head = (ata_bio->blkno >> 24) & 0x0f; 273 head |= WDSD_LBA; 274 } else { 275 int blkno = ata_bio->blkno; 276 sect = blkno % ata_bio->lp->d_nsectors; 277 sect++; /* Sectors begin with 1, not 0. */ 278 blkno /= ata_bio->lp->d_nsectors; 279 head = blkno % ata_bio->lp->d_ntracks; 280 blkno /= ata_bio->lp->d_ntracks; 281 cyl = blkno; 282 head |= WDSD_CHS; 283 } 284 if (xfer->c_flags & C_DMA) { 285 ata_bio->nblks = nblks; 286 ata_bio->nbytes = xfer->c_bcount; 287 cmd = (ata_bio->flags & ATA_READ) ? 288 WDCC_READDMA : WDCC_WRITEDMA; 289 /* Init the DMA channel. */ 290 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 291 chp->channel, xfer->drive, 292 (char *)xfer->databuf + xfer->c_skip, 293 ata_bio->nbytes, dma_flags) != 0) { 294 ata_bio->error = ERR_DMA; 295 ata_bio->r_error = 0; 296 wdc_ata_bio_done(chp, xfer); 297 return; 298 } 299 /* Initiate command */ 300 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 301 WDSD_IBM | (xfer->drive << 4)); 302 if (wait_for_ready(chp, ata_delay) < 0) 303 goto timeout; 304 wdccommand(chp, xfer->drive, cmd, cyl, 305 head, sect, nblks, 0); 306 /* start the DMA channel */ 307 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 308 chp->channel, xfer->drive); 309 chp->ch_flags |= WDCF_DMA_WAIT; 310 /* wait for irq */ 311 goto intr; 312 } /* else not DMA */ 313 ata_bio->nblks = min(nblks, ata_bio->multi); 314 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 315 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 316 cmd = (ata_bio->flags & ATA_READ) ? 317 WDCC_READMULTI : WDCC_WRITEMULTI; 318 } else { 319 cmd = (ata_bio->flags & ATA_READ) ? 320 WDCC_READ : WDCC_WRITE; 321 } 322 /* Initiate command! */ 323 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 324 WDSD_IBM | (xfer->drive << 4)); 325 if (wait_for_ready(chp, ata_delay) < 0) 326 goto timeout; 327 wdccommand(chp, xfer->drive, cmd, cyl, 328 head, sect, nblks, 329 (ata_bio->lp->d_type == DTYPE_ST506) ? 330 ata_bio->lp->d_precompcyl / 4 : 0); 331 } else if (ata_bio->nblks > 1) { 332 /* The number of blocks in the last stretch may be smaller. */ 333 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 334 if (ata_bio->nblks > nblks) { 335 ata_bio->nblks = nblks; 336 ata_bio->nbytes = xfer->c_bcount; 337 } 338 } 339 /* If this was a write and not using DMA, push the data. */ 340 if ((ata_bio->flags & ATA_READ) == 0) { 341 if (wait_for_drq(chp, ata_delay) != 0) { 342 printf("%s:%d:%d: timeout waiting for DRQ, " 343 "st=0x%02x, err=0x%02x\n", 344 chp->wdc->sc_dev.dv_xname, chp->channel, 345 xfer->drive, chp->ch_status, chp->ch_error); 346 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 347 ata_bio->error = TIMEOUT; 348 wdc_ata_bio_done(chp, xfer); 349 return; 350 } 351 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 352 wdc_ata_bio_done(chp, xfer); 353 return; 354 } 355 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 356 if (drvp->drive_flags & DRIVE_CAP32) { 357 bus_space_write_multi_4(chp->data32iot, 358 chp->data32ioh, 0, 359 (u_int32_t *)((char *)xfer->databuf + 360 xfer->c_skip), 361 ata_bio->nbytes >> 2); 362 } else { 363 bus_space_write_multi_2(chp->cmd_iot, 364 chp->cmd_ioh, wd_data, 365 (u_int16_t *)((char *)xfer->databuf + 366 xfer->c_skip), 367 ata_bio->nbytes >> 1); 368 } 369 } else { 370 if (drvp->drive_flags & DRIVE_CAP32) { 371 bus_space_write_multi_stream_4(chp->data32iot, 372 chp->data32ioh, 0, 373 (u_int32_t *)((char *)xfer->databuf + 374 xfer->c_skip), 375 ata_bio->nbytes >> 2); 376 } else { 377 bus_space_write_multi_stream_2(chp->cmd_iot, 378 chp->cmd_ioh, wd_data, 379 (u_int16_t *)((char *)xfer->databuf + 380 xfer->c_skip), 381 ata_bio->nbytes >> 1); 382 } 383 } 384 } 385 386 intr: /* Wait for IRQ (either real or polled) */ 387 if ((ata_bio->flags & ATA_POLL) == 0) { 388 chp->ch_flags |= WDCF_IRQ_WAIT; 389 } else { 390 /* Wait for at last 400ns for status bit to be valid */ 391 delay(1); 392 if (chp->ch_flags & WDCF_DMA_WAIT) { 393 wdc_dmawait(chp, xfer, ATA_DELAY); 394 chp->ch_flags &= ~WDCF_DMA_WAIT; 395 } 396 wdc_ata_bio_intr(chp, xfer, 0); 397 if ((ata_bio->flags & ATA_ITSDONE) == 0) 398 goto again; 399 } 400 return; 401 timeout: 402 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 403 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 404 chp->ch_status, chp->ch_error); 405 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 406 ata_bio->error = TIMEOUT; 407 wdc_ata_bio_done(chp, xfer); 408 return; 409 } 410 411 int 412 wdc_ata_bio_intr(chp, xfer, irq) 413 struct channel_softc *chp; 414 struct wdc_xfer *xfer; 415 int irq; 416 { 417 struct ata_bio *ata_bio = xfer->cmd; 418 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 419 int drv_err; 420 421 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 422 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 423 DEBUG_INTR | DEBUG_XFERS); 424 425 426 /* Is it not a transfer, but a control operation? */ 427 if (drvp->state < READY) { 428 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 429 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 430 drvp->state); 431 panic("wdc_ata_bio_intr: bad state\n"); 432 } 433 434 /* 435 * if we missed an interrupt in a PIO transfer, reset and restart. 436 * Don't try to continue transfer, we may have missed cycles. 437 */ 438 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 439 ata_bio->error = TIMEOUT; 440 wdc_ata_bio_done(chp, xfer); 441 return 1; 442 } 443 444 /* Ack interrupt done by wait_for_unbusy */ 445 if (wait_for_unbusy(chp, 446 (irq == 0) ? ATA_DELAY : 0) < 0) { 447 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 448 return 0; /* IRQ was not for us */ 449 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 450 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 451 xfer->c_bcount, xfer->c_skip); 452 /* if we were using DMA, flag a DMA error */ 453 if (xfer->c_flags & C_DMA) { 454 ata_dmaerr(drvp); 455 } 456 ata_bio->error = TIMEOUT; 457 wdc_ata_bio_done(chp, xfer); 458 return 1; 459 } 460 461 drv_err = wdc_ata_err(drvp, ata_bio); 462 463 /* If we were using DMA, Turn off the DMA channel and check for error */ 464 if (xfer->c_flags & C_DMA) { 465 if (ata_bio->flags & ATA_POLL) { 466 /* 467 * IDE drives deassert WDCS_BSY before transfer is 468 * complete when using DMA. Polling for DRQ to deassert 469 * is not enouth DRQ is not required to be 470 * asserted for DMA transfers, so poll for DRDY. 471 */ 472 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 473 ATA_DELAY) < 0) { 474 printf("%s:%d:%d: polled transfer timed out " 475 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 476 chp->channel, xfer->drive, chp->ch_status); 477 ata_bio->error = TIMEOUT; 478 drv_err = WDC_ATA_ERR; 479 } 480 } 481 if (chp->wdc->dma_status != 0) { 482 if (drv_err != WDC_ATA_ERR) { 483 ata_bio->error = ERR_DMA; 484 drv_err = WDC_ATA_ERR; 485 } 486 } 487 if (chp->ch_status & WDCS_DRQ) { 488 if (drv_err != WDC_ATA_ERR) { 489 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 490 chp->wdc->sc_dev.dv_xname, chp->channel, 491 xfer->drive, chp->ch_status); 492 ata_bio->error = TIMEOUT; 493 drv_err = WDC_ATA_ERR; 494 } 495 } 496 if (drv_err != WDC_ATA_ERR) 497 goto end; 498 ata_dmaerr(drvp); 499 } 500 501 /* if we had an error, end */ 502 if (drv_err == WDC_ATA_ERR) { 503 wdc_ata_bio_done(chp, xfer); 504 return 1; 505 } 506 507 /* If this was a read and not using DMA, fetch the data. */ 508 if ((ata_bio->flags & ATA_READ) != 0) { 509 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 510 printf("%s:%d:%d: read intr before drq\n", 511 chp->wdc->sc_dev.dv_xname, chp->channel, 512 xfer->drive); 513 ata_bio->error = TIMEOUT; 514 wdc_ata_bio_done(chp, xfer); 515 return 1; 516 } 517 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 518 if (drvp->drive_flags & DRIVE_CAP32) { 519 bus_space_read_multi_4(chp->data32iot, 520 chp->data32ioh, 0, 521 (u_int32_t *)((char *)xfer->databuf + 522 xfer->c_skip), 523 ata_bio->nbytes >> 2); 524 } else { 525 bus_space_read_multi_2(chp->cmd_iot, 526 chp->cmd_ioh, wd_data, 527 (u_int16_t *)((char *)xfer->databuf + 528 xfer->c_skip), 529 ata_bio->nbytes >> 1); 530 } 531 } else { 532 if (drvp->drive_flags & DRIVE_CAP32) { 533 bus_space_read_multi_stream_4(chp->data32iot, 534 chp->data32ioh, 0, 535 (u_int32_t *)((char *)xfer->databuf + 536 xfer->c_skip), 537 ata_bio->nbytes >> 2); 538 } else { 539 bus_space_read_multi_stream_2(chp->cmd_iot, 540 chp->cmd_ioh, wd_data, 541 (u_int16_t *)((char *)xfer->databuf + 542 xfer->c_skip), 543 ata_bio->nbytes >> 1); 544 } 545 } 546 } 547 548 end: 549 ata_bio->blkno += ata_bio->nblks; 550 ata_bio->blkdone += ata_bio->nblks; 551 xfer->c_skip += ata_bio->nbytes; 552 xfer->c_bcount -= ata_bio->nbytes; 553 /* See if this transfer is complete. */ 554 if (xfer->c_bcount > 0) { 555 if ((ata_bio->flags & ATA_POLL) == 0) { 556 /* Start the next operation */ 557 _wdc_ata_bio_start(chp, xfer); 558 } else { 559 /* Let _wdc_ata_bio_start do the loop */ 560 return 1; 561 } 562 } else { /* Done with this transfer */ 563 ata_bio->error = NOERROR; 564 wdc_ata_bio_done(chp, xfer); 565 } 566 return 1; 567 } 568 569 void 570 wdc_ata_kill_pending(drvp) 571 struct ata_drive_datas *drvp; 572 { 573 struct channel_softc *chp = drvp->chnl_softc; 574 575 wdc_kill_pending(chp); 576 } 577 578 void 579 wdc_ata_bio_kill_xfer(chp, xfer) 580 struct channel_softc *chp; 581 struct wdc_xfer *xfer; 582 { 583 struct ata_bio *ata_bio = xfer->cmd; 584 int drive = xfer->drive; 585 586 callout_stop(&chp->ch_callout); 587 /* remove this command from xfer queue */ 588 wdc_free_xfer(chp, xfer); 589 590 ata_bio->flags |= ATA_ITSDONE; 591 ata_bio->error = ERR_NODEV; 592 ata_bio->r_error = WDCE_ABRT; 593 if ((ata_bio->flags & ATA_POLL) == 0) { 594 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 595 wddone(chp->ch_drive[drive].drv_softc); 596 } 597 } 598 599 void 600 wdc_ata_bio_done(chp, xfer) 601 struct channel_softc *chp; 602 struct wdc_xfer *xfer; 603 { 604 struct ata_bio *ata_bio = xfer->cmd; 605 int drive = xfer->drive; 606 607 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 608 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 609 (u_int)xfer->c_flags), 610 DEBUG_XFERS); 611 612 callout_stop(&chp->ch_callout); 613 614 /* feed back residual bcount to our caller */ 615 ata_bio->bcount = xfer->c_bcount; 616 617 /* remove this command from xfer queue */ 618 wdc_free_xfer(chp, xfer); 619 620 ata_bio->flags |= ATA_ITSDONE; 621 if ((ata_bio->flags & ATA_POLL) == 0) { 622 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 623 wddone(chp->ch_drive[drive].drv_softc); 624 } 625 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 626 chp->ch_flags), DEBUG_XFERS); 627 wdcstart(chp); 628 } 629 630 /* 631 * Implement operations needed before read/write. 632 */ 633 int 634 wdc_ata_ctrl_intr(chp, xfer, irq) 635 struct channel_softc *chp; 636 struct wdc_xfer *xfer; 637 int irq; 638 { 639 struct ata_bio *ata_bio = xfer->cmd; 640 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 641 char *errstring = NULL; 642 int delay = (irq == 0) ? ATA_DELAY : 0; 643 644 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 645 DEBUG_FUNCS); 646 647 again: 648 switch (drvp->state) { 649 case RECAL: /* Should not be in this state here */ 650 panic("wdc_ata_ctrl_intr: state==RECAL"); 651 break; 652 653 case RECAL_WAIT: 654 errstring = "recal"; 655 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 656 goto timeout; 657 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 658 goto error; 659 /* fall through */ 660 661 case PIOMODE: 662 /* Don't try to set modes if controller can't be adjusted */ 663 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 664 goto geometry; 665 /* Also don't try if the drive didn't report its mode */ 666 if ((drvp->drive_flags & DRIVE_MODE) == 0) 667 goto geometry; 668 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 669 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 670 drvp->state = PIOMODE_WAIT; 671 break; 672 673 case PIOMODE_WAIT: 674 errstring = "piomode"; 675 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 676 goto timeout; 677 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 678 goto error; 679 /* fall through */ 680 681 case DMAMODE: 682 if (drvp->drive_flags & DRIVE_UDMA) { 683 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 684 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 685 } else if (drvp->drive_flags & DRIVE_DMA) { 686 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 687 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 688 } else { 689 goto geometry; 690 } 691 drvp->state = DMAMODE_WAIT; 692 break; 693 case DMAMODE_WAIT: 694 errstring = "dmamode"; 695 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 696 goto timeout; 697 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 698 goto error; 699 /* fall through */ 700 701 case GEOMETRY: 702 geometry: 703 if (ata_bio->flags & ATA_LBA) 704 goto multimode; 705 wdccommand(chp, xfer->drive, WDCC_IDP, 706 ata_bio->lp->d_ncylinders, 707 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 708 (ata_bio->lp->d_type == DTYPE_ST506) ? 709 ata_bio->lp->d_precompcyl / 4 : 0); 710 drvp->state = GEOMETRY_WAIT; 711 break; 712 713 case GEOMETRY_WAIT: 714 errstring = "geometry"; 715 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 716 goto timeout; 717 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 718 goto error; 719 /* fall through */ 720 721 case MULTIMODE: 722 multimode: 723 if (ata_bio->multi == 1) 724 goto ready; 725 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 726 ata_bio->multi, 0); 727 drvp->state = MULTIMODE_WAIT; 728 break; 729 730 case MULTIMODE_WAIT: 731 errstring = "setmulti"; 732 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 733 goto timeout; 734 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 735 goto error; 736 /* fall through */ 737 738 case READY: 739 ready: 740 drvp->state = READY; 741 /* 742 * The drive is usable now 743 */ 744 xfer->c_intr = wdc_ata_bio_intr; 745 _wdc_ata_bio_start(chp, xfer); 746 return 1; 747 } 748 749 if ((ata_bio->flags & ATA_POLL) == 0) { 750 chp->ch_flags |= WDCF_IRQ_WAIT; 751 } else { 752 goto again; 753 } 754 return 1; 755 756 timeout: 757 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 758 return 0; /* IRQ was not for us */ 759 } 760 printf("%s:%d:%d: %s timed out\n", 761 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 762 ata_bio->error = TIMEOUT; 763 drvp->state = 0; 764 wdc_ata_bio_done(chp, xfer); 765 return 0; 766 error: 767 printf("%s:%d:%d: %s ", 768 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 769 errstring); 770 if (chp->ch_status & WDCS_DWF) { 771 printf("drive fault\n"); 772 ata_bio->error = ERR_DF; 773 } else { 774 printf("error (%x)\n", chp->ch_error); 775 ata_bio->r_error = chp->ch_error; 776 ata_bio->error = ERROR; 777 } 778 drvp->state = 0; 779 wdc_ata_bio_done(chp, xfer); 780 return 1; 781 } 782 783 int 784 wdc_ata_err(drvp, ata_bio) 785 struct ata_drive_datas *drvp; 786 struct ata_bio *ata_bio; 787 { 788 struct channel_softc *chp = drvp->chnl_softc; 789 ata_bio->error = 0; 790 if (chp->ch_status & WDCS_BSY) { 791 ata_bio->error = TIMEOUT; 792 return WDC_ATA_ERR; 793 } 794 795 if (chp->ch_status & WDCS_DWF) { 796 ata_bio->error = ERR_DF; 797 return WDC_ATA_ERR; 798 } 799 800 if (chp->ch_status & WDCS_ERR) { 801 ata_bio->error = ERROR; 802 ata_bio->r_error = chp->ch_error; 803 if (drvp->drive_flags & DRIVE_UDMA && 804 (ata_bio->r_error & WDCE_CRC)) { 805 /* 806 * Record the CRC error, to avoid downgrading to 807 * multiword DMA 808 */ 809 drvp->drive_flags |= DRIVE_DMAERR; 810 } 811 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 812 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 813 return WDC_ATA_ERR; 814 return WDC_ATA_NOERR; 815 } 816 817 if (chp->ch_status & WDCS_CORR) 818 ata_bio->flags |= ATA_CORR; 819 return WDC_ATA_NOERR; 820 } 821 822 int 823 wdc_ata_addref(drvp) 824 struct ata_drive_datas *drvp; 825 { 826 struct channel_softc *chp = drvp->chnl_softc; 827 828 return (wdc_addref(chp)); 829 } 830 831 void 832 wdc_ata_delref(drvp) 833 struct ata_drive_datas *drvp; 834 { 835 struct channel_softc *chp = drvp->chnl_softc; 836 837 wdc_delref(chp); 838 } 839
Indexes created Tue Sep 30 07:10:03 GMT 2025