ata_wdc.c revision 1.29
1 /* $NetBSD: ata_wdc.c,v 1.29 2001/04/18 05:40:03 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 /*- 36 * Copyright (c) 1998 The NetBSD Foundation, Inc. 37 * All rights reserved. 38 * 39 * This code is derived from software contributed to The NetBSD Foundation 40 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the NetBSD 53 * Foundation, Inc. and its contributors. 54 * 4. Neither the name of The NetBSD Foundation nor the names of its 55 * contributors may be used to endorse or promote products derived 56 * from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 #include <dev/ata/wdvar.h> 101 102 #define DEBUG_INTR 0x01 103 #define DEBUG_XFERS 0x02 104 #define DEBUG_STATUS 0x04 105 #define DEBUG_FUNCS 0x08 106 #define DEBUG_PROBE 0x10 107 #ifdef WDCDEBUG 108 int wdcdebug_wd_mask = 0; 109 #define WDCDEBUG_PRINT(args, level) \ 110 if (wdcdebug_wd_mask & (level)) \ 111 printf args 112 #else 113 #define WDCDEBUG_PRINT(args, level) 114 #endif 115 116 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 117 118 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 119 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 121 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 122 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 123 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 129 /* 130 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 131 * WDC_TRY_AGAIN. Must be called at splbio(). 132 */ 133 int 134 wdc_ata_bio(drvp, ata_bio) 135 struct ata_drive_datas *drvp; 136 struct ata_bio *ata_bio; 137 { 138 struct wdc_xfer *xfer; 139 struct channel_softc *chp = drvp->chnl_softc; 140 141 xfer = wdc_get_xfer(WDC_NOSLEEP); 142 if (xfer == NULL) 143 return WDC_TRY_AGAIN; 144 if (ata_bio->flags & ATA_POLL) 145 xfer->c_flags |= C_POLL; 146 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 147 (ata_bio->flags & ATA_SINGLE) == 0) 148 xfer->c_flags |= C_DMA; 149 xfer->drive = drvp->drive; 150 xfer->cmd = ata_bio; 151 xfer->databuf = ata_bio->databuf; 152 xfer->c_bcount = ata_bio->bcount; 153 xfer->c_start = wdc_ata_bio_start; 154 xfer->c_intr = wdc_ata_bio_intr; 155 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 156 wdc_exec_xfer(chp, xfer); 157 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 158 } 159 160 void 161 wdc_ata_bio_start(chp, xfer) 162 struct channel_softc *chp; 163 struct wdc_xfer *xfer; 164 { 165 struct ata_bio *ata_bio = xfer->cmd; 166 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 167 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 168 DEBUG_XFERS); 169 170 /* start timeout machinery */ 171 if ((ata_bio->flags & ATA_POLL) == 0) 172 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 173 wdctimeout, chp); 174 _wdc_ata_bio_start(chp, xfer); 175 } 176 177 void 178 _wdc_ata_bio_start(chp, xfer) 179 struct channel_softc *chp; 180 struct wdc_xfer *xfer; 181 { 182 struct ata_bio *ata_bio = xfer->cmd; 183 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 184 u_int16_t cyl; 185 u_int8_t head, sect, cmd = 0; 186 int nblks; 187 int ata_delay; 188 int dma_flags = 0; 189 190 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 191 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 192 DEBUG_INTR | DEBUG_XFERS); 193 /* Do control operations specially. */ 194 if (drvp->state < READY) { 195 /* 196 * Actually, we want to be careful not to mess with the control 197 * state if the device is currently busy, but we can assume 198 * that we never get to this point if that's the case. 199 */ 200 /* at this point, we should only be in RECAL state */ 201 if (drvp->state != RESET) { 202 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 203 chp->wdc->sc_dev.dv_xname, chp->channel, 204 xfer->drive, drvp->state); 205 panic("_wdc_ata_bio_start: bad state"); 206 } 207 drvp->state = RECAL; 208 xfer->c_intr = wdc_ata_ctrl_intr; 209 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 210 WDSD_IBM | (xfer->drive << 4)); 211 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 212 goto timeout; 213 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 214 drvp->state = RECAL_WAIT; 215 if ((ata_bio->flags & ATA_POLL) == 0) { 216 chp->ch_flags |= WDCF_IRQ_WAIT; 217 } else { 218 /* Wait for at last 400ns for status bit to be valid */ 219 DELAY(1); 220 wdc_ata_ctrl_intr(chp, xfer, 0); 221 } 222 return; 223 } 224 225 if (xfer->c_flags & C_DMA) { 226 if (drvp->n_xfers <= NXFER) 227 drvp->n_xfers++; 228 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 229 } 230 if (ata_bio->flags & ATA_SINGLE) 231 ata_delay = ATA_DELAY; 232 else 233 ata_delay = ATA_DELAY; 234 again: 235 /* 236 * 237 * When starting a multi-sector transfer, or doing single-sector 238 * transfers... 239 */ 240 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 241 if (ata_bio->flags & ATA_SINGLE) 242 nblks = 1; 243 else 244 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 245 /* Check for bad sectors and adjust transfer, if necessary. */ 246 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 247 long blkdiff; 248 int i; 249 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 250 i++) { 251 blkdiff -= ata_bio->blkno; 252 if (blkdiff < 0) 253 continue; 254 if (blkdiff == 0) { 255 /* Replace current block of transfer. */ 256 ata_bio->blkno = 257 ata_bio->lp->d_secperunit - 258 ata_bio->lp->d_nsectors - i - 1; 259 } 260 if (blkdiff < nblks) { 261 /* Bad block inside transfer. */ 262 ata_bio->flags |= ATA_SINGLE; 263 nblks = 1; 264 } 265 break; 266 } 267 /* Transfer is okay now. */ 268 } 269 if (ata_bio->flags & ATA_LBA) { 270 sect = (ata_bio->blkno >> 0) & 0xff; 271 cyl = (ata_bio->blkno >> 8) & 0xffff; 272 head = (ata_bio->blkno >> 24) & 0x0f; 273 head |= WDSD_LBA; 274 } else { 275 int blkno = ata_bio->blkno; 276 sect = blkno % ata_bio->lp->d_nsectors; 277 sect++; /* Sectors begin with 1, not 0. */ 278 blkno /= ata_bio->lp->d_nsectors; 279 head = blkno % ata_bio->lp->d_ntracks; 280 blkno /= ata_bio->lp->d_ntracks; 281 cyl = blkno; 282 head |= WDSD_CHS; 283 } 284 if (xfer->c_flags & C_DMA) { 285 ata_bio->nblks = nblks; 286 ata_bio->nbytes = xfer->c_bcount; 287 cmd = (ata_bio->flags & ATA_READ) ? 288 WDCC_READDMA : WDCC_WRITEDMA; 289 /* Init the DMA channel. */ 290 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 291 chp->channel, xfer->drive, 292 (char *)xfer->databuf + xfer->c_skip, 293 ata_bio->nbytes, dma_flags) != 0) { 294 ata_bio->error = ERR_DMA; 295 ata_bio->r_error = 0; 296 wdc_ata_bio_done(chp, xfer); 297 return; 298 } 299 /* Initiate command */ 300 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 301 WDSD_IBM | (xfer->drive << 4)); 302 if (wait_for_ready(chp, ata_delay) < 0) 303 goto timeout; 304 wdccommand(chp, xfer->drive, cmd, cyl, 305 head, sect, nblks, 0); 306 /* start the DMA channel */ 307 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 308 chp->channel, xfer->drive); 309 chp->ch_flags |= WDCF_DMA_WAIT; 310 /* wait for irq */ 311 goto intr; 312 } /* else not DMA */ 313 ata_bio->nblks = min(nblks, ata_bio->multi); 314 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 315 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 316 cmd = (ata_bio->flags & ATA_READ) ? 317 WDCC_READMULTI : WDCC_WRITEMULTI; 318 } else { 319 cmd = (ata_bio->flags & ATA_READ) ? 320 WDCC_READ : WDCC_WRITE; 321 } 322 /* Initiate command! */ 323 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 324 WDSD_IBM | (xfer->drive << 4)); 325 if (wait_for_ready(chp, ata_delay) < 0) 326 goto timeout; 327 wdccommand(chp, xfer->drive, cmd, cyl, 328 head, sect, nblks, 329 (ata_bio->lp->d_type == DTYPE_ST506) ? 330 ata_bio->lp->d_precompcyl / 4 : 0); 331 } else if (ata_bio->nblks > 1) { 332 /* The number of blocks in the last stretch may be smaller. */ 333 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 334 if (ata_bio->nblks > nblks) { 335 ata_bio->nblks = nblks; 336 ata_bio->nbytes = xfer->c_bcount; 337 } 338 } 339 /* If this was a write and not using DMA, push the data. */ 340 if ((ata_bio->flags & ATA_READ) == 0) { 341 if (wait_for_drq(chp, ata_delay) != 0) { 342 printf("%s:%d:%d: timeout waiting for DRQ, " 343 "st=0x%02x, err=0x%02x\n", 344 chp->wdc->sc_dev.dv_xname, chp->channel, 345 xfer->drive, chp->ch_status, chp->ch_error); 346 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 347 ata_bio->error = TIMEOUT; 348 wdc_ata_bio_done(chp, xfer); 349 return; 350 } 351 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 352 wdc_ata_bio_done(chp, xfer); 353 return; 354 } 355 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 356 if (drvp->drive_flags & DRIVE_CAP32) { 357 bus_space_write_multi_4(chp->data32iot, 358 chp->data32ioh, 0, 359 (u_int32_t *)((char *)xfer->databuf + 360 xfer->c_skip), 361 ata_bio->nbytes >> 2); 362 } else { 363 bus_space_write_multi_2(chp->cmd_iot, 364 chp->cmd_ioh, wd_data, 365 (u_int16_t *)((char *)xfer->databuf + 366 xfer->c_skip), 367 ata_bio->nbytes >> 1); 368 } 369 } else { 370 if (drvp->drive_flags & DRIVE_CAP32) { 371 bus_space_write_multi_stream_4(chp->data32iot, 372 chp->data32ioh, 0, 373 (u_int32_t *)((char *)xfer->databuf + 374 xfer->c_skip), 375 ata_bio->nbytes >> 2); 376 } else { 377 bus_space_write_multi_stream_2(chp->cmd_iot, 378 chp->cmd_ioh, wd_data, 379 (u_int16_t *)((char *)xfer->databuf + 380 xfer->c_skip), 381 ata_bio->nbytes >> 1); 382 } 383 } 384 } 385 386 intr: /* Wait for IRQ (either real or polled) */ 387 if ((ata_bio->flags & ATA_POLL) == 0) { 388 chp->ch_flags |= WDCF_IRQ_WAIT; 389 } else { 390 /* Wait for at last 400ns for status bit to be valid */ 391 delay(1); 392 if (chp->ch_flags & WDCF_DMA_WAIT) { 393 wdc_dmawait(chp, xfer, ATA_DELAY); 394 chp->ch_flags &= ~WDCF_DMA_WAIT; 395 } 396 wdc_ata_bio_intr(chp, xfer, 0); 397 if ((ata_bio->flags & ATA_ITSDONE) == 0) 398 goto again; 399 } 400 return; 401 timeout: 402 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 403 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 404 chp->ch_status, chp->ch_error); 405 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 406 ata_bio->error = TIMEOUT; 407 wdc_ata_bio_done(chp, xfer); 408 return; 409 } 410 411 int 412 wdc_ata_bio_intr(chp, xfer, irq) 413 struct channel_softc *chp; 414 struct wdc_xfer *xfer; 415 int irq; 416 { 417 struct ata_bio *ata_bio = xfer->cmd; 418 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 419 int drv_err; 420 421 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 422 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 423 DEBUG_INTR | DEBUG_XFERS); 424 425 426 /* Is it not a transfer, but a control operation? */ 427 if (drvp->state < READY) { 428 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 429 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 430 drvp->state); 431 panic("wdc_ata_bio_intr: bad state\n"); 432 } 433 434 /* 435 * if we missed an interrupt in a PIO transfer, reset and restart. 436 * Don't try to continue transfer, we may have missed cycles. 437 */ 438 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 439 ata_bio->error = TIMEOUT; 440 wdc_ata_bio_done(chp, xfer); 441 return 1; 442 } 443 444 /* Ack interrupt done by wait_for_unbusy */ 445 if (wait_for_unbusy(chp, 446 (irq == 0) ? ATA_DELAY : 0) < 0) { 447 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 448 return 0; /* IRQ was not for us */ 449 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 450 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 451 xfer->c_bcount, xfer->c_skip); 452 /* if we were using DMA, flag a DMA error */ 453 if (xfer->c_flags & C_DMA) { 454 ata_dmaerr(drvp); 455 } 456 ata_bio->error = TIMEOUT; 457 wdc_ata_bio_done(chp, xfer); 458 return 1; 459 } 460 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 461 chp->wdc->irqack(chp); 462 463 drv_err = wdc_ata_err(drvp, ata_bio); 464 465 /* If we were using DMA, Turn off the DMA channel and check for error */ 466 if (xfer->c_flags & C_DMA) { 467 if (ata_bio->flags & ATA_POLL) { 468 /* 469 * IDE drives deassert WDCS_BSY before transfer is 470 * complete when using DMA. Polling for DRQ to deassert 471 * is not enouth DRQ is not required to be 472 * asserted for DMA transfers, so poll for DRDY. 473 */ 474 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 475 ATA_DELAY) < 0) { 476 printf("%s:%d:%d: polled transfer timed out " 477 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 478 chp->channel, xfer->drive, chp->ch_status); 479 ata_bio->error = TIMEOUT; 480 drv_err = WDC_ATA_ERR; 481 } 482 } 483 if (chp->wdc->dma_status != 0) { 484 if (drv_err != WDC_ATA_ERR) { 485 ata_bio->error = ERR_DMA; 486 drv_err = WDC_ATA_ERR; 487 } 488 } 489 if (chp->ch_status & WDCS_DRQ) { 490 if (drv_err != WDC_ATA_ERR) { 491 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 492 chp->wdc->sc_dev.dv_xname, chp->channel, 493 xfer->drive, chp->ch_status); 494 ata_bio->error = TIMEOUT; 495 drv_err = WDC_ATA_ERR; 496 } 497 } 498 if (drv_err != WDC_ATA_ERR) 499 goto end; 500 ata_dmaerr(drvp); 501 } 502 503 /* if we had an error, end */ 504 if (drv_err == WDC_ATA_ERR) { 505 wdc_ata_bio_done(chp, xfer); 506 return 1; 507 } 508 509 /* If this was a read and not using DMA, fetch the data. */ 510 if ((ata_bio->flags & ATA_READ) != 0) { 511 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 512 printf("%s:%d:%d: read intr before drq\n", 513 chp->wdc->sc_dev.dv_xname, chp->channel, 514 xfer->drive); 515 ata_bio->error = TIMEOUT; 516 wdc_ata_bio_done(chp, xfer); 517 return 1; 518 } 519 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 520 if (drvp->drive_flags & DRIVE_CAP32) { 521 bus_space_read_multi_4(chp->data32iot, 522 chp->data32ioh, 0, 523 (u_int32_t *)((char *)xfer->databuf + 524 xfer->c_skip), 525 ata_bio->nbytes >> 2); 526 } else { 527 bus_space_read_multi_2(chp->cmd_iot, 528 chp->cmd_ioh, wd_data, 529 (u_int16_t *)((char *)xfer->databuf + 530 xfer->c_skip), 531 ata_bio->nbytes >> 1); 532 } 533 } else { 534 if (drvp->drive_flags & DRIVE_CAP32) { 535 bus_space_read_multi_stream_4(chp->data32iot, 536 chp->data32ioh, 0, 537 (u_int32_t *)((char *)xfer->databuf + 538 xfer->c_skip), 539 ata_bio->nbytes >> 2); 540 } else { 541 bus_space_read_multi_stream_2(chp->cmd_iot, 542 chp->cmd_ioh, wd_data, 543 (u_int16_t *)((char *)xfer->databuf + 544 xfer->c_skip), 545 ata_bio->nbytes >> 1); 546 } 547 } 548 } 549 550 end: 551 ata_bio->blkno += ata_bio->nblks; 552 ata_bio->blkdone += ata_bio->nblks; 553 xfer->c_skip += ata_bio->nbytes; 554 xfer->c_bcount -= ata_bio->nbytes; 555 /* See if this transfer is complete. */ 556 if (xfer->c_bcount > 0) { 557 if ((ata_bio->flags & ATA_POLL) == 0) { 558 /* Start the next operation */ 559 _wdc_ata_bio_start(chp, xfer); 560 } else { 561 /* Let _wdc_ata_bio_start do the loop */ 562 return 1; 563 } 564 } else { /* Done with this transfer */ 565 ata_bio->error = NOERROR; 566 wdc_ata_bio_done(chp, xfer); 567 } 568 return 1; 569 } 570 571 void 572 wdc_ata_kill_pending(drvp) 573 struct ata_drive_datas *drvp; 574 { 575 struct channel_softc *chp = drvp->chnl_softc; 576 577 wdc_kill_pending(chp); 578 } 579 580 void 581 wdc_ata_bio_kill_xfer(chp, xfer) 582 struct channel_softc *chp; 583 struct wdc_xfer *xfer; 584 { 585 struct ata_bio *ata_bio = xfer->cmd; 586 int drive = xfer->drive; 587 588 callout_stop(&chp->ch_callout); 589 /* remove this command from xfer queue */ 590 wdc_free_xfer(chp, xfer); 591 592 ata_bio->flags |= ATA_ITSDONE; 593 ata_bio->error = ERR_NODEV; 594 ata_bio->r_error = WDCE_ABRT; 595 if ((ata_bio->flags & ATA_POLL) == 0) { 596 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 597 wddone(chp->ch_drive[drive].drv_softc); 598 } 599 } 600 601 void 602 wdc_ata_bio_done(chp, xfer) 603 struct channel_softc *chp; 604 struct wdc_xfer *xfer; 605 { 606 struct ata_bio *ata_bio = xfer->cmd; 607 int drive = xfer->drive; 608 609 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 610 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 611 (u_int)xfer->c_flags), 612 DEBUG_XFERS); 613 614 callout_stop(&chp->ch_callout); 615 616 /* feed back residual bcount to our caller */ 617 ata_bio->bcount = xfer->c_bcount; 618 619 /* remove this command from xfer queue */ 620 wdc_free_xfer(chp, xfer); 621 622 ata_bio->flags |= ATA_ITSDONE; 623 if ((ata_bio->flags & ATA_POLL) == 0) { 624 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 625 wddone(chp->ch_drive[drive].drv_softc); 626 } 627 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 628 chp->ch_flags), DEBUG_XFERS); 629 wdcstart(chp); 630 } 631 632 /* 633 * Implement operations needed before read/write. 634 */ 635 int 636 wdc_ata_ctrl_intr(chp, xfer, irq) 637 struct channel_softc *chp; 638 struct wdc_xfer *xfer; 639 int irq; 640 { 641 struct ata_bio *ata_bio = xfer->cmd; 642 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 643 char *errstring = NULL; 644 int delay = (irq == 0) ? ATA_DELAY : 0; 645 646 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 647 DEBUG_FUNCS); 648 649 again: 650 switch (drvp->state) { 651 case RECAL: /* Should not be in this state here */ 652 panic("wdc_ata_ctrl_intr: state==RECAL"); 653 break; 654 655 case RECAL_WAIT: 656 errstring = "recal"; 657 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 658 goto timeout; 659 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 660 chp->wdc->irqack(chp); 661 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 662 goto error; 663 /* fall through */ 664 665 case PIOMODE: 666 /* Don't try to set modes if controller can't be adjusted */ 667 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 668 goto geometry; 669 /* Also don't try if the drive didn't report its mode */ 670 if ((drvp->drive_flags & DRIVE_MODE) == 0) 671 goto geometry; 672 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 673 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 674 drvp->state = PIOMODE_WAIT; 675 break; 676 677 case PIOMODE_WAIT: 678 errstring = "piomode"; 679 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 680 goto timeout; 681 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 682 chp->wdc->irqack(chp); 683 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 684 goto error; 685 /* fall through */ 686 687 case DMAMODE: 688 if (drvp->drive_flags & DRIVE_UDMA) { 689 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 690 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 691 } else if (drvp->drive_flags & DRIVE_DMA) { 692 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 693 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 694 } else { 695 goto geometry; 696 } 697 drvp->state = DMAMODE_WAIT; 698 break; 699 case DMAMODE_WAIT: 700 errstring = "dmamode"; 701 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 702 goto timeout; 703 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 704 chp->wdc->irqack(chp); 705 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 706 goto error; 707 /* fall through */ 708 709 case GEOMETRY: 710 geometry: 711 if (ata_bio->flags & ATA_LBA) 712 goto multimode; 713 wdccommand(chp, xfer->drive, WDCC_IDP, 714 ata_bio->lp->d_ncylinders, 715 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 716 (ata_bio->lp->d_type == DTYPE_ST506) ? 717 ata_bio->lp->d_precompcyl / 4 : 0); 718 drvp->state = GEOMETRY_WAIT; 719 break; 720 721 case GEOMETRY_WAIT: 722 errstring = "geometry"; 723 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 724 goto timeout; 725 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 726 chp->wdc->irqack(chp); 727 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 728 goto error; 729 /* fall through */ 730 731 case MULTIMODE: 732 multimode: 733 if (ata_bio->multi == 1) 734 goto ready; 735 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 736 ata_bio->multi, 0); 737 drvp->state = MULTIMODE_WAIT; 738 break; 739 740 case MULTIMODE_WAIT: 741 errstring = "setmulti"; 742 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 743 goto timeout; 744 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 745 chp->wdc->irqack(chp); 746 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 747 goto error; 748 /* fall through */ 749 750 case READY: 751 ready: 752 drvp->state = READY; 753 /* 754 * The drive is usable now 755 */ 756 xfer->c_intr = wdc_ata_bio_intr; 757 _wdc_ata_bio_start(chp, xfer); 758 return 1; 759 } 760 761 if ((ata_bio->flags & ATA_POLL) == 0) { 762 chp->ch_flags |= WDCF_IRQ_WAIT; 763 } else { 764 goto again; 765 } 766 return 1; 767 768 timeout: 769 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 770 return 0; /* IRQ was not for us */ 771 } 772 printf("%s:%d:%d: %s timed out\n", 773 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 774 ata_bio->error = TIMEOUT; 775 drvp->state = 0; 776 wdc_ata_bio_done(chp, xfer); 777 return 0; 778 error: 779 printf("%s:%d:%d: %s ", 780 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 781 errstring); 782 if (chp->ch_status & WDCS_DWF) { 783 printf("drive fault\n"); 784 ata_bio->error = ERR_DF; 785 } else { 786 printf("error (%x)\n", chp->ch_error); 787 ata_bio->r_error = chp->ch_error; 788 ata_bio->error = ERROR; 789 } 790 drvp->state = 0; 791 wdc_ata_bio_done(chp, xfer); 792 return 1; 793 } 794 795 int 796 wdc_ata_err(drvp, ata_bio) 797 struct ata_drive_datas *drvp; 798 struct ata_bio *ata_bio; 799 { 800 struct channel_softc *chp = drvp->chnl_softc; 801 ata_bio->error = 0; 802 if (chp->ch_status & WDCS_BSY) { 803 ata_bio->error = TIMEOUT; 804 return WDC_ATA_ERR; 805 } 806 807 if (chp->ch_status & WDCS_DWF) { 808 ata_bio->error = ERR_DF; 809 return WDC_ATA_ERR; 810 } 811 812 if (chp->ch_status & WDCS_ERR) { 813 ata_bio->error = ERROR; 814 ata_bio->r_error = chp->ch_error; 815 if (drvp->drive_flags & DRIVE_UDMA && 816 (ata_bio->r_error & WDCE_CRC)) { 817 /* 818 * Record the CRC error, to avoid downgrading to 819 * multiword DMA 820 */ 821 drvp->drive_flags |= DRIVE_DMAERR; 822 } 823 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 824 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 825 return WDC_ATA_ERR; 826 return WDC_ATA_NOERR; 827 } 828 829 if (chp->ch_status & WDCS_CORR) 830 ata_bio->flags |= ATA_CORR; 831 return WDC_ATA_NOERR; 832 } 833 834 int 835 wdc_ata_addref(drvp) 836 struct ata_drive_datas *drvp; 837 { 838 struct channel_softc *chp = drvp->chnl_softc; 839 840 return (wdc_addref(chp)); 841 } 842 843 void 844 wdc_ata_delref(drvp) 845 struct ata_drive_datas *drvp; 846 { 847 struct channel_softc *chp = drvp->chnl_softc; 848 849 wdc_delref(chp); 850 } 851
Indexes created Mon Sep 29 15:09:53 GMT 2025