ata_wdc.c revision 1.30
1 /* $NetBSD: ata_wdc.c,v 1.30 2001/06/13 18:17:40 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 /*- 36 * Copyright (c) 1998 The NetBSD Foundation, Inc. 37 * All rights reserved. 38 * 39 * This code is derived from software contributed to The NetBSD Foundation 40 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the NetBSD 53 * Foundation, Inc. and its contributors. 54 * 4. Neither the name of The NetBSD Foundation nor the names of its 55 * contributors may be used to endorse or promote products derived 56 * from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 #include <dev/ata/wdvar.h> 101 102 #define DEBUG_INTR 0x01 103 #define DEBUG_XFERS 0x02 104 #define DEBUG_STATUS 0x04 105 #define DEBUG_FUNCS 0x08 106 #define DEBUG_PROBE 0x10 107 #ifdef WDCDEBUG 108 int wdcdebug_wd_mask = 0; 109 #define WDCDEBUG_PRINT(args, level) \ 110 if (wdcdebug_wd_mask & (level)) \ 111 printf args 112 #else 113 #define WDCDEBUG_PRINT(args, level) 114 #endif 115 116 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 117 118 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 119 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 120 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 121 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 122 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 123 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 129 /* 130 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 131 * WDC_TRY_AGAIN. Must be called at splbio(). 132 */ 133 int 134 wdc_ata_bio(drvp, ata_bio) 135 struct ata_drive_datas *drvp; 136 struct ata_bio *ata_bio; 137 { 138 struct wdc_xfer *xfer; 139 struct channel_softc *chp = drvp->chnl_softc; 140 141 xfer = wdc_get_xfer(WDC_NOSLEEP); 142 if (xfer == NULL) 143 return WDC_TRY_AGAIN; 144 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 145 ata_bio->flags |= ATA_POLL; 146 if (ata_bio->flags & ATA_POLL) 147 xfer->c_flags |= C_POLL; 148 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 149 (ata_bio->flags & ATA_SINGLE) == 0) 150 xfer->c_flags |= C_DMA; 151 xfer->drive = drvp->drive; 152 xfer->cmd = ata_bio; 153 xfer->databuf = ata_bio->databuf; 154 xfer->c_bcount = ata_bio->bcount; 155 xfer->c_start = wdc_ata_bio_start; 156 xfer->c_intr = wdc_ata_bio_intr; 157 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 158 wdc_exec_xfer(chp, xfer); 159 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 160 } 161 162 void 163 wdc_ata_bio_start(chp, xfer) 164 struct channel_softc *chp; 165 struct wdc_xfer *xfer; 166 { 167 struct ata_bio *ata_bio = xfer->cmd; 168 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 169 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 170 DEBUG_XFERS); 171 172 /* start timeout machinery */ 173 if ((ata_bio->flags & ATA_POLL) == 0) 174 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 175 wdctimeout, chp); 176 _wdc_ata_bio_start(chp, xfer); 177 } 178 179 void 180 _wdc_ata_bio_start(chp, xfer) 181 struct channel_softc *chp; 182 struct wdc_xfer *xfer; 183 { 184 struct ata_bio *ata_bio = xfer->cmd; 185 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 186 u_int16_t cyl; 187 u_int8_t head, sect, cmd = 0; 188 int nblks; 189 int ata_delay; 190 int dma_flags = 0; 191 192 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 193 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 194 DEBUG_INTR | DEBUG_XFERS); 195 /* Do control operations specially. */ 196 if (drvp->state < READY) { 197 /* 198 * Actually, we want to be careful not to mess with the control 199 * state if the device is currently busy, but we can assume 200 * that we never get to this point if that's the case. 201 */ 202 /* at this point, we should only be in RECAL state */ 203 if (drvp->state != RESET) { 204 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 205 chp->wdc->sc_dev.dv_xname, chp->channel, 206 xfer->drive, drvp->state); 207 panic("_wdc_ata_bio_start: bad state"); 208 } 209 drvp->state = RECAL; 210 xfer->c_intr = wdc_ata_ctrl_intr; 211 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 212 WDSD_IBM | (xfer->drive << 4)); 213 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 214 goto timeout; 215 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 216 drvp->state = RECAL_WAIT; 217 if ((ata_bio->flags & ATA_POLL) == 0) { 218 chp->ch_flags |= WDCF_IRQ_WAIT; 219 } else { 220 /* Wait for at last 400ns for status bit to be valid */ 221 DELAY(1); 222 wdc_ata_ctrl_intr(chp, xfer, 0); 223 } 224 return; 225 } 226 227 if (xfer->c_flags & C_DMA) { 228 if (drvp->n_xfers <= NXFER) 229 drvp->n_xfers++; 230 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 231 } 232 if (ata_bio->flags & ATA_SINGLE) 233 ata_delay = ATA_DELAY; 234 else 235 ata_delay = ATA_DELAY; 236 again: 237 /* 238 * 239 * When starting a multi-sector transfer, or doing single-sector 240 * transfers... 241 */ 242 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 243 if (ata_bio->flags & ATA_SINGLE) 244 nblks = 1; 245 else 246 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 247 /* Check for bad sectors and adjust transfer, if necessary. */ 248 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 249 long blkdiff; 250 int i; 251 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 252 i++) { 253 blkdiff -= ata_bio->blkno; 254 if (blkdiff < 0) 255 continue; 256 if (blkdiff == 0) { 257 /* Replace current block of transfer. */ 258 ata_bio->blkno = 259 ata_bio->lp->d_secperunit - 260 ata_bio->lp->d_nsectors - i - 1; 261 } 262 if (blkdiff < nblks) { 263 /* Bad block inside transfer. */ 264 ata_bio->flags |= ATA_SINGLE; 265 nblks = 1; 266 } 267 break; 268 } 269 /* Transfer is okay now. */ 270 } 271 if (ata_bio->flags & ATA_LBA) { 272 sect = (ata_bio->blkno >> 0) & 0xff; 273 cyl = (ata_bio->blkno >> 8) & 0xffff; 274 head = (ata_bio->blkno >> 24) & 0x0f; 275 head |= WDSD_LBA; 276 } else { 277 int blkno = ata_bio->blkno; 278 sect = blkno % ata_bio->lp->d_nsectors; 279 sect++; /* Sectors begin with 1, not 0. */ 280 blkno /= ata_bio->lp->d_nsectors; 281 head = blkno % ata_bio->lp->d_ntracks; 282 blkno /= ata_bio->lp->d_ntracks; 283 cyl = blkno; 284 head |= WDSD_CHS; 285 } 286 if (xfer->c_flags & C_DMA) { 287 ata_bio->nblks = nblks; 288 ata_bio->nbytes = xfer->c_bcount; 289 cmd = (ata_bio->flags & ATA_READ) ? 290 WDCC_READDMA : WDCC_WRITEDMA; 291 /* Init the DMA channel. */ 292 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 293 chp->channel, xfer->drive, 294 (char *)xfer->databuf + xfer->c_skip, 295 ata_bio->nbytes, dma_flags) != 0) { 296 ata_bio->error = ERR_DMA; 297 ata_bio->r_error = 0; 298 wdc_ata_bio_done(chp, xfer); 299 return; 300 } 301 /* Initiate command */ 302 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 303 WDSD_IBM | (xfer->drive << 4)); 304 if (wait_for_ready(chp, ata_delay) < 0) 305 goto timeout; 306 wdccommand(chp, xfer->drive, cmd, cyl, 307 head, sect, nblks, 0); 308 /* start the DMA channel */ 309 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 310 chp->channel, xfer->drive); 311 chp->ch_flags |= WDCF_DMA_WAIT; 312 /* wait for irq */ 313 goto intr; 314 } /* else not DMA */ 315 ata_bio->nblks = min(nblks, ata_bio->multi); 316 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 317 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 318 cmd = (ata_bio->flags & ATA_READ) ? 319 WDCC_READMULTI : WDCC_WRITEMULTI; 320 } else { 321 cmd = (ata_bio->flags & ATA_READ) ? 322 WDCC_READ : WDCC_WRITE; 323 } 324 /* Initiate command! */ 325 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 326 WDSD_IBM | (xfer->drive << 4)); 327 if (wait_for_ready(chp, ata_delay) < 0) 328 goto timeout; 329 wdccommand(chp, xfer->drive, cmd, cyl, 330 head, sect, nblks, 331 (ata_bio->lp->d_type == DTYPE_ST506) ? 332 ata_bio->lp->d_precompcyl / 4 : 0); 333 } else if (ata_bio->nblks > 1) { 334 /* The number of blocks in the last stretch may be smaller. */ 335 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 336 if (ata_bio->nblks > nblks) { 337 ata_bio->nblks = nblks; 338 ata_bio->nbytes = xfer->c_bcount; 339 } 340 } 341 /* If this was a write and not using DMA, push the data. */ 342 if ((ata_bio->flags & ATA_READ) == 0) { 343 if (wait_for_drq(chp, ata_delay) != 0) { 344 printf("%s:%d:%d: timeout waiting for DRQ, " 345 "st=0x%02x, err=0x%02x\n", 346 chp->wdc->sc_dev.dv_xname, chp->channel, 347 xfer->drive, chp->ch_status, chp->ch_error); 348 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 349 ata_bio->error = TIMEOUT; 350 wdc_ata_bio_done(chp, xfer); 351 return; 352 } 353 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 354 wdc_ata_bio_done(chp, xfer); 355 return; 356 } 357 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 358 if (drvp->drive_flags & DRIVE_CAP32) { 359 bus_space_write_multi_4(chp->data32iot, 360 chp->data32ioh, 0, 361 (u_int32_t *)((char *)xfer->databuf + 362 xfer->c_skip), 363 ata_bio->nbytes >> 2); 364 } else { 365 bus_space_write_multi_2(chp->cmd_iot, 366 chp->cmd_ioh, wd_data, 367 (u_int16_t *)((char *)xfer->databuf + 368 xfer->c_skip), 369 ata_bio->nbytes >> 1); 370 } 371 } else { 372 if (drvp->drive_flags & DRIVE_CAP32) { 373 bus_space_write_multi_stream_4(chp->data32iot, 374 chp->data32ioh, 0, 375 (u_int32_t *)((char *)xfer->databuf + 376 xfer->c_skip), 377 ata_bio->nbytes >> 2); 378 } else { 379 bus_space_write_multi_stream_2(chp->cmd_iot, 380 chp->cmd_ioh, wd_data, 381 (u_int16_t *)((char *)xfer->databuf + 382 xfer->c_skip), 383 ata_bio->nbytes >> 1); 384 } 385 } 386 } 387 388 intr: /* Wait for IRQ (either real or polled) */ 389 if ((ata_bio->flags & ATA_POLL) == 0) { 390 chp->ch_flags |= WDCF_IRQ_WAIT; 391 } else { 392 /* Wait for at last 400ns for status bit to be valid */ 393 delay(1); 394 if (chp->ch_flags & WDCF_DMA_WAIT) { 395 wdc_dmawait(chp, xfer, ATA_DELAY); 396 chp->ch_flags &= ~WDCF_DMA_WAIT; 397 } 398 wdc_ata_bio_intr(chp, xfer, 0); 399 if ((ata_bio->flags & ATA_ITSDONE) == 0) 400 goto again; 401 } 402 return; 403 timeout: 404 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 405 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 406 chp->ch_status, chp->ch_error); 407 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 408 ata_bio->error = TIMEOUT; 409 wdc_ata_bio_done(chp, xfer); 410 return; 411 } 412 413 int 414 wdc_ata_bio_intr(chp, xfer, irq) 415 struct channel_softc *chp; 416 struct wdc_xfer *xfer; 417 int irq; 418 { 419 struct ata_bio *ata_bio = xfer->cmd; 420 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 421 int drv_err; 422 423 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 424 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 425 DEBUG_INTR | DEBUG_XFERS); 426 427 428 /* Is it not a transfer, but a control operation? */ 429 if (drvp->state < READY) { 430 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 431 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 432 drvp->state); 433 panic("wdc_ata_bio_intr: bad state\n"); 434 } 435 436 /* 437 * if we missed an interrupt in a PIO transfer, reset and restart. 438 * Don't try to continue transfer, we may have missed cycles. 439 */ 440 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 441 ata_bio->error = TIMEOUT; 442 wdc_ata_bio_done(chp, xfer); 443 return 1; 444 } 445 446 /* Ack interrupt done by wait_for_unbusy */ 447 if (wait_for_unbusy(chp, 448 (irq == 0) ? ATA_DELAY : 0) < 0) { 449 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 450 return 0; /* IRQ was not for us */ 451 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 452 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 453 xfer->c_bcount, xfer->c_skip); 454 /* if we were using DMA, flag a DMA error */ 455 if (xfer->c_flags & C_DMA) { 456 ata_dmaerr(drvp); 457 } 458 ata_bio->error = TIMEOUT; 459 wdc_ata_bio_done(chp, xfer); 460 return 1; 461 } 462 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 463 chp->wdc->irqack(chp); 464 465 drv_err = wdc_ata_err(drvp, ata_bio); 466 467 /* If we were using DMA, Turn off the DMA channel and check for error */ 468 if (xfer->c_flags & C_DMA) { 469 if (ata_bio->flags & ATA_POLL) { 470 /* 471 * IDE drives deassert WDCS_BSY before transfer is 472 * complete when using DMA. Polling for DRQ to deassert 473 * is not enouth DRQ is not required to be 474 * asserted for DMA transfers, so poll for DRDY. 475 */ 476 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 477 ATA_DELAY) < 0) { 478 printf("%s:%d:%d: polled transfer timed out " 479 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 480 chp->channel, xfer->drive, chp->ch_status); 481 ata_bio->error = TIMEOUT; 482 drv_err = WDC_ATA_ERR; 483 } 484 } 485 if (chp->wdc->dma_status != 0) { 486 if (drv_err != WDC_ATA_ERR) { 487 ata_bio->error = ERR_DMA; 488 drv_err = WDC_ATA_ERR; 489 } 490 } 491 if (chp->ch_status & WDCS_DRQ) { 492 if (drv_err != WDC_ATA_ERR) { 493 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 494 chp->wdc->sc_dev.dv_xname, chp->channel, 495 xfer->drive, chp->ch_status); 496 ata_bio->error = TIMEOUT; 497 drv_err = WDC_ATA_ERR; 498 } 499 } 500 if (drv_err != WDC_ATA_ERR) 501 goto end; 502 ata_dmaerr(drvp); 503 } 504 505 /* if we had an error, end */ 506 if (drv_err == WDC_ATA_ERR) { 507 wdc_ata_bio_done(chp, xfer); 508 return 1; 509 } 510 511 /* If this was a read and not using DMA, fetch the data. */ 512 if ((ata_bio->flags & ATA_READ) != 0) { 513 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 514 printf("%s:%d:%d: read intr before drq\n", 515 chp->wdc->sc_dev.dv_xname, chp->channel, 516 xfer->drive); 517 ata_bio->error = TIMEOUT; 518 wdc_ata_bio_done(chp, xfer); 519 return 1; 520 } 521 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 522 if (drvp->drive_flags & DRIVE_CAP32) { 523 bus_space_read_multi_4(chp->data32iot, 524 chp->data32ioh, 0, 525 (u_int32_t *)((char *)xfer->databuf + 526 xfer->c_skip), 527 ata_bio->nbytes >> 2); 528 } else { 529 bus_space_read_multi_2(chp->cmd_iot, 530 chp->cmd_ioh, wd_data, 531 (u_int16_t *)((char *)xfer->databuf + 532 xfer->c_skip), 533 ata_bio->nbytes >> 1); 534 } 535 } else { 536 if (drvp->drive_flags & DRIVE_CAP32) { 537 bus_space_read_multi_stream_4(chp->data32iot, 538 chp->data32ioh, 0, 539 (u_int32_t *)((char *)xfer->databuf + 540 xfer->c_skip), 541 ata_bio->nbytes >> 2); 542 } else { 543 bus_space_read_multi_stream_2(chp->cmd_iot, 544 chp->cmd_ioh, wd_data, 545 (u_int16_t *)((char *)xfer->databuf + 546 xfer->c_skip), 547 ata_bio->nbytes >> 1); 548 } 549 } 550 } 551 552 end: 553 ata_bio->blkno += ata_bio->nblks; 554 ata_bio->blkdone += ata_bio->nblks; 555 xfer->c_skip += ata_bio->nbytes; 556 xfer->c_bcount -= ata_bio->nbytes; 557 /* See if this transfer is complete. */ 558 if (xfer->c_bcount > 0) { 559 if ((ata_bio->flags & ATA_POLL) == 0) { 560 /* Start the next operation */ 561 _wdc_ata_bio_start(chp, xfer); 562 } else { 563 /* Let _wdc_ata_bio_start do the loop */ 564 return 1; 565 } 566 } else { /* Done with this transfer */ 567 ata_bio->error = NOERROR; 568 wdc_ata_bio_done(chp, xfer); 569 } 570 return 1; 571 } 572 573 void 574 wdc_ata_kill_pending(drvp) 575 struct ata_drive_datas *drvp; 576 { 577 struct channel_softc *chp = drvp->chnl_softc; 578 579 wdc_kill_pending(chp); 580 } 581 582 void 583 wdc_ata_bio_kill_xfer(chp, xfer) 584 struct channel_softc *chp; 585 struct wdc_xfer *xfer; 586 { 587 struct ata_bio *ata_bio = xfer->cmd; 588 int drive = xfer->drive; 589 590 callout_stop(&chp->ch_callout); 591 /* remove this command from xfer queue */ 592 wdc_free_xfer(chp, xfer); 593 594 ata_bio->flags |= ATA_ITSDONE; 595 ata_bio->error = ERR_NODEV; 596 ata_bio->r_error = WDCE_ABRT; 597 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 598 wddone(chp->ch_drive[drive].drv_softc); 599 } 600 601 void 602 wdc_ata_bio_done(chp, xfer) 603 struct channel_softc *chp; 604 struct wdc_xfer *xfer; 605 { 606 struct ata_bio *ata_bio = xfer->cmd; 607 int drive = xfer->drive; 608 609 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 610 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 611 (u_int)xfer->c_flags), 612 DEBUG_XFERS); 613 614 callout_stop(&chp->ch_callout); 615 616 /* feed back residual bcount to our caller */ 617 ata_bio->bcount = xfer->c_bcount; 618 619 /* remove this command from xfer queue */ 620 wdc_free_xfer(chp, xfer); 621 622 ata_bio->flags |= ATA_ITSDONE; 623 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 624 wddone(chp->ch_drive[drive].drv_softc); 625 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 626 chp->ch_flags), DEBUG_XFERS); 627 wdcstart(chp); 628 } 629 630 /* 631 * Implement operations needed before read/write. 632 */ 633 int 634 wdc_ata_ctrl_intr(chp, xfer, irq) 635 struct channel_softc *chp; 636 struct wdc_xfer *xfer; 637 int irq; 638 { 639 struct ata_bio *ata_bio = xfer->cmd; 640 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 641 char *errstring = NULL; 642 int delay = (irq == 0) ? ATA_DELAY : 0; 643 644 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 645 DEBUG_FUNCS); 646 647 again: 648 switch (drvp->state) { 649 case RECAL: /* Should not be in this state here */ 650 panic("wdc_ata_ctrl_intr: state==RECAL"); 651 break; 652 653 case RECAL_WAIT: 654 errstring = "recal"; 655 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 656 goto timeout; 657 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 658 chp->wdc->irqack(chp); 659 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 660 goto error; 661 /* fall through */ 662 663 case PIOMODE: 664 /* Don't try to set modes if controller can't be adjusted */ 665 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 666 goto geometry; 667 /* Also don't try if the drive didn't report its mode */ 668 if ((drvp->drive_flags & DRIVE_MODE) == 0) 669 goto geometry; 670 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 671 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 672 drvp->state = PIOMODE_WAIT; 673 break; 674 675 case PIOMODE_WAIT: 676 errstring = "piomode"; 677 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 678 goto timeout; 679 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 680 chp->wdc->irqack(chp); 681 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 682 goto error; 683 /* fall through */ 684 685 case DMAMODE: 686 if (drvp->drive_flags & DRIVE_UDMA) { 687 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 688 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 689 } else if (drvp->drive_flags & DRIVE_DMA) { 690 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 691 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 692 } else { 693 goto geometry; 694 } 695 drvp->state = DMAMODE_WAIT; 696 break; 697 case DMAMODE_WAIT: 698 errstring = "dmamode"; 699 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 700 goto timeout; 701 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 702 chp->wdc->irqack(chp); 703 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 704 goto error; 705 /* fall through */ 706 707 case GEOMETRY: 708 geometry: 709 if (ata_bio->flags & ATA_LBA) 710 goto multimode; 711 wdccommand(chp, xfer->drive, WDCC_IDP, 712 ata_bio->lp->d_ncylinders, 713 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 714 (ata_bio->lp->d_type == DTYPE_ST506) ? 715 ata_bio->lp->d_precompcyl / 4 : 0); 716 drvp->state = GEOMETRY_WAIT; 717 break; 718 719 case GEOMETRY_WAIT: 720 errstring = "geometry"; 721 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 722 goto timeout; 723 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 724 chp->wdc->irqack(chp); 725 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 726 goto error; 727 /* fall through */ 728 729 case MULTIMODE: 730 multimode: 731 if (ata_bio->multi == 1) 732 goto ready; 733 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 734 ata_bio->multi, 0); 735 drvp->state = MULTIMODE_WAIT; 736 break; 737 738 case MULTIMODE_WAIT: 739 errstring = "setmulti"; 740 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 741 goto timeout; 742 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 743 chp->wdc->irqack(chp); 744 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 745 goto error; 746 /* fall through */ 747 748 case READY: 749 ready: 750 drvp->state = READY; 751 /* 752 * The drive is usable now 753 */ 754 xfer->c_intr = wdc_ata_bio_intr; 755 _wdc_ata_bio_start(chp, xfer); 756 return 1; 757 } 758 759 if ((ata_bio->flags & ATA_POLL) == 0) { 760 chp->ch_flags |= WDCF_IRQ_WAIT; 761 } else { 762 goto again; 763 } 764 return 1; 765 766 timeout: 767 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 768 return 0; /* IRQ was not for us */ 769 } 770 printf("%s:%d:%d: %s timed out\n", 771 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 772 ata_bio->error = TIMEOUT; 773 drvp->state = 0; 774 wdc_ata_bio_done(chp, xfer); 775 return 0; 776 error: 777 printf("%s:%d:%d: %s ", 778 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 779 errstring); 780 if (chp->ch_status & WDCS_DWF) { 781 printf("drive fault\n"); 782 ata_bio->error = ERR_DF; 783 } else { 784 printf("error (%x)\n", chp->ch_error); 785 ata_bio->r_error = chp->ch_error; 786 ata_bio->error = ERROR; 787 } 788 drvp->state = 0; 789 wdc_ata_bio_done(chp, xfer); 790 return 1; 791 } 792 793 int 794 wdc_ata_err(drvp, ata_bio) 795 struct ata_drive_datas *drvp; 796 struct ata_bio *ata_bio; 797 { 798 struct channel_softc *chp = drvp->chnl_softc; 799 ata_bio->error = 0; 800 if (chp->ch_status & WDCS_BSY) { 801 ata_bio->error = TIMEOUT; 802 return WDC_ATA_ERR; 803 } 804 805 if (chp->ch_status & WDCS_DWF) { 806 ata_bio->error = ERR_DF; 807 return WDC_ATA_ERR; 808 } 809 810 if (chp->ch_status & WDCS_ERR) { 811 ata_bio->error = ERROR; 812 ata_bio->r_error = chp->ch_error; 813 if (drvp->drive_flags & DRIVE_UDMA && 814 (ata_bio->r_error & WDCE_CRC)) { 815 /* 816 * Record the CRC error, to avoid downgrading to 817 * multiword DMA 818 */ 819 drvp->drive_flags |= DRIVE_DMAERR; 820 } 821 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 822 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 823 return WDC_ATA_ERR; 824 return WDC_ATA_NOERR; 825 } 826 827 if (chp->ch_status & WDCS_CORR) 828 ata_bio->flags |= ATA_CORR; 829 return WDC_ATA_NOERR; 830 } 831 832 int 833 wdc_ata_addref(drvp) 834 struct ata_drive_datas *drvp; 835 { 836 struct channel_softc *chp = drvp->chnl_softc; 837 838 return (wdc_addref(chp)); 839 } 840 841 void 842 wdc_ata_delref(drvp) 843 struct ata_drive_datas *drvp; 844 { 845 struct channel_softc *chp = drvp->chnl_softc; 846 847 wdc_delref(chp); 848 } 849
Indexes created Thu Oct 23 22:10:10 GMT 2025