ata_wdc.c revision 1.31
1 /* $NetBSD: ata_wdc.c,v 1.31 2001/11/13 12:53:09 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 /*- 36 * Copyright (c) 1998 The NetBSD Foundation, Inc. 37 * All rights reserved. 38 * 39 * This code is derived from software contributed to The NetBSD Foundation 40 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the NetBSD 53 * Foundation, Inc. and its contributors. 54 * 4. Neither the name of The NetBSD Foundation nor the names of its 55 * contributors may be used to endorse or promote products derived 56 * from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.31 2001/11/13 12:53:09 lukem Exp $"); 73 74 #ifndef WDCDEBUG 75 #define WDCDEBUG 76 #endif /* WDCDEBUG */ 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/kernel.h> 81 #include <sys/file.h> 82 #include <sys/stat.h> 83 #include <sys/buf.h> 84 #include <sys/malloc.h> 85 #include <sys/device.h> 86 #include <sys/disklabel.h> 87 #include <sys/syslog.h> 88 #include <sys/proc.h> 89 90 #include <machine/intr.h> 91 #include <machine/bus.h> 92 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 93 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 94 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 95 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 96 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 97 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 98 99 #include <dev/ata/atareg.h> 100 #include <dev/ata/atavar.h> 101 #include <dev/ic/wdcreg.h> 102 #include <dev/ic/wdcvar.h> 103 #include <dev/ata/wdvar.h> 104 105 #define DEBUG_INTR 0x01 106 #define DEBUG_XFERS 0x02 107 #define DEBUG_STATUS 0x04 108 #define DEBUG_FUNCS 0x08 109 #define DEBUG_PROBE 0x10 110 #ifdef WDCDEBUG 111 int wdcdebug_wd_mask = 0; 112 #define WDCDEBUG_PRINT(args, level) \ 113 if (wdcdebug_wd_mask & (level)) \ 114 printf args 115 #else 116 #define WDCDEBUG_PRINT(args, level) 117 #endif 118 119 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 120 121 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 122 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 123 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 125 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 126 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 127 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 128 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 129 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 130 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 131 132 /* 133 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 134 * WDC_TRY_AGAIN. Must be called at splbio(). 135 */ 136 int 137 wdc_ata_bio(drvp, ata_bio) 138 struct ata_drive_datas *drvp; 139 struct ata_bio *ata_bio; 140 { 141 struct wdc_xfer *xfer; 142 struct channel_softc *chp = drvp->chnl_softc; 143 144 xfer = wdc_get_xfer(WDC_NOSLEEP); 145 if (xfer == NULL) 146 return WDC_TRY_AGAIN; 147 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 148 ata_bio->flags |= ATA_POLL; 149 if (ata_bio->flags & ATA_POLL) 150 xfer->c_flags |= C_POLL; 151 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 152 (ata_bio->flags & ATA_SINGLE) == 0) 153 xfer->c_flags |= C_DMA; 154 xfer->drive = drvp->drive; 155 xfer->cmd = ata_bio; 156 xfer->databuf = ata_bio->databuf; 157 xfer->c_bcount = ata_bio->bcount; 158 xfer->c_start = wdc_ata_bio_start; 159 xfer->c_intr = wdc_ata_bio_intr; 160 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 161 wdc_exec_xfer(chp, xfer); 162 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 163 } 164 165 void 166 wdc_ata_bio_start(chp, xfer) 167 struct channel_softc *chp; 168 struct wdc_xfer *xfer; 169 { 170 struct ata_bio *ata_bio = xfer->cmd; 171 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 172 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 173 DEBUG_XFERS); 174 175 /* start timeout machinery */ 176 if ((ata_bio->flags & ATA_POLL) == 0) 177 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 178 wdctimeout, chp); 179 _wdc_ata_bio_start(chp, xfer); 180 } 181 182 void 183 _wdc_ata_bio_start(chp, xfer) 184 struct channel_softc *chp; 185 struct wdc_xfer *xfer; 186 { 187 struct ata_bio *ata_bio = xfer->cmd; 188 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 189 u_int16_t cyl; 190 u_int8_t head, sect, cmd = 0; 191 int nblks; 192 int ata_delay; 193 int dma_flags = 0; 194 195 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 196 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 197 DEBUG_INTR | DEBUG_XFERS); 198 /* Do control operations specially. */ 199 if (drvp->state < READY) { 200 /* 201 * Actually, we want to be careful not to mess with the control 202 * state if the device is currently busy, but we can assume 203 * that we never get to this point if that's the case. 204 */ 205 /* at this point, we should only be in RECAL state */ 206 if (drvp->state != RESET) { 207 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 208 chp->wdc->sc_dev.dv_xname, chp->channel, 209 xfer->drive, drvp->state); 210 panic("_wdc_ata_bio_start: bad state"); 211 } 212 drvp->state = RECAL; 213 xfer->c_intr = wdc_ata_ctrl_intr; 214 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 215 WDSD_IBM | (xfer->drive << 4)); 216 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 217 goto timeout; 218 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 219 drvp->state = RECAL_WAIT; 220 if ((ata_bio->flags & ATA_POLL) == 0) { 221 chp->ch_flags |= WDCF_IRQ_WAIT; 222 } else { 223 /* Wait for at last 400ns for status bit to be valid */ 224 DELAY(1); 225 wdc_ata_ctrl_intr(chp, xfer, 0); 226 } 227 return; 228 } 229 230 if (xfer->c_flags & C_DMA) { 231 if (drvp->n_xfers <= NXFER) 232 drvp->n_xfers++; 233 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 234 } 235 if (ata_bio->flags & ATA_SINGLE) 236 ata_delay = ATA_DELAY; 237 else 238 ata_delay = ATA_DELAY; 239 again: 240 /* 241 * 242 * When starting a multi-sector transfer, or doing single-sector 243 * transfers... 244 */ 245 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 246 if (ata_bio->flags & ATA_SINGLE) 247 nblks = 1; 248 else 249 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 250 /* Check for bad sectors and adjust transfer, if necessary. */ 251 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 252 long blkdiff; 253 int i; 254 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 255 i++) { 256 blkdiff -= ata_bio->blkno; 257 if (blkdiff < 0) 258 continue; 259 if (blkdiff == 0) { 260 /* Replace current block of transfer. */ 261 ata_bio->blkno = 262 ata_bio->lp->d_secperunit - 263 ata_bio->lp->d_nsectors - i - 1; 264 } 265 if (blkdiff < nblks) { 266 /* Bad block inside transfer. */ 267 ata_bio->flags |= ATA_SINGLE; 268 nblks = 1; 269 } 270 break; 271 } 272 /* Transfer is okay now. */ 273 } 274 if (ata_bio->flags & ATA_LBA) { 275 sect = (ata_bio->blkno >> 0) & 0xff; 276 cyl = (ata_bio->blkno >> 8) & 0xffff; 277 head = (ata_bio->blkno >> 24) & 0x0f; 278 head |= WDSD_LBA; 279 } else { 280 int blkno = ata_bio->blkno; 281 sect = blkno % ata_bio->lp->d_nsectors; 282 sect++; /* Sectors begin with 1, not 0. */ 283 blkno /= ata_bio->lp->d_nsectors; 284 head = blkno % ata_bio->lp->d_ntracks; 285 blkno /= ata_bio->lp->d_ntracks; 286 cyl = blkno; 287 head |= WDSD_CHS; 288 } 289 if (xfer->c_flags & C_DMA) { 290 ata_bio->nblks = nblks; 291 ata_bio->nbytes = xfer->c_bcount; 292 cmd = (ata_bio->flags & ATA_READ) ? 293 WDCC_READDMA : WDCC_WRITEDMA; 294 /* Init the DMA channel. */ 295 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 296 chp->channel, xfer->drive, 297 (char *)xfer->databuf + xfer->c_skip, 298 ata_bio->nbytes, dma_flags) != 0) { 299 ata_bio->error = ERR_DMA; 300 ata_bio->r_error = 0; 301 wdc_ata_bio_done(chp, xfer); 302 return; 303 } 304 /* Initiate command */ 305 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 306 WDSD_IBM | (xfer->drive << 4)); 307 if (wait_for_ready(chp, ata_delay) < 0) 308 goto timeout; 309 wdccommand(chp, xfer->drive, cmd, cyl, 310 head, sect, nblks, 0); 311 /* start the DMA channel */ 312 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 313 chp->channel, xfer->drive); 314 chp->ch_flags |= WDCF_DMA_WAIT; 315 /* wait for irq */ 316 goto intr; 317 } /* else not DMA */ 318 ata_bio->nblks = min(nblks, ata_bio->multi); 319 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 320 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 321 cmd = (ata_bio->flags & ATA_READ) ? 322 WDCC_READMULTI : WDCC_WRITEMULTI; 323 } else { 324 cmd = (ata_bio->flags & ATA_READ) ? 325 WDCC_READ : WDCC_WRITE; 326 } 327 /* Initiate command! */ 328 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 329 WDSD_IBM | (xfer->drive << 4)); 330 if (wait_for_ready(chp, ata_delay) < 0) 331 goto timeout; 332 wdccommand(chp, xfer->drive, cmd, cyl, 333 head, sect, nblks, 334 (ata_bio->lp->d_type == DTYPE_ST506) ? 335 ata_bio->lp->d_precompcyl / 4 : 0); 336 } else if (ata_bio->nblks > 1) { 337 /* The number of blocks in the last stretch may be smaller. */ 338 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 339 if (ata_bio->nblks > nblks) { 340 ata_bio->nblks = nblks; 341 ata_bio->nbytes = xfer->c_bcount; 342 } 343 } 344 /* If this was a write and not using DMA, push the data. */ 345 if ((ata_bio->flags & ATA_READ) == 0) { 346 if (wait_for_drq(chp, ata_delay) != 0) { 347 printf("%s:%d:%d: timeout waiting for DRQ, " 348 "st=0x%02x, err=0x%02x\n", 349 chp->wdc->sc_dev.dv_xname, chp->channel, 350 xfer->drive, chp->ch_status, chp->ch_error); 351 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 352 ata_bio->error = TIMEOUT; 353 wdc_ata_bio_done(chp, xfer); 354 return; 355 } 356 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 357 wdc_ata_bio_done(chp, xfer); 358 return; 359 } 360 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 361 if (drvp->drive_flags & DRIVE_CAP32) { 362 bus_space_write_multi_4(chp->data32iot, 363 chp->data32ioh, 0, 364 (u_int32_t *)((char *)xfer->databuf + 365 xfer->c_skip), 366 ata_bio->nbytes >> 2); 367 } else { 368 bus_space_write_multi_2(chp->cmd_iot, 369 chp->cmd_ioh, wd_data, 370 (u_int16_t *)((char *)xfer->databuf + 371 xfer->c_skip), 372 ata_bio->nbytes >> 1); 373 } 374 } else { 375 if (drvp->drive_flags & DRIVE_CAP32) { 376 bus_space_write_multi_stream_4(chp->data32iot, 377 chp->data32ioh, 0, 378 (u_int32_t *)((char *)xfer->databuf + 379 xfer->c_skip), 380 ata_bio->nbytes >> 2); 381 } else { 382 bus_space_write_multi_stream_2(chp->cmd_iot, 383 chp->cmd_ioh, wd_data, 384 (u_int16_t *)((char *)xfer->databuf + 385 xfer->c_skip), 386 ata_bio->nbytes >> 1); 387 } 388 } 389 } 390 391 intr: /* Wait for IRQ (either real or polled) */ 392 if ((ata_bio->flags & ATA_POLL) == 0) { 393 chp->ch_flags |= WDCF_IRQ_WAIT; 394 } else { 395 /* Wait for at last 400ns for status bit to be valid */ 396 delay(1); 397 if (chp->ch_flags & WDCF_DMA_WAIT) { 398 wdc_dmawait(chp, xfer, ATA_DELAY); 399 chp->ch_flags &= ~WDCF_DMA_WAIT; 400 } 401 wdc_ata_bio_intr(chp, xfer, 0); 402 if ((ata_bio->flags & ATA_ITSDONE) == 0) 403 goto again; 404 } 405 return; 406 timeout: 407 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 408 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 409 chp->ch_status, chp->ch_error); 410 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 411 ata_bio->error = TIMEOUT; 412 wdc_ata_bio_done(chp, xfer); 413 return; 414 } 415 416 int 417 wdc_ata_bio_intr(chp, xfer, irq) 418 struct channel_softc *chp; 419 struct wdc_xfer *xfer; 420 int irq; 421 { 422 struct ata_bio *ata_bio = xfer->cmd; 423 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 424 int drv_err; 425 426 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 427 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 428 DEBUG_INTR | DEBUG_XFERS); 429 430 431 /* Is it not a transfer, but a control operation? */ 432 if (drvp->state < READY) { 433 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 434 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 435 drvp->state); 436 panic("wdc_ata_bio_intr: bad state\n"); 437 } 438 439 /* 440 * if we missed an interrupt in a PIO transfer, reset and restart. 441 * Don't try to continue transfer, we may have missed cycles. 442 */ 443 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 444 ata_bio->error = TIMEOUT; 445 wdc_ata_bio_done(chp, xfer); 446 return 1; 447 } 448 449 /* Ack interrupt done by wait_for_unbusy */ 450 if (wait_for_unbusy(chp, 451 (irq == 0) ? ATA_DELAY : 0) < 0) { 452 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 453 return 0; /* IRQ was not for us */ 454 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 455 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 456 xfer->c_bcount, xfer->c_skip); 457 /* if we were using DMA, flag a DMA error */ 458 if (xfer->c_flags & C_DMA) { 459 ata_dmaerr(drvp); 460 } 461 ata_bio->error = TIMEOUT; 462 wdc_ata_bio_done(chp, xfer); 463 return 1; 464 } 465 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 466 chp->wdc->irqack(chp); 467 468 drv_err = wdc_ata_err(drvp, ata_bio); 469 470 /* If we were using DMA, Turn off the DMA channel and check for error */ 471 if (xfer->c_flags & C_DMA) { 472 if (ata_bio->flags & ATA_POLL) { 473 /* 474 * IDE drives deassert WDCS_BSY before transfer is 475 * complete when using DMA. Polling for DRQ to deassert 476 * is not enouth DRQ is not required to be 477 * asserted for DMA transfers, so poll for DRDY. 478 */ 479 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 480 ATA_DELAY) < 0) { 481 printf("%s:%d:%d: polled transfer timed out " 482 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 483 chp->channel, xfer->drive, chp->ch_status); 484 ata_bio->error = TIMEOUT; 485 drv_err = WDC_ATA_ERR; 486 } 487 } 488 if (chp->wdc->dma_status != 0) { 489 if (drv_err != WDC_ATA_ERR) { 490 ata_bio->error = ERR_DMA; 491 drv_err = WDC_ATA_ERR; 492 } 493 } 494 if (chp->ch_status & WDCS_DRQ) { 495 if (drv_err != WDC_ATA_ERR) { 496 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 497 chp->wdc->sc_dev.dv_xname, chp->channel, 498 xfer->drive, chp->ch_status); 499 ata_bio->error = TIMEOUT; 500 drv_err = WDC_ATA_ERR; 501 } 502 } 503 if (drv_err != WDC_ATA_ERR) 504 goto end; 505 ata_dmaerr(drvp); 506 } 507 508 /* if we had an error, end */ 509 if (drv_err == WDC_ATA_ERR) { 510 wdc_ata_bio_done(chp, xfer); 511 return 1; 512 } 513 514 /* If this was a read and not using DMA, fetch the data. */ 515 if ((ata_bio->flags & ATA_READ) != 0) { 516 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 517 printf("%s:%d:%d: read intr before drq\n", 518 chp->wdc->sc_dev.dv_xname, chp->channel, 519 xfer->drive); 520 ata_bio->error = TIMEOUT; 521 wdc_ata_bio_done(chp, xfer); 522 return 1; 523 } 524 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 525 if (drvp->drive_flags & DRIVE_CAP32) { 526 bus_space_read_multi_4(chp->data32iot, 527 chp->data32ioh, 0, 528 (u_int32_t *)((char *)xfer->databuf + 529 xfer->c_skip), 530 ata_bio->nbytes >> 2); 531 } else { 532 bus_space_read_multi_2(chp->cmd_iot, 533 chp->cmd_ioh, wd_data, 534 (u_int16_t *)((char *)xfer->databuf + 535 xfer->c_skip), 536 ata_bio->nbytes >> 1); 537 } 538 } else { 539 if (drvp->drive_flags & DRIVE_CAP32) { 540 bus_space_read_multi_stream_4(chp->data32iot, 541 chp->data32ioh, 0, 542 (u_int32_t *)((char *)xfer->databuf + 543 xfer->c_skip), 544 ata_bio->nbytes >> 2); 545 } else { 546 bus_space_read_multi_stream_2(chp->cmd_iot, 547 chp->cmd_ioh, wd_data, 548 (u_int16_t *)((char *)xfer->databuf + 549 xfer->c_skip), 550 ata_bio->nbytes >> 1); 551 } 552 } 553 } 554 555 end: 556 ata_bio->blkno += ata_bio->nblks; 557 ata_bio->blkdone += ata_bio->nblks; 558 xfer->c_skip += ata_bio->nbytes; 559 xfer->c_bcount -= ata_bio->nbytes; 560 /* See if this transfer is complete. */ 561 if (xfer->c_bcount > 0) { 562 if ((ata_bio->flags & ATA_POLL) == 0) { 563 /* Start the next operation */ 564 _wdc_ata_bio_start(chp, xfer); 565 } else { 566 /* Let _wdc_ata_bio_start do the loop */ 567 return 1; 568 } 569 } else { /* Done with this transfer */ 570 ata_bio->error = NOERROR; 571 wdc_ata_bio_done(chp, xfer); 572 } 573 return 1; 574 } 575 576 void 577 wdc_ata_kill_pending(drvp) 578 struct ata_drive_datas *drvp; 579 { 580 struct channel_softc *chp = drvp->chnl_softc; 581 582 wdc_kill_pending(chp); 583 } 584 585 void 586 wdc_ata_bio_kill_xfer(chp, xfer) 587 struct channel_softc *chp; 588 struct wdc_xfer *xfer; 589 { 590 struct ata_bio *ata_bio = xfer->cmd; 591 int drive = xfer->drive; 592 593 callout_stop(&chp->ch_callout); 594 /* remove this command from xfer queue */ 595 wdc_free_xfer(chp, xfer); 596 597 ata_bio->flags |= ATA_ITSDONE; 598 ata_bio->error = ERR_NODEV; 599 ata_bio->r_error = WDCE_ABRT; 600 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 601 wddone(chp->ch_drive[drive].drv_softc); 602 } 603 604 void 605 wdc_ata_bio_done(chp, xfer) 606 struct channel_softc *chp; 607 struct wdc_xfer *xfer; 608 { 609 struct ata_bio *ata_bio = xfer->cmd; 610 int drive = xfer->drive; 611 612 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 613 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 614 (u_int)xfer->c_flags), 615 DEBUG_XFERS); 616 617 callout_stop(&chp->ch_callout); 618 619 /* feed back residual bcount to our caller */ 620 ata_bio->bcount = xfer->c_bcount; 621 622 /* remove this command from xfer queue */ 623 wdc_free_xfer(chp, xfer); 624 625 ata_bio->flags |= ATA_ITSDONE; 626 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 627 wddone(chp->ch_drive[drive].drv_softc); 628 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 629 chp->ch_flags), DEBUG_XFERS); 630 wdcstart(chp); 631 } 632 633 /* 634 * Implement operations needed before read/write. 635 */ 636 int 637 wdc_ata_ctrl_intr(chp, xfer, irq) 638 struct channel_softc *chp; 639 struct wdc_xfer *xfer; 640 int irq; 641 { 642 struct ata_bio *ata_bio = xfer->cmd; 643 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 644 char *errstring = NULL; 645 int delay = (irq == 0) ? ATA_DELAY : 0; 646 647 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 648 DEBUG_FUNCS); 649 650 again: 651 switch (drvp->state) { 652 case RECAL: /* Should not be in this state here */ 653 panic("wdc_ata_ctrl_intr: state==RECAL"); 654 break; 655 656 case RECAL_WAIT: 657 errstring = "recal"; 658 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 659 goto timeout; 660 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 661 chp->wdc->irqack(chp); 662 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 663 goto error; 664 /* fall through */ 665 666 case PIOMODE: 667 /* Don't try to set modes if controller can't be adjusted */ 668 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 669 goto geometry; 670 /* Also don't try if the drive didn't report its mode */ 671 if ((drvp->drive_flags & DRIVE_MODE) == 0) 672 goto geometry; 673 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 674 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 675 drvp->state = PIOMODE_WAIT; 676 break; 677 678 case PIOMODE_WAIT: 679 errstring = "piomode"; 680 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 681 goto timeout; 682 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 683 chp->wdc->irqack(chp); 684 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 685 goto error; 686 /* fall through */ 687 688 case DMAMODE: 689 if (drvp->drive_flags & DRIVE_UDMA) { 690 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 691 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 692 } else if (drvp->drive_flags & DRIVE_DMA) { 693 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 694 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 695 } else { 696 goto geometry; 697 } 698 drvp->state = DMAMODE_WAIT; 699 break; 700 case DMAMODE_WAIT: 701 errstring = "dmamode"; 702 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 703 goto timeout; 704 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 705 chp->wdc->irqack(chp); 706 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 707 goto error; 708 /* fall through */ 709 710 case GEOMETRY: 711 geometry: 712 if (ata_bio->flags & ATA_LBA) 713 goto multimode; 714 wdccommand(chp, xfer->drive, WDCC_IDP, 715 ata_bio->lp->d_ncylinders, 716 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 717 (ata_bio->lp->d_type == DTYPE_ST506) ? 718 ata_bio->lp->d_precompcyl / 4 : 0); 719 drvp->state = GEOMETRY_WAIT; 720 break; 721 722 case GEOMETRY_WAIT: 723 errstring = "geometry"; 724 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 725 goto timeout; 726 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 727 chp->wdc->irqack(chp); 728 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 729 goto error; 730 /* fall through */ 731 732 case MULTIMODE: 733 multimode: 734 if (ata_bio->multi == 1) 735 goto ready; 736 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 737 ata_bio->multi, 0); 738 drvp->state = MULTIMODE_WAIT; 739 break; 740 741 case MULTIMODE_WAIT: 742 errstring = "setmulti"; 743 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 744 goto timeout; 745 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 746 chp->wdc->irqack(chp); 747 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 748 goto error; 749 /* fall through */ 750 751 case READY: 752 ready: 753 drvp->state = READY; 754 /* 755 * The drive is usable now 756 */ 757 xfer->c_intr = wdc_ata_bio_intr; 758 _wdc_ata_bio_start(chp, xfer); 759 return 1; 760 } 761 762 if ((ata_bio->flags & ATA_POLL) == 0) { 763 chp->ch_flags |= WDCF_IRQ_WAIT; 764 } else { 765 goto again; 766 } 767 return 1; 768 769 timeout: 770 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 771 return 0; /* IRQ was not for us */ 772 } 773 printf("%s:%d:%d: %s timed out\n", 774 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 775 ata_bio->error = TIMEOUT; 776 drvp->state = 0; 777 wdc_ata_bio_done(chp, xfer); 778 return 0; 779 error: 780 printf("%s:%d:%d: %s ", 781 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 782 errstring); 783 if (chp->ch_status & WDCS_DWF) { 784 printf("drive fault\n"); 785 ata_bio->error = ERR_DF; 786 } else { 787 printf("error (%x)\n", chp->ch_error); 788 ata_bio->r_error = chp->ch_error; 789 ata_bio->error = ERROR; 790 } 791 drvp->state = 0; 792 wdc_ata_bio_done(chp, xfer); 793 return 1; 794 } 795 796 int 797 wdc_ata_err(drvp, ata_bio) 798 struct ata_drive_datas *drvp; 799 struct ata_bio *ata_bio; 800 { 801 struct channel_softc *chp = drvp->chnl_softc; 802 ata_bio->error = 0; 803 if (chp->ch_status & WDCS_BSY) { 804 ata_bio->error = TIMEOUT; 805 return WDC_ATA_ERR; 806 } 807 808 if (chp->ch_status & WDCS_DWF) { 809 ata_bio->error = ERR_DF; 810 return WDC_ATA_ERR; 811 } 812 813 if (chp->ch_status & WDCS_ERR) { 814 ata_bio->error = ERROR; 815 ata_bio->r_error = chp->ch_error; 816 if (drvp->drive_flags & DRIVE_UDMA && 817 (ata_bio->r_error & WDCE_CRC)) { 818 /* 819 * Record the CRC error, to avoid downgrading to 820 * multiword DMA 821 */ 822 drvp->drive_flags |= DRIVE_DMAERR; 823 } 824 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 825 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 826 return WDC_ATA_ERR; 827 return WDC_ATA_NOERR; 828 } 829 830 if (chp->ch_status & WDCS_CORR) 831 ata_bio->flags |= ATA_CORR; 832 return WDC_ATA_NOERR; 833 } 834 835 int 836 wdc_ata_addref(drvp) 837 struct ata_drive_datas *drvp; 838 { 839 struct channel_softc *chp = drvp->chnl_softc; 840 841 return (wdc_addref(chp)); 842 } 843 844 void 845 wdc_ata_delref(drvp) 846 struct ata_drive_datas *drvp; 847 { 848 struct channel_softc *chp = drvp->chnl_softc; 849 850 wdc_delref(chp); 851 } 852
Indexes created Tue Sep 30 11:09:46 GMT 2025