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ata_wdc.c revision 1.32
      1 /*	$NetBSD: ata_wdc.c,v 1.32 2001/12/03 00:11:15 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by the University of
     17  *	California, Berkeley and its contributors.
     18  * 4. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  *
     33  */
     34 
     35 /*-
     36  * Copyright (c) 1998 The NetBSD Foundation, Inc.
     37  * All rights reserved.
     38  *
     39  * This code is derived from software contributed to The NetBSD Foundation
     40  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
     41  *
     42  * Redistribution and use in source and binary forms, with or without
     43  * modification, are permitted provided that the following conditions
     44  * are met:
     45  * 1. Redistributions of source code must retain the above copyright
     46  *    notice, this list of conditions and the following disclaimer.
     47  * 2. Redistributions in binary form must reproduce the above copyright
     48  *    notice, this list of conditions and the following disclaimer in the
     49  *    documentation and/or other materials provided with the distribution.
     50  * 3. All advertising materials mentioning features or use of this software
     51  *    must display the following acknowledgement:
     52  *        This product includes software developed by the NetBSD
     53  *        Foundation, Inc. and its contributors.
     54  * 4. Neither the name of The NetBSD Foundation nor the names of its
     55  *    contributors may be used to endorse or promote products derived
     56  *    from this software without specific prior written permission.
     57  *
     58  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     59  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     60  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     61  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     62  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     63  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     64  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     65  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     66  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     67  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     68  * POSSIBILITY OF SUCH DAMAGE.
     69  */
     70 
     71 #include <sys/cdefs.h>
     72 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.32 2001/12/03 00:11:15 bouyer Exp $");
     73 
     74 #ifndef WDCDEBUG
     75 #define WDCDEBUG
     76 #endif /* WDCDEBUG */
     77 
     78 #include <sys/param.h>
     79 #include <sys/systm.h>
     80 #include <sys/kernel.h>
     81 #include <sys/file.h>
     82 #include <sys/stat.h>
     83 #include <sys/buf.h>
     84 #include <sys/malloc.h>
     85 #include <sys/device.h>
     86 #include <sys/disklabel.h>
     87 #include <sys/syslog.h>
     88 #include <sys/proc.h>
     89 
     90 #include <machine/intr.h>
     91 #include <machine/bus.h>
     92 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     93 #define    bus_space_write_multi_stream_2    bus_space_write_multi_2
     94 #define    bus_space_write_multi_stream_4    bus_space_write_multi_4
     95 #define    bus_space_read_multi_stream_2    bus_space_read_multi_2
     96 #define    bus_space_read_multi_stream_4    bus_space_read_multi_4
     97 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     98 
     99 #include <dev/ata/atareg.h>
    100 #include <dev/ata/atavar.h>
    101 #include <dev/ic/wdcreg.h>
    102 #include <dev/ic/wdcvar.h>
    103 #include <dev/ata/wdvar.h>
    104 
    105 #define DEBUG_INTR   0x01
    106 #define DEBUG_XFERS  0x02
    107 #define DEBUG_STATUS 0x04
    108 #define DEBUG_FUNCS  0x08
    109 #define DEBUG_PROBE  0x10
    110 #ifdef WDCDEBUG
    111 int wdcdebug_wd_mask = 0;
    112 #define WDCDEBUG_PRINT(args, level) \
    113 	if (wdcdebug_wd_mask & (level)) \
    114 		printf args
    115 #else
    116 #define WDCDEBUG_PRINT(args, level)
    117 #endif
    118 
    119 #define ATA_DELAY 10000 /* 10s for a drive I/O */
    120 
    121 int wdc_ata_bio __P((struct ata_drive_datas*, struct ata_bio*));
    122 void  wdc_ata_bio_start  __P((struct channel_softc *,struct wdc_xfer *));
    123 void  _wdc_ata_bio_start  __P((struct channel_softc *,struct wdc_xfer *));
    124 int   wdc_ata_bio_intr   __P((struct channel_softc *, struct wdc_xfer *, int));
    125 void  wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *));
    126 void  wdc_ata_bio_done   __P((struct channel_softc *, struct wdc_xfer *));
    127 int   wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int));
    128 int   wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *));
    129 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
    130 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
    131 #define WDC_ATA_ERR   0x02 /* Drive reports an error */
    132 int wdc_ata_addref __P((struct ata_drive_datas *));
    133 void wdc_ata_delref __P((struct ata_drive_datas *));
    134 void wdc_ata_kill_pending __P((struct ata_drive_datas *));
    135 
    136 const struct ata_bustype wdc_ata_bustype = {
    137 	SCSIPI_BUSTYPE_ATA,
    138 	wdc_ata_bio,
    139 	wdc_reset_channel,
    140 	wdc_exec_command,
    141 	ata_get_params,
    142 	wdc_ata_addref,
    143 	wdc_ata_delref,
    144 	wdc_ata_kill_pending,
    145 };
    146 
    147 
    148 /*
    149  * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
    150  * WDC_TRY_AGAIN. Must be called at splbio().
    151  */
    152 int
    153 wdc_ata_bio(drvp, ata_bio)
    154 	struct ata_drive_datas *drvp;
    155 	struct ata_bio *ata_bio;
    156 {
    157 	struct wdc_xfer *xfer;
    158 	struct channel_softc *chp = drvp->chnl_softc;
    159 
    160 	xfer = wdc_get_xfer(WDC_NOSLEEP);
    161 	if (xfer == NULL)
    162 		return WDC_TRY_AGAIN;
    163 	if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ)
    164 		ata_bio->flags |= ATA_POLL;
    165 	if (ata_bio->flags & ATA_POLL)
    166 		xfer->c_flags |= C_POLL;
    167 	if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
    168 	    (ata_bio->flags & ATA_SINGLE) == 0)
    169 		xfer->c_flags |= C_DMA;
    170 	xfer->drive = drvp->drive;
    171 	xfer->cmd = ata_bio;
    172 	xfer->databuf = ata_bio->databuf;
    173 	xfer->c_bcount = ata_bio->bcount;
    174 	xfer->c_start = wdc_ata_bio_start;
    175 	xfer->c_intr = wdc_ata_bio_intr;
    176 	xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
    177 	wdc_exec_xfer(chp, xfer);
    178 	return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
    179 }
    180 
    181 void
    182 wdc_ata_bio_start(chp, xfer)
    183 	struct channel_softc *chp;
    184 	struct wdc_xfer *xfer;
    185 {
    186 	struct ata_bio *ata_bio = xfer->cmd;
    187 	WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
    188 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
    189 	    DEBUG_XFERS);
    190 
    191 	/* start timeout machinery */
    192 	if ((ata_bio->flags & ATA_POLL) == 0)
    193 		callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz,
    194 		    wdctimeout, chp);
    195 	_wdc_ata_bio_start(chp, xfer);
    196 }
    197 
    198 void
    199 _wdc_ata_bio_start(chp, xfer)
    200 	struct channel_softc *chp;
    201 	struct wdc_xfer *xfer;
    202 {
    203 	struct ata_bio *ata_bio = xfer->cmd;
    204 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    205 	u_int16_t cyl;
    206 	u_int8_t head, sect, cmd = 0;
    207 	int nblks;
    208 	int ata_delay;
    209 	int dma_flags = 0;
    210 
    211 	WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
    212 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
    213 	    DEBUG_INTR | DEBUG_XFERS);
    214 	/* Do control operations specially. */
    215 	if (drvp->state < READY) {
    216 		/*
    217 		 * Actually, we want to be careful not to mess with the control
    218 		 * state if the device is currently busy, but we can assume
    219 		 * that we never get to this point if that's the case.
    220 		 */
    221 		/* at this point, we should only be in RECAL state */
    222 		if (drvp->state != RESET) {
    223 			printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n",
    224 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    225 			    xfer->drive, drvp->state);
    226 			panic("_wdc_ata_bio_start: bad state");
    227 		}
    228 		drvp->state = RECAL;
    229 		xfer->c_intr = wdc_ata_ctrl_intr;
    230 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    231 		    WDSD_IBM | (xfer->drive << 4));
    232 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
    233 			goto timeout;
    234 		wdccommandshort(chp, xfer->drive, WDCC_RECAL);
    235 		drvp->state = RECAL_WAIT;
    236 		if ((ata_bio->flags & ATA_POLL) == 0) {
    237 			chp->ch_flags |= WDCF_IRQ_WAIT;
    238 		} else {
    239 			/* Wait for at last 400ns for status bit to be valid */
    240 			DELAY(1);
    241 			wdc_ata_ctrl_intr(chp, xfer, 0);
    242 		}
    243 		return;
    244 	}
    245 
    246 	if (xfer->c_flags & C_DMA) {
    247 		if (drvp->n_xfers <= NXFER)
    248 			drvp->n_xfers++;
    249 		dma_flags = (ata_bio->flags & ATA_READ) ?  WDC_DMA_READ : 0;
    250 	}
    251 	if (ata_bio->flags & ATA_SINGLE)
    252 		ata_delay = ATA_DELAY;
    253 	else
    254 		ata_delay = ATA_DELAY;
    255 again:
    256 	/*
    257 	 *
    258 	 * When starting a multi-sector transfer, or doing single-sector
    259 	 * transfers...
    260 	 */
    261 	if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
    262 		if (ata_bio->flags & ATA_SINGLE)
    263 			nblks = 1;
    264 		else
    265 			nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    266 		/* Check for bad sectors and adjust transfer, if necessary. */
    267 		if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
    268 			long blkdiff;
    269 			int i;
    270 			for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
    271 			    i++) {
    272 				blkdiff -= ata_bio->blkno;
    273 				if (blkdiff < 0)
    274 					continue;
    275 				if (blkdiff == 0) {
    276 					/* Replace current block of transfer. */
    277 					ata_bio->blkno =
    278 					    ata_bio->lp->d_secperunit -
    279 					    ata_bio->lp->d_nsectors - i - 1;
    280 				}
    281 				if (blkdiff < nblks) {
    282 					/* Bad block inside transfer. */
    283 					ata_bio->flags |= ATA_SINGLE;
    284 					nblks = 1;
    285 				}
    286 				break;
    287 			}
    288 		/* Transfer is okay now. */
    289 		}
    290 		if (ata_bio->flags & ATA_LBA) {
    291 			sect = (ata_bio->blkno >> 0) & 0xff;
    292 			cyl = (ata_bio->blkno >> 8) & 0xffff;
    293 			head = (ata_bio->blkno >> 24) & 0x0f;
    294 			head |= WDSD_LBA;
    295 		} else {
    296 			int blkno = ata_bio->blkno;
    297 			sect = blkno % ata_bio->lp->d_nsectors;
    298 			sect++;    /* Sectors begin with 1, not 0. */
    299 			blkno /= ata_bio->lp->d_nsectors;
    300 			head = blkno % ata_bio->lp->d_ntracks;
    301 			blkno /= ata_bio->lp->d_ntracks;
    302 			cyl = blkno;
    303 			head |= WDSD_CHS;
    304 		}
    305 		if (xfer->c_flags & C_DMA) {
    306 			ata_bio->nblks = nblks;
    307 			ata_bio->nbytes = xfer->c_bcount;
    308 			cmd = (ata_bio->flags & ATA_READ) ?
    309 			    WDCC_READDMA : WDCC_WRITEDMA;
    310 	    		/* Init the DMA channel. */
    311 			if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
    312 			    chp->channel, xfer->drive,
    313 			    (char *)xfer->databuf + xfer->c_skip,
    314 			    ata_bio->nbytes, dma_flags) != 0) {
    315 				ata_bio->error = ERR_DMA;
    316 				ata_bio->r_error = 0;
    317 				wdc_ata_bio_done(chp, xfer);
    318 				return;
    319 			}
    320 			/* Initiate command */
    321 			bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    322 			    WDSD_IBM | (xfer->drive << 4));
    323 			if (wait_for_ready(chp, ata_delay) < 0)
    324 				goto timeout;
    325 			wdccommand(chp, xfer->drive, cmd, cyl,
    326 			    head, sect, nblks, 0);
    327 			/* start the DMA channel */
    328 			(*chp->wdc->dma_start)(chp->wdc->dma_arg,
    329 			    chp->channel, xfer->drive);
    330 			chp->ch_flags |= WDCF_DMA_WAIT;
    331 			/* wait for irq */
    332 			goto intr;
    333 		} /* else not DMA */
    334 		ata_bio->nblks = min(nblks, ata_bio->multi);
    335 		ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
    336 		if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) {
    337 			cmd = (ata_bio->flags & ATA_READ) ?
    338 			    WDCC_READMULTI : WDCC_WRITEMULTI;
    339 		} else {
    340 			cmd = (ata_bio->flags & ATA_READ) ?
    341 			    WDCC_READ : WDCC_WRITE;
    342 		}
    343 		/* Initiate command! */
    344 		bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    345 		    WDSD_IBM | (xfer->drive << 4));
    346 		if (wait_for_ready(chp, ata_delay) < 0)
    347 			goto timeout;
    348 		wdccommand(chp, xfer->drive, cmd, cyl,
    349 		    head, sect, nblks,
    350 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    351 		    ata_bio->lp->d_precompcyl / 4 : 0);
    352 	} else if (ata_bio->nblks > 1) {
    353 		/* The number of blocks in the last stretch may be smaller. */
    354 		nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    355 		if (ata_bio->nblks > nblks) {
    356 		ata_bio->nblks = nblks;
    357 		ata_bio->nbytes = xfer->c_bcount;
    358 		}
    359 	}
    360 	/* If this was a write and not using DMA, push the data. */
    361 	if ((ata_bio->flags & ATA_READ) == 0) {
    362 		if (wait_for_drq(chp, ata_delay) != 0) {
    363 			printf("%s:%d:%d: timeout waiting for DRQ, "
    364 			    "st=0x%02x, err=0x%02x\n",
    365 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    366 			    xfer->drive, chp->ch_status, chp->ch_error);
    367 			if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    368 				ata_bio->error = TIMEOUT;
    369 			wdc_ata_bio_done(chp, xfer);
    370 			return;
    371 		}
    372 		if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
    373 			wdc_ata_bio_done(chp, xfer);
    374 			return;
    375 		}
    376 		if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
    377 			if (drvp->drive_flags & DRIVE_CAP32) {
    378 				bus_space_write_multi_4(chp->data32iot,
    379 				    chp->data32ioh, 0,
    380 				    (u_int32_t *)((char *)xfer->databuf +
    381 				                  xfer->c_skip),
    382 				    ata_bio->nbytes >> 2);
    383 			} else {
    384 				bus_space_write_multi_2(chp->cmd_iot,
    385 				    chp->cmd_ioh, wd_data,
    386 				    (u_int16_t *)((char *)xfer->databuf +
    387 				                  xfer->c_skip),
    388 				    ata_bio->nbytes >> 1);
    389 			}
    390 		} else {
    391 			if (drvp->drive_flags & DRIVE_CAP32) {
    392 				bus_space_write_multi_stream_4(chp->data32iot,
    393 				    chp->data32ioh, 0,
    394 				    (u_int32_t *)((char *)xfer->databuf +
    395 				                  xfer->c_skip),
    396 				    ata_bio->nbytes >> 2);
    397 			} else {
    398 				bus_space_write_multi_stream_2(chp->cmd_iot,
    399 				    chp->cmd_ioh, wd_data,
    400 				    (u_int16_t *)((char *)xfer->databuf +
    401 				                  xfer->c_skip),
    402 				    ata_bio->nbytes >> 1);
    403 			}
    404 		}
    405 	}
    406 
    407 intr:	/* Wait for IRQ (either real or polled) */
    408 	if ((ata_bio->flags & ATA_POLL) == 0) {
    409 		chp->ch_flags |= WDCF_IRQ_WAIT;
    410 	} else {
    411 		/* Wait for at last 400ns for status bit to be valid */
    412 		delay(1);
    413 		if (chp->ch_flags & WDCF_DMA_WAIT) {
    414 			wdc_dmawait(chp, xfer, ATA_DELAY);
    415 			chp->ch_flags &= ~WDCF_DMA_WAIT;
    416 		}
    417 		wdc_ata_bio_intr(chp, xfer, 0);
    418 		if ((ata_bio->flags & ATA_ITSDONE) == 0)
    419 			goto again;
    420 	}
    421 	return;
    422 timeout:
    423 	printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
    424 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    425 	    chp->ch_status, chp->ch_error);
    426 	if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    427 		ata_bio->error = TIMEOUT;
    428 	wdc_ata_bio_done(chp, xfer);
    429 	return;
    430 }
    431 
    432 int
    433 wdc_ata_bio_intr(chp, xfer, irq)
    434 	struct channel_softc *chp;
    435 	struct wdc_xfer *xfer;
    436 	int irq;
    437 {
    438 	struct ata_bio *ata_bio = xfer->cmd;
    439 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    440 	int drv_err;
    441 
    442 	WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
    443 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
    444 	    DEBUG_INTR | DEBUG_XFERS);
    445 
    446 
    447 	/* Is it not a transfer, but a control operation? */
    448 	if (drvp->state < READY) {
    449 		printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
    450 		    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    451 		    drvp->state);
    452 		panic("wdc_ata_bio_intr: bad state\n");
    453 	}
    454 
    455 	/*
    456 	 * if we missed an interrupt in a PIO transfer, reset and restart.
    457 	 * Don't try to continue transfer, we may have missed cycles.
    458 	 */
    459 	if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
    460 		ata_bio->error = TIMEOUT;
    461 		wdc_ata_bio_done(chp, xfer);
    462 		return 1;
    463 	}
    464 
    465 	/* Ack interrupt done by wait_for_unbusy */
    466 	if (wait_for_unbusy(chp,
    467 	    (irq == 0) ? ATA_DELAY : 0) < 0) {
    468 		if (irq && (xfer->c_flags & C_TIMEOU) == 0)
    469 			return 0; /* IRQ was not for us */
    470 		printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
    471 		    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    472 		    xfer->c_bcount, xfer->c_skip);
    473 		/* if we were using DMA, flag a DMA error */
    474 		if (xfer->c_flags & C_DMA) {
    475 			ata_dmaerr(drvp);
    476 		}
    477 		ata_bio->error = TIMEOUT;
    478 		wdc_ata_bio_done(chp, xfer);
    479 		return 1;
    480 	}
    481 	if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    482 		chp->wdc->irqack(chp);
    483 
    484 	drv_err = wdc_ata_err(drvp, ata_bio);
    485 
    486 	/* If we were using DMA, Turn off the DMA channel and check for error */
    487 	if (xfer->c_flags & C_DMA) {
    488 		if (ata_bio->flags & ATA_POLL) {
    489 			/*
    490 			 * IDE drives deassert WDCS_BSY before transfer is
    491 			 * complete when using DMA. Polling for DRQ to deassert
    492 			 * is not enouth DRQ is not required to be
    493 			 * asserted for DMA transfers, so poll for DRDY.
    494 			 */
    495 			if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
    496 			    ATA_DELAY) < 0) {
    497 				printf("%s:%d:%d: polled transfer timed out "
    498 				    "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname,
    499 				    chp->channel, xfer->drive, chp->ch_status);
    500 				ata_bio->error = TIMEOUT;
    501 				drv_err = WDC_ATA_ERR;
    502 			}
    503 		}
    504 		if (chp->wdc->dma_status != 0) {
    505 			if (drv_err != WDC_ATA_ERR) {
    506 				ata_bio->error = ERR_DMA;
    507 				drv_err = WDC_ATA_ERR;
    508 			}
    509 		}
    510 		if (chp->ch_status & WDCS_DRQ) {
    511 			if (drv_err != WDC_ATA_ERR) {
    512 				printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
    513 				    chp->wdc->sc_dev.dv_xname, chp->channel,
    514 				    xfer->drive, chp->ch_status);
    515 				ata_bio->error = TIMEOUT;
    516 				drv_err = WDC_ATA_ERR;
    517 			}
    518 		}
    519 		if (drv_err != WDC_ATA_ERR)
    520 			goto end;
    521 		ata_dmaerr(drvp);
    522 	}
    523 
    524 	/* if we had an error, end */
    525 	if (drv_err == WDC_ATA_ERR) {
    526 		wdc_ata_bio_done(chp, xfer);
    527 		return 1;
    528 	}
    529 
    530 	/* If this was a read and not using DMA, fetch the data. */
    531 	if ((ata_bio->flags & ATA_READ) != 0) {
    532 		if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
    533 			printf("%s:%d:%d: read intr before drq\n",
    534 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    535 			    xfer->drive);
    536 			ata_bio->error = TIMEOUT;
    537 			wdc_ata_bio_done(chp, xfer);
    538 			return 1;
    539 		}
    540 		if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) {
    541 			if (drvp->drive_flags & DRIVE_CAP32) {
    542 				bus_space_read_multi_4(chp->data32iot,
    543 				    chp->data32ioh, 0,
    544 				    (u_int32_t *)((char *)xfer->databuf +
    545 				                  xfer->c_skip),
    546 				    ata_bio->nbytes >> 2);
    547 			} else {
    548 				bus_space_read_multi_2(chp->cmd_iot,
    549 				    chp->cmd_ioh, wd_data,
    550 				    (u_int16_t *)((char *)xfer->databuf +
    551 				                  xfer->c_skip),
    552 				    ata_bio->nbytes >> 1);
    553 			}
    554 		} else {
    555 			if (drvp->drive_flags & DRIVE_CAP32) {
    556 				bus_space_read_multi_stream_4(chp->data32iot,
    557 				    chp->data32ioh, 0,
    558 				    (u_int32_t *)((char *)xfer->databuf +
    559 				                  xfer->c_skip),
    560 				    ata_bio->nbytes >> 2);
    561 			} else {
    562 				bus_space_read_multi_stream_2(chp->cmd_iot,
    563 				    chp->cmd_ioh, wd_data,
    564 				    (u_int16_t *)((char *)xfer->databuf +
    565 				                  xfer->c_skip),
    566 				    ata_bio->nbytes >> 1);
    567 			}
    568 		}
    569 	}
    570 
    571 end:
    572 	ata_bio->blkno += ata_bio->nblks;
    573 	ata_bio->blkdone += ata_bio->nblks;
    574 	xfer->c_skip += ata_bio->nbytes;
    575 	xfer->c_bcount -= ata_bio->nbytes;
    576 	/* See if this transfer is complete. */
    577 	if (xfer->c_bcount > 0) {
    578 		if ((ata_bio->flags & ATA_POLL) == 0) {
    579 			/* Start the next operation */
    580 			_wdc_ata_bio_start(chp, xfer);
    581 		} else {
    582 			/* Let _wdc_ata_bio_start do the loop */
    583 			return 1;
    584 		}
    585 	} else { /* Done with this transfer */
    586 		ata_bio->error = NOERROR;
    587 		wdc_ata_bio_done(chp, xfer);
    588 	}
    589 	return 1;
    590 }
    591 
    592 void
    593 wdc_ata_kill_pending(drvp)
    594 	struct ata_drive_datas *drvp;
    595 {
    596 	struct channel_softc *chp = drvp->chnl_softc;
    597 
    598 	wdc_kill_pending(chp);
    599 }
    600 
    601 void
    602 wdc_ata_bio_kill_xfer(chp, xfer)
    603 	struct channel_softc *chp;
    604 	struct wdc_xfer *xfer;
    605 {
    606 	struct ata_bio *ata_bio = xfer->cmd;
    607 	int drive = xfer->drive;
    608 
    609 	callout_stop(&chp->ch_callout);
    610 	/* remove this command from xfer queue */
    611 	wdc_free_xfer(chp, xfer);
    612 
    613 	ata_bio->flags |= ATA_ITSDONE;
    614 	ata_bio->error = ERR_NODEV;
    615 	ata_bio->r_error = WDCE_ABRT;
    616 	WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
    617 	wddone(chp->ch_drive[drive].drv_softc);
    618 }
    619 
    620 void
    621 wdc_ata_bio_done(chp, xfer)
    622 	struct channel_softc *chp;
    623 	struct wdc_xfer *xfer;
    624 {
    625 	struct ata_bio *ata_bio = xfer->cmd;
    626 	int drive = xfer->drive;
    627 
    628 	WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
    629 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    630 	    (u_int)xfer->c_flags),
    631 	    DEBUG_XFERS);
    632 
    633 	callout_stop(&chp->ch_callout);
    634 
    635 	/* feed back residual bcount to our caller */
    636 	ata_bio->bcount = xfer->c_bcount;
    637 
    638 	/* remove this command from xfer queue */
    639 	wdc_free_xfer(chp, xfer);
    640 
    641 	ata_bio->flags |= ATA_ITSDONE;
    642 	WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
    643 	wddone(chp->ch_drive[drive].drv_softc);
    644 	WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
    645 	    chp->ch_flags), DEBUG_XFERS);
    646 	wdcstart(chp);
    647 }
    648 
    649 /*
    650  * Implement operations needed before read/write.
    651  */
    652 int
    653 wdc_ata_ctrl_intr(chp, xfer, irq)
    654 	struct channel_softc *chp;
    655 	struct wdc_xfer *xfer;
    656 	int irq;
    657 {
    658 	struct ata_bio *ata_bio = xfer->cmd;
    659 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    660 	char *errstring = NULL;
    661 	int delay = (irq == 0) ? ATA_DELAY : 0;
    662 
    663 	WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
    664 	    DEBUG_FUNCS);
    665 
    666 again:
    667 	switch (drvp->state) {
    668 	case RECAL:    /* Should not be in this state here */
    669 		panic("wdc_ata_ctrl_intr: state==RECAL");
    670 		break;
    671 
    672 	case RECAL_WAIT:
    673 		errstring = "recal";
    674 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
    675 			goto timeout;
    676 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    677 			chp->wdc->irqack(chp);
    678 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    679 			goto error;
    680 	/* fall through */
    681 
    682 	case PIOMODE:
    683 		/* Don't try to set modes if controller can't be adjusted */
    684 		if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
    685 			goto geometry;
    686 		/* Also don't try if the drive didn't report its mode */
    687 		if ((drvp->drive_flags & DRIVE_MODE) == 0)
    688 			goto geometry;
    689 		wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    690 		    0x08 | drvp->PIO_mode, WDSF_SET_MODE);
    691 		drvp->state = PIOMODE_WAIT;
    692 		break;
    693 
    694 	case PIOMODE_WAIT:
    695 		errstring = "piomode";
    696 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
    697 			goto timeout;
    698 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    699 			chp->wdc->irqack(chp);
    700 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    701 			goto error;
    702 	/* fall through */
    703 
    704 	case DMAMODE:
    705 		if (drvp->drive_flags & DRIVE_UDMA) {
    706 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    707 			    0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
    708 		} else if (drvp->drive_flags & DRIVE_DMA) {
    709 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    710 			    0x20 | drvp->DMA_mode, WDSF_SET_MODE);
    711 		} else {
    712 			goto geometry;
    713 		}
    714 		drvp->state = DMAMODE_WAIT;
    715 		break;
    716 	case DMAMODE_WAIT:
    717 		errstring = "dmamode";
    718 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
    719 			goto timeout;
    720 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    721 			chp->wdc->irqack(chp);
    722 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    723 			goto error;
    724 	/* fall through */
    725 
    726 	case GEOMETRY:
    727 	geometry:
    728 		if (ata_bio->flags & ATA_LBA)
    729 			goto multimode;
    730 		wdccommand(chp, xfer->drive, WDCC_IDP,
    731 		    ata_bio->lp->d_ncylinders,
    732 		    ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
    733 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    734 			ata_bio->lp->d_precompcyl / 4 : 0);
    735 		drvp->state = GEOMETRY_WAIT;
    736 		break;
    737 
    738 	case GEOMETRY_WAIT:
    739 		errstring = "geometry";
    740 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
    741 			goto timeout;
    742 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    743 			chp->wdc->irqack(chp);
    744 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    745 			goto error;
    746 		/* fall through */
    747 
    748 	case MULTIMODE:
    749 	multimode:
    750 		if (ata_bio->multi == 1)
    751 			goto ready;
    752 		wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
    753 		    ata_bio->multi, 0);
    754 		drvp->state = MULTIMODE_WAIT;
    755 		break;
    756 
    757 	case MULTIMODE_WAIT:
    758 		errstring = "setmulti";
    759 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
    760 			goto timeout;
    761 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    762 			chp->wdc->irqack(chp);
    763 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    764 			goto error;
    765 		/* fall through */
    766 
    767 	case READY:
    768 	ready:
    769 		drvp->state = READY;
    770 		/*
    771 		 * The drive is usable now
    772 		 */
    773 		xfer->c_intr = wdc_ata_bio_intr;
    774 		_wdc_ata_bio_start(chp, xfer);
    775 		return 1;
    776 	}
    777 
    778 	if ((ata_bio->flags & ATA_POLL) == 0) {
    779 		chp->ch_flags |= WDCF_IRQ_WAIT;
    780 	} else {
    781 		goto again;
    782 	}
    783 	return 1;
    784 
    785 timeout:
    786 	if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
    787 		return 0; /* IRQ was not for us */
    788 	}
    789 	printf("%s:%d:%d: %s timed out\n",
    790 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
    791 	ata_bio->error = TIMEOUT;
    792 	drvp->state = 0;
    793 	wdc_ata_bio_done(chp, xfer);
    794 	return 0;
    795 error:
    796 	printf("%s:%d:%d: %s ",
    797 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    798 	    errstring);
    799 	if (chp->ch_status & WDCS_DWF) {
    800 		printf("drive fault\n");
    801 		ata_bio->error = ERR_DF;
    802 	} else {
    803 		printf("error (%x)\n", chp->ch_error);
    804 		ata_bio->r_error = chp->ch_error;
    805 		ata_bio->error = ERROR;
    806 	}
    807 	drvp->state = 0;
    808 	wdc_ata_bio_done(chp, xfer);
    809 	return 1;
    810 }
    811 
    812 int
    813 wdc_ata_err(drvp, ata_bio)
    814 	struct ata_drive_datas *drvp;
    815 	struct ata_bio *ata_bio;
    816 {
    817 	struct channel_softc *chp = drvp->chnl_softc;
    818 	ata_bio->error = 0;
    819 	if (chp->ch_status & WDCS_BSY) {
    820 		ata_bio->error = TIMEOUT;
    821 		return WDC_ATA_ERR;
    822 	}
    823 
    824 	if (chp->ch_status & WDCS_DWF) {
    825 		ata_bio->error = ERR_DF;
    826 		return WDC_ATA_ERR;
    827 	}
    828 
    829 	if (chp->ch_status & WDCS_ERR) {
    830 		ata_bio->error = ERROR;
    831 		ata_bio->r_error = chp->ch_error;
    832 		if (drvp->drive_flags & DRIVE_UDMA &&
    833 		    (ata_bio->r_error & WDCE_CRC)) {
    834 			/*
    835 			 * Record the CRC error, to avoid downgrading to
    836 			 * multiword DMA
    837 			 */
    838 			drvp->drive_flags |= DRIVE_DMAERR;
    839 		}
    840 		if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
    841 		    WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
    842 			return WDC_ATA_ERR;
    843 		return WDC_ATA_NOERR;
    844 	}
    845 
    846 	if (chp->ch_status & WDCS_CORR)
    847 		ata_bio->flags |= ATA_CORR;
    848 	return WDC_ATA_NOERR;
    849 }
    850 
    851 int
    852 wdc_ata_addref(drvp)
    853 	struct ata_drive_datas *drvp;
    854 {
    855 	struct channel_softc *chp = drvp->chnl_softc;
    856 
    857 	return (wdc_addref(chp));
    858 }
    859 
    860 void
    861 wdc_ata_delref(drvp)
    862 	struct ata_drive_datas *drvp;
    863 {
    864 	struct channel_softc *chp = drvp->chnl_softc;
    865 
    866 	wdc_delref(chp);
    867 }
    868