ata_wdc.c revision 1.34
1 /* $NetBSD: ata_wdc.c,v 1.34 2002/01/13 17:24:29 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 /*- 36 * Copyright (c) 1998 The NetBSD Foundation, Inc. 37 * All rights reserved. 38 * 39 * This code is derived from software contributed to The NetBSD Foundation 40 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the NetBSD 53 * Foundation, Inc. and its contributors. 54 * 4. Neither the name of The NetBSD Foundation nor the names of its 55 * contributors may be used to endorse or promote products derived 56 * from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.34 2002/01/13 17:24:29 christos Exp $"); 73 74 #ifndef WDCDEBUG 75 #define WDCDEBUG 76 #endif /* WDCDEBUG */ 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/kernel.h> 81 #include <sys/file.h> 82 #include <sys/stat.h> 83 #include <sys/buf.h> 84 #include <sys/malloc.h> 85 #include <sys/device.h> 86 #include <sys/disklabel.h> 87 #include <sys/syslog.h> 88 #include <sys/proc.h> 89 90 #include <machine/intr.h> 91 #include <machine/bus.h> 92 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 93 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 94 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 95 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 96 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 97 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 98 99 #include <dev/ata/atareg.h> 100 #include <dev/ata/atavar.h> 101 #include <dev/ic/wdcreg.h> 102 #include <dev/ic/wdcvar.h> 103 #include <dev/ata/wdvar.h> 104 105 #define DEBUG_INTR 0x01 106 #define DEBUG_XFERS 0x02 107 #define DEBUG_STATUS 0x04 108 #define DEBUG_FUNCS 0x08 109 #define DEBUG_PROBE 0x10 110 #ifdef WDCDEBUG 111 int wdcdebug_wd_mask = 0; 112 #define WDCDEBUG_PRINT(args, level) \ 113 if (wdcdebug_wd_mask & (level)) \ 114 printf args 115 #else 116 #define WDCDEBUG_PRINT(args, level) 117 #endif 118 119 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 120 121 int wdc_ata_bio __P((struct ata_drive_datas*, struct ata_bio*)); 122 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 123 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 124 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 125 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 126 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 127 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 128 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 129 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 130 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 131 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 132 int wdc_ata_addref __P((struct ata_drive_datas *)); 133 void wdc_ata_delref __P((struct ata_drive_datas *)); 134 void wdc_ata_kill_pending __P((struct ata_drive_datas *)); 135 136 const struct ata_bustype wdc_ata_bustype = { 137 SCSIPI_BUSTYPE_ATA, 138 wdc_ata_bio, 139 wdc_reset_channel, 140 wdc_exec_command, 141 ata_get_params, 142 wdc_ata_addref, 143 wdc_ata_delref, 144 wdc_ata_kill_pending, 145 }; 146 147 148 /* 149 * Convert a 32 bit command to a 48 bit command. 150 */ 151 static __inline__ 152 int to48(int cmd32) 153 { 154 switch (cmd32) { 155 case WDCC_READ: 156 return WDCC_READ_EXT; 157 case WDCC_WRITE: 158 return WDCC_WRITE_EXT; 159 case WDCC_READMULTI: 160 return WDCC_READMULTI_EXT; 161 case WDCC_WRITEMULTI: 162 return WDCC_WRITEMULTI_EXT; 163 default: 164 panic("ata_wdc: illegal 32 bit command %d", cmd32); 165 /*NOTREACHED*/ 166 } 167 } 168 169 /* 170 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 171 * WDC_TRY_AGAIN. Must be called at splbio(). 172 */ 173 int 174 wdc_ata_bio(drvp, ata_bio) 175 struct ata_drive_datas *drvp; 176 struct ata_bio *ata_bio; 177 { 178 struct wdc_xfer *xfer; 179 struct channel_softc *chp = drvp->chnl_softc; 180 181 xfer = wdc_get_xfer(WDC_NOSLEEP); 182 if (xfer == NULL) 183 return WDC_TRY_AGAIN; 184 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 185 ata_bio->flags |= ATA_POLL; 186 if (ata_bio->flags & ATA_POLL) 187 xfer->c_flags |= C_POLL; 188 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 189 (ata_bio->flags & ATA_SINGLE) == 0) 190 xfer->c_flags |= C_DMA; 191 xfer->drive = drvp->drive; 192 xfer->cmd = ata_bio; 193 xfer->databuf = ata_bio->databuf; 194 xfer->c_bcount = ata_bio->bcount; 195 xfer->c_start = wdc_ata_bio_start; 196 xfer->c_intr = wdc_ata_bio_intr; 197 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 198 wdc_exec_xfer(chp, xfer); 199 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 200 } 201 202 void 203 wdc_ata_bio_start(chp, xfer) 204 struct channel_softc *chp; 205 struct wdc_xfer *xfer; 206 { 207 struct ata_bio *ata_bio = xfer->cmd; 208 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 209 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 210 DEBUG_XFERS); 211 212 /* start timeout machinery */ 213 if ((ata_bio->flags & ATA_POLL) == 0) 214 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 215 wdctimeout, chp); 216 _wdc_ata_bio_start(chp, xfer); 217 } 218 219 void 220 _wdc_ata_bio_start(chp, xfer) 221 struct channel_softc *chp; 222 struct wdc_xfer *xfer; 223 { 224 struct ata_bio *ata_bio = xfer->cmd; 225 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 226 u_int16_t cyl; 227 u_int8_t head, sect, cmd = 0; 228 int nblks; 229 int ata_delay; 230 int dma_flags = 0; 231 232 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 233 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 234 DEBUG_INTR | DEBUG_XFERS); 235 /* Do control operations specially. */ 236 if (drvp->state < READY) { 237 /* 238 * Actually, we want to be careful not to mess with the control 239 * state if the device is currently busy, but we can assume 240 * that we never get to this point if that's the case. 241 */ 242 /* at this point, we should only be in RECAL state */ 243 if (drvp->state != RESET) { 244 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 245 chp->wdc->sc_dev.dv_xname, chp->channel, 246 xfer->drive, drvp->state); 247 panic("_wdc_ata_bio_start: bad state"); 248 } 249 drvp->state = RECAL; 250 xfer->c_intr = wdc_ata_ctrl_intr; 251 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 252 WDSD_IBM | (xfer->drive << 4)); 253 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 254 goto timeout; 255 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 256 drvp->state = RECAL_WAIT; 257 if ((ata_bio->flags & ATA_POLL) == 0) { 258 chp->ch_flags |= WDCF_IRQ_WAIT; 259 } else { 260 /* Wait for at last 400ns for status bit to be valid */ 261 DELAY(1); 262 wdc_ata_ctrl_intr(chp, xfer, 0); 263 } 264 return; 265 } 266 267 if (xfer->c_flags & C_DMA) { 268 if (drvp->n_xfers <= NXFER) 269 drvp->n_xfers++; 270 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 271 } 272 if (ata_bio->flags & ATA_SINGLE) 273 ata_delay = ATA_DELAY; 274 else 275 ata_delay = ATA_DELAY; 276 again: 277 /* 278 * 279 * When starting a multi-sector transfer, or doing single-sector 280 * transfers... 281 */ 282 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 283 if (ata_bio->flags & ATA_SINGLE) 284 nblks = 1; 285 else 286 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 287 /* Check for bad sectors and adjust transfer, if necessary. */ 288 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 289 long blkdiff; 290 int i; 291 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 292 i++) { 293 blkdiff -= ata_bio->blkno; 294 if (blkdiff < 0) 295 continue; 296 if (blkdiff == 0) { 297 /* Replace current block of transfer. */ 298 ata_bio->blkno = 299 ata_bio->lp->d_secperunit - 300 ata_bio->lp->d_nsectors - i - 1; 301 } 302 if (blkdiff < nblks) { 303 /* Bad block inside transfer. */ 304 ata_bio->flags |= ATA_SINGLE; 305 nblks = 1; 306 } 307 break; 308 } 309 /* Transfer is okay now. */ 310 } 311 if (ata_bio->flags & ATA_LBA48) { 312 sect = 0; 313 cyl = 0; 314 head = 0; 315 } else if (ata_bio->flags & ATA_LBA) { 316 sect = (ata_bio->blkno >> 0) & 0xff; 317 cyl = (ata_bio->blkno >> 8) & 0xffff; 318 head = (ata_bio->blkno >> 24) & 0x0f; 319 head |= WDSD_LBA; 320 } else { 321 int blkno = ata_bio->blkno; 322 sect = blkno % ata_bio->lp->d_nsectors; 323 sect++; /* Sectors begin with 1, not 0. */ 324 blkno /= ata_bio->lp->d_nsectors; 325 head = blkno % ata_bio->lp->d_ntracks; 326 blkno /= ata_bio->lp->d_ntracks; 327 cyl = blkno; 328 head |= WDSD_CHS; 329 } 330 if (xfer->c_flags & C_DMA) { 331 ata_bio->nblks = nblks; 332 ata_bio->nbytes = xfer->c_bcount; 333 cmd = (ata_bio->flags & ATA_READ) ? 334 WDCC_READDMA : WDCC_WRITEDMA; 335 /* Init the DMA channel. */ 336 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 337 chp->channel, xfer->drive, 338 (char *)xfer->databuf + xfer->c_skip, 339 ata_bio->nbytes, dma_flags) != 0) { 340 ata_bio->error = ERR_DMA; 341 ata_bio->r_error = 0; 342 wdc_ata_bio_done(chp, xfer); 343 return; 344 } 345 /* Initiate command */ 346 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 347 WDSD_IBM | (xfer->drive << 4)); 348 if (wait_for_ready(chp, ata_delay) < 0) 349 goto timeout; 350 if (ata_bio->flags & ATA_LBA48) { 351 wdccommandext(chp, xfer->drive, to48(cmd), 352 (u_int64_t)ata_bio->blkno, nblks); 353 } else { 354 wdccommand(chp, xfer->drive, cmd, cyl, 355 head, sect, nblks, 0); 356 } 357 /* start the DMA channel */ 358 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 359 chp->channel, xfer->drive); 360 chp->ch_flags |= WDCF_DMA_WAIT; 361 /* wait for irq */ 362 goto intr; 363 } /* else not DMA */ 364 ata_bio->nblks = min(nblks, ata_bio->multi); 365 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 366 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 367 cmd = (ata_bio->flags & ATA_READ) ? 368 WDCC_READMULTI : WDCC_WRITEMULTI; 369 } else { 370 cmd = (ata_bio->flags & ATA_READ) ? 371 WDCC_READ : WDCC_WRITE; 372 } 373 /* Initiate command! */ 374 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 375 WDSD_IBM | (xfer->drive << 4)); 376 if (wait_for_ready(chp, ata_delay) < 0) 377 goto timeout; 378 if (ata_bio->flags & ATA_LBA48) { 379 wdccommandext(chp, xfer->drive, to48(cmd), 380 (u_int64_t) ata_bio->blkno, nblks); 381 } else { 382 wdccommand(chp, xfer->drive, cmd, cyl, 383 head, sect, nblks, 384 (ata_bio->lp->d_type == DTYPE_ST506) ? 385 ata_bio->lp->d_precompcyl / 4 : 0); 386 } 387 } else if (ata_bio->nblks > 1) { 388 /* The number of blocks in the last stretch may be smaller. */ 389 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 390 if (ata_bio->nblks > nblks) { 391 ata_bio->nblks = nblks; 392 ata_bio->nbytes = xfer->c_bcount; 393 } 394 } 395 /* If this was a write and not using DMA, push the data. */ 396 if ((ata_bio->flags & ATA_READ) == 0) { 397 if (wait_for_drq(chp, ata_delay) != 0) { 398 printf("%s:%d:%d: timeout waiting for DRQ, " 399 "st=0x%02x, err=0x%02x\n", 400 chp->wdc->sc_dev.dv_xname, chp->channel, 401 xfer->drive, chp->ch_status, chp->ch_error); 402 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 403 ata_bio->error = TIMEOUT; 404 wdc_ata_bio_done(chp, xfer); 405 return; 406 } 407 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 408 wdc_ata_bio_done(chp, xfer); 409 return; 410 } 411 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 412 if (drvp->drive_flags & DRIVE_CAP32) { 413 bus_space_write_multi_4(chp->data32iot, 414 chp->data32ioh, 0, 415 (u_int32_t *)((char *)xfer->databuf + 416 xfer->c_skip), 417 ata_bio->nbytes >> 2); 418 } else { 419 bus_space_write_multi_2(chp->cmd_iot, 420 chp->cmd_ioh, wd_data, 421 (u_int16_t *)((char *)xfer->databuf + 422 xfer->c_skip), 423 ata_bio->nbytes >> 1); 424 } 425 } else { 426 if (drvp->drive_flags & DRIVE_CAP32) { 427 bus_space_write_multi_stream_4(chp->data32iot, 428 chp->data32ioh, 0, 429 (u_int32_t *)((char *)xfer->databuf + 430 xfer->c_skip), 431 ata_bio->nbytes >> 2); 432 } else { 433 bus_space_write_multi_stream_2(chp->cmd_iot, 434 chp->cmd_ioh, wd_data, 435 (u_int16_t *)((char *)xfer->databuf + 436 xfer->c_skip), 437 ata_bio->nbytes >> 1); 438 } 439 } 440 } 441 442 intr: /* Wait for IRQ (either real or polled) */ 443 if ((ata_bio->flags & ATA_POLL) == 0) { 444 chp->ch_flags |= WDCF_IRQ_WAIT; 445 } else { 446 /* Wait for at last 400ns for status bit to be valid */ 447 delay(1); 448 if (chp->ch_flags & WDCF_DMA_WAIT) { 449 wdc_dmawait(chp, xfer, ATA_DELAY); 450 chp->ch_flags &= ~WDCF_DMA_WAIT; 451 } 452 wdc_ata_bio_intr(chp, xfer, 0); 453 if ((ata_bio->flags & ATA_ITSDONE) == 0) 454 goto again; 455 } 456 return; 457 timeout: 458 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 459 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 460 chp->ch_status, chp->ch_error); 461 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 462 ata_bio->error = TIMEOUT; 463 wdc_ata_bio_done(chp, xfer); 464 return; 465 } 466 467 int 468 wdc_ata_bio_intr(chp, xfer, irq) 469 struct channel_softc *chp; 470 struct wdc_xfer *xfer; 471 int irq; 472 { 473 struct ata_bio *ata_bio = xfer->cmd; 474 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 475 int drv_err; 476 477 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 478 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 479 DEBUG_INTR | DEBUG_XFERS); 480 481 482 /* Is it not a transfer, but a control operation? */ 483 if (drvp->state < READY) { 484 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 485 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 486 drvp->state); 487 panic("wdc_ata_bio_intr: bad state\n"); 488 } 489 490 /* 491 * if we missed an interrupt in a PIO transfer, reset and restart. 492 * Don't try to continue transfer, we may have missed cycles. 493 */ 494 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 495 ata_bio->error = TIMEOUT; 496 wdc_ata_bio_done(chp, xfer); 497 return 1; 498 } 499 500 /* Ack interrupt done by wait_for_unbusy */ 501 if (wait_for_unbusy(chp, 502 (irq == 0) ? ATA_DELAY : 0) < 0) { 503 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 504 return 0; /* IRQ was not for us */ 505 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 506 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 507 xfer->c_bcount, xfer->c_skip); 508 /* if we were using DMA, flag a DMA error */ 509 if (xfer->c_flags & C_DMA) { 510 ata_dmaerr(drvp); 511 } 512 ata_bio->error = TIMEOUT; 513 wdc_ata_bio_done(chp, xfer); 514 return 1; 515 } 516 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 517 chp->wdc->irqack(chp); 518 519 drv_err = wdc_ata_err(drvp, ata_bio); 520 521 /* If we were using DMA, Turn off the DMA channel and check for error */ 522 if (xfer->c_flags & C_DMA) { 523 if (ata_bio->flags & ATA_POLL) { 524 /* 525 * IDE drives deassert WDCS_BSY before transfer is 526 * complete when using DMA. Polling for DRQ to deassert 527 * is not enouth DRQ is not required to be 528 * asserted for DMA transfers, so poll for DRDY. 529 */ 530 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 531 ATA_DELAY) < 0) { 532 printf("%s:%d:%d: polled transfer timed out " 533 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 534 chp->channel, xfer->drive, chp->ch_status); 535 ata_bio->error = TIMEOUT; 536 drv_err = WDC_ATA_ERR; 537 } 538 } 539 if (chp->wdc->dma_status != 0) { 540 if (drv_err != WDC_ATA_ERR) { 541 ata_bio->error = ERR_DMA; 542 drv_err = WDC_ATA_ERR; 543 } 544 } 545 if (chp->ch_status & WDCS_DRQ) { 546 if (drv_err != WDC_ATA_ERR) { 547 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 548 chp->wdc->sc_dev.dv_xname, chp->channel, 549 xfer->drive, chp->ch_status); 550 ata_bio->error = TIMEOUT; 551 drv_err = WDC_ATA_ERR; 552 } 553 } 554 if (drv_err != WDC_ATA_ERR) 555 goto end; 556 ata_dmaerr(drvp); 557 } 558 559 /* if we had an error, end */ 560 if (drv_err == WDC_ATA_ERR) { 561 wdc_ata_bio_done(chp, xfer); 562 return 1; 563 } 564 565 /* If this was a read and not using DMA, fetch the data. */ 566 if ((ata_bio->flags & ATA_READ) != 0) { 567 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 568 printf("%s:%d:%d: read intr before drq\n", 569 chp->wdc->sc_dev.dv_xname, chp->channel, 570 xfer->drive); 571 ata_bio->error = TIMEOUT; 572 wdc_ata_bio_done(chp, xfer); 573 return 1; 574 } 575 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 576 if (drvp->drive_flags & DRIVE_CAP32) { 577 bus_space_read_multi_4(chp->data32iot, 578 chp->data32ioh, 0, 579 (u_int32_t *)((char *)xfer->databuf + 580 xfer->c_skip), 581 ata_bio->nbytes >> 2); 582 } else { 583 bus_space_read_multi_2(chp->cmd_iot, 584 chp->cmd_ioh, wd_data, 585 (u_int16_t *)((char *)xfer->databuf + 586 xfer->c_skip), 587 ata_bio->nbytes >> 1); 588 } 589 } else { 590 if (drvp->drive_flags & DRIVE_CAP32) { 591 bus_space_read_multi_stream_4(chp->data32iot, 592 chp->data32ioh, 0, 593 (u_int32_t *)((char *)xfer->databuf + 594 xfer->c_skip), 595 ata_bio->nbytes >> 2); 596 } else { 597 bus_space_read_multi_stream_2(chp->cmd_iot, 598 chp->cmd_ioh, wd_data, 599 (u_int16_t *)((char *)xfer->databuf + 600 xfer->c_skip), 601 ata_bio->nbytes >> 1); 602 } 603 } 604 } 605 606 end: 607 ata_bio->blkno += ata_bio->nblks; 608 ata_bio->blkdone += ata_bio->nblks; 609 xfer->c_skip += ata_bio->nbytes; 610 xfer->c_bcount -= ata_bio->nbytes; 611 /* See if this transfer is complete. */ 612 if (xfer->c_bcount > 0) { 613 if ((ata_bio->flags & ATA_POLL) == 0) { 614 /* Start the next operation */ 615 _wdc_ata_bio_start(chp, xfer); 616 } else { 617 /* Let _wdc_ata_bio_start do the loop */ 618 return 1; 619 } 620 } else { /* Done with this transfer */ 621 ata_bio->error = NOERROR; 622 wdc_ata_bio_done(chp, xfer); 623 } 624 return 1; 625 } 626 627 void 628 wdc_ata_kill_pending(drvp) 629 struct ata_drive_datas *drvp; 630 { 631 struct channel_softc *chp = drvp->chnl_softc; 632 633 wdc_kill_pending(chp); 634 } 635 636 void 637 wdc_ata_bio_kill_xfer(chp, xfer) 638 struct channel_softc *chp; 639 struct wdc_xfer *xfer; 640 { 641 struct ata_bio *ata_bio = xfer->cmd; 642 int drive = xfer->drive; 643 644 callout_stop(&chp->ch_callout); 645 /* remove this command from xfer queue */ 646 wdc_free_xfer(chp, xfer); 647 648 ata_bio->flags |= ATA_ITSDONE; 649 ata_bio->error = ERR_NODEV; 650 ata_bio->r_error = WDCE_ABRT; 651 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 652 wddone(chp->ch_drive[drive].drv_softc); 653 } 654 655 void 656 wdc_ata_bio_done(chp, xfer) 657 struct channel_softc *chp; 658 struct wdc_xfer *xfer; 659 { 660 struct ata_bio *ata_bio = xfer->cmd; 661 int drive = xfer->drive; 662 663 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 664 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 665 (u_int)xfer->c_flags), 666 DEBUG_XFERS); 667 668 callout_stop(&chp->ch_callout); 669 670 /* feed back residual bcount to our caller */ 671 ata_bio->bcount = xfer->c_bcount; 672 673 /* remove this command from xfer queue */ 674 wdc_free_xfer(chp, xfer); 675 676 ata_bio->flags |= ATA_ITSDONE; 677 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 678 wddone(chp->ch_drive[drive].drv_softc); 679 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 680 chp->ch_flags), DEBUG_XFERS); 681 wdcstart(chp); 682 } 683 684 /* 685 * Implement operations needed before read/write. 686 */ 687 int 688 wdc_ata_ctrl_intr(chp, xfer, irq) 689 struct channel_softc *chp; 690 struct wdc_xfer *xfer; 691 int irq; 692 { 693 struct ata_bio *ata_bio = xfer->cmd; 694 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 695 char *errstring = NULL; 696 int delay = (irq == 0) ? ATA_DELAY : 0; 697 698 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 699 DEBUG_FUNCS); 700 701 again: 702 switch (drvp->state) { 703 case RECAL: /* Should not be in this state here */ 704 panic("wdc_ata_ctrl_intr: state==RECAL"); 705 break; 706 707 case RECAL_WAIT: 708 errstring = "recal"; 709 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 710 goto timeout; 711 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 712 chp->wdc->irqack(chp); 713 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 714 goto error; 715 /* fall through */ 716 717 case PIOMODE: 718 /* Don't try to set modes if controller can't be adjusted */ 719 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 720 goto geometry; 721 /* Also don't try if the drive didn't report its mode */ 722 if ((drvp->drive_flags & DRIVE_MODE) == 0) 723 goto geometry; 724 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 725 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 726 drvp->state = PIOMODE_WAIT; 727 break; 728 729 case PIOMODE_WAIT: 730 errstring = "piomode"; 731 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 732 goto timeout; 733 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 734 chp->wdc->irqack(chp); 735 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 736 goto error; 737 /* fall through */ 738 739 case DMAMODE: 740 if (drvp->drive_flags & DRIVE_UDMA) { 741 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 742 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 743 } else if (drvp->drive_flags & DRIVE_DMA) { 744 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 745 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 746 } else { 747 goto geometry; 748 } 749 drvp->state = DMAMODE_WAIT; 750 break; 751 case DMAMODE_WAIT: 752 errstring = "dmamode"; 753 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 754 goto timeout; 755 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 756 chp->wdc->irqack(chp); 757 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 758 goto error; 759 /* fall through */ 760 761 case GEOMETRY: 762 geometry: 763 if (ata_bio->flags & ATA_LBA) 764 goto multimode; 765 wdccommand(chp, xfer->drive, WDCC_IDP, 766 ata_bio->lp->d_ncylinders, 767 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 768 (ata_bio->lp->d_type == DTYPE_ST506) ? 769 ata_bio->lp->d_precompcyl / 4 : 0); 770 drvp->state = GEOMETRY_WAIT; 771 break; 772 773 case GEOMETRY_WAIT: 774 errstring = "geometry"; 775 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 776 goto timeout; 777 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 778 chp->wdc->irqack(chp); 779 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 780 goto error; 781 /* fall through */ 782 783 case MULTIMODE: 784 multimode: 785 if (ata_bio->multi == 1) 786 goto ready; 787 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 788 ata_bio->multi, 0); 789 drvp->state = MULTIMODE_WAIT; 790 break; 791 792 case MULTIMODE_WAIT: 793 errstring = "setmulti"; 794 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 795 goto timeout; 796 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 797 chp->wdc->irqack(chp); 798 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 799 goto error; 800 /* fall through */ 801 802 case READY: 803 ready: 804 drvp->state = READY; 805 /* 806 * The drive is usable now 807 */ 808 xfer->c_intr = wdc_ata_bio_intr; 809 _wdc_ata_bio_start(chp, xfer); 810 return 1; 811 } 812 813 if ((ata_bio->flags & ATA_POLL) == 0) { 814 chp->ch_flags |= WDCF_IRQ_WAIT; 815 } else { 816 goto again; 817 } 818 return 1; 819 820 timeout: 821 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 822 return 0; /* IRQ was not for us */ 823 } 824 printf("%s:%d:%d: %s timed out\n", 825 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 826 ata_bio->error = TIMEOUT; 827 drvp->state = 0; 828 wdc_ata_bio_done(chp, xfer); 829 return 0; 830 error: 831 printf("%s:%d:%d: %s ", 832 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 833 errstring); 834 if (chp->ch_status & WDCS_DWF) { 835 printf("drive fault\n"); 836 ata_bio->error = ERR_DF; 837 } else { 838 printf("error (%x)\n", chp->ch_error); 839 ata_bio->r_error = chp->ch_error; 840 ata_bio->error = ERROR; 841 } 842 drvp->state = 0; 843 wdc_ata_bio_done(chp, xfer); 844 return 1; 845 } 846 847 int 848 wdc_ata_err(drvp, ata_bio) 849 struct ata_drive_datas *drvp; 850 struct ata_bio *ata_bio; 851 { 852 struct channel_softc *chp = drvp->chnl_softc; 853 ata_bio->error = 0; 854 if (chp->ch_status & WDCS_BSY) { 855 ata_bio->error = TIMEOUT; 856 return WDC_ATA_ERR; 857 } 858 859 if (chp->ch_status & WDCS_DWF) { 860 ata_bio->error = ERR_DF; 861 return WDC_ATA_ERR; 862 } 863 864 if (chp->ch_status & WDCS_ERR) { 865 ata_bio->error = ERROR; 866 ata_bio->r_error = chp->ch_error; 867 if (drvp->drive_flags & DRIVE_UDMA && 868 (ata_bio->r_error & WDCE_CRC)) { 869 /* 870 * Record the CRC error, to avoid downgrading to 871 * multiword DMA 872 */ 873 drvp->drive_flags |= DRIVE_DMAERR; 874 } 875 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 876 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 877 return WDC_ATA_ERR; 878 return WDC_ATA_NOERR; 879 } 880 881 if (chp->ch_status & WDCS_CORR) 882 ata_bio->flags |= ATA_CORR; 883 return WDC_ATA_NOERR; 884 } 885 886 int 887 wdc_ata_addref(drvp) 888 struct ata_drive_datas *drvp; 889 { 890 struct channel_softc *chp = drvp->chnl_softc; 891 892 return (wdc_addref(chp)); 893 } 894 895 void 896 wdc_ata_delref(drvp) 897 struct ata_drive_datas *drvp; 898 { 899 struct channel_softc *chp = drvp->chnl_softc; 900 901 wdc_delref(chp); 902 } 903
Indexes created Thu Oct 02 01:09:59 GMT 2025