ata_wdc.c revision 1.37
1 /* $NetBSD: ata_wdc.c,v 1.37 2002/07/26 01:00:42 wiz Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 */ 33 34 /*- 35 * Copyright (c) 1998 The NetBSD Foundation, Inc. 36 * All rights reserved. 37 * 38 * This code is derived from software contributed to The NetBSD Foundation 39 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #include <sys/cdefs.h> 71 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.37 2002/07/26 01:00:42 wiz Exp $"); 72 73 #ifndef WDCDEBUG 74 #define WDCDEBUG 75 #endif /* WDCDEBUG */ 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/file.h> 81 #include <sys/stat.h> 82 #include <sys/buf.h> 83 #include <sys/malloc.h> 84 #include <sys/device.h> 85 #include <sys/disklabel.h> 86 #include <sys/syslog.h> 87 #include <sys/proc.h> 88 89 #include <machine/intr.h> 90 #include <machine/bus.h> 91 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 92 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 93 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 94 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 95 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 96 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 97 98 #include <dev/ata/atareg.h> 99 #include <dev/ata/atavar.h> 100 #include <dev/ic/wdcreg.h> 101 #include <dev/ic/wdcvar.h> 102 #include <dev/ata/wdvar.h> 103 104 #define DEBUG_INTR 0x01 105 #define DEBUG_XFERS 0x02 106 #define DEBUG_STATUS 0x04 107 #define DEBUG_FUNCS 0x08 108 #define DEBUG_PROBE 0x10 109 #ifdef WDCDEBUG 110 int wdcdebug_wd_mask = 0; 111 #define WDCDEBUG_PRINT(args, level) \ 112 if (wdcdebug_wd_mask & (level)) \ 113 printf args 114 #else 115 #define WDCDEBUG_PRINT(args, level) 116 #endif 117 118 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 119 120 int wdc_ata_bio __P((struct ata_drive_datas*, struct ata_bio*)); 121 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 122 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 123 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 125 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 126 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 127 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 128 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 129 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 130 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 131 int wdc_ata_addref __P((struct ata_drive_datas *)); 132 void wdc_ata_delref __P((struct ata_drive_datas *)); 133 void wdc_ata_kill_pending __P((struct ata_drive_datas *)); 134 135 const struct ata_bustype wdc_ata_bustype = { 136 SCSIPI_BUSTYPE_ATA, 137 wdc_ata_bio, 138 wdc_reset_channel, 139 wdc_exec_command, 140 ata_get_params, 141 wdc_ata_addref, 142 wdc_ata_delref, 143 wdc_ata_kill_pending, 144 }; 145 146 147 /* 148 * Convert a 32 bit command to a 48 bit command. 149 */ 150 static __inline__ 151 int to48(int cmd32) 152 { 153 switch (cmd32) { 154 case WDCC_READ: 155 return WDCC_READ_EXT; 156 case WDCC_WRITE: 157 return WDCC_WRITE_EXT; 158 case WDCC_READMULTI: 159 return WDCC_READMULTI_EXT; 160 case WDCC_WRITEMULTI: 161 return WDCC_WRITEMULTI_EXT; 162 case WDCC_READDMA: 163 return WDCC_READDMA_EXT; 164 case WDCC_WRITEDMA: 165 return WDCC_WRITEDMA_EXT; 166 default: 167 panic("ata_wdc: illegal 32 bit command %d", cmd32); 168 /*NOTREACHED*/ 169 } 170 } 171 172 /* 173 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 174 * WDC_TRY_AGAIN. Must be called at splbio(). 175 */ 176 int 177 wdc_ata_bio(drvp, ata_bio) 178 struct ata_drive_datas *drvp; 179 struct ata_bio *ata_bio; 180 { 181 struct wdc_xfer *xfer; 182 struct channel_softc *chp = drvp->chnl_softc; 183 184 xfer = wdc_get_xfer(WDC_NOSLEEP); 185 if (xfer == NULL) 186 return WDC_TRY_AGAIN; 187 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 188 ata_bio->flags |= ATA_POLL; 189 if (ata_bio->flags & ATA_POLL) 190 xfer->c_flags |= C_POLL; 191 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 192 (ata_bio->flags & ATA_SINGLE) == 0) 193 xfer->c_flags |= C_DMA; 194 xfer->drive = drvp->drive; 195 xfer->cmd = ata_bio; 196 xfer->databuf = ata_bio->databuf; 197 xfer->c_bcount = ata_bio->bcount; 198 xfer->c_start = wdc_ata_bio_start; 199 xfer->c_intr = wdc_ata_bio_intr; 200 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 201 wdc_exec_xfer(chp, xfer); 202 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 203 } 204 205 void 206 wdc_ata_bio_start(chp, xfer) 207 struct channel_softc *chp; 208 struct wdc_xfer *xfer; 209 { 210 struct ata_bio *ata_bio = xfer->cmd; 211 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 212 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 213 DEBUG_XFERS); 214 215 /* start timeout machinery */ 216 if ((ata_bio->flags & ATA_POLL) == 0) 217 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 218 wdctimeout, chp); 219 _wdc_ata_bio_start(chp, xfer); 220 } 221 222 void 223 _wdc_ata_bio_start(chp, xfer) 224 struct channel_softc *chp; 225 struct wdc_xfer *xfer; 226 { 227 struct ata_bio *ata_bio = xfer->cmd; 228 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 229 u_int16_t cyl; 230 u_int8_t head, sect, cmd = 0; 231 int nblks; 232 int ata_delay; 233 int dma_flags = 0; 234 235 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 236 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 237 DEBUG_INTR | DEBUG_XFERS); 238 /* Do control operations specially. */ 239 if (drvp->state < READY) { 240 /* 241 * Actually, we want to be careful not to mess with the control 242 * state if the device is currently busy, but we can assume 243 * that we never get to this point if that's the case. 244 */ 245 /* at this point, we should only be in RECAL state */ 246 if (drvp->state != RESET) { 247 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 248 chp->wdc->sc_dev.dv_xname, chp->channel, 249 xfer->drive, drvp->state); 250 panic("_wdc_ata_bio_start: bad state"); 251 } 252 drvp->state = RECAL; 253 xfer->c_intr = wdc_ata_ctrl_intr; 254 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 255 WDSD_IBM | (xfer->drive << 4)); 256 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 257 goto timeout; 258 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 259 drvp->state = RECAL_WAIT; 260 if ((ata_bio->flags & ATA_POLL) == 0) { 261 chp->ch_flags |= WDCF_IRQ_WAIT; 262 } else { 263 /* Wait for at last 400ns for status bit to be valid */ 264 DELAY(1); 265 wdc_ata_ctrl_intr(chp, xfer, 0); 266 } 267 return; 268 } 269 270 if (xfer->c_flags & C_DMA) { 271 if (drvp->n_xfers <= NXFER) 272 drvp->n_xfers++; 273 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 274 } 275 if (ata_bio->flags & ATA_SINGLE) 276 ata_delay = ATA_DELAY; 277 else 278 ata_delay = ATA_DELAY; 279 again: 280 /* 281 * 282 * When starting a multi-sector transfer, or doing single-sector 283 * transfers... 284 */ 285 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 286 if (ata_bio->flags & ATA_SINGLE) 287 nblks = 1; 288 else 289 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 290 /* Check for bad sectors and adjust transfer, if necessary. */ 291 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 292 long blkdiff; 293 int i; 294 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 295 i++) { 296 blkdiff -= ata_bio->blkno; 297 if (blkdiff < 0) 298 continue; 299 if (blkdiff == 0) { 300 /* Replace current block of transfer. */ 301 ata_bio->blkno = 302 ata_bio->lp->d_secperunit - 303 ata_bio->lp->d_nsectors - i - 1; 304 } 305 if (blkdiff < nblks) { 306 /* Bad block inside transfer. */ 307 ata_bio->flags |= ATA_SINGLE; 308 nblks = 1; 309 } 310 break; 311 } 312 /* Transfer is okay now. */ 313 } 314 if (ata_bio->flags & ATA_LBA48) { 315 sect = 0; 316 cyl = 0; 317 head = 0; 318 } else if (ata_bio->flags & ATA_LBA) { 319 sect = (ata_bio->blkno >> 0) & 0xff; 320 cyl = (ata_bio->blkno >> 8) & 0xffff; 321 head = (ata_bio->blkno >> 24) & 0x0f; 322 head |= WDSD_LBA; 323 } else { 324 int blkno = ata_bio->blkno; 325 sect = blkno % ata_bio->lp->d_nsectors; 326 sect++; /* Sectors begin with 1, not 0. */ 327 blkno /= ata_bio->lp->d_nsectors; 328 head = blkno % ata_bio->lp->d_ntracks; 329 blkno /= ata_bio->lp->d_ntracks; 330 cyl = blkno; 331 head |= WDSD_CHS; 332 } 333 if (xfer->c_flags & C_DMA) { 334 ata_bio->nblks = nblks; 335 ata_bio->nbytes = xfer->c_bcount; 336 cmd = (ata_bio->flags & ATA_READ) ? 337 WDCC_READDMA : WDCC_WRITEDMA; 338 /* Init the DMA channel. */ 339 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 340 chp->channel, xfer->drive, 341 (char *)xfer->databuf + xfer->c_skip, 342 ata_bio->nbytes, dma_flags) != 0) { 343 ata_bio->error = ERR_DMA; 344 ata_bio->r_error = 0; 345 wdc_ata_bio_done(chp, xfer); 346 return; 347 } 348 /* Initiate command */ 349 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 350 WDSD_IBM | (xfer->drive << 4)); 351 if (wait_for_ready(chp, ata_delay) < 0) 352 goto timeout; 353 if (ata_bio->flags & ATA_LBA48) { 354 wdccommandext(chp, xfer->drive, to48(cmd), 355 (u_int64_t)ata_bio->blkno, nblks); 356 } else { 357 wdccommand(chp, xfer->drive, cmd, cyl, 358 head, sect, nblks, 0); 359 } 360 /* start the DMA channel */ 361 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 362 chp->channel, xfer->drive); 363 chp->ch_flags |= WDCF_DMA_WAIT; 364 /* wait for irq */ 365 goto intr; 366 } /* else not DMA */ 367 ata_bio->nblks = min(nblks, ata_bio->multi); 368 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 369 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 370 cmd = (ata_bio->flags & ATA_READ) ? 371 WDCC_READMULTI : WDCC_WRITEMULTI; 372 } else { 373 cmd = (ata_bio->flags & ATA_READ) ? 374 WDCC_READ : WDCC_WRITE; 375 } 376 /* Initiate command! */ 377 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 378 WDSD_IBM | (xfer->drive << 4)); 379 if (wait_for_ready(chp, ata_delay) < 0) 380 goto timeout; 381 if (ata_bio->flags & ATA_LBA48) { 382 wdccommandext(chp, xfer->drive, to48(cmd), 383 (u_int64_t) ata_bio->blkno, nblks); 384 } else { 385 wdccommand(chp, xfer->drive, cmd, cyl, 386 head, sect, nblks, 387 (ata_bio->lp->d_type == DTYPE_ST506) ? 388 ata_bio->lp->d_precompcyl / 4 : 0); 389 } 390 } else if (ata_bio->nblks > 1) { 391 /* The number of blocks in the last stretch may be smaller. */ 392 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 393 if (ata_bio->nblks > nblks) { 394 ata_bio->nblks = nblks; 395 ata_bio->nbytes = xfer->c_bcount; 396 } 397 } 398 /* If this was a write and not using DMA, push the data. */ 399 if ((ata_bio->flags & ATA_READ) == 0) { 400 if (wait_for_drq(chp, ata_delay) != 0) { 401 printf("%s:%d:%d: timeout waiting for DRQ, " 402 "st=0x%02x, err=0x%02x\n", 403 chp->wdc->sc_dev.dv_xname, chp->channel, 404 xfer->drive, chp->ch_status, chp->ch_error); 405 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 406 ata_bio->error = TIMEOUT; 407 wdc_ata_bio_done(chp, xfer); 408 return; 409 } 410 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 411 wdc_ata_bio_done(chp, xfer); 412 return; 413 } 414 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 415 if (drvp->drive_flags & DRIVE_CAP32) { 416 bus_space_write_multi_4(chp->data32iot, 417 chp->data32ioh, 0, 418 (u_int32_t *)((char *)xfer->databuf + 419 xfer->c_skip), 420 ata_bio->nbytes >> 2); 421 } else { 422 bus_space_write_multi_2(chp->cmd_iot, 423 chp->cmd_ioh, wd_data, 424 (u_int16_t *)((char *)xfer->databuf + 425 xfer->c_skip), 426 ata_bio->nbytes >> 1); 427 } 428 } else { 429 if (drvp->drive_flags & DRIVE_CAP32) { 430 bus_space_write_multi_stream_4(chp->data32iot, 431 chp->data32ioh, 0, 432 (u_int32_t *)((char *)xfer->databuf + 433 xfer->c_skip), 434 ata_bio->nbytes >> 2); 435 } else { 436 bus_space_write_multi_stream_2(chp->cmd_iot, 437 chp->cmd_ioh, wd_data, 438 (u_int16_t *)((char *)xfer->databuf + 439 xfer->c_skip), 440 ata_bio->nbytes >> 1); 441 } 442 } 443 } 444 445 intr: /* Wait for IRQ (either real or polled) */ 446 if ((ata_bio->flags & ATA_POLL) == 0) { 447 chp->ch_flags |= WDCF_IRQ_WAIT; 448 } else { 449 /* Wait for at last 400ns for status bit to be valid */ 450 delay(1); 451 if (chp->ch_flags & WDCF_DMA_WAIT) { 452 wdc_dmawait(chp, xfer, ATA_DELAY); 453 chp->ch_flags &= ~WDCF_DMA_WAIT; 454 } 455 wdc_ata_bio_intr(chp, xfer, 0); 456 if ((ata_bio->flags & ATA_ITSDONE) == 0) 457 goto again; 458 } 459 return; 460 timeout: 461 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 462 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 463 chp->ch_status, chp->ch_error); 464 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 465 ata_bio->error = TIMEOUT; 466 wdc_ata_bio_done(chp, xfer); 467 return; 468 } 469 470 int 471 wdc_ata_bio_intr(chp, xfer, irq) 472 struct channel_softc *chp; 473 struct wdc_xfer *xfer; 474 int irq; 475 { 476 struct ata_bio *ata_bio = xfer->cmd; 477 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 478 int drv_err; 479 480 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 481 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 482 DEBUG_INTR | DEBUG_XFERS); 483 484 485 /* Is it not a transfer, but a control operation? */ 486 if (drvp->state < READY) { 487 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 488 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 489 drvp->state); 490 panic("wdc_ata_bio_intr: bad state\n"); 491 } 492 493 /* 494 * if we missed an interrupt in a PIO transfer, reset and restart. 495 * Don't try to continue transfer, we may have missed cycles. 496 */ 497 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 498 ata_bio->error = TIMEOUT; 499 wdc_ata_bio_done(chp, xfer); 500 return 1; 501 } 502 503 /* Ack interrupt done by wait_for_unbusy */ 504 if (wait_for_unbusy(chp, 505 (irq == 0) ? ATA_DELAY : 0) < 0) { 506 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 507 return 0; /* IRQ was not for us */ 508 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 509 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 510 xfer->c_bcount, xfer->c_skip); 511 /* if we were using DMA, flag a DMA error */ 512 if (xfer->c_flags & C_DMA) { 513 ata_dmaerr(drvp); 514 } 515 ata_bio->error = TIMEOUT; 516 wdc_ata_bio_done(chp, xfer); 517 return 1; 518 } 519 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 520 chp->wdc->irqack(chp); 521 522 drv_err = wdc_ata_err(drvp, ata_bio); 523 524 /* If we were using DMA, Turn off the DMA channel and check for error */ 525 if (xfer->c_flags & C_DMA) { 526 if (ata_bio->flags & ATA_POLL) { 527 /* 528 * IDE drives deassert WDCS_BSY before transfer is 529 * complete when using DMA. Polling for DRQ to deassert 530 * is not enough DRQ is not required to be 531 * asserted for DMA transfers, so poll for DRDY. 532 */ 533 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 534 ATA_DELAY) < 0) { 535 printf("%s:%d:%d: polled transfer timed out " 536 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 537 chp->channel, xfer->drive, chp->ch_status); 538 ata_bio->error = TIMEOUT; 539 drv_err = WDC_ATA_ERR; 540 } 541 } 542 if (chp->wdc->dma_status != 0) { 543 if (drv_err != WDC_ATA_ERR) { 544 ata_bio->error = ERR_DMA; 545 drv_err = WDC_ATA_ERR; 546 } 547 } 548 if (chp->ch_status & WDCS_DRQ) { 549 if (drv_err != WDC_ATA_ERR) { 550 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 551 chp->wdc->sc_dev.dv_xname, chp->channel, 552 xfer->drive, chp->ch_status); 553 ata_bio->error = TIMEOUT; 554 drv_err = WDC_ATA_ERR; 555 } 556 } 557 if (drv_err != WDC_ATA_ERR) 558 goto end; 559 ata_dmaerr(drvp); 560 } 561 562 /* if we had an error, end */ 563 if (drv_err == WDC_ATA_ERR) { 564 wdc_ata_bio_done(chp, xfer); 565 return 1; 566 } 567 568 /* If this was a read and not using DMA, fetch the data. */ 569 if ((ata_bio->flags & ATA_READ) != 0) { 570 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 571 printf("%s:%d:%d: read intr before drq\n", 572 chp->wdc->sc_dev.dv_xname, chp->channel, 573 xfer->drive); 574 ata_bio->error = TIMEOUT; 575 wdc_ata_bio_done(chp, xfer); 576 return 1; 577 } 578 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 579 if (drvp->drive_flags & DRIVE_CAP32) { 580 bus_space_read_multi_4(chp->data32iot, 581 chp->data32ioh, 0, 582 (u_int32_t *)((char *)xfer->databuf + 583 xfer->c_skip), 584 ata_bio->nbytes >> 2); 585 } else { 586 bus_space_read_multi_2(chp->cmd_iot, 587 chp->cmd_ioh, wd_data, 588 (u_int16_t *)((char *)xfer->databuf + 589 xfer->c_skip), 590 ata_bio->nbytes >> 1); 591 } 592 } else { 593 if (drvp->drive_flags & DRIVE_CAP32) { 594 bus_space_read_multi_stream_4(chp->data32iot, 595 chp->data32ioh, 0, 596 (u_int32_t *)((char *)xfer->databuf + 597 xfer->c_skip), 598 ata_bio->nbytes >> 2); 599 } else { 600 bus_space_read_multi_stream_2(chp->cmd_iot, 601 chp->cmd_ioh, wd_data, 602 (u_int16_t *)((char *)xfer->databuf + 603 xfer->c_skip), 604 ata_bio->nbytes >> 1); 605 } 606 } 607 } 608 609 end: 610 ata_bio->blkno += ata_bio->nblks; 611 ata_bio->blkdone += ata_bio->nblks; 612 xfer->c_skip += ata_bio->nbytes; 613 xfer->c_bcount -= ata_bio->nbytes; 614 /* See if this transfer is complete. */ 615 if (xfer->c_bcount > 0) { 616 if ((ata_bio->flags & ATA_POLL) == 0) { 617 /* Start the next operation */ 618 _wdc_ata_bio_start(chp, xfer); 619 } else { 620 /* Let _wdc_ata_bio_start do the loop */ 621 return 1; 622 } 623 } else { /* Done with this transfer */ 624 ata_bio->error = NOERROR; 625 wdc_ata_bio_done(chp, xfer); 626 } 627 return 1; 628 } 629 630 void 631 wdc_ata_kill_pending(drvp) 632 struct ata_drive_datas *drvp; 633 { 634 struct channel_softc *chp = drvp->chnl_softc; 635 636 wdc_kill_pending(chp); 637 } 638 639 void 640 wdc_ata_bio_kill_xfer(chp, xfer) 641 struct channel_softc *chp; 642 struct wdc_xfer *xfer; 643 { 644 struct ata_bio *ata_bio = xfer->cmd; 645 int drive = xfer->drive; 646 647 callout_stop(&chp->ch_callout); 648 /* remove this command from xfer queue */ 649 wdc_free_xfer(chp, xfer); 650 651 ata_bio->flags |= ATA_ITSDONE; 652 ata_bio->error = ERR_NODEV; 653 ata_bio->r_error = WDCE_ABRT; 654 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 655 wddone(chp->ch_drive[drive].drv_softc); 656 } 657 658 void 659 wdc_ata_bio_done(chp, xfer) 660 struct channel_softc *chp; 661 struct wdc_xfer *xfer; 662 { 663 struct ata_bio *ata_bio = xfer->cmd; 664 int drive = xfer->drive; 665 666 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 667 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 668 (u_int)xfer->c_flags), 669 DEBUG_XFERS); 670 671 callout_stop(&chp->ch_callout); 672 673 /* feed back residual bcount to our caller */ 674 ata_bio->bcount = xfer->c_bcount; 675 676 /* remove this command from xfer queue */ 677 wdc_free_xfer(chp, xfer); 678 679 ata_bio->flags |= ATA_ITSDONE; 680 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 681 wddone(chp->ch_drive[drive].drv_softc); 682 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 683 chp->ch_flags), DEBUG_XFERS); 684 wdcstart(chp); 685 } 686 687 /* 688 * Implement operations needed before read/write. 689 */ 690 int 691 wdc_ata_ctrl_intr(chp, xfer, irq) 692 struct channel_softc *chp; 693 struct wdc_xfer *xfer; 694 int irq; 695 { 696 struct ata_bio *ata_bio = xfer->cmd; 697 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 698 char *errstring = NULL; 699 int delay = (irq == 0) ? ATA_DELAY : 0; 700 701 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 702 DEBUG_FUNCS); 703 704 again: 705 switch (drvp->state) { 706 case RECAL: /* Should not be in this state here */ 707 panic("wdc_ata_ctrl_intr: state==RECAL"); 708 break; 709 710 case RECAL_WAIT: 711 errstring = "recal"; 712 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 713 goto timeout; 714 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 715 chp->wdc->irqack(chp); 716 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 717 goto error; 718 /* fall through */ 719 720 case PIOMODE: 721 /* Don't try to set modes if controller can't be adjusted */ 722 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 723 goto geometry; 724 /* Also don't try if the drive didn't report its mode */ 725 if ((drvp->drive_flags & DRIVE_MODE) == 0) 726 goto geometry; 727 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 728 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 729 drvp->state = PIOMODE_WAIT; 730 break; 731 732 case PIOMODE_WAIT: 733 errstring = "piomode"; 734 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 735 goto timeout; 736 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 737 chp->wdc->irqack(chp); 738 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 739 goto error; 740 /* fall through */ 741 742 case DMAMODE: 743 if (drvp->drive_flags & DRIVE_UDMA) { 744 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 745 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 746 } else if (drvp->drive_flags & DRIVE_DMA) { 747 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 748 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 749 } else { 750 goto geometry; 751 } 752 drvp->state = DMAMODE_WAIT; 753 break; 754 case DMAMODE_WAIT: 755 errstring = "dmamode"; 756 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 757 goto timeout; 758 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 759 chp->wdc->irqack(chp); 760 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 761 goto error; 762 /* fall through */ 763 764 case GEOMETRY: 765 geometry: 766 if (ata_bio->flags & ATA_LBA) 767 goto multimode; 768 wdccommand(chp, xfer->drive, WDCC_IDP, 769 ata_bio->lp->d_ncylinders, 770 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 771 (ata_bio->lp->d_type == DTYPE_ST506) ? 772 ata_bio->lp->d_precompcyl / 4 : 0); 773 drvp->state = GEOMETRY_WAIT; 774 break; 775 776 case GEOMETRY_WAIT: 777 errstring = "geometry"; 778 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 779 goto timeout; 780 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 781 chp->wdc->irqack(chp); 782 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 783 goto error; 784 /* fall through */ 785 786 case MULTIMODE: 787 multimode: 788 if (ata_bio->multi == 1) 789 goto ready; 790 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 791 ata_bio->multi, 0); 792 drvp->state = MULTIMODE_WAIT; 793 break; 794 795 case MULTIMODE_WAIT: 796 errstring = "setmulti"; 797 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 798 goto timeout; 799 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 800 chp->wdc->irqack(chp); 801 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 802 goto error; 803 /* fall through */ 804 805 case READY: 806 ready: 807 drvp->state = READY; 808 /* 809 * The drive is usable now 810 */ 811 xfer->c_intr = wdc_ata_bio_intr; 812 _wdc_ata_bio_start(chp, xfer); 813 return 1; 814 } 815 816 if ((ata_bio->flags & ATA_POLL) == 0) { 817 chp->ch_flags |= WDCF_IRQ_WAIT; 818 } else { 819 goto again; 820 } 821 return 1; 822 823 timeout: 824 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 825 return 0; /* IRQ was not for us */ 826 } 827 printf("%s:%d:%d: %s timed out\n", 828 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 829 ata_bio->error = TIMEOUT; 830 drvp->state = 0; 831 wdc_ata_bio_done(chp, xfer); 832 return 0; 833 error: 834 printf("%s:%d:%d: %s ", 835 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 836 errstring); 837 if (chp->ch_status & WDCS_DWF) { 838 printf("drive fault\n"); 839 ata_bio->error = ERR_DF; 840 } else { 841 printf("error (%x)\n", chp->ch_error); 842 ata_bio->r_error = chp->ch_error; 843 ata_bio->error = ERROR; 844 } 845 drvp->state = 0; 846 wdc_ata_bio_done(chp, xfer); 847 return 1; 848 } 849 850 int 851 wdc_ata_err(drvp, ata_bio) 852 struct ata_drive_datas *drvp; 853 struct ata_bio *ata_bio; 854 { 855 struct channel_softc *chp = drvp->chnl_softc; 856 ata_bio->error = 0; 857 if (chp->ch_status & WDCS_BSY) { 858 ata_bio->error = TIMEOUT; 859 return WDC_ATA_ERR; 860 } 861 862 if (chp->ch_status & WDCS_DWF) { 863 ata_bio->error = ERR_DF; 864 return WDC_ATA_ERR; 865 } 866 867 if (chp->ch_status & WDCS_ERR) { 868 ata_bio->error = ERROR; 869 ata_bio->r_error = chp->ch_error; 870 if (drvp->drive_flags & DRIVE_UDMA && 871 (ata_bio->r_error & WDCE_CRC)) { 872 /* 873 * Record the CRC error, to avoid downgrading to 874 * multiword DMA 875 */ 876 drvp->drive_flags |= DRIVE_DMAERR; 877 } 878 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 879 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 880 return WDC_ATA_ERR; 881 return WDC_ATA_NOERR; 882 } 883 884 if (chp->ch_status & WDCS_CORR) 885 ata_bio->flags |= ATA_CORR; 886 return WDC_ATA_NOERR; 887 } 888 889 int 890 wdc_ata_addref(drvp) 891 struct ata_drive_datas *drvp; 892 { 893 struct channel_softc *chp = drvp->chnl_softc; 894 895 return (wdc_addref(chp)); 896 } 897 898 void 899 wdc_ata_delref(drvp) 900 struct ata_drive_datas *drvp; 901 { 902 struct channel_softc *chp = drvp->chnl_softc; 903 904 wdc_delref(chp); 905 } 906
Indexes created Sun Sep 28 16:09:52 GMT 2025