ata_wdc.c revision 1.39
1 /* $NetBSD: ata_wdc.c,v 1.39 2003/04/28 05:20:29 nakayama Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 */ 33 34 /*- 35 * Copyright (c) 1998 The NetBSD Foundation, Inc. 36 * All rights reserved. 37 * 38 * This code is derived from software contributed to The NetBSD Foundation 39 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #include <sys/cdefs.h> 71 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.39 2003/04/28 05:20:29 nakayama Exp $"); 72 73 #ifndef WDCDEBUG 74 #define WDCDEBUG 75 #endif /* WDCDEBUG */ 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/file.h> 81 #include <sys/stat.h> 82 #include <sys/buf.h> 83 #include <sys/malloc.h> 84 #include <sys/device.h> 85 #include <sys/disklabel.h> 86 #include <sys/syslog.h> 87 #include <sys/proc.h> 88 89 #include <machine/intr.h> 90 #include <machine/bus.h> 91 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 92 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 93 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 94 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 95 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 96 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 97 98 #include <dev/ata/atareg.h> 99 #include <dev/ata/atavar.h> 100 #include <dev/ic/wdcreg.h> 101 #include <dev/ic/wdcvar.h> 102 #include <dev/ata/wdvar.h> 103 104 #define DEBUG_INTR 0x01 105 #define DEBUG_XFERS 0x02 106 #define DEBUG_STATUS 0x04 107 #define DEBUG_FUNCS 0x08 108 #define DEBUG_PROBE 0x10 109 #ifdef WDCDEBUG 110 int wdcdebug_wd_mask = 0; 111 #define WDCDEBUG_PRINT(args, level) \ 112 if (wdcdebug_wd_mask & (level)) \ 113 printf args 114 #else 115 #define WDCDEBUG_PRINT(args, level) 116 #endif 117 118 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 119 120 int wdc_ata_bio __P((struct ata_drive_datas*, struct ata_bio*)); 121 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 122 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 123 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 124 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 125 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 126 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 127 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 128 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 129 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 130 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 131 int wdc_ata_addref __P((struct ata_drive_datas *)); 132 void wdc_ata_delref __P((struct ata_drive_datas *)); 133 void wdc_ata_kill_pending __P((struct ata_drive_datas *)); 134 135 const struct ata_bustype wdc_ata_bustype = { 136 SCSIPI_BUSTYPE_ATA, 137 wdc_ata_bio, 138 wdc_reset_channel, 139 wdc_exec_command, 140 ata_get_params, 141 wdc_ata_addref, 142 wdc_ata_delref, 143 wdc_ata_kill_pending, 144 }; 145 146 147 /* 148 * Convert a 32 bit command to a 48 bit command. 149 */ 150 static __inline__ 151 int to48(int cmd32) 152 { 153 switch (cmd32) { 154 case WDCC_READ: 155 return WDCC_READ_EXT; 156 case WDCC_WRITE: 157 return WDCC_WRITE_EXT; 158 case WDCC_READMULTI: 159 return WDCC_READMULTI_EXT; 160 case WDCC_WRITEMULTI: 161 return WDCC_WRITEMULTI_EXT; 162 case WDCC_READDMA: 163 return WDCC_READDMA_EXT; 164 case WDCC_WRITEDMA: 165 return WDCC_WRITEDMA_EXT; 166 default: 167 panic("ata_wdc: illegal 32 bit command %d", cmd32); 168 /*NOTREACHED*/ 169 } 170 } 171 172 /* 173 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 174 * WDC_TRY_AGAIN. Must be called at splbio(). 175 */ 176 int 177 wdc_ata_bio(drvp, ata_bio) 178 struct ata_drive_datas *drvp; 179 struct ata_bio *ata_bio; 180 { 181 struct wdc_xfer *xfer; 182 struct channel_softc *chp = drvp->chnl_softc; 183 184 xfer = wdc_get_xfer(WDC_NOSLEEP); 185 if (xfer == NULL) 186 return WDC_TRY_AGAIN; 187 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 188 ata_bio->flags |= ATA_POLL; 189 if (ata_bio->flags & ATA_POLL) 190 xfer->c_flags |= C_POLL; 191 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 192 (ata_bio->flags & ATA_SINGLE) == 0) 193 xfer->c_flags |= C_DMA; 194 xfer->drive = drvp->drive; 195 xfer->cmd = ata_bio; 196 xfer->databuf = ata_bio->databuf; 197 xfer->c_bcount = ata_bio->bcount; 198 xfer->c_start = wdc_ata_bio_start; 199 xfer->c_intr = wdc_ata_bio_intr; 200 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 201 wdc_exec_xfer(chp, xfer); 202 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 203 } 204 205 void 206 wdc_ata_bio_start(chp, xfer) 207 struct channel_softc *chp; 208 struct wdc_xfer *xfer; 209 { 210 struct ata_bio *ata_bio = xfer->cmd; 211 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 212 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 213 DEBUG_XFERS); 214 215 /* start timeout machinery */ 216 if ((ata_bio->flags & ATA_POLL) == 0) 217 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 218 wdctimeout, chp); 219 _wdc_ata_bio_start(chp, xfer); 220 } 221 222 void 223 _wdc_ata_bio_start(chp, xfer) 224 struct channel_softc *chp; 225 struct wdc_xfer *xfer; 226 { 227 struct ata_bio *ata_bio = xfer->cmd; 228 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 229 u_int16_t cyl; 230 u_int8_t head, sect, cmd = 0; 231 int nblks; 232 int ata_delay; 233 int dma_flags = 0; 234 235 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 236 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 237 DEBUG_INTR | DEBUG_XFERS); 238 /* Do control operations specially. */ 239 if (drvp->state < READY) { 240 /* 241 * Actually, we want to be careful not to mess with the control 242 * state if the device is currently busy, but we can assume 243 * that we never get to this point if that's the case. 244 */ 245 /* at this point, we should only be in RECAL state */ 246 if (drvp->state != RESET) { 247 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 248 chp->wdc->sc_dev.dv_xname, chp->channel, 249 xfer->drive, drvp->state); 250 panic("_wdc_ata_bio_start: bad state"); 251 } 252 drvp->state = RECAL; 253 xfer->c_intr = wdc_ata_ctrl_intr; 254 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 255 WDSD_IBM | (xfer->drive << 4)); 256 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 257 goto timeout; 258 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 259 drvp->state = RECAL_WAIT; 260 if ((ata_bio->flags & ATA_POLL) == 0) { 261 chp->ch_flags |= WDCF_IRQ_WAIT; 262 } else { 263 /* Wait for at last 400ns for status bit to be valid */ 264 DELAY(1); 265 wdc_ata_ctrl_intr(chp, xfer, 0); 266 } 267 return; 268 } 269 270 if (xfer->c_flags & C_DMA) { 271 if (drvp->n_xfers <= NXFER) 272 drvp->n_xfers++; 273 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 274 if (ata_bio->flags & ATA_LBA48) 275 dma_flags |= WDC_DMA_LBA48; 276 } 277 if (ata_bio->flags & ATA_SINGLE) 278 ata_delay = ATA_DELAY; 279 else 280 ata_delay = ATA_DELAY; 281 again: 282 /* 283 * 284 * When starting a multi-sector transfer, or doing single-sector 285 * transfers... 286 */ 287 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 288 if (ata_bio->flags & ATA_SINGLE) 289 nblks = 1; 290 else 291 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 292 /* Check for bad sectors and adjust transfer, if necessary. */ 293 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 294 long blkdiff; 295 int i; 296 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 297 i++) { 298 blkdiff -= ata_bio->blkno; 299 if (blkdiff < 0) 300 continue; 301 if (blkdiff == 0) { 302 /* Replace current block of transfer. */ 303 ata_bio->blkno = 304 ata_bio->lp->d_secperunit - 305 ata_bio->lp->d_nsectors - i - 1; 306 } 307 if (blkdiff < nblks) { 308 /* Bad block inside transfer. */ 309 ata_bio->flags |= ATA_SINGLE; 310 nblks = 1; 311 } 312 break; 313 } 314 /* Transfer is okay now. */ 315 } 316 if (ata_bio->flags & ATA_LBA48) { 317 sect = 0; 318 cyl = 0; 319 head = 0; 320 } else if (ata_bio->flags & ATA_LBA) { 321 sect = (ata_bio->blkno >> 0) & 0xff; 322 cyl = (ata_bio->blkno >> 8) & 0xffff; 323 head = (ata_bio->blkno >> 24) & 0x0f; 324 head |= WDSD_LBA; 325 } else { 326 int blkno = ata_bio->blkno; 327 sect = blkno % ata_bio->lp->d_nsectors; 328 sect++; /* Sectors begin with 1, not 0. */ 329 blkno /= ata_bio->lp->d_nsectors; 330 head = blkno % ata_bio->lp->d_ntracks; 331 blkno /= ata_bio->lp->d_ntracks; 332 cyl = blkno; 333 head |= WDSD_CHS; 334 } 335 if (xfer->c_flags & C_DMA) { 336 ata_bio->nblks = nblks; 337 ata_bio->nbytes = xfer->c_bcount; 338 cmd = (ata_bio->flags & ATA_READ) ? 339 WDCC_READDMA : WDCC_WRITEDMA; 340 /* Init the DMA channel. */ 341 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 342 chp->channel, xfer->drive, 343 (char *)xfer->databuf + xfer->c_skip, 344 ata_bio->nbytes, dma_flags) != 0) { 345 ata_bio->error = ERR_DMA; 346 ata_bio->r_error = 0; 347 wdc_ata_bio_done(chp, xfer); 348 return; 349 } 350 /* Initiate command */ 351 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 352 WDSD_IBM | (xfer->drive << 4)); 353 if (wait_for_ready(chp, ata_delay) < 0) 354 goto timeout; 355 if (ata_bio->flags & ATA_LBA48) { 356 wdccommandext(chp, xfer->drive, to48(cmd), 357 (u_int64_t)ata_bio->blkno, nblks); 358 } else { 359 wdccommand(chp, xfer->drive, cmd, cyl, 360 head, sect, nblks, 0); 361 } 362 /* start the DMA channel */ 363 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 364 chp->channel, xfer->drive); 365 chp->ch_flags |= WDCF_DMA_WAIT; 366 /* wait for irq */ 367 goto intr; 368 } /* else not DMA */ 369 ata_bio->nblks = min(nblks, ata_bio->multi); 370 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 371 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 372 cmd = (ata_bio->flags & ATA_READ) ? 373 WDCC_READMULTI : WDCC_WRITEMULTI; 374 } else { 375 cmd = (ata_bio->flags & ATA_READ) ? 376 WDCC_READ : WDCC_WRITE; 377 } 378 /* Initiate command! */ 379 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 380 WDSD_IBM | (xfer->drive << 4)); 381 if (wait_for_ready(chp, ata_delay) < 0) 382 goto timeout; 383 if (ata_bio->flags & ATA_LBA48) { 384 wdccommandext(chp, xfer->drive, to48(cmd), 385 (u_int64_t) ata_bio->blkno, nblks); 386 } else { 387 wdccommand(chp, xfer->drive, cmd, cyl, 388 head, sect, nblks, 389 (ata_bio->lp->d_type == DTYPE_ST506) ? 390 ata_bio->lp->d_precompcyl / 4 : 0); 391 } 392 } else if (ata_bio->nblks > 1) { 393 /* The number of blocks in the last stretch may be smaller. */ 394 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 395 if (ata_bio->nblks > nblks) { 396 ata_bio->nblks = nblks; 397 ata_bio->nbytes = xfer->c_bcount; 398 } 399 } 400 /* If this was a write and not using DMA, push the data. */ 401 if ((ata_bio->flags & ATA_READ) == 0) { 402 if (wait_for_drq(chp, ata_delay) != 0) { 403 printf("%s:%d:%d: timeout waiting for DRQ, " 404 "st=0x%02x, err=0x%02x\n", 405 chp->wdc->sc_dev.dv_xname, chp->channel, 406 xfer->drive, chp->ch_status, chp->ch_error); 407 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 408 ata_bio->error = TIMEOUT; 409 wdc_ata_bio_done(chp, xfer); 410 return; 411 } 412 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 413 wdc_ata_bio_done(chp, xfer); 414 return; 415 } 416 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 417 if (drvp->drive_flags & DRIVE_CAP32) { 418 bus_space_write_multi_4(chp->data32iot, 419 chp->data32ioh, 0, 420 (u_int32_t *)((char *)xfer->databuf + 421 xfer->c_skip), 422 ata_bio->nbytes >> 2); 423 } else { 424 bus_space_write_multi_2(chp->cmd_iot, 425 chp->cmd_ioh, wd_data, 426 (u_int16_t *)((char *)xfer->databuf + 427 xfer->c_skip), 428 ata_bio->nbytes >> 1); 429 } 430 } else { 431 if (drvp->drive_flags & DRIVE_CAP32) { 432 bus_space_write_multi_stream_4(chp->data32iot, 433 chp->data32ioh, 0, 434 (u_int32_t *)((char *)xfer->databuf + 435 xfer->c_skip), 436 ata_bio->nbytes >> 2); 437 } else { 438 bus_space_write_multi_stream_2(chp->cmd_iot, 439 chp->cmd_ioh, wd_data, 440 (u_int16_t *)((char *)xfer->databuf + 441 xfer->c_skip), 442 ata_bio->nbytes >> 1); 443 } 444 } 445 } 446 447 intr: /* Wait for IRQ (either real or polled) */ 448 if ((ata_bio->flags & ATA_POLL) == 0) { 449 chp->ch_flags |= WDCF_IRQ_WAIT; 450 } else { 451 /* Wait for at last 400ns for status bit to be valid */ 452 delay(1); 453 if (chp->ch_flags & WDCF_DMA_WAIT) { 454 wdc_dmawait(chp, xfer, ATA_DELAY); 455 chp->ch_flags &= ~WDCF_DMA_WAIT; 456 } 457 wdc_ata_bio_intr(chp, xfer, 0); 458 if ((ata_bio->flags & ATA_ITSDONE) == 0) 459 goto again; 460 } 461 return; 462 timeout: 463 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 464 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 465 chp->ch_status, chp->ch_error); 466 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 467 ata_bio->error = TIMEOUT; 468 wdc_ata_bio_done(chp, xfer); 469 return; 470 } 471 472 int 473 wdc_ata_bio_intr(chp, xfer, irq) 474 struct channel_softc *chp; 475 struct wdc_xfer *xfer; 476 int irq; 477 { 478 struct ata_bio *ata_bio = xfer->cmd; 479 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 480 int drv_err; 481 482 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 483 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 484 DEBUG_INTR | DEBUG_XFERS); 485 486 487 /* Is it not a transfer, but a control operation? */ 488 if (drvp->state < READY) { 489 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 490 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 491 drvp->state); 492 panic("wdc_ata_bio_intr: bad state"); 493 } 494 495 /* 496 * if we missed an interrupt in a PIO transfer, reset and restart. 497 * Don't try to continue transfer, we may have missed cycles. 498 */ 499 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 500 ata_bio->error = TIMEOUT; 501 wdc_ata_bio_done(chp, xfer); 502 return 1; 503 } 504 505 /* Ack interrupt done by wait_for_unbusy */ 506 if (wait_for_unbusy(chp, 507 (irq == 0) ? ATA_DELAY : 0) < 0) { 508 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 509 return 0; /* IRQ was not for us */ 510 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 511 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 512 xfer->c_bcount, xfer->c_skip); 513 /* if we were using DMA, flag a DMA error */ 514 if (xfer->c_flags & C_DMA) { 515 ata_dmaerr(drvp); 516 } 517 ata_bio->error = TIMEOUT; 518 wdc_ata_bio_done(chp, xfer); 519 return 1; 520 } 521 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 522 chp->wdc->irqack(chp); 523 524 drv_err = wdc_ata_err(drvp, ata_bio); 525 526 /* If we were using DMA, Turn off the DMA channel and check for error */ 527 if (xfer->c_flags & C_DMA) { 528 if (ata_bio->flags & ATA_POLL) { 529 /* 530 * IDE drives deassert WDCS_BSY before transfer is 531 * complete when using DMA. Polling for DRQ to deassert 532 * is not enough DRQ is not required to be 533 * asserted for DMA transfers, so poll for DRDY. 534 */ 535 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 536 ATA_DELAY) < 0) { 537 printf("%s:%d:%d: polled transfer timed out " 538 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 539 chp->channel, xfer->drive, chp->ch_status); 540 ata_bio->error = TIMEOUT; 541 drv_err = WDC_ATA_ERR; 542 } 543 } 544 if (chp->wdc->dma_status != 0) { 545 if (drv_err != WDC_ATA_ERR) { 546 ata_bio->error = ERR_DMA; 547 drv_err = WDC_ATA_ERR; 548 } 549 } 550 if (chp->ch_status & WDCS_DRQ) { 551 if (drv_err != WDC_ATA_ERR) { 552 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 553 chp->wdc->sc_dev.dv_xname, chp->channel, 554 xfer->drive, chp->ch_status); 555 ata_bio->error = TIMEOUT; 556 drv_err = WDC_ATA_ERR; 557 } 558 } 559 if (drv_err != WDC_ATA_ERR) 560 goto end; 561 ata_dmaerr(drvp); 562 } 563 564 /* if we had an error, end */ 565 if (drv_err == WDC_ATA_ERR) { 566 wdc_ata_bio_done(chp, xfer); 567 return 1; 568 } 569 570 /* If this was a read and not using DMA, fetch the data. */ 571 if ((ata_bio->flags & ATA_READ) != 0) { 572 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 573 printf("%s:%d:%d: read intr before drq\n", 574 chp->wdc->sc_dev.dv_xname, chp->channel, 575 xfer->drive); 576 ata_bio->error = TIMEOUT; 577 wdc_ata_bio_done(chp, xfer); 578 return 1; 579 } 580 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 581 if (drvp->drive_flags & DRIVE_CAP32) { 582 bus_space_read_multi_4(chp->data32iot, 583 chp->data32ioh, 0, 584 (u_int32_t *)((char *)xfer->databuf + 585 xfer->c_skip), 586 ata_bio->nbytes >> 2); 587 } else { 588 bus_space_read_multi_2(chp->cmd_iot, 589 chp->cmd_ioh, wd_data, 590 (u_int16_t *)((char *)xfer->databuf + 591 xfer->c_skip), 592 ata_bio->nbytes >> 1); 593 } 594 } else { 595 if (drvp->drive_flags & DRIVE_CAP32) { 596 bus_space_read_multi_stream_4(chp->data32iot, 597 chp->data32ioh, 0, 598 (u_int32_t *)((char *)xfer->databuf + 599 xfer->c_skip), 600 ata_bio->nbytes >> 2); 601 } else { 602 bus_space_read_multi_stream_2(chp->cmd_iot, 603 chp->cmd_ioh, wd_data, 604 (u_int16_t *)((char *)xfer->databuf + 605 xfer->c_skip), 606 ata_bio->nbytes >> 1); 607 } 608 } 609 } 610 611 end: 612 ata_bio->blkno += ata_bio->nblks; 613 ata_bio->blkdone += ata_bio->nblks; 614 xfer->c_skip += ata_bio->nbytes; 615 xfer->c_bcount -= ata_bio->nbytes; 616 /* See if this transfer is complete. */ 617 if (xfer->c_bcount > 0) { 618 if ((ata_bio->flags & ATA_POLL) == 0) { 619 /* Start the next operation */ 620 _wdc_ata_bio_start(chp, xfer); 621 } else { 622 /* Let _wdc_ata_bio_start do the loop */ 623 return 1; 624 } 625 } else { /* Done with this transfer */ 626 ata_bio->error = NOERROR; 627 wdc_ata_bio_done(chp, xfer); 628 } 629 return 1; 630 } 631 632 void 633 wdc_ata_kill_pending(drvp) 634 struct ata_drive_datas *drvp; 635 { 636 struct channel_softc *chp = drvp->chnl_softc; 637 638 wdc_kill_pending(chp); 639 } 640 641 void 642 wdc_ata_bio_kill_xfer(chp, xfer) 643 struct channel_softc *chp; 644 struct wdc_xfer *xfer; 645 { 646 struct ata_bio *ata_bio = xfer->cmd; 647 int drive = xfer->drive; 648 649 callout_stop(&chp->ch_callout); 650 /* remove this command from xfer queue */ 651 wdc_free_xfer(chp, xfer); 652 653 ata_bio->flags |= ATA_ITSDONE; 654 ata_bio->error = ERR_NODEV; 655 ata_bio->r_error = WDCE_ABRT; 656 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 657 wddone(chp->ch_drive[drive].drv_softc); 658 } 659 660 void 661 wdc_ata_bio_done(chp, xfer) 662 struct channel_softc *chp; 663 struct wdc_xfer *xfer; 664 { 665 struct ata_bio *ata_bio = xfer->cmd; 666 int drive = xfer->drive; 667 668 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 669 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 670 (u_int)xfer->c_flags), 671 DEBUG_XFERS); 672 673 callout_stop(&chp->ch_callout); 674 675 /* feed back residual bcount to our caller */ 676 ata_bio->bcount = xfer->c_bcount; 677 678 /* remove this command from xfer queue */ 679 wdc_free_xfer(chp, xfer); 680 681 ata_bio->flags |= ATA_ITSDONE; 682 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 683 wddone(chp->ch_drive[drive].drv_softc); 684 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 685 chp->ch_flags), DEBUG_XFERS); 686 wdcstart(chp); 687 } 688 689 /* 690 * Implement operations needed before read/write. 691 */ 692 int 693 wdc_ata_ctrl_intr(chp, xfer, irq) 694 struct channel_softc *chp; 695 struct wdc_xfer *xfer; 696 int irq; 697 { 698 struct ata_bio *ata_bio = xfer->cmd; 699 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 700 char *errstring = NULL; 701 int delay = (irq == 0) ? ATA_DELAY : 0; 702 703 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 704 DEBUG_FUNCS); 705 706 again: 707 switch (drvp->state) { 708 case RECAL: /* Should not be in this state here */ 709 panic("wdc_ata_ctrl_intr: state==RECAL"); 710 break; 711 712 case RECAL_WAIT: 713 errstring = "recal"; 714 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 715 goto timeout; 716 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 717 chp->wdc->irqack(chp); 718 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 719 goto error; 720 /* fall through */ 721 722 case PIOMODE: 723 /* Don't try to set modes if controller can't be adjusted */ 724 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 725 goto geometry; 726 /* Also don't try if the drive didn't report its mode */ 727 if ((drvp->drive_flags & DRIVE_MODE) == 0) 728 goto geometry; 729 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 730 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 731 drvp->state = PIOMODE_WAIT; 732 break; 733 734 case PIOMODE_WAIT: 735 errstring = "piomode"; 736 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 737 goto timeout; 738 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 739 chp->wdc->irqack(chp); 740 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 741 goto error; 742 /* fall through */ 743 744 case DMAMODE: 745 if (drvp->drive_flags & DRIVE_UDMA) { 746 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 747 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 748 } else if (drvp->drive_flags & DRIVE_DMA) { 749 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 750 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 751 } else { 752 goto geometry; 753 } 754 drvp->state = DMAMODE_WAIT; 755 break; 756 case DMAMODE_WAIT: 757 errstring = "dmamode"; 758 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 759 goto timeout; 760 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 761 chp->wdc->irqack(chp); 762 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 763 goto error; 764 /* fall through */ 765 766 case GEOMETRY: 767 geometry: 768 if (ata_bio->flags & ATA_LBA) 769 goto multimode; 770 wdccommand(chp, xfer->drive, WDCC_IDP, 771 ata_bio->lp->d_ncylinders, 772 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 773 (ata_bio->lp->d_type == DTYPE_ST506) ? 774 ata_bio->lp->d_precompcyl / 4 : 0); 775 drvp->state = GEOMETRY_WAIT; 776 break; 777 778 case GEOMETRY_WAIT: 779 errstring = "geometry"; 780 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 781 goto timeout; 782 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 783 chp->wdc->irqack(chp); 784 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 785 goto error; 786 /* fall through */ 787 788 case MULTIMODE: 789 multimode: 790 if (ata_bio->multi == 1) 791 goto ready; 792 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 793 ata_bio->multi, 0); 794 drvp->state = MULTIMODE_WAIT; 795 break; 796 797 case MULTIMODE_WAIT: 798 errstring = "setmulti"; 799 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 800 goto timeout; 801 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 802 chp->wdc->irqack(chp); 803 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 804 goto error; 805 /* fall through */ 806 807 case READY: 808 ready: 809 drvp->state = READY; 810 /* 811 * The drive is usable now 812 */ 813 xfer->c_intr = wdc_ata_bio_intr; 814 _wdc_ata_bio_start(chp, xfer); 815 return 1; 816 } 817 818 if ((ata_bio->flags & ATA_POLL) == 0) { 819 chp->ch_flags |= WDCF_IRQ_WAIT; 820 } else { 821 goto again; 822 } 823 return 1; 824 825 timeout: 826 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 827 return 0; /* IRQ was not for us */ 828 } 829 printf("%s:%d:%d: %s timed out\n", 830 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 831 ata_bio->error = TIMEOUT; 832 drvp->state = 0; 833 wdc_ata_bio_done(chp, xfer); 834 return 0; 835 error: 836 printf("%s:%d:%d: %s ", 837 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 838 errstring); 839 if (chp->ch_status & WDCS_DWF) { 840 printf("drive fault\n"); 841 ata_bio->error = ERR_DF; 842 } else { 843 printf("error (%x)\n", chp->ch_error); 844 ata_bio->r_error = chp->ch_error; 845 ata_bio->error = ERROR; 846 } 847 drvp->state = 0; 848 wdc_ata_bio_done(chp, xfer); 849 return 1; 850 } 851 852 int 853 wdc_ata_err(drvp, ata_bio) 854 struct ata_drive_datas *drvp; 855 struct ata_bio *ata_bio; 856 { 857 struct channel_softc *chp = drvp->chnl_softc; 858 ata_bio->error = 0; 859 if (chp->ch_status & WDCS_BSY) { 860 ata_bio->error = TIMEOUT; 861 return WDC_ATA_ERR; 862 } 863 864 if (chp->ch_status & WDCS_DWF) { 865 ata_bio->error = ERR_DF; 866 return WDC_ATA_ERR; 867 } 868 869 if (chp->ch_status & WDCS_ERR) { 870 ata_bio->error = ERROR; 871 ata_bio->r_error = chp->ch_error; 872 if (drvp->drive_flags & DRIVE_UDMA && 873 (ata_bio->r_error & WDCE_CRC)) { 874 /* 875 * Record the CRC error, to avoid downgrading to 876 * multiword DMA 877 */ 878 drvp->drive_flags |= DRIVE_DMAERR; 879 } 880 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 881 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 882 return WDC_ATA_ERR; 883 return WDC_ATA_NOERR; 884 } 885 886 if (chp->ch_status & WDCS_CORR) 887 ata_bio->flags |= ATA_CORR; 888 return WDC_ATA_NOERR; 889 } 890 891 int 892 wdc_ata_addref(drvp) 893 struct ata_drive_datas *drvp; 894 { 895 struct channel_softc *chp = drvp->chnl_softc; 896 897 return (wdc_addref(chp)); 898 } 899 900 void 901 wdc_ata_delref(drvp) 902 struct ata_drive_datas *drvp; 903 { 904 struct channel_softc *chp = drvp->chnl_softc; 905 906 wdc_delref(chp); 907 } 908
Indexes created Tue Sep 30 20:09:53 GMT 2025