ata_wdc.c revision 1.40
1 /* $NetBSD: ata_wdc.c,v 1.40 2003/10/05 17:48:49 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /*- 34 * Copyright (c) 1998 The NetBSD Foundation, Inc. 35 * All rights reserved. 36 * 37 * This code is derived from software contributed to The NetBSD Foundation 38 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the NetBSD 51 * Foundation, Inc. and its contributors. 52 * 4. Neither the name of The NetBSD Foundation nor the names of its 53 * contributors may be used to endorse or promote products derived 54 * from this software without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 57 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.40 2003/10/05 17:48:49 bouyer Exp $"); 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 int wdcdebug_wd_mask = 0; 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 int wdc_ata_bio __P((struct ata_drive_datas*, struct ata_bio*)); 120 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 121 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 122 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 123 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 124 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 125 int wdc_ata_ctrl_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 126 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 127 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 128 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 129 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 130 int wdc_ata_addref __P((struct ata_drive_datas *)); 131 void wdc_ata_delref __P((struct ata_drive_datas *)); 132 void wdc_ata_kill_pending __P((struct ata_drive_datas *)); 133 134 const struct ata_bustype wdc_ata_bustype = { 135 SCSIPI_BUSTYPE_ATA, 136 wdc_ata_bio, 137 wdc_reset_channel, 138 wdc_exec_command, 139 ata_get_params, 140 wdc_ata_addref, 141 wdc_ata_delref, 142 wdc_ata_kill_pending, 143 }; 144 145 146 /* 147 * Convert a 32 bit command to a 48 bit command. 148 */ 149 static __inline__ 150 int to48(int cmd32) 151 { 152 switch (cmd32) { 153 case WDCC_READ: 154 return WDCC_READ_EXT; 155 case WDCC_WRITE: 156 return WDCC_WRITE_EXT; 157 case WDCC_READMULTI: 158 return WDCC_READMULTI_EXT; 159 case WDCC_WRITEMULTI: 160 return WDCC_WRITEMULTI_EXT; 161 case WDCC_READDMA: 162 return WDCC_READDMA_EXT; 163 case WDCC_WRITEDMA: 164 return WDCC_WRITEDMA_EXT; 165 default: 166 panic("ata_wdc: illegal 32 bit command %d", cmd32); 167 /*NOTREACHED*/ 168 } 169 } 170 171 /* 172 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 173 * WDC_TRY_AGAIN. Must be called at splbio(). 174 */ 175 int 176 wdc_ata_bio(drvp, ata_bio) 177 struct ata_drive_datas *drvp; 178 struct ata_bio *ata_bio; 179 { 180 struct wdc_xfer *xfer; 181 struct channel_softc *chp = drvp->chnl_softc; 182 183 xfer = wdc_get_xfer(WDC_NOSLEEP); 184 if (xfer == NULL) 185 return WDC_TRY_AGAIN; 186 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 187 ata_bio->flags |= ATA_POLL; 188 if (ata_bio->flags & ATA_POLL) 189 xfer->c_flags |= C_POLL; 190 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 191 (ata_bio->flags & ATA_SINGLE) == 0) 192 xfer->c_flags |= C_DMA; 193 xfer->drive = drvp->drive; 194 xfer->cmd = ata_bio; 195 xfer->databuf = ata_bio->databuf; 196 xfer->c_bcount = ata_bio->bcount; 197 xfer->c_start = wdc_ata_bio_start; 198 xfer->c_intr = wdc_ata_bio_intr; 199 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 200 wdc_exec_xfer(chp, xfer); 201 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 202 } 203 204 void 205 wdc_ata_bio_start(chp, xfer) 206 struct channel_softc *chp; 207 struct wdc_xfer *xfer; 208 { 209 struct ata_bio *ata_bio = xfer->cmd; 210 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 211 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 212 DEBUG_XFERS); 213 214 /* start timeout machinery */ 215 if ((ata_bio->flags & ATA_POLL) == 0) 216 callout_reset(&chp->ch_callout, ATA_DELAY / 1000 * hz, 217 wdctimeout, chp); 218 _wdc_ata_bio_start(chp, xfer); 219 } 220 221 void 222 _wdc_ata_bio_start(chp, xfer) 223 struct channel_softc *chp; 224 struct wdc_xfer *xfer; 225 { 226 struct ata_bio *ata_bio = xfer->cmd; 227 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 228 u_int16_t cyl; 229 u_int8_t head, sect, cmd = 0; 230 int nblks; 231 int ata_delay; 232 int dma_flags = 0; 233 234 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 235 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 236 DEBUG_INTR | DEBUG_XFERS); 237 /* Do control operations specially. */ 238 if (drvp->state < READY) { 239 /* 240 * Actually, we want to be careful not to mess with the control 241 * state if the device is currently busy, but we can assume 242 * that we never get to this point if that's the case. 243 */ 244 /* at this point, we should only be in RECAL state */ 245 if (drvp->state != RESET) { 246 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 247 chp->wdc->sc_dev.dv_xname, chp->channel, 248 xfer->drive, drvp->state); 249 panic("_wdc_ata_bio_start: bad state"); 250 } 251 drvp->state = RECAL; 252 xfer->c_intr = wdc_ata_ctrl_intr; 253 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 254 WDSD_IBM | (xfer->drive << 4)); 255 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 256 goto timeout; 257 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 258 drvp->state = RECAL_WAIT; 259 if ((ata_bio->flags & ATA_POLL) == 0) { 260 chp->ch_flags |= WDCF_IRQ_WAIT; 261 } else { 262 /* Wait for at last 400ns for status bit to be valid */ 263 DELAY(1); 264 wdc_ata_ctrl_intr(chp, xfer, 0); 265 } 266 return; 267 } 268 269 if (xfer->c_flags & C_DMA) { 270 if (drvp->n_xfers <= NXFER) 271 drvp->n_xfers++; 272 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 273 if (ata_bio->flags & ATA_LBA48) 274 dma_flags |= WDC_DMA_LBA48; 275 } 276 if (ata_bio->flags & ATA_SINGLE) 277 ata_delay = ATA_DELAY; 278 else 279 ata_delay = ATA_DELAY; 280 again: 281 /* 282 * 283 * When starting a multi-sector transfer, or doing single-sector 284 * transfers... 285 */ 286 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 287 if (ata_bio->flags & ATA_SINGLE) 288 nblks = 1; 289 else 290 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 291 /* Check for bad sectors and adjust transfer, if necessary. */ 292 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 293 long blkdiff; 294 int i; 295 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 296 i++) { 297 blkdiff -= ata_bio->blkno; 298 if (blkdiff < 0) 299 continue; 300 if (blkdiff == 0) { 301 /* Replace current block of transfer. */ 302 ata_bio->blkno = 303 ata_bio->lp->d_secperunit - 304 ata_bio->lp->d_nsectors - i - 1; 305 } 306 if (blkdiff < nblks) { 307 /* Bad block inside transfer. */ 308 ata_bio->flags |= ATA_SINGLE; 309 nblks = 1; 310 } 311 break; 312 } 313 /* Transfer is okay now. */ 314 } 315 if (ata_bio->flags & ATA_LBA48) { 316 sect = 0; 317 cyl = 0; 318 head = 0; 319 } else if (ata_bio->flags & ATA_LBA) { 320 sect = (ata_bio->blkno >> 0) & 0xff; 321 cyl = (ata_bio->blkno >> 8) & 0xffff; 322 head = (ata_bio->blkno >> 24) & 0x0f; 323 head |= WDSD_LBA; 324 } else { 325 int blkno = ata_bio->blkno; 326 sect = blkno % ata_bio->lp->d_nsectors; 327 sect++; /* Sectors begin with 1, not 0. */ 328 blkno /= ata_bio->lp->d_nsectors; 329 head = blkno % ata_bio->lp->d_ntracks; 330 blkno /= ata_bio->lp->d_ntracks; 331 cyl = blkno; 332 head |= WDSD_CHS; 333 } 334 if (xfer->c_flags & C_DMA) { 335 ata_bio->nblks = nblks; 336 ata_bio->nbytes = xfer->c_bcount; 337 cmd = (ata_bio->flags & ATA_READ) ? 338 WDCC_READDMA : WDCC_WRITEDMA; 339 /* Init the DMA channel. */ 340 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 341 chp->channel, xfer->drive, 342 (char *)xfer->databuf + xfer->c_skip, 343 ata_bio->nbytes, dma_flags) != 0) { 344 ata_bio->error = ERR_DMA; 345 ata_bio->r_error = 0; 346 wdc_ata_bio_done(chp, xfer); 347 return; 348 } 349 /* Initiate command */ 350 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 351 WDSD_IBM | (xfer->drive << 4)); 352 if (wait_for_ready(chp, ata_delay) < 0) 353 goto timeout; 354 if (ata_bio->flags & ATA_LBA48) { 355 wdccommandext(chp, xfer->drive, to48(cmd), 356 (u_int64_t)ata_bio->blkno, nblks); 357 } else { 358 wdccommand(chp, xfer->drive, cmd, cyl, 359 head, sect, nblks, 0); 360 } 361 /* start the DMA channel */ 362 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 363 chp->channel, xfer->drive); 364 chp->ch_flags |= WDCF_DMA_WAIT; 365 /* wait for irq */ 366 goto intr; 367 } /* else not DMA */ 368 ata_bio->nblks = min(nblks, ata_bio->multi); 369 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 370 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 371 cmd = (ata_bio->flags & ATA_READ) ? 372 WDCC_READMULTI : WDCC_WRITEMULTI; 373 } else { 374 cmd = (ata_bio->flags & ATA_READ) ? 375 WDCC_READ : WDCC_WRITE; 376 } 377 /* Initiate command! */ 378 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 379 WDSD_IBM | (xfer->drive << 4)); 380 if (wait_for_ready(chp, ata_delay) < 0) 381 goto timeout; 382 if (ata_bio->flags & ATA_LBA48) { 383 wdccommandext(chp, xfer->drive, to48(cmd), 384 (u_int64_t) ata_bio->blkno, nblks); 385 } else { 386 wdccommand(chp, xfer->drive, cmd, cyl, 387 head, sect, nblks, 388 (ata_bio->lp->d_type == DTYPE_ST506) ? 389 ata_bio->lp->d_precompcyl / 4 : 0); 390 } 391 } else if (ata_bio->nblks > 1) { 392 /* The number of blocks in the last stretch may be smaller. */ 393 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 394 if (ata_bio->nblks > nblks) { 395 ata_bio->nblks = nblks; 396 ata_bio->nbytes = xfer->c_bcount; 397 } 398 } 399 /* If this was a write and not using DMA, push the data. */ 400 if ((ata_bio->flags & ATA_READ) == 0) { 401 if (wait_for_drq(chp, ata_delay) != 0) { 402 printf("%s:%d:%d: timeout waiting for DRQ, " 403 "st=0x%02x, err=0x%02x\n", 404 chp->wdc->sc_dev.dv_xname, chp->channel, 405 xfer->drive, chp->ch_status, chp->ch_error); 406 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 407 ata_bio->error = TIMEOUT; 408 wdc_ata_bio_done(chp, xfer); 409 return; 410 } 411 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 412 wdc_ata_bio_done(chp, xfer); 413 return; 414 } 415 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 416 if (drvp->drive_flags & DRIVE_CAP32) { 417 bus_space_write_multi_4(chp->data32iot, 418 chp->data32ioh, 0, 419 (u_int32_t *)((char *)xfer->databuf + 420 xfer->c_skip), 421 ata_bio->nbytes >> 2); 422 } else { 423 bus_space_write_multi_2(chp->cmd_iot, 424 chp->cmd_ioh, wd_data, 425 (u_int16_t *)((char *)xfer->databuf + 426 xfer->c_skip), 427 ata_bio->nbytes >> 1); 428 } 429 } else { 430 if (drvp->drive_flags & DRIVE_CAP32) { 431 bus_space_write_multi_stream_4(chp->data32iot, 432 chp->data32ioh, 0, 433 (u_int32_t *)((char *)xfer->databuf + 434 xfer->c_skip), 435 ata_bio->nbytes >> 2); 436 } else { 437 bus_space_write_multi_stream_2(chp->cmd_iot, 438 chp->cmd_ioh, wd_data, 439 (u_int16_t *)((char *)xfer->databuf + 440 xfer->c_skip), 441 ata_bio->nbytes >> 1); 442 } 443 } 444 } 445 446 intr: /* Wait for IRQ (either real or polled) */ 447 if ((ata_bio->flags & ATA_POLL) == 0) { 448 chp->ch_flags |= WDCF_IRQ_WAIT; 449 } else { 450 /* Wait for at last 400ns for status bit to be valid */ 451 delay(1); 452 if (chp->ch_flags & WDCF_DMA_WAIT) { 453 wdc_dmawait(chp, xfer, ATA_DELAY); 454 chp->ch_flags &= ~WDCF_DMA_WAIT; 455 } 456 wdc_ata_bio_intr(chp, xfer, 0); 457 if ((ata_bio->flags & ATA_ITSDONE) == 0) 458 goto again; 459 } 460 return; 461 timeout: 462 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 463 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 464 chp->ch_status, chp->ch_error); 465 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 466 ata_bio->error = TIMEOUT; 467 wdc_ata_bio_done(chp, xfer); 468 return; 469 } 470 471 int 472 wdc_ata_bio_intr(chp, xfer, irq) 473 struct channel_softc *chp; 474 struct wdc_xfer *xfer; 475 int irq; 476 { 477 struct ata_bio *ata_bio = xfer->cmd; 478 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 479 int drv_err; 480 481 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 482 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 483 DEBUG_INTR | DEBUG_XFERS); 484 485 486 /* Is it not a transfer, but a control operation? */ 487 if (drvp->state < READY) { 488 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 489 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 490 drvp->state); 491 panic("wdc_ata_bio_intr: bad state"); 492 } 493 494 /* 495 * if we missed an interrupt in a PIO transfer, reset and restart. 496 * Don't try to continue transfer, we may have missed cycles. 497 */ 498 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 499 ata_bio->error = TIMEOUT; 500 wdc_ata_bio_done(chp, xfer); 501 return 1; 502 } 503 504 /* Ack interrupt done by wait_for_unbusy */ 505 if (wait_for_unbusy(chp, 506 (irq == 0) ? ATA_DELAY : 0) < 0) { 507 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 508 return 0; /* IRQ was not for us */ 509 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 510 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 511 xfer->c_bcount, xfer->c_skip); 512 /* if we were using DMA, flag a DMA error */ 513 if (xfer->c_flags & C_DMA) { 514 ata_dmaerr(drvp); 515 } 516 ata_bio->error = TIMEOUT; 517 wdc_ata_bio_done(chp, xfer); 518 return 1; 519 } 520 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 521 chp->wdc->irqack(chp); 522 523 drv_err = wdc_ata_err(drvp, ata_bio); 524 525 /* If we were using DMA, Turn off the DMA channel and check for error */ 526 if (xfer->c_flags & C_DMA) { 527 if (ata_bio->flags & ATA_POLL) { 528 /* 529 * IDE drives deassert WDCS_BSY before transfer is 530 * complete when using DMA. Polling for DRQ to deassert 531 * is not enough DRQ is not required to be 532 * asserted for DMA transfers, so poll for DRDY. 533 */ 534 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 535 ATA_DELAY) < 0) { 536 printf("%s:%d:%d: polled transfer timed out " 537 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 538 chp->channel, xfer->drive, chp->ch_status); 539 ata_bio->error = TIMEOUT; 540 drv_err = WDC_ATA_ERR; 541 } 542 } 543 if (chp->wdc->dma_status != 0) { 544 if (drv_err != WDC_ATA_ERR) { 545 ata_bio->error = ERR_DMA; 546 drv_err = WDC_ATA_ERR; 547 } 548 } 549 if (chp->ch_status & WDCS_DRQ) { 550 if (drv_err != WDC_ATA_ERR) { 551 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 552 chp->wdc->sc_dev.dv_xname, chp->channel, 553 xfer->drive, chp->ch_status); 554 ata_bio->error = TIMEOUT; 555 drv_err = WDC_ATA_ERR; 556 } 557 } 558 if (drv_err != WDC_ATA_ERR) 559 goto end; 560 ata_dmaerr(drvp); 561 } 562 563 /* if we had an error, end */ 564 if (drv_err == WDC_ATA_ERR) { 565 wdc_ata_bio_done(chp, xfer); 566 return 1; 567 } 568 569 /* If this was a read and not using DMA, fetch the data. */ 570 if ((ata_bio->flags & ATA_READ) != 0) { 571 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 572 printf("%s:%d:%d: read intr before drq\n", 573 chp->wdc->sc_dev.dv_xname, chp->channel, 574 xfer->drive); 575 ata_bio->error = TIMEOUT; 576 wdc_ata_bio_done(chp, xfer); 577 return 1; 578 } 579 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 580 if (drvp->drive_flags & DRIVE_CAP32) { 581 bus_space_read_multi_4(chp->data32iot, 582 chp->data32ioh, 0, 583 (u_int32_t *)((char *)xfer->databuf + 584 xfer->c_skip), 585 ata_bio->nbytes >> 2); 586 } else { 587 bus_space_read_multi_2(chp->cmd_iot, 588 chp->cmd_ioh, wd_data, 589 (u_int16_t *)((char *)xfer->databuf + 590 xfer->c_skip), 591 ata_bio->nbytes >> 1); 592 } 593 } else { 594 if (drvp->drive_flags & DRIVE_CAP32) { 595 bus_space_read_multi_stream_4(chp->data32iot, 596 chp->data32ioh, 0, 597 (u_int32_t *)((char *)xfer->databuf + 598 xfer->c_skip), 599 ata_bio->nbytes >> 2); 600 } else { 601 bus_space_read_multi_stream_2(chp->cmd_iot, 602 chp->cmd_ioh, wd_data, 603 (u_int16_t *)((char *)xfer->databuf + 604 xfer->c_skip), 605 ata_bio->nbytes >> 1); 606 } 607 } 608 } 609 610 end: 611 ata_bio->blkno += ata_bio->nblks; 612 ata_bio->blkdone += ata_bio->nblks; 613 xfer->c_skip += ata_bio->nbytes; 614 xfer->c_bcount -= ata_bio->nbytes; 615 /* See if this transfer is complete. */ 616 if (xfer->c_bcount > 0) { 617 if ((ata_bio->flags & ATA_POLL) == 0) { 618 /* Start the next operation */ 619 _wdc_ata_bio_start(chp, xfer); 620 } else { 621 /* Let _wdc_ata_bio_start do the loop */ 622 return 1; 623 } 624 } else { /* Done with this transfer */ 625 ata_bio->error = NOERROR; 626 wdc_ata_bio_done(chp, xfer); 627 } 628 return 1; 629 } 630 631 void 632 wdc_ata_kill_pending(drvp) 633 struct ata_drive_datas *drvp; 634 { 635 struct channel_softc *chp = drvp->chnl_softc; 636 637 wdc_kill_pending(chp); 638 } 639 640 void 641 wdc_ata_bio_kill_xfer(chp, xfer) 642 struct channel_softc *chp; 643 struct wdc_xfer *xfer; 644 { 645 struct ata_bio *ata_bio = xfer->cmd; 646 int drive = xfer->drive; 647 648 callout_stop(&chp->ch_callout); 649 /* remove this command from xfer queue */ 650 wdc_free_xfer(chp, xfer); 651 652 ata_bio->flags |= ATA_ITSDONE; 653 ata_bio->error = ERR_NODEV; 654 ata_bio->r_error = WDCE_ABRT; 655 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 656 wddone(chp->ch_drive[drive].drv_softc); 657 } 658 659 void 660 wdc_ata_bio_done(chp, xfer) 661 struct channel_softc *chp; 662 struct wdc_xfer *xfer; 663 { 664 struct ata_bio *ata_bio = xfer->cmd; 665 int drive = xfer->drive; 666 667 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 668 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 669 (u_int)xfer->c_flags), 670 DEBUG_XFERS); 671 672 callout_stop(&chp->ch_callout); 673 674 /* feed back residual bcount to our caller */ 675 ata_bio->bcount = xfer->c_bcount; 676 677 /* remove this command from xfer queue */ 678 wdc_free_xfer(chp, xfer); 679 680 ata_bio->flags |= ATA_ITSDONE; 681 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 682 wddone(chp->ch_drive[drive].drv_softc); 683 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 684 chp->ch_flags), DEBUG_XFERS); 685 wdcstart(chp); 686 } 687 688 /* 689 * Implement operations needed before read/write. 690 */ 691 int 692 wdc_ata_ctrl_intr(chp, xfer, irq) 693 struct channel_softc *chp; 694 struct wdc_xfer *xfer; 695 int irq; 696 { 697 struct ata_bio *ata_bio = xfer->cmd; 698 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 699 char *errstring = NULL; 700 int delay = (irq == 0) ? ATA_DELAY : 0; 701 702 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 703 DEBUG_FUNCS); 704 705 again: 706 switch (drvp->state) { 707 case RECAL: /* Should not be in this state here */ 708 panic("wdc_ata_ctrl_intr: state==RECAL"); 709 break; 710 711 case RECAL_WAIT: 712 errstring = "recal"; 713 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 714 goto timeout; 715 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 716 chp->wdc->irqack(chp); 717 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 718 goto error; 719 /* fall through */ 720 721 case PIOMODE: 722 /* Don't try to set modes if controller can't be adjusted */ 723 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 724 goto geometry; 725 /* Also don't try if the drive didn't report its mode */ 726 if ((drvp->drive_flags & DRIVE_MODE) == 0) 727 goto geometry; 728 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 729 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 730 drvp->state = PIOMODE_WAIT; 731 break; 732 733 case PIOMODE_WAIT: 734 errstring = "piomode"; 735 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 736 goto timeout; 737 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 738 chp->wdc->irqack(chp); 739 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 740 goto error; 741 /* fall through */ 742 743 case DMAMODE: 744 if (drvp->drive_flags & DRIVE_UDMA) { 745 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 746 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 747 } else if (drvp->drive_flags & DRIVE_DMA) { 748 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 749 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 750 } else { 751 goto geometry; 752 } 753 drvp->state = DMAMODE_WAIT; 754 break; 755 case DMAMODE_WAIT: 756 errstring = "dmamode"; 757 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 758 goto timeout; 759 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 760 chp->wdc->irqack(chp); 761 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 762 goto error; 763 /* fall through */ 764 765 case GEOMETRY: 766 geometry: 767 if (ata_bio->flags & ATA_LBA) 768 goto multimode; 769 wdccommand(chp, xfer->drive, WDCC_IDP, 770 ata_bio->lp->d_ncylinders, 771 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 772 (ata_bio->lp->d_type == DTYPE_ST506) ? 773 ata_bio->lp->d_precompcyl / 4 : 0); 774 drvp->state = GEOMETRY_WAIT; 775 break; 776 777 case GEOMETRY_WAIT: 778 errstring = "geometry"; 779 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 780 goto timeout; 781 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 782 chp->wdc->irqack(chp); 783 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 784 goto error; 785 /* fall through */ 786 787 case MULTIMODE: 788 multimode: 789 if (ata_bio->multi == 1) 790 goto ready; 791 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 792 ata_bio->multi, 0); 793 drvp->state = MULTIMODE_WAIT; 794 break; 795 796 case MULTIMODE_WAIT: 797 errstring = "setmulti"; 798 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 799 goto timeout; 800 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 801 chp->wdc->irqack(chp); 802 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 803 goto error; 804 /* fall through */ 805 806 case READY: 807 ready: 808 drvp->state = READY; 809 /* 810 * The drive is usable now 811 */ 812 xfer->c_intr = wdc_ata_bio_intr; 813 _wdc_ata_bio_start(chp, xfer); 814 return 1; 815 } 816 817 if ((ata_bio->flags & ATA_POLL) == 0) { 818 chp->ch_flags |= WDCF_IRQ_WAIT; 819 } else { 820 goto again; 821 } 822 return 1; 823 824 timeout: 825 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 826 return 0; /* IRQ was not for us */ 827 } 828 printf("%s:%d:%d: %s timed out\n", 829 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 830 ata_bio->error = TIMEOUT; 831 drvp->state = 0; 832 wdc_ata_bio_done(chp, xfer); 833 return 0; 834 error: 835 printf("%s:%d:%d: %s ", 836 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 837 errstring); 838 if (chp->ch_status & WDCS_DWF) { 839 printf("drive fault\n"); 840 ata_bio->error = ERR_DF; 841 } else { 842 printf("error (%x)\n", chp->ch_error); 843 ata_bio->r_error = chp->ch_error; 844 ata_bio->error = ERROR; 845 } 846 drvp->state = 0; 847 wdc_ata_bio_done(chp, xfer); 848 return 1; 849 } 850 851 int 852 wdc_ata_err(drvp, ata_bio) 853 struct ata_drive_datas *drvp; 854 struct ata_bio *ata_bio; 855 { 856 struct channel_softc *chp = drvp->chnl_softc; 857 ata_bio->error = 0; 858 if (chp->ch_status & WDCS_BSY) { 859 ata_bio->error = TIMEOUT; 860 return WDC_ATA_ERR; 861 } 862 863 if (chp->ch_status & WDCS_DWF) { 864 ata_bio->error = ERR_DF; 865 return WDC_ATA_ERR; 866 } 867 868 if (chp->ch_status & WDCS_ERR) { 869 ata_bio->error = ERROR; 870 ata_bio->r_error = chp->ch_error; 871 if (drvp->drive_flags & DRIVE_UDMA && 872 (ata_bio->r_error & WDCE_CRC)) { 873 /* 874 * Record the CRC error, to avoid downgrading to 875 * multiword DMA 876 */ 877 drvp->drive_flags |= DRIVE_DMAERR; 878 } 879 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 880 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 881 return WDC_ATA_ERR; 882 return WDC_ATA_NOERR; 883 } 884 885 if (chp->ch_status & WDCS_CORR) 886 ata_bio->flags |= ATA_CORR; 887 return WDC_ATA_NOERR; 888 } 889 890 int 891 wdc_ata_addref(drvp) 892 struct ata_drive_datas *drvp; 893 { 894 struct channel_softc *chp = drvp->chnl_softc; 895 896 return (wdc_addref(chp)); 897 } 898 899 void 900 wdc_ata_delref(drvp) 901 struct ata_drive_datas *drvp; 902 { 903 struct channel_softc *chp = drvp->chnl_softc; 904 905 wdc_delref(chp); 906 } 907
Indexes created Mon Sep 29 21:09:56 GMT 2025