ata_wdc.c revision 1.41
1 /* $NetBSD: ata_wdc.c,v 1.41 2003/10/08 10:58:12 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /*- 34 * Copyright (c) 1998 The NetBSD Foundation, Inc. 35 * All rights reserved. 36 * 37 * This code is derived from software contributed to The NetBSD Foundation 38 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by the NetBSD 51 * Foundation, Inc. and its contributors. 52 * 4. Neither the name of The NetBSD Foundation nor the names of its 53 * contributors may be used to endorse or promote products derived 54 * from this software without specific prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 57 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 58 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 59 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 60 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 61 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 62 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 63 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 64 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 65 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 66 * POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.41 2003/10/08 10:58:12 bouyer Exp $"); 71 72 #ifndef WDCDEBUG 73 #define WDCDEBUG 74 #endif /* WDCDEBUG */ 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/file.h> 80 #include <sys/stat.h> 81 #include <sys/buf.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/atareg.h> 98 #include <dev/ata/atavar.h> 99 #include <dev/ic/wdcreg.h> 100 #include <dev/ic/wdcvar.h> 101 #include <dev/ata/wdvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef WDCDEBUG 109 extern int wdcdebug_wd_mask; /* inited in wd.c */ 110 #define WDCDEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define WDCDEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 int wdc_ata_bio __P((struct ata_drive_datas*, struct ata_bio*)); 120 void wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 121 void _wdc_ata_bio_start __P((struct channel_softc *,struct wdc_xfer *)); 122 int wdc_ata_bio_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 123 void wdc_ata_bio_kill_xfer __P((struct channel_softc *,struct wdc_xfer *)); 124 void wdc_ata_bio_done __P((struct channel_softc *, struct wdc_xfer *)); 125 int wdc_ata_err __P((struct ata_drive_datas *, struct ata_bio *)); 126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 128 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 129 int wdc_ata_addref __P((struct ata_drive_datas *)); 130 void wdc_ata_delref __P((struct ata_drive_datas *)); 131 void wdc_ata_kill_pending __P((struct ata_drive_datas *)); 132 133 const struct ata_bustype wdc_ata_bustype = { 134 SCSIPI_BUSTYPE_ATA, 135 wdc_ata_bio, 136 wdc_reset_channel, 137 wdc_exec_command, 138 ata_get_params, 139 wdc_ata_addref, 140 wdc_ata_delref, 141 wdc_ata_kill_pending, 142 }; 143 144 145 /* 146 * Convert a 32 bit command to a 48 bit command. 147 */ 148 static __inline__ 149 int to48(int cmd32) 150 { 151 switch (cmd32) { 152 case WDCC_READ: 153 return WDCC_READ_EXT; 154 case WDCC_WRITE: 155 return WDCC_WRITE_EXT; 156 case WDCC_READMULTI: 157 return WDCC_READMULTI_EXT; 158 case WDCC_WRITEMULTI: 159 return WDCC_WRITEMULTI_EXT; 160 case WDCC_READDMA: 161 return WDCC_READDMA_EXT; 162 case WDCC_WRITEDMA: 163 return WDCC_WRITEDMA_EXT; 164 default: 165 panic("ata_wdc: illegal 32 bit command %d", cmd32); 166 /*NOTREACHED*/ 167 } 168 } 169 170 /* 171 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 172 * WDC_TRY_AGAIN. Must be called at splbio(). 173 */ 174 int 175 wdc_ata_bio(drvp, ata_bio) 176 struct ata_drive_datas *drvp; 177 struct ata_bio *ata_bio; 178 { 179 struct wdc_xfer *xfer; 180 struct channel_softc *chp = drvp->chnl_softc; 181 182 xfer = wdc_get_xfer(WDC_NOSLEEP); 183 if (xfer == NULL) 184 return WDC_TRY_AGAIN; 185 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 186 ata_bio->flags |= ATA_POLL; 187 if (ata_bio->flags & ATA_POLL) 188 xfer->c_flags |= C_POLL; 189 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 190 (ata_bio->flags & ATA_SINGLE) == 0) 191 xfer->c_flags |= C_DMA; 192 xfer->drive = drvp->drive; 193 xfer->cmd = ata_bio; 194 xfer->databuf = ata_bio->databuf; 195 xfer->c_bcount = ata_bio->bcount; 196 xfer->c_start = wdc_ata_bio_start; 197 xfer->c_intr = wdc_ata_bio_intr; 198 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 199 wdc_exec_xfer(chp, xfer); 200 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 201 } 202 203 void 204 wdc_ata_bio_start(chp, xfer) 205 struct channel_softc *chp; 206 struct wdc_xfer *xfer; 207 { 208 struct ata_bio *ata_bio = xfer->cmd; 209 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 210 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 211 char *errstring; 212 213 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 214 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 215 DEBUG_XFERS); 216 217 /* Do control operations specially. */ 218 if (__predict_false(drvp->state < READY)) { 219 /* 220 * Actually, we want to be careful not to mess with the control 221 * state if the device is currently busy, but we can assume 222 * that we never get to this point if that's the case. 223 */ 224 /* If it's not a polled command, we need the kenrel thread */ 225 if ((xfer->c_flags & C_POLL) == 0 && 226 (chp->ch_flags & WDCF_TH_RUN) == 0) { 227 chp->ch_queue->queue_freese++; 228 wakeup(&chp->thread); 229 return; 230 } 231 /* 232 * disable interrupts, all commands here should be quick 233 * enouth to be able to poll, and we don't go here that often 234 */ 235 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 236 WDCTL_4BIT | WDCTL_IDS); 237 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 238 chp->wdc->select(chp,xfer->drive); 239 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 240 WDSD_IBM | (xfer->drive << 4)); 241 errstring = "wait"; 242 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 243 goto ctrltimeout; 244 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 245 /* Wait for at last 400ns for status bit to be valid */ 246 DELAY(1); 247 errstring = "recal"; 248 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 249 goto ctrltimeout; 250 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 251 goto ctrlerror; 252 /* Don't try to set modes if controller can't be adjusted */ 253 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 254 goto geometry; 255 /* Also don't try if the drive didn't report its mode */ 256 if ((drvp->drive_flags & DRIVE_MODE) == 0) 257 goto geometry; 258 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 259 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 260 errstring = "piomode"; 261 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 262 goto ctrltimeout; 263 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 264 goto ctrlerror; 265 if (drvp->drive_flags & DRIVE_UDMA) { 266 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 267 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 268 } else if (drvp->drive_flags & DRIVE_DMA) { 269 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 270 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 271 } else { 272 goto geometry; 273 } 274 errstring = "dmamode"; 275 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 276 goto ctrltimeout; 277 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 278 goto ctrlerror; 279 geometry: 280 if (ata_bio->flags & ATA_LBA) 281 goto multimode; 282 wdccommand(chp, xfer->drive, WDCC_IDP, 283 ata_bio->lp->d_ncylinders, 284 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 285 (ata_bio->lp->d_type == DTYPE_ST506) ? 286 ata_bio->lp->d_precompcyl / 4 : 0); 287 errstring = "geometry"; 288 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 289 goto ctrltimeout; 290 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 291 goto ctrlerror; 292 multimode: 293 if (ata_bio->multi == 1) 294 goto ready; 295 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 296 ata_bio->multi, 0); 297 errstring = "setmulti"; 298 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 299 goto ctrltimeout; 300 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 301 goto ctrlerror; 302 ready: 303 drvp->state = READY; 304 /* 305 * The drive is usable now 306 */ 307 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 308 WDCTL_4BIT); 309 } 310 311 _wdc_ata_bio_start(chp, xfer); 312 return; 313 ctrltimeout: 314 printf("%s:%d:%d: %s timed out\n", 315 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 316 ata_bio->error = TIMEOUT; 317 goto ctrldone; 318 ctrlerror: 319 printf("%s:%d:%d: %s ", 320 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 321 errstring); 322 if (chp->ch_status & WDCS_DWF) { 323 printf("drive fault\n"); 324 ata_bio->error = ERR_DF; 325 } else { 326 printf("error (%x)\n", chp->ch_error); 327 ata_bio->r_error = chp->ch_error; 328 ata_bio->error = ERROR; 329 } 330 ctrldone: 331 drvp->state = 0; 332 wdc_ata_bio_done(chp, xfer); 333 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 334 return; 335 } 336 337 void 338 _wdc_ata_bio_start(chp, xfer) 339 struct channel_softc *chp; 340 struct wdc_xfer *xfer; 341 { 342 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 343 struct ata_bio *ata_bio = xfer->cmd; 344 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 345 u_int16_t cyl; 346 u_int8_t head, sect, cmd = 0; 347 int nblks; 348 int dma_flags = 0; 349 350 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 351 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 352 DEBUG_INTR | DEBUG_XFERS); 353 354 if (xfer->c_flags & C_DMA) { 355 if (drvp->n_xfers <= NXFER) 356 drvp->n_xfers++; 357 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 358 if (ata_bio->flags & ATA_LBA48) 359 dma_flags |= WDC_DMA_LBA48; 360 } 361 again: 362 /* 363 * 364 * When starting a multi-sector transfer, or doing single-sector 365 * transfers... 366 */ 367 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 368 if (ata_bio->flags & ATA_SINGLE) 369 nblks = 1; 370 else 371 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 372 /* Check for bad sectors and adjust transfer, if necessary. */ 373 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 374 long blkdiff; 375 int i; 376 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 377 i++) { 378 blkdiff -= ata_bio->blkno; 379 if (blkdiff < 0) 380 continue; 381 if (blkdiff == 0) { 382 /* Replace current block of transfer. */ 383 ata_bio->blkno = 384 ata_bio->lp->d_secperunit - 385 ata_bio->lp->d_nsectors - i - 1; 386 } 387 if (blkdiff < nblks) { 388 /* Bad block inside transfer. */ 389 ata_bio->flags |= ATA_SINGLE; 390 nblks = 1; 391 } 392 break; 393 } 394 /* Transfer is okay now. */ 395 } 396 if (ata_bio->flags & ATA_LBA48) { 397 sect = 0; 398 cyl = 0; 399 head = 0; 400 } else if (ata_bio->flags & ATA_LBA) { 401 sect = (ata_bio->blkno >> 0) & 0xff; 402 cyl = (ata_bio->blkno >> 8) & 0xffff; 403 head = (ata_bio->blkno >> 24) & 0x0f; 404 head |= WDSD_LBA; 405 } else { 406 int blkno = ata_bio->blkno; 407 sect = blkno % ata_bio->lp->d_nsectors; 408 sect++; /* Sectors begin with 1, not 0. */ 409 blkno /= ata_bio->lp->d_nsectors; 410 head = blkno % ata_bio->lp->d_ntracks; 411 blkno /= ata_bio->lp->d_ntracks; 412 cyl = blkno; 413 head |= WDSD_CHS; 414 } 415 if (xfer->c_flags & C_DMA) { 416 ata_bio->nblks = nblks; 417 ata_bio->nbytes = xfer->c_bcount; 418 cmd = (ata_bio->flags & ATA_READ) ? 419 WDCC_READDMA : WDCC_WRITEDMA; 420 /* Init the DMA channel. */ 421 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 422 chp->channel, xfer->drive, 423 (char *)xfer->databuf + xfer->c_skip, 424 ata_bio->nbytes, dma_flags) != 0) { 425 ata_bio->error = ERR_DMA; 426 ata_bio->r_error = 0; 427 wdc_ata_bio_done(chp, xfer); 428 return; 429 } 430 /* Initiate command */ 431 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 432 chp->wdc->select(chp,xfer->drive); 433 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 434 WDSD_IBM | (xfer->drive << 4)); 435 switch(wait_for_ready(chp, ATA_DELAY, wait_flags)) { 436 case WDCWAIT_OK: 437 break; 438 case WDCWAIT_TOUT: 439 goto timeout; 440 case WDCWAIT_THR: 441 return; 442 } 443 if (ata_bio->flags & ATA_LBA48) { 444 wdccommandext(chp, xfer->drive, to48(cmd), 445 (u_int64_t)ata_bio->blkno, nblks); 446 } else { 447 wdccommand(chp, xfer->drive, cmd, cyl, 448 head, sect, nblks, 0); 449 } 450 /* start the DMA channel */ 451 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 452 chp->channel, xfer->drive); 453 chp->ch_flags |= WDCF_DMA_WAIT; 454 /* start timeout machinery */ 455 if ((xfer->c_flags & C_POLL) == 0) 456 callout_reset(&chp->ch_callout, 457 ATA_DELAY / 1000 * hz, wdctimeout, chp); 458 /* wait for irq */ 459 goto intr; 460 } /* else not DMA */ 461 ata_bio->nblks = min(nblks, ata_bio->multi); 462 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 463 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 464 cmd = (ata_bio->flags & ATA_READ) ? 465 WDCC_READMULTI : WDCC_WRITEMULTI; 466 } else { 467 cmd = (ata_bio->flags & ATA_READ) ? 468 WDCC_READ : WDCC_WRITE; 469 } 470 /* Initiate command! */ 471 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 472 chp->wdc->select(chp,xfer->drive); 473 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 474 WDSD_IBM | (xfer->drive << 4)); 475 switch(wait_for_ready(chp, ATA_DELAY, wait_flags)) { 476 case WDCWAIT_OK: 477 break; 478 case WDCWAIT_TOUT: 479 goto timeout; 480 case WDCWAIT_THR: 481 return; 482 } 483 if (ata_bio->flags & ATA_LBA48) { 484 wdccommandext(chp, xfer->drive, to48(cmd), 485 (u_int64_t) ata_bio->blkno, nblks); 486 } else { 487 wdccommand(chp, xfer->drive, cmd, cyl, 488 head, sect, nblks, 489 (ata_bio->lp->d_type == DTYPE_ST506) ? 490 ata_bio->lp->d_precompcyl / 4 : 0); 491 } 492 /* start timeout machinery */ 493 if ((xfer->c_flags & C_POLL) == 0) 494 callout_reset(&chp->ch_callout, 495 ATA_DELAY / 1000 * hz, wdctimeout, chp); 496 } else if (ata_bio->nblks > 1) { 497 /* The number of blocks in the last stretch may be smaller. */ 498 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 499 if (ata_bio->nblks > nblks) { 500 ata_bio->nblks = nblks; 501 ata_bio->nbytes = xfer->c_bcount; 502 } 503 } 504 /* If this was a write and not using DMA, push the data. */ 505 if ((ata_bio->flags & ATA_READ) == 0) { 506 /* 507 * we have to busy-wait here, we can't rely on running in 508 * thread context. 509 */ 510 if (wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 511 printf("%s:%d:%d: timeout waiting for DRQ, " 512 "st=0x%02x, err=0x%02x\n", 513 chp->wdc->sc_dev.dv_xname, chp->channel, 514 xfer->drive, chp->ch_status, chp->ch_error); 515 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 516 ata_bio->error = TIMEOUT; 517 wdc_ata_bio_done(chp, xfer); 518 return; 519 } 520 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 521 wdc_ata_bio_done(chp, xfer); 522 return; 523 } 524 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 525 if (drvp->drive_flags & DRIVE_CAP32) { 526 bus_space_write_multi_4(chp->data32iot, 527 chp->data32ioh, 0, 528 (u_int32_t *)((char *)xfer->databuf + 529 xfer->c_skip), 530 ata_bio->nbytes >> 2); 531 } else { 532 bus_space_write_multi_2(chp->cmd_iot, 533 chp->cmd_ioh, wd_data, 534 (u_int16_t *)((char *)xfer->databuf + 535 xfer->c_skip), 536 ata_bio->nbytes >> 1); 537 } 538 } else { 539 if (drvp->drive_flags & DRIVE_CAP32) { 540 bus_space_write_multi_stream_4(chp->data32iot, 541 chp->data32ioh, 0, 542 (u_int32_t *)((char *)xfer->databuf + 543 xfer->c_skip), 544 ata_bio->nbytes >> 2); 545 } else { 546 bus_space_write_multi_stream_2(chp->cmd_iot, 547 chp->cmd_ioh, wd_data, 548 (u_int16_t *)((char *)xfer->databuf + 549 xfer->c_skip), 550 ata_bio->nbytes >> 1); 551 } 552 } 553 } 554 555 intr: /* Wait for IRQ (either real or polled) */ 556 if ((ata_bio->flags & ATA_POLL) == 0) { 557 chp->ch_flags |= WDCF_IRQ_WAIT; 558 } else { 559 /* Wait for at last 400ns for status bit to be valid */ 560 delay(1); 561 if (chp->ch_flags & WDCF_DMA_WAIT) { 562 wdc_dmawait(chp, xfer, ATA_DELAY); 563 chp->ch_flags &= ~WDCF_DMA_WAIT; 564 } 565 wdc_ata_bio_intr(chp, xfer, 0); 566 if ((ata_bio->flags & ATA_ITSDONE) == 0) 567 goto again; 568 } 569 return; 570 timeout: 571 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 572 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 573 chp->ch_status, chp->ch_error); 574 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 575 ata_bio->error = TIMEOUT; 576 wdc_ata_bio_done(chp, xfer); 577 return; 578 } 579 580 int 581 wdc_ata_bio_intr(chp, xfer, irq) 582 struct channel_softc *chp; 583 struct wdc_xfer *xfer; 584 int irq; 585 { 586 struct ata_bio *ata_bio = xfer->cmd; 587 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 588 int drv_err; 589 590 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 591 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 592 DEBUG_INTR | DEBUG_XFERS); 593 594 595 /* Is it not a transfer, but a control operation? */ 596 if (drvp->state < READY) { 597 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 598 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 599 drvp->state); 600 panic("wdc_ata_bio_intr: bad state"); 601 } 602 603 /* 604 * if we missed an interrupt in a PIO transfer, reset and restart. 605 * Don't try to continue transfer, we may have missed cycles. 606 */ 607 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 608 ata_bio->error = TIMEOUT; 609 wdc_ata_bio_done(chp, xfer); 610 return 1; 611 } 612 613 /* Ack interrupt done by wait_for_unbusy */ 614 if (wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 615 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 616 return 0; /* IRQ was not for us */ 617 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 618 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 619 xfer->c_bcount, xfer->c_skip); 620 /* if we were using DMA, flag a DMA error */ 621 if (xfer->c_flags & C_DMA) { 622 ata_dmaerr(drvp, 623 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 624 } 625 ata_bio->error = TIMEOUT; 626 wdc_ata_bio_done(chp, xfer); 627 return 1; 628 } 629 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 630 chp->wdc->irqack(chp); 631 632 drv_err = wdc_ata_err(drvp, ata_bio); 633 634 /* If we were using DMA, Turn off the DMA channel and check for error */ 635 if (xfer->c_flags & C_DMA) { 636 if (ata_bio->flags & ATA_POLL) { 637 /* 638 * IDE drives deassert WDCS_BSY before transfer is 639 * complete when using DMA. Polling for DRQ to deassert 640 * is not enough DRQ is not required to be 641 * asserted for DMA transfers, so poll for DRDY. 642 */ 643 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 644 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 645 printf("%s:%d:%d: polled transfer timed out " 646 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 647 chp->channel, xfer->drive, chp->ch_status); 648 ata_bio->error = TIMEOUT; 649 drv_err = WDC_ATA_ERR; 650 } 651 } 652 if (chp->wdc->dma_status != 0) { 653 if (drv_err != WDC_ATA_ERR) { 654 ata_bio->error = ERR_DMA; 655 drv_err = WDC_ATA_ERR; 656 } 657 } 658 if (chp->ch_status & WDCS_DRQ) { 659 if (drv_err != WDC_ATA_ERR) { 660 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 661 chp->wdc->sc_dev.dv_xname, chp->channel, 662 xfer->drive, chp->ch_status); 663 ata_bio->error = TIMEOUT; 664 drv_err = WDC_ATA_ERR; 665 } 666 } 667 if (drv_err != WDC_ATA_ERR) 668 goto end; 669 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 670 } 671 672 /* if we had an error, end */ 673 if (drv_err == WDC_ATA_ERR) { 674 wdc_ata_bio_done(chp, xfer); 675 return 1; 676 } 677 678 /* If this was a read and not using DMA, fetch the data. */ 679 if ((ata_bio->flags & ATA_READ) != 0) { 680 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 681 printf("%s:%d:%d: read intr before drq\n", 682 chp->wdc->sc_dev.dv_xname, chp->channel, 683 xfer->drive); 684 ata_bio->error = TIMEOUT; 685 wdc_ata_bio_done(chp, xfer); 686 return 1; 687 } 688 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 689 if (drvp->drive_flags & DRIVE_CAP32) { 690 bus_space_read_multi_4(chp->data32iot, 691 chp->data32ioh, 0, 692 (u_int32_t *)((char *)xfer->databuf + 693 xfer->c_skip), 694 ata_bio->nbytes >> 2); 695 } else { 696 bus_space_read_multi_2(chp->cmd_iot, 697 chp->cmd_ioh, wd_data, 698 (u_int16_t *)((char *)xfer->databuf + 699 xfer->c_skip), 700 ata_bio->nbytes >> 1); 701 } 702 } else { 703 if (drvp->drive_flags & DRIVE_CAP32) { 704 bus_space_read_multi_stream_4(chp->data32iot, 705 chp->data32ioh, 0, 706 (u_int32_t *)((char *)xfer->databuf + 707 xfer->c_skip), 708 ata_bio->nbytes >> 2); 709 } else { 710 bus_space_read_multi_stream_2(chp->cmd_iot, 711 chp->cmd_ioh, wd_data, 712 (u_int16_t *)((char *)xfer->databuf + 713 xfer->c_skip), 714 ata_bio->nbytes >> 1); 715 } 716 } 717 } 718 719 end: 720 ata_bio->blkno += ata_bio->nblks; 721 ata_bio->blkdone += ata_bio->nblks; 722 xfer->c_skip += ata_bio->nbytes; 723 xfer->c_bcount -= ata_bio->nbytes; 724 /* See if this transfer is complete. */ 725 if (xfer->c_bcount > 0) { 726 if ((ata_bio->flags & ATA_POLL) == 0) { 727 /* Start the next operation */ 728 _wdc_ata_bio_start(chp, xfer); 729 } else { 730 /* Let _wdc_ata_bio_start do the loop */ 731 return 1; 732 } 733 } else { /* Done with this transfer */ 734 ata_bio->error = NOERROR; 735 wdc_ata_bio_done(chp, xfer); 736 } 737 return 1; 738 } 739 740 void 741 wdc_ata_kill_pending(drvp) 742 struct ata_drive_datas *drvp; 743 { 744 struct channel_softc *chp = drvp->chnl_softc; 745 746 wdc_kill_pending(chp); 747 } 748 749 void 750 wdc_ata_bio_kill_xfer(chp, xfer) 751 struct channel_softc *chp; 752 struct wdc_xfer *xfer; 753 { 754 struct ata_bio *ata_bio = xfer->cmd; 755 int drive = xfer->drive; 756 757 callout_stop(&chp->ch_callout); 758 /* remove this command from xfer queue */ 759 wdc_free_xfer(chp, xfer); 760 761 ata_bio->flags |= ATA_ITSDONE; 762 ata_bio->error = ERR_NODEV; 763 ata_bio->r_error = WDCE_ABRT; 764 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 765 wddone(chp->ch_drive[drive].drv_softc); 766 } 767 768 void 769 wdc_ata_bio_done(chp, xfer) 770 struct channel_softc *chp; 771 struct wdc_xfer *xfer; 772 { 773 struct ata_bio *ata_bio = xfer->cmd; 774 int drive = xfer->drive; 775 776 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 777 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 778 (u_int)xfer->c_flags), 779 DEBUG_XFERS); 780 781 callout_stop(&chp->ch_callout); 782 783 /* feed back residual bcount to our caller */ 784 ata_bio->bcount = xfer->c_bcount; 785 786 /* remove this command from xfer queue */ 787 wdc_free_xfer(chp, xfer); 788 789 ata_bio->flags |= ATA_ITSDONE; 790 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 791 wddone(chp->ch_drive[drive].drv_softc); 792 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 793 chp->ch_flags), DEBUG_XFERS); 794 wdcstart(chp); 795 } 796 797 int 798 wdc_ata_err(drvp, ata_bio) 799 struct ata_drive_datas *drvp; 800 struct ata_bio *ata_bio; 801 { 802 struct channel_softc *chp = drvp->chnl_softc; 803 ata_bio->error = 0; 804 if (chp->ch_status & WDCS_BSY) { 805 ata_bio->error = TIMEOUT; 806 return WDC_ATA_ERR; 807 } 808 809 if (chp->ch_status & WDCS_DWF) { 810 ata_bio->error = ERR_DF; 811 return WDC_ATA_ERR; 812 } 813 814 if (chp->ch_status & WDCS_ERR) { 815 ata_bio->error = ERROR; 816 ata_bio->r_error = chp->ch_error; 817 if (drvp->drive_flags & DRIVE_UDMA && 818 (ata_bio->r_error & WDCE_CRC)) { 819 /* 820 * Record the CRC error, to avoid downgrading to 821 * multiword DMA 822 */ 823 drvp->drive_flags |= DRIVE_DMAERR; 824 } 825 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 826 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 827 return WDC_ATA_ERR; 828 return WDC_ATA_NOERR; 829 } 830 831 if (chp->ch_status & WDCS_CORR) 832 ata_bio->flags |= ATA_CORR; 833 return WDC_ATA_NOERR; 834 } 835 836 int 837 wdc_ata_addref(drvp) 838 struct ata_drive_datas *drvp; 839 { 840 struct channel_softc *chp = drvp->chnl_softc; 841 842 return (wdc_addref(chp)); 843 } 844 845 void 846 wdc_ata_delref(drvp) 847 struct ata_drive_datas *drvp; 848 { 849 struct channel_softc *chp = drvp->chnl_softc; 850 851 wdc_delref(chp); 852 } 853
Indexes created Mon Sep 29 18:09:42 GMT 2025