ata_wdc.c revision 1.46
1 /* $NetBSD: ata_wdc.c,v 1.46 2003/12/14 05:33:29 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.46 2003/12/14 05:33:29 thorpej Exp $"); 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 #include <dev/ata/wdvar.h> 101 102 #define DEBUG_INTR 0x01 103 #define DEBUG_XFERS 0x02 104 #define DEBUG_STATUS 0x04 105 #define DEBUG_FUNCS 0x08 106 #define DEBUG_PROBE 0x10 107 #ifdef WDCDEBUG 108 extern int wdcdebug_wd_mask; /* inited in wd.c */ 109 #define WDCDEBUG_PRINT(args, level) \ 110 if (wdcdebug_wd_mask & (level)) \ 111 printf args 112 #else 113 #define WDCDEBUG_PRINT(args, level) 114 #endif 115 116 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 117 118 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 119 static void wdc_ata_bio_start(struct channel_softc *,struct wdc_xfer *); 120 static void _wdc_ata_bio_start(struct channel_softc *,struct wdc_xfer *); 121 static int wdc_ata_bio_intr(struct channel_softc *, struct wdc_xfer *, 122 int); 123 static void wdc_ata_bio_kill_xfer(struct channel_softc *,struct wdc_xfer *); 124 static void wdc_ata_bio_done(struct channel_softc *, struct wdc_xfer *); 125 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 128 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 129 static int wdc_ata_addref(struct ata_drive_datas *); 130 static void wdc_ata_delref(struct ata_drive_datas *); 131 static void wdc_ata_kill_pending(struct ata_drive_datas *); 132 133 const struct ata_bustype wdc_ata_bustype = { 134 SCSIPI_BUSTYPE_ATA, 135 wdc_ata_bio, 136 wdc_reset_channel, 137 wdc_exec_command, 138 ata_get_params, 139 wdc_ata_addref, 140 wdc_ata_delref, 141 wdc_ata_kill_pending, 142 }; 143 144 /* 145 * Convert a 32 bit command to a 48 bit command. 146 */ 147 static __inline 148 int to48(int cmd32) 149 { 150 switch (cmd32) { 151 case WDCC_READ: 152 return WDCC_READ_EXT; 153 case WDCC_WRITE: 154 return WDCC_WRITE_EXT; 155 case WDCC_READMULTI: 156 return WDCC_READMULTI_EXT; 157 case WDCC_WRITEMULTI: 158 return WDCC_WRITEMULTI_EXT; 159 case WDCC_READDMA: 160 return WDCC_READDMA_EXT; 161 case WDCC_WRITEDMA: 162 return WDCC_WRITEDMA_EXT; 163 default: 164 panic("ata_wdc: illegal 32 bit command %d", cmd32); 165 /*NOTREACHED*/ 166 } 167 } 168 169 /* 170 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 171 * WDC_TRY_AGAIN. Must be called at splbio(). 172 */ 173 static int 174 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 175 { 176 struct wdc_xfer *xfer; 177 struct channel_softc *chp = drvp->chnl_softc; 178 179 xfer = wdc_get_xfer(WDC_NOSLEEP); 180 if (xfer == NULL) 181 return WDC_TRY_AGAIN; 182 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 183 ata_bio->flags |= ATA_POLL; 184 if (ata_bio->flags & ATA_POLL) 185 xfer->c_flags |= C_POLL; 186 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 187 (ata_bio->flags & ATA_SINGLE) == 0) 188 xfer->c_flags |= C_DMA; 189 xfer->drive = drvp->drive; 190 xfer->cmd = ata_bio; 191 xfer->databuf = ata_bio->databuf; 192 xfer->c_bcount = ata_bio->bcount; 193 xfer->c_start = wdc_ata_bio_start; 194 xfer->c_intr = wdc_ata_bio_intr; 195 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 196 wdc_exec_xfer(chp, xfer); 197 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 198 } 199 200 static void 201 wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer) 202 { 203 struct ata_bio *ata_bio = xfer->cmd; 204 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 205 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 206 char *errstring; 207 208 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 209 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 210 DEBUG_XFERS); 211 212 /* Do control operations specially. */ 213 if (__predict_false(drvp->state < READY)) { 214 /* 215 * Actually, we want to be careful not to mess with the control 216 * state if the device is currently busy, but we can assume 217 * that we never get to this point if that's the case. 218 */ 219 /* If it's not a polled command, we need the kenrel thread */ 220 if ((xfer->c_flags & C_POLL) == 0 && 221 (chp->ch_flags & WDCF_TH_RUN) == 0) { 222 chp->ch_queue->queue_freeze++; 223 wakeup(&chp->thread); 224 return; 225 } 226 /* 227 * disable interrupts, all commands here should be quick 228 * enouth to be able to poll, and we don't go here that often 229 */ 230 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 231 WDCTL_4BIT | WDCTL_IDS); 232 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 233 chp->wdc->select(chp,xfer->drive); 234 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 235 WDSD_IBM | (xfer->drive << 4)); 236 errstring = "wait"; 237 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 238 goto ctrltimeout; 239 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 240 /* Wait for at last 400ns for status bit to be valid */ 241 DELAY(1); 242 errstring = "recal"; 243 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 244 goto ctrltimeout; 245 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 246 goto ctrlerror; 247 /* Don't try to set modes if controller can't be adjusted */ 248 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 249 goto geometry; 250 /* Also don't try if the drive didn't report its mode */ 251 if ((drvp->drive_flags & DRIVE_MODE) == 0) 252 goto geometry; 253 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 254 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 255 errstring = "piomode"; 256 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 257 goto ctrltimeout; 258 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 259 goto ctrlerror; 260 if (drvp->drive_flags & DRIVE_UDMA) { 261 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 262 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 263 } else if (drvp->drive_flags & DRIVE_DMA) { 264 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 265 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 266 } else { 267 goto geometry; 268 } 269 errstring = "dmamode"; 270 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 271 goto ctrltimeout; 272 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 273 goto ctrlerror; 274 geometry: 275 if (ata_bio->flags & ATA_LBA) 276 goto multimode; 277 wdccommand(chp, xfer->drive, WDCC_IDP, 278 ata_bio->lp->d_ncylinders, 279 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 280 (ata_bio->lp->d_type == DTYPE_ST506) ? 281 ata_bio->lp->d_precompcyl / 4 : 0); 282 errstring = "geometry"; 283 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 284 goto ctrltimeout; 285 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 286 goto ctrlerror; 287 multimode: 288 if (ata_bio->multi == 1) 289 goto ready; 290 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 291 ata_bio->multi, 0); 292 errstring = "setmulti"; 293 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 294 goto ctrltimeout; 295 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 296 goto ctrlerror; 297 ready: 298 drvp->state = READY; 299 /* 300 * The drive is usable now 301 */ 302 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 303 WDCTL_4BIT); 304 } 305 306 _wdc_ata_bio_start(chp, xfer); 307 return; 308 ctrltimeout: 309 printf("%s:%d:%d: %s timed out\n", 310 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 311 ata_bio->error = TIMEOUT; 312 goto ctrldone; 313 ctrlerror: 314 printf("%s:%d:%d: %s ", 315 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 316 errstring); 317 if (chp->ch_status & WDCS_DWF) { 318 printf("drive fault\n"); 319 ata_bio->error = ERR_DF; 320 } else { 321 printf("error (%x)\n", chp->ch_error); 322 ata_bio->r_error = chp->ch_error; 323 ata_bio->error = ERROR; 324 } 325 ctrldone: 326 drvp->state = 0; 327 wdc_ata_bio_done(chp, xfer); 328 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 329 return; 330 } 331 332 static void 333 _wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer) 334 { 335 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 336 struct ata_bio *ata_bio = xfer->cmd; 337 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 338 u_int16_t cyl; 339 u_int8_t head, sect, cmd = 0; 340 int nblks; 341 int dma_flags = 0; 342 343 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 344 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 345 DEBUG_INTR | DEBUG_XFERS); 346 347 if (xfer->c_flags & C_DMA) { 348 if (drvp->n_xfers <= NXFER) 349 drvp->n_xfers++; 350 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 351 if (ata_bio->flags & ATA_LBA48) 352 dma_flags |= WDC_DMA_LBA48; 353 } 354 again: 355 /* 356 * 357 * When starting a multi-sector transfer, or doing single-sector 358 * transfers... 359 */ 360 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 361 if (ata_bio->flags & ATA_SINGLE) 362 nblks = 1; 363 else 364 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 365 /* Check for bad sectors and adjust transfer, if necessary. */ 366 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 367 long blkdiff; 368 int i; 369 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 370 i++) { 371 blkdiff -= ata_bio->blkno; 372 if (blkdiff < 0) 373 continue; 374 if (blkdiff == 0) { 375 /* Replace current block of transfer. */ 376 ata_bio->blkno = 377 ata_bio->lp->d_secperunit - 378 ata_bio->lp->d_nsectors - i - 1; 379 } 380 if (blkdiff < nblks) { 381 /* Bad block inside transfer. */ 382 ata_bio->flags |= ATA_SINGLE; 383 nblks = 1; 384 } 385 break; 386 } 387 /* Transfer is okay now. */ 388 } 389 if (ata_bio->flags & ATA_LBA48) { 390 sect = 0; 391 cyl = 0; 392 head = 0; 393 } else if (ata_bio->flags & ATA_LBA) { 394 sect = (ata_bio->blkno >> 0) & 0xff; 395 cyl = (ata_bio->blkno >> 8) & 0xffff; 396 head = (ata_bio->blkno >> 24) & 0x0f; 397 head |= WDSD_LBA; 398 } else { 399 int blkno = ata_bio->blkno; 400 sect = blkno % ata_bio->lp->d_nsectors; 401 sect++; /* Sectors begin with 1, not 0. */ 402 blkno /= ata_bio->lp->d_nsectors; 403 head = blkno % ata_bio->lp->d_ntracks; 404 blkno /= ata_bio->lp->d_ntracks; 405 cyl = blkno; 406 head |= WDSD_CHS; 407 } 408 if (xfer->c_flags & C_DMA) { 409 ata_bio->nblks = nblks; 410 ata_bio->nbytes = xfer->c_bcount; 411 cmd = (ata_bio->flags & ATA_READ) ? 412 WDCC_READDMA : WDCC_WRITEDMA; 413 /* Init the DMA channel. */ 414 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 415 chp->channel, xfer->drive, 416 (char *)xfer->databuf + xfer->c_skip, 417 ata_bio->nbytes, dma_flags) != 0) { 418 ata_bio->error = ERR_DMA; 419 ata_bio->r_error = 0; 420 wdc_ata_bio_done(chp, xfer); 421 return; 422 } 423 /* Initiate command */ 424 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 425 chp->wdc->select(chp,xfer->drive); 426 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 427 0, WDSD_IBM | (xfer->drive << 4)); 428 switch(wait_for_ready(chp, ATA_DELAY, wait_flags)) { 429 case WDCWAIT_OK: 430 break; 431 case WDCWAIT_TOUT: 432 goto timeout; 433 case WDCWAIT_THR: 434 return; 435 } 436 if (ata_bio->flags & ATA_LBA48) { 437 wdccommandext(chp, xfer->drive, to48(cmd), 438 (u_int64_t)ata_bio->blkno, nblks); 439 } else { 440 wdccommand(chp, xfer->drive, cmd, cyl, 441 head, sect, nblks, 0); 442 } 443 /* start the DMA channel */ 444 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 445 chp->channel, xfer->drive); 446 chp->ch_flags |= WDCF_DMA_WAIT; 447 /* start timeout machinery */ 448 if ((xfer->c_flags & C_POLL) == 0) 449 callout_reset(&chp->ch_callout, 450 ATA_DELAY / 1000 * hz, wdctimeout, chp); 451 /* wait for irq */ 452 goto intr; 453 } /* else not DMA */ 454 ata_bio->nblks = min(nblks, ata_bio->multi); 455 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 456 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 457 cmd = (ata_bio->flags & ATA_READ) ? 458 WDCC_READMULTI : WDCC_WRITEMULTI; 459 } else { 460 cmd = (ata_bio->flags & ATA_READ) ? 461 WDCC_READ : WDCC_WRITE; 462 } 463 /* Initiate command! */ 464 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 465 chp->wdc->select(chp,xfer->drive); 466 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 467 WDSD_IBM | (xfer->drive << 4)); 468 switch(wait_for_ready(chp, ATA_DELAY, wait_flags)) { 469 case WDCWAIT_OK: 470 break; 471 case WDCWAIT_TOUT: 472 goto timeout; 473 case WDCWAIT_THR: 474 return; 475 } 476 if (ata_bio->flags & ATA_LBA48) { 477 wdccommandext(chp, xfer->drive, to48(cmd), 478 (u_int64_t) ata_bio->blkno, nblks); 479 } else { 480 wdccommand(chp, xfer->drive, cmd, cyl, 481 head, sect, nblks, 482 (ata_bio->lp->d_type == DTYPE_ST506) ? 483 ata_bio->lp->d_precompcyl / 4 : 0); 484 } 485 /* start timeout machinery */ 486 if ((xfer->c_flags & C_POLL) == 0) 487 callout_reset(&chp->ch_callout, 488 ATA_DELAY / 1000 * hz, wdctimeout, chp); 489 } else if (ata_bio->nblks > 1) { 490 /* The number of blocks in the last stretch may be smaller. */ 491 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 492 if (ata_bio->nblks > nblks) { 493 ata_bio->nblks = nblks; 494 ata_bio->nbytes = xfer->c_bcount; 495 } 496 } 497 /* If this was a write and not using DMA, push the data. */ 498 if ((ata_bio->flags & ATA_READ) == 0) { 499 /* 500 * we have to busy-wait here, we can't rely on running in 501 * thread context. 502 */ 503 if (wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 504 printf("%s:%d:%d: timeout waiting for DRQ, " 505 "st=0x%02x, err=0x%02x\n", 506 chp->wdc->sc_dev.dv_xname, chp->channel, 507 xfer->drive, chp->ch_status, chp->ch_error); 508 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 509 ata_bio->error = TIMEOUT; 510 wdc_ata_bio_done(chp, xfer); 511 return; 512 } 513 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 514 wdc_ata_bio_done(chp, xfer); 515 return; 516 } 517 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 518 if (drvp->drive_flags & DRIVE_CAP32) { 519 bus_space_write_multi_4(chp->data32iot, 520 chp->data32ioh, 0, 521 (u_int32_t *)((char *)xfer->databuf + 522 xfer->c_skip), 523 ata_bio->nbytes >> 2); 524 } else { 525 bus_space_write_multi_2(chp->cmd_iot, 526 chp->cmd_iohs[wd_data], 0, 527 (u_int16_t *)((char *)xfer->databuf + 528 xfer->c_skip), 529 ata_bio->nbytes >> 1); 530 } 531 } else { 532 if (drvp->drive_flags & DRIVE_CAP32) { 533 bus_space_write_multi_stream_4(chp->data32iot, 534 chp->data32ioh, 0, 535 (u_int32_t *)((char *)xfer->databuf + 536 xfer->c_skip), 537 ata_bio->nbytes >> 2); 538 } else { 539 bus_space_write_multi_stream_2(chp->cmd_iot, 540 chp->cmd_iohs[wd_data], 0, 541 (u_int16_t *)((char *)xfer->databuf + 542 xfer->c_skip), 543 ata_bio->nbytes >> 1); 544 } 545 } 546 } 547 548 intr: /* Wait for IRQ (either real or polled) */ 549 if ((ata_bio->flags & ATA_POLL) == 0) { 550 chp->ch_flags |= WDCF_IRQ_WAIT; 551 } else { 552 /* Wait for at last 400ns for status bit to be valid */ 553 delay(1); 554 if (chp->ch_flags & WDCF_DMA_WAIT) { 555 wdc_dmawait(chp, xfer, ATA_DELAY); 556 chp->ch_flags &= ~WDCF_DMA_WAIT; 557 } 558 wdc_ata_bio_intr(chp, xfer, 0); 559 if ((ata_bio->flags & ATA_ITSDONE) == 0) 560 goto again; 561 } 562 return; 563 timeout: 564 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 565 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 566 chp->ch_status, chp->ch_error); 567 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 568 ata_bio->error = TIMEOUT; 569 wdc_ata_bio_done(chp, xfer); 570 return; 571 } 572 573 static int 574 wdc_ata_bio_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq) 575 { 576 struct ata_bio *ata_bio = xfer->cmd; 577 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 578 int drv_err; 579 580 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 581 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 582 DEBUG_INTR | DEBUG_XFERS); 583 584 585 /* Is it not a transfer, but a control operation? */ 586 if (drvp->state < READY) { 587 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 588 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 589 drvp->state); 590 panic("wdc_ata_bio_intr: bad state"); 591 } 592 593 /* 594 * if we missed an interrupt in a PIO transfer, reset and restart. 595 * Don't try to continue transfer, we may have missed cycles. 596 */ 597 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 598 ata_bio->error = TIMEOUT; 599 wdc_ata_bio_done(chp, xfer); 600 return 1; 601 } 602 603 /* Ack interrupt done by wait_for_unbusy */ 604 if (wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 605 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 606 return 0; /* IRQ was not for us */ 607 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 608 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 609 xfer->c_bcount, xfer->c_skip); 610 /* if we were using DMA, flag a DMA error */ 611 if (xfer->c_flags & C_DMA) { 612 ata_dmaerr(drvp, 613 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 614 } 615 ata_bio->error = TIMEOUT; 616 wdc_ata_bio_done(chp, xfer); 617 return 1; 618 } 619 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 620 chp->wdc->irqack(chp); 621 622 drv_err = wdc_ata_err(drvp, ata_bio); 623 624 /* If we were using DMA, Turn off the DMA channel and check for error */ 625 if (xfer->c_flags & C_DMA) { 626 if (ata_bio->flags & ATA_POLL) { 627 /* 628 * IDE drives deassert WDCS_BSY before transfer is 629 * complete when using DMA. Polling for DRQ to deassert 630 * is not enough DRQ is not required to be 631 * asserted for DMA transfers, so poll for DRDY. 632 */ 633 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 634 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 635 printf("%s:%d:%d: polled transfer timed out " 636 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 637 chp->channel, xfer->drive, chp->ch_status); 638 ata_bio->error = TIMEOUT; 639 drv_err = WDC_ATA_ERR; 640 } 641 } 642 if (chp->wdc->dma_status != 0) { 643 if (drv_err != WDC_ATA_ERR) { 644 ata_bio->error = ERR_DMA; 645 drv_err = WDC_ATA_ERR; 646 } 647 } 648 if (chp->ch_status & WDCS_DRQ) { 649 if (drv_err != WDC_ATA_ERR) { 650 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 651 chp->wdc->sc_dev.dv_xname, chp->channel, 652 xfer->drive, chp->ch_status); 653 ata_bio->error = TIMEOUT; 654 drv_err = WDC_ATA_ERR; 655 } 656 } 657 if (drv_err != WDC_ATA_ERR) 658 goto end; 659 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 660 } 661 662 /* if we had an error, end */ 663 if (drv_err == WDC_ATA_ERR) { 664 wdc_ata_bio_done(chp, xfer); 665 return 1; 666 } 667 668 /* If this was a read and not using DMA, fetch the data. */ 669 if ((ata_bio->flags & ATA_READ) != 0) { 670 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 671 printf("%s:%d:%d: read intr before drq\n", 672 chp->wdc->sc_dev.dv_xname, chp->channel, 673 xfer->drive); 674 ata_bio->error = TIMEOUT; 675 wdc_ata_bio_done(chp, xfer); 676 return 1; 677 } 678 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 679 if (drvp->drive_flags & DRIVE_CAP32) { 680 bus_space_read_multi_4(chp->data32iot, 681 chp->data32ioh, 0, 682 (u_int32_t *)((char *)xfer->databuf + 683 xfer->c_skip), 684 ata_bio->nbytes >> 2); 685 } else { 686 bus_space_read_multi_2(chp->cmd_iot, 687 chp->cmd_iohs[wd_data], 0, 688 (u_int16_t *)((char *)xfer->databuf + 689 xfer->c_skip), 690 ata_bio->nbytes >> 1); 691 } 692 } else { 693 if (drvp->drive_flags & DRIVE_CAP32) { 694 bus_space_read_multi_stream_4(chp->data32iot, 695 chp->data32ioh, 0, 696 (u_int32_t *)((char *)xfer->databuf + 697 xfer->c_skip), 698 ata_bio->nbytes >> 2); 699 } else { 700 bus_space_read_multi_stream_2(chp->cmd_iot, 701 chp->cmd_iohs[wd_data], 0, 702 (u_int16_t *)((char *)xfer->databuf + 703 xfer->c_skip), 704 ata_bio->nbytes >> 1); 705 } 706 } 707 } 708 709 end: 710 ata_bio->blkno += ata_bio->nblks; 711 ata_bio->blkdone += ata_bio->nblks; 712 xfer->c_skip += ata_bio->nbytes; 713 xfer->c_bcount -= ata_bio->nbytes; 714 /* See if this transfer is complete. */ 715 if (xfer->c_bcount > 0) { 716 if ((ata_bio->flags & ATA_POLL) == 0) { 717 /* Start the next operation */ 718 _wdc_ata_bio_start(chp, xfer); 719 } else { 720 /* Let _wdc_ata_bio_start do the loop */ 721 return 1; 722 } 723 } else { /* Done with this transfer */ 724 ata_bio->error = NOERROR; 725 wdc_ata_bio_done(chp, xfer); 726 } 727 return 1; 728 } 729 730 static void 731 wdc_ata_kill_pending(struct ata_drive_datas *drvp) 732 { 733 struct channel_softc *chp = drvp->chnl_softc; 734 735 wdc_kill_pending(chp); 736 } 737 738 static void 739 wdc_ata_bio_kill_xfer(struct channel_softc *chp, struct wdc_xfer *xfer) 740 { 741 struct ata_bio *ata_bio = xfer->cmd; 742 int drive = xfer->drive; 743 744 callout_stop(&chp->ch_callout); 745 /* remove this command from xfer queue */ 746 wdc_free_xfer(chp, xfer); 747 748 ata_bio->flags |= ATA_ITSDONE; 749 ata_bio->error = ERR_NODEV; 750 ata_bio->r_error = WDCE_ABRT; 751 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 752 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 753 } 754 755 static void 756 wdc_ata_bio_done(struct channel_softc *chp, struct wdc_xfer *xfer) 757 { 758 struct ata_bio *ata_bio = xfer->cmd; 759 int drive = xfer->drive; 760 761 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 762 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 763 (u_int)xfer->c_flags), 764 DEBUG_XFERS); 765 766 callout_stop(&chp->ch_callout); 767 768 /* feed back residual bcount to our caller */ 769 ata_bio->bcount = xfer->c_bcount; 770 771 /* remove this command from xfer queue */ 772 wdc_free_xfer(chp, xfer); 773 774 ata_bio->flags |= ATA_ITSDONE; 775 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 776 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 777 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 778 chp->ch_flags), DEBUG_XFERS); 779 wdcstart(chp); 780 } 781 782 static int 783 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 784 { 785 struct channel_softc *chp = drvp->chnl_softc; 786 ata_bio->error = 0; 787 if (chp->ch_status & WDCS_BSY) { 788 ata_bio->error = TIMEOUT; 789 return WDC_ATA_ERR; 790 } 791 792 if (chp->ch_status & WDCS_DWF) { 793 ata_bio->error = ERR_DF; 794 return WDC_ATA_ERR; 795 } 796 797 if (chp->ch_status & WDCS_ERR) { 798 ata_bio->error = ERROR; 799 ata_bio->r_error = chp->ch_error; 800 if (drvp->drive_flags & DRIVE_UDMA && 801 (ata_bio->r_error & WDCE_CRC)) { 802 /* 803 * Record the CRC error, to avoid downgrading to 804 * multiword DMA 805 */ 806 drvp->drive_flags |= DRIVE_DMAERR; 807 } 808 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 809 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 810 return WDC_ATA_ERR; 811 return WDC_ATA_NOERR; 812 } 813 814 if (chp->ch_status & WDCS_CORR) 815 ata_bio->flags |= ATA_CORR; 816 return WDC_ATA_NOERR; 817 } 818 819 static int 820 wdc_ata_addref(struct ata_drive_datas *drvp) 821 { 822 struct channel_softc *chp = drvp->chnl_softc; 823 824 return (wdc_addref(chp)); 825 } 826 827 static void 828 wdc_ata_delref(struct ata_drive_datas *drvp) 829 { 830 struct channel_softc *chp = drvp->chnl_softc; 831 832 wdc_delref(chp); 833 } 834
Indexes created Mon Sep 29 03:10:08 GMT 2025