ata_wdc.c revision 1.49
1 /* $NetBSD: ata_wdc.c,v 1.49 2004/01/01 20:25:22 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.49 2004/01/01 20:25:22 thorpej Exp $"); 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef WDCDEBUG 107 extern int wdcdebug_wd_mask; /* inited in wd.c */ 108 #define WDCDEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define WDCDEBUG_PRINT(args, level) 113 #endif 114 115 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 116 117 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 118 static void wdc_ata_bio_start(struct channel_softc *,struct ata_xfer *); 119 static void _wdc_ata_bio_start(struct channel_softc *,struct ata_xfer *); 120 static int wdc_ata_bio_intr(struct channel_softc *, struct ata_xfer *, 121 int); 122 static void wdc_ata_bio_kill_xfer(struct channel_softc *,struct ata_xfer *); 123 static void wdc_ata_bio_done(struct channel_softc *, struct ata_xfer *); 124 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 static int wdc_ata_addref(struct ata_drive_datas *); 129 static void wdc_ata_delref(struct ata_drive_datas *); 130 static void wdc_ata_kill_pending(struct ata_drive_datas *); 131 132 const struct ata_bustype wdc_ata_bustype = { 133 SCSIPI_BUSTYPE_ATA, 134 wdc_ata_bio, 135 wdc_reset_channel, 136 wdc_exec_command, 137 ata_get_params, 138 wdc_ata_addref, 139 wdc_ata_delref, 140 wdc_ata_kill_pending, 141 }; 142 143 /* 144 * Convert a 32 bit command to a 48 bit command. 145 */ 146 static __inline 147 int to48(int cmd32) 148 { 149 switch (cmd32) { 150 case WDCC_READ: 151 return WDCC_READ_EXT; 152 case WDCC_WRITE: 153 return WDCC_WRITE_EXT; 154 case WDCC_READMULTI: 155 return WDCC_READMULTI_EXT; 156 case WDCC_WRITEMULTI: 157 return WDCC_WRITEMULTI_EXT; 158 case WDCC_READDMA: 159 return WDCC_READDMA_EXT; 160 case WDCC_WRITEDMA: 161 return WDCC_WRITEDMA_EXT; 162 default: 163 panic("ata_wdc: illegal 32 bit command %d", cmd32); 164 /*NOTREACHED*/ 165 } 166 } 167 168 /* 169 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 170 * WDC_TRY_AGAIN. Must be called at splbio(). 171 */ 172 static int 173 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 174 { 175 struct ata_xfer *xfer; 176 struct channel_softc *chp = drvp->chnl_softc; 177 178 xfer = wdc_get_xfer(WDC_NOSLEEP); 179 if (xfer == NULL) 180 return WDC_TRY_AGAIN; 181 if (chp->wdc->cap & WDC_CAPABILITY_NOIRQ) 182 ata_bio->flags |= ATA_POLL; 183 if (ata_bio->flags & ATA_POLL) 184 xfer->c_flags |= C_POLL; 185 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 186 (ata_bio->flags & ATA_SINGLE) == 0) 187 xfer->c_flags |= C_DMA; 188 xfer->c_drive = drvp->drive; 189 xfer->c_cmd = ata_bio; 190 xfer->c_databuf = ata_bio->databuf; 191 xfer->c_bcount = ata_bio->bcount; 192 xfer->c_start = wdc_ata_bio_start; 193 xfer->c_intr = wdc_ata_bio_intr; 194 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 195 wdc_exec_xfer(chp, xfer); 196 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 197 } 198 199 static void 200 wdc_ata_bio_start(struct channel_softc *chp, struct ata_xfer *xfer) 201 { 202 struct ata_bio *ata_bio = xfer->c_cmd; 203 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 204 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 205 char *errstring; 206 207 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 208 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive), 209 DEBUG_XFERS); 210 211 /* Do control operations specially. */ 212 if (__predict_false(drvp->state < READY)) { 213 /* 214 * Actually, we want to be careful not to mess with the control 215 * state if the device is currently busy, but we can assume 216 * that we never get to this point if that's the case. 217 */ 218 /* If it's not a polled command, we need the kenrel thread */ 219 if ((xfer->c_flags & C_POLL) == 0 && 220 (chp->ch_flags & WDCF_TH_RUN) == 0) { 221 chp->ch_queue->queue_freeze++; 222 wakeup(&chp->thread); 223 return; 224 } 225 /* 226 * disable interrupts, all commands here should be quick 227 * enouth to be able to poll, and we don't go here that often 228 */ 229 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 230 WDCTL_4BIT | WDCTL_IDS); 231 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 232 chp->wdc->select(chp, xfer->c_drive); 233 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 234 WDSD_IBM | (xfer->c_drive << 4)); 235 errstring = "wait"; 236 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 237 goto ctrltimeout; 238 wdccommandshort(chp, xfer->c_drive, WDCC_RECAL); 239 /* Wait for at last 400ns for status bit to be valid */ 240 DELAY(1); 241 errstring = "recal"; 242 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 243 goto ctrltimeout; 244 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 245 goto ctrlerror; 246 /* Don't try to set modes if controller can't be adjusted */ 247 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 248 goto geometry; 249 /* Also don't try if the drive didn't report its mode */ 250 if ((drvp->drive_flags & DRIVE_MODE) == 0) 251 goto geometry; 252 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 253 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 254 errstring = "piomode"; 255 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 256 goto ctrltimeout; 257 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 258 goto ctrlerror; 259 if (drvp->drive_flags & DRIVE_UDMA) { 260 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 261 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 262 } else if (drvp->drive_flags & DRIVE_DMA) { 263 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 264 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 265 } else { 266 goto geometry; 267 } 268 errstring = "dmamode"; 269 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 270 goto ctrltimeout; 271 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 272 goto ctrlerror; 273 geometry: 274 if (ata_bio->flags & ATA_LBA) 275 goto multimode; 276 wdccommand(chp, xfer->c_drive, WDCC_IDP, 277 ata_bio->lp->d_ncylinders, 278 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 279 (ata_bio->lp->d_type == DTYPE_ST506) ? 280 ata_bio->lp->d_precompcyl / 4 : 0); 281 errstring = "geometry"; 282 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 283 goto ctrltimeout; 284 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 285 goto ctrlerror; 286 multimode: 287 if (ata_bio->multi == 1) 288 goto ready; 289 wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0, 290 ata_bio->multi, 0); 291 errstring = "setmulti"; 292 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 293 goto ctrltimeout; 294 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 295 goto ctrlerror; 296 ready: 297 drvp->state = READY; 298 /* 299 * The drive is usable now 300 */ 301 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 302 WDCTL_4BIT); 303 } 304 305 _wdc_ata_bio_start(chp, xfer); 306 return; 307 ctrltimeout: 308 printf("%s:%d:%d: %s timed out\n", 309 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, errstring); 310 ata_bio->error = TIMEOUT; 311 goto ctrldone; 312 ctrlerror: 313 printf("%s:%d:%d: %s ", 314 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 315 errstring); 316 if (chp->ch_status & WDCS_DWF) { 317 printf("drive fault\n"); 318 ata_bio->error = ERR_DF; 319 } else { 320 printf("error (%x)\n", chp->ch_error); 321 ata_bio->r_error = chp->ch_error; 322 ata_bio->error = ERROR; 323 } 324 ctrldone: 325 drvp->state = 0; 326 wdc_ata_bio_done(chp, xfer); 327 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 328 return; 329 } 330 331 static void 332 _wdc_ata_bio_start(struct channel_softc *chp, struct ata_xfer *xfer) 333 { 334 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 335 struct ata_bio *ata_bio = xfer->c_cmd; 336 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 337 u_int16_t cyl; 338 u_int8_t head, sect, cmd = 0; 339 int nblks; 340 int dma_flags = 0; 341 342 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 343 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive), 344 DEBUG_INTR | DEBUG_XFERS); 345 346 if (xfer->c_flags & C_DMA) { 347 if (drvp->n_xfers <= NXFER) 348 drvp->n_xfers++; 349 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 350 if (ata_bio->flags & ATA_LBA48) 351 dma_flags |= WDC_DMA_LBA48; 352 } 353 again: 354 /* 355 * 356 * When starting a multi-sector transfer, or doing single-sector 357 * transfers... 358 */ 359 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 360 if (ata_bio->flags & ATA_SINGLE) 361 nblks = 1; 362 else 363 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 364 /* Check for bad sectors and adjust transfer, if necessary. */ 365 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 366 long blkdiff; 367 int i; 368 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 369 i++) { 370 blkdiff -= ata_bio->blkno; 371 if (blkdiff < 0) 372 continue; 373 if (blkdiff == 0) { 374 /* Replace current block of transfer. */ 375 ata_bio->blkno = 376 ata_bio->lp->d_secperunit - 377 ata_bio->lp->d_nsectors - i - 1; 378 } 379 if (blkdiff < nblks) { 380 /* Bad block inside transfer. */ 381 ata_bio->flags |= ATA_SINGLE; 382 nblks = 1; 383 } 384 break; 385 } 386 /* Transfer is okay now. */ 387 } 388 if (ata_bio->flags & ATA_LBA48) { 389 sect = 0; 390 cyl = 0; 391 head = 0; 392 } else if (ata_bio->flags & ATA_LBA) { 393 sect = (ata_bio->blkno >> 0) & 0xff; 394 cyl = (ata_bio->blkno >> 8) & 0xffff; 395 head = (ata_bio->blkno >> 24) & 0x0f; 396 head |= WDSD_LBA; 397 } else { 398 int blkno = ata_bio->blkno; 399 sect = blkno % ata_bio->lp->d_nsectors; 400 sect++; /* Sectors begin with 1, not 0. */ 401 blkno /= ata_bio->lp->d_nsectors; 402 head = blkno % ata_bio->lp->d_ntracks; 403 blkno /= ata_bio->lp->d_ntracks; 404 cyl = blkno; 405 head |= WDSD_CHS; 406 } 407 if (xfer->c_flags & C_DMA) { 408 ata_bio->nblks = nblks; 409 ata_bio->nbytes = xfer->c_bcount; 410 cmd = (ata_bio->flags & ATA_READ) ? 411 WDCC_READDMA : WDCC_WRITEDMA; 412 /* Init the DMA channel. */ 413 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 414 chp->channel, xfer->c_drive, 415 (char *)xfer->c_databuf + xfer->c_skip, 416 ata_bio->nbytes, dma_flags) != 0) { 417 ata_bio->error = ERR_DMA; 418 ata_bio->r_error = 0; 419 wdc_ata_bio_done(chp, xfer); 420 return; 421 } 422 /* Initiate command */ 423 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 424 chp->wdc->select(chp, xfer->c_drive); 425 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 426 0, WDSD_IBM | (xfer->c_drive << 4)); 427 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 428 case WDCWAIT_OK: 429 break; 430 case WDCWAIT_TOUT: 431 goto timeout; 432 case WDCWAIT_THR: 433 return; 434 } 435 if (ata_bio->flags & ATA_LBA48) { 436 wdccommandext(chp, xfer->c_drive, to48(cmd), 437 (u_int64_t)ata_bio->blkno, nblks); 438 } else { 439 wdccommand(chp, xfer->c_drive, cmd, cyl, 440 head, sect, nblks, 0); 441 } 442 /* start the DMA channel */ 443 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 444 chp->channel, xfer->c_drive); 445 chp->ch_flags |= WDCF_DMA_WAIT; 446 /* start timeout machinery */ 447 if ((xfer->c_flags & C_POLL) == 0) 448 callout_reset(&chp->ch_callout, 449 ATA_DELAY / 1000 * hz, wdctimeout, chp); 450 /* wait for irq */ 451 goto intr; 452 } /* else not DMA */ 453 ata_bio->nblks = min(nblks, ata_bio->multi); 454 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 455 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 456 cmd = (ata_bio->flags & ATA_READ) ? 457 WDCC_READMULTI : WDCC_WRITEMULTI; 458 } else { 459 cmd = (ata_bio->flags & ATA_READ) ? 460 WDCC_READ : WDCC_WRITE; 461 } 462 /* Initiate command! */ 463 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 464 chp->wdc->select(chp, xfer->c_drive); 465 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 466 WDSD_IBM | (xfer->c_drive << 4)); 467 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 468 case WDCWAIT_OK: 469 break; 470 case WDCWAIT_TOUT: 471 goto timeout; 472 case WDCWAIT_THR: 473 return; 474 } 475 if (ata_bio->flags & ATA_LBA48) { 476 wdccommandext(chp, xfer->c_drive, to48(cmd), 477 (u_int64_t) ata_bio->blkno, nblks); 478 } else { 479 wdccommand(chp, xfer->c_drive, cmd, cyl, 480 head, sect, nblks, 481 (ata_bio->lp->d_type == DTYPE_ST506) ? 482 ata_bio->lp->d_precompcyl / 4 : 0); 483 } 484 /* start timeout machinery */ 485 if ((xfer->c_flags & C_POLL) == 0) 486 callout_reset(&chp->ch_callout, 487 ATA_DELAY / 1000 * hz, wdctimeout, chp); 488 } else if (ata_bio->nblks > 1) { 489 /* The number of blocks in the last stretch may be smaller. */ 490 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 491 if (ata_bio->nblks > nblks) { 492 ata_bio->nblks = nblks; 493 ata_bio->nbytes = xfer->c_bcount; 494 } 495 } 496 /* If this was a write and not using DMA, push the data. */ 497 if ((ata_bio->flags & ATA_READ) == 0) { 498 /* 499 * we have to busy-wait here, we can't rely on running in 500 * thread context. 501 */ 502 if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 503 printf("%s:%d:%d: timeout waiting for DRQ, " 504 "st=0x%02x, err=0x%02x\n", 505 chp->wdc->sc_dev.dv_xname, chp->channel, 506 xfer->c_drive, chp->ch_status, chp->ch_error); 507 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 508 ata_bio->error = TIMEOUT; 509 wdc_ata_bio_done(chp, xfer); 510 return; 511 } 512 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 513 wdc_ata_bio_done(chp, xfer); 514 return; 515 } 516 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 517 if (drvp->drive_flags & DRIVE_CAP32) { 518 bus_space_write_multi_4(chp->data32iot, 519 chp->data32ioh, 0, 520 (u_int32_t *)((char *)xfer->c_databuf + 521 xfer->c_skip), 522 ata_bio->nbytes >> 2); 523 } else { 524 bus_space_write_multi_2(chp->cmd_iot, 525 chp->cmd_iohs[wd_data], 0, 526 (u_int16_t *)((char *)xfer->c_databuf + 527 xfer->c_skip), 528 ata_bio->nbytes >> 1); 529 } 530 } else { 531 if (drvp->drive_flags & DRIVE_CAP32) { 532 bus_space_write_multi_stream_4(chp->data32iot, 533 chp->data32ioh, 0, 534 (u_int32_t *)((char *)xfer->c_databuf + 535 xfer->c_skip), 536 ata_bio->nbytes >> 2); 537 } else { 538 bus_space_write_multi_stream_2(chp->cmd_iot, 539 chp->cmd_iohs[wd_data], 0, 540 (u_int16_t *)((char *)xfer->c_databuf + 541 xfer->c_skip), 542 ata_bio->nbytes >> 1); 543 } 544 } 545 } 546 547 intr: /* Wait for IRQ (either real or polled) */ 548 if ((ata_bio->flags & ATA_POLL) == 0) { 549 chp->ch_flags |= WDCF_IRQ_WAIT; 550 } else { 551 /* Wait for at last 400ns for status bit to be valid */ 552 delay(1); 553 if (chp->ch_flags & WDCF_DMA_WAIT) { 554 wdc_dmawait(chp, xfer, ATA_DELAY); 555 chp->ch_flags &= ~WDCF_DMA_WAIT; 556 } 557 wdc_ata_bio_intr(chp, xfer, 0); 558 if ((ata_bio->flags & ATA_ITSDONE) == 0) 559 goto again; 560 } 561 return; 562 timeout: 563 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 564 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 565 chp->ch_status, chp->ch_error); 566 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 567 ata_bio->error = TIMEOUT; 568 wdc_ata_bio_done(chp, xfer); 569 return; 570 } 571 572 static int 573 wdc_ata_bio_intr(struct channel_softc *chp, struct ata_xfer *xfer, int irq) 574 { 575 struct ata_bio *ata_bio = xfer->c_cmd; 576 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 577 int drv_err; 578 579 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 580 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive), 581 DEBUG_INTR | DEBUG_XFERS); 582 583 584 /* Is it not a transfer, but a control operation? */ 585 if (drvp->state < READY) { 586 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 587 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 588 drvp->state); 589 panic("wdc_ata_bio_intr: bad state"); 590 } 591 592 /* 593 * if we missed an interrupt in a PIO transfer, reset and restart. 594 * Don't try to continue transfer, we may have missed cycles. 595 */ 596 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 597 ata_bio->error = TIMEOUT; 598 wdc_ata_bio_done(chp, xfer); 599 return 1; 600 } 601 602 /* Ack interrupt done by wdc_wait_for_unbusy */ 603 if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 604 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 605 return 0; /* IRQ was not for us */ 606 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 607 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 608 xfer->c_bcount, xfer->c_skip); 609 /* if we were using DMA, flag a DMA error */ 610 if (xfer->c_flags & C_DMA) { 611 ata_dmaerr(drvp, 612 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 613 } 614 ata_bio->error = TIMEOUT; 615 wdc_ata_bio_done(chp, xfer); 616 return 1; 617 } 618 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 619 chp->wdc->irqack(chp); 620 621 drv_err = wdc_ata_err(drvp, ata_bio); 622 623 /* If we were using DMA, Turn off the DMA channel and check for error */ 624 if (xfer->c_flags & C_DMA) { 625 if (ata_bio->flags & ATA_POLL) { 626 /* 627 * IDE drives deassert WDCS_BSY before transfer is 628 * complete when using DMA. Polling for DRQ to deassert 629 * is not enough DRQ is not required to be 630 * asserted for DMA transfers, so poll for DRDY. 631 */ 632 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 633 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 634 printf("%s:%d:%d: polled transfer timed out " 635 "(st=0x%x)\n", chp->wdc->sc_dev.dv_xname, 636 chp->channel, xfer->c_drive, 637 chp->ch_status); 638 ata_bio->error = TIMEOUT; 639 drv_err = WDC_ATA_ERR; 640 } 641 } 642 if (chp->wdc->dma_status != 0) { 643 if (drv_err != WDC_ATA_ERR) { 644 ata_bio->error = ERR_DMA; 645 drv_err = WDC_ATA_ERR; 646 } 647 } 648 if (chp->ch_status & WDCS_DRQ) { 649 if (drv_err != WDC_ATA_ERR) { 650 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 651 chp->wdc->sc_dev.dv_xname, chp->channel, 652 xfer->c_drive, chp->ch_status); 653 ata_bio->error = TIMEOUT; 654 drv_err = WDC_ATA_ERR; 655 } 656 } 657 if (drv_err != WDC_ATA_ERR) 658 goto end; 659 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 660 } 661 662 /* if we had an error, end */ 663 if (drv_err == WDC_ATA_ERR) { 664 wdc_ata_bio_done(chp, xfer); 665 return 1; 666 } 667 668 /* If this was a read and not using DMA, fetch the data. */ 669 if ((ata_bio->flags & ATA_READ) != 0) { 670 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 671 printf("%s:%d:%d: read intr before drq\n", 672 chp->wdc->sc_dev.dv_xname, chp->channel, 673 xfer->c_drive); 674 ata_bio->error = TIMEOUT; 675 wdc_ata_bio_done(chp, xfer); 676 return 1; 677 } 678 if ((chp->wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 679 if (drvp->drive_flags & DRIVE_CAP32) { 680 bus_space_read_multi_4(chp->data32iot, 681 chp->data32ioh, 0, 682 (u_int32_t *)((char *)xfer->c_databuf + 683 xfer->c_skip), 684 ata_bio->nbytes >> 2); 685 } else { 686 bus_space_read_multi_2(chp->cmd_iot, 687 chp->cmd_iohs[wd_data], 0, 688 (u_int16_t *)((char *)xfer->c_databuf + 689 xfer->c_skip), 690 ata_bio->nbytes >> 1); 691 } 692 } else { 693 if (drvp->drive_flags & DRIVE_CAP32) { 694 bus_space_read_multi_stream_4(chp->data32iot, 695 chp->data32ioh, 0, 696 (u_int32_t *)((char *)xfer->c_databuf + 697 xfer->c_skip), 698 ata_bio->nbytes >> 2); 699 } else { 700 bus_space_read_multi_stream_2(chp->cmd_iot, 701 chp->cmd_iohs[wd_data], 0, 702 (u_int16_t *)((char *)xfer->c_databuf + 703 xfer->c_skip), 704 ata_bio->nbytes >> 1); 705 } 706 } 707 } 708 709 end: 710 ata_bio->blkno += ata_bio->nblks; 711 ata_bio->blkdone += ata_bio->nblks; 712 xfer->c_skip += ata_bio->nbytes; 713 xfer->c_bcount -= ata_bio->nbytes; 714 /* See if this transfer is complete. */ 715 if (xfer->c_bcount > 0) { 716 if ((ata_bio->flags & ATA_POLL) == 0) { 717 /* Start the next operation */ 718 _wdc_ata_bio_start(chp, xfer); 719 } else { 720 /* Let _wdc_ata_bio_start do the loop */ 721 return 1; 722 } 723 } else { /* Done with this transfer */ 724 ata_bio->error = NOERROR; 725 wdc_ata_bio_done(chp, xfer); 726 } 727 return 1; 728 } 729 730 static void 731 wdc_ata_kill_pending(struct ata_drive_datas *drvp) 732 { 733 struct channel_softc *chp = drvp->chnl_softc; 734 735 wdc_kill_pending(chp); 736 } 737 738 static void 739 wdc_ata_bio_kill_xfer(struct channel_softc *chp, struct ata_xfer *xfer) 740 { 741 struct ata_bio *ata_bio = xfer->c_cmd; 742 int drive = xfer->c_drive; 743 744 callout_stop(&chp->ch_callout); 745 /* remove this command from xfer queue */ 746 wdc_free_xfer(chp, xfer); 747 748 ata_bio->flags |= ATA_ITSDONE; 749 ata_bio->error = ERR_NODEV; 750 ata_bio->r_error = WDCE_ABRT; 751 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 752 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 753 } 754 755 static void 756 wdc_ata_bio_done(struct channel_softc *chp, struct ata_xfer *xfer) 757 { 758 struct ata_bio *ata_bio = xfer->c_cmd; 759 int drive = xfer->c_drive; 760 761 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 762 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 763 (u_int)xfer->c_flags), 764 DEBUG_XFERS); 765 766 callout_stop(&chp->ch_callout); 767 768 /* feed back residual bcount to our caller */ 769 ata_bio->bcount = xfer->c_bcount; 770 771 /* remove this command from xfer queue */ 772 wdc_free_xfer(chp, xfer); 773 774 ata_bio->flags |= ATA_ITSDONE; 775 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 776 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 777 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 778 chp->ch_flags), DEBUG_XFERS); 779 wdcstart(chp); 780 } 781 782 static int 783 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 784 { 785 struct channel_softc *chp = drvp->chnl_softc; 786 ata_bio->error = 0; 787 if (chp->ch_status & WDCS_BSY) { 788 ata_bio->error = TIMEOUT; 789 return WDC_ATA_ERR; 790 } 791 792 if (chp->ch_status & WDCS_DWF) { 793 ata_bio->error = ERR_DF; 794 return WDC_ATA_ERR; 795 } 796 797 if (chp->ch_status & WDCS_ERR) { 798 ata_bio->error = ERROR; 799 ata_bio->r_error = chp->ch_error; 800 if (drvp->drive_flags & DRIVE_UDMA && 801 (ata_bio->r_error & WDCE_CRC)) { 802 /* 803 * Record the CRC error, to avoid downgrading to 804 * multiword DMA 805 */ 806 drvp->drive_flags |= DRIVE_DMAERR; 807 } 808 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 809 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 810 return WDC_ATA_ERR; 811 return WDC_ATA_NOERR; 812 } 813 814 if (chp->ch_status & WDCS_CORR) 815 ata_bio->flags |= ATA_CORR; 816 return WDC_ATA_NOERR; 817 } 818 819 static int 820 wdc_ata_addref(struct ata_drive_datas *drvp) 821 { 822 struct channel_softc *chp = drvp->chnl_softc; 823 824 return (wdc_addref(chp)); 825 } 826 827 static void 828 wdc_ata_delref(struct ata_drive_datas *drvp) 829 { 830 struct channel_softc *chp = drvp->chnl_softc; 831 832 wdc_delref(chp); 833 } 834
Indexes created Mon Sep 29 03:10:08 GMT 2025