ata_wdc.c revision 1.51
1 /* $NetBSD: ata_wdc.c,v 1.51 2004/01/03 22:56:53 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.51 2004/01/03 22:56:53 thorpej Exp $"); 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef WDCDEBUG 107 extern int wdcdebug_wd_mask; /* inited in wd.c */ 108 #define WDCDEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define WDCDEBUG_PRINT(args, level) 113 #endif 114 115 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 116 117 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 118 static void wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *); 119 static void _wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *); 120 static int wdc_ata_bio_intr(struct wdc_channel *, struct ata_xfer *, 121 int); 122 static void wdc_ata_bio_kill_xfer(struct wdc_channel *,struct ata_xfer *); 123 static void wdc_ata_bio_done(struct wdc_channel *, struct ata_xfer *); 124 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 static int wdc_ata_addref(struct ata_drive_datas *); 129 static void wdc_ata_delref(struct ata_drive_datas *); 130 static void wdc_ata_kill_pending(struct ata_drive_datas *); 131 132 const struct ata_bustype wdc_ata_bustype = { 133 SCSIPI_BUSTYPE_ATA, 134 wdc_ata_bio, 135 wdc_reset_channel, 136 wdc_exec_command, 137 ata_get_params, 138 wdc_ata_addref, 139 wdc_ata_delref, 140 wdc_ata_kill_pending, 141 }; 142 143 /* 144 * Convert a 32 bit command to a 48 bit command. 145 */ 146 static __inline 147 int to48(int cmd32) 148 { 149 switch (cmd32) { 150 case WDCC_READ: 151 return WDCC_READ_EXT; 152 case WDCC_WRITE: 153 return WDCC_WRITE_EXT; 154 case WDCC_READMULTI: 155 return WDCC_READMULTI_EXT; 156 case WDCC_WRITEMULTI: 157 return WDCC_WRITEMULTI_EXT; 158 case WDCC_READDMA: 159 return WDCC_READDMA_EXT; 160 case WDCC_WRITEDMA: 161 return WDCC_WRITEDMA_EXT; 162 default: 163 panic("ata_wdc: illegal 32 bit command %d", cmd32); 164 /*NOTREACHED*/ 165 } 166 } 167 168 /* 169 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 170 * WDC_TRY_AGAIN. Must be called at splbio(). 171 */ 172 static int 173 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 174 { 175 struct ata_xfer *xfer; 176 struct wdc_channel *chp = drvp->chnl_softc; 177 struct wdc_softc *wdc = chp->ch_wdc; 178 179 xfer = wdc_get_xfer(WDC_NOSLEEP); 180 if (xfer == NULL) 181 return WDC_TRY_AGAIN; 182 if (wdc->cap & WDC_CAPABILITY_NOIRQ) 183 ata_bio->flags |= ATA_POLL; 184 if (ata_bio->flags & ATA_POLL) 185 xfer->c_flags |= C_POLL; 186 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 187 (ata_bio->flags & ATA_SINGLE) == 0) 188 xfer->c_flags |= C_DMA; 189 xfer->c_drive = drvp->drive; 190 xfer->c_cmd = ata_bio; 191 xfer->c_databuf = ata_bio->databuf; 192 xfer->c_bcount = ata_bio->bcount; 193 xfer->c_start = wdc_ata_bio_start; 194 xfer->c_intr = wdc_ata_bio_intr; 195 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 196 wdc_exec_xfer(chp, xfer); 197 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 198 } 199 200 static void 201 wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer) 202 { 203 struct wdc_softc *wdc = chp->ch_wdc; 204 struct ata_bio *ata_bio = xfer->c_cmd; 205 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 206 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 207 char *errstring; 208 209 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 210 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive), 211 DEBUG_XFERS); 212 213 /* Do control operations specially. */ 214 if (__predict_false(drvp->state < READY)) { 215 /* 216 * Actually, we want to be careful not to mess with the control 217 * state if the device is currently busy, but we can assume 218 * that we never get to this point if that's the case. 219 */ 220 /* If it's not a polled command, we need the kenrel thread */ 221 if ((xfer->c_flags & C_POLL) == 0 && 222 (chp->ch_flags & WDCF_TH_RUN) == 0) { 223 chp->ch_queue->queue_freeze++; 224 wakeup(&chp->thread); 225 return; 226 } 227 /* 228 * disable interrupts, all commands here should be quick 229 * enouth to be able to poll, and we don't go here that often 230 */ 231 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 232 WDCTL_4BIT | WDCTL_IDS); 233 if (wdc->cap & WDC_CAPABILITY_SELECT) 234 wdc->select(chp, xfer->c_drive); 235 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 236 WDSD_IBM | (xfer->c_drive << 4)); 237 errstring = "wait"; 238 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 239 goto ctrltimeout; 240 wdccommandshort(chp, xfer->c_drive, WDCC_RECAL); 241 /* Wait for at last 400ns for status bit to be valid */ 242 DELAY(1); 243 errstring = "recal"; 244 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 245 goto ctrltimeout; 246 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 247 goto ctrlerror; 248 /* Don't try to set modes if controller can't be adjusted */ 249 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0) 250 goto geometry; 251 /* Also don't try if the drive didn't report its mode */ 252 if ((drvp->drive_flags & DRIVE_MODE) == 0) 253 goto geometry; 254 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 255 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 256 errstring = "piomode"; 257 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 258 goto ctrltimeout; 259 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 260 goto ctrlerror; 261 if (drvp->drive_flags & DRIVE_UDMA) { 262 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 263 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 264 } else if (drvp->drive_flags & DRIVE_DMA) { 265 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 266 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 267 } else { 268 goto geometry; 269 } 270 errstring = "dmamode"; 271 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 272 goto ctrltimeout; 273 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 274 goto ctrlerror; 275 geometry: 276 if (ata_bio->flags & ATA_LBA) 277 goto multimode; 278 wdccommand(chp, xfer->c_drive, WDCC_IDP, 279 ata_bio->lp->d_ncylinders, 280 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 281 (ata_bio->lp->d_type == DTYPE_ST506) ? 282 ata_bio->lp->d_precompcyl / 4 : 0); 283 errstring = "geometry"; 284 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 285 goto ctrltimeout; 286 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 287 goto ctrlerror; 288 multimode: 289 if (ata_bio->multi == 1) 290 goto ready; 291 wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0, 292 ata_bio->multi, 0); 293 errstring = "setmulti"; 294 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 295 goto ctrltimeout; 296 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 297 goto ctrlerror; 298 ready: 299 drvp->state = READY; 300 /* 301 * The drive is usable now 302 */ 303 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 304 WDCTL_4BIT); 305 } 306 307 _wdc_ata_bio_start(chp, xfer); 308 return; 309 ctrltimeout: 310 printf("%s:%d:%d: %s timed out\n", 311 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 312 errstring); 313 ata_bio->error = TIMEOUT; 314 goto ctrldone; 315 ctrlerror: 316 printf("%s:%d:%d: %s ", 317 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 318 errstring); 319 if (chp->ch_status & WDCS_DWF) { 320 printf("drive fault\n"); 321 ata_bio->error = ERR_DF; 322 } else { 323 printf("error (%x)\n", chp->ch_error); 324 ata_bio->r_error = chp->ch_error; 325 ata_bio->error = ERROR; 326 } 327 ctrldone: 328 drvp->state = 0; 329 wdc_ata_bio_done(chp, xfer); 330 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 331 return; 332 } 333 334 static void 335 _wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer) 336 { 337 struct wdc_softc *wdc = chp->ch_wdc; 338 struct ata_bio *ata_bio = xfer->c_cmd; 339 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 340 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 341 u_int16_t cyl; 342 u_int8_t head, sect, cmd = 0; 343 int nblks; 344 int dma_flags = 0; 345 346 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 347 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive), 348 DEBUG_INTR | DEBUG_XFERS); 349 350 if (xfer->c_flags & C_DMA) { 351 if (drvp->n_xfers <= NXFER) 352 drvp->n_xfers++; 353 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 354 if (ata_bio->flags & ATA_LBA48) 355 dma_flags |= WDC_DMA_LBA48; 356 } 357 again: 358 /* 359 * 360 * When starting a multi-sector transfer, or doing single-sector 361 * transfers... 362 */ 363 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 364 if (ata_bio->flags & ATA_SINGLE) 365 nblks = 1; 366 else 367 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 368 /* Check for bad sectors and adjust transfer, if necessary. */ 369 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 370 long blkdiff; 371 int i; 372 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 373 i++) { 374 blkdiff -= ata_bio->blkno; 375 if (blkdiff < 0) 376 continue; 377 if (blkdiff == 0) { 378 /* Replace current block of transfer. */ 379 ata_bio->blkno = 380 ata_bio->lp->d_secperunit - 381 ata_bio->lp->d_nsectors - i - 1; 382 } 383 if (blkdiff < nblks) { 384 /* Bad block inside transfer. */ 385 ata_bio->flags |= ATA_SINGLE; 386 nblks = 1; 387 } 388 break; 389 } 390 /* Transfer is okay now. */ 391 } 392 if (ata_bio->flags & ATA_LBA48) { 393 sect = 0; 394 cyl = 0; 395 head = 0; 396 } else if (ata_bio->flags & ATA_LBA) { 397 sect = (ata_bio->blkno >> 0) & 0xff; 398 cyl = (ata_bio->blkno >> 8) & 0xffff; 399 head = (ata_bio->blkno >> 24) & 0x0f; 400 head |= WDSD_LBA; 401 } else { 402 int blkno = ata_bio->blkno; 403 sect = blkno % ata_bio->lp->d_nsectors; 404 sect++; /* Sectors begin with 1, not 0. */ 405 blkno /= ata_bio->lp->d_nsectors; 406 head = blkno % ata_bio->lp->d_ntracks; 407 blkno /= ata_bio->lp->d_ntracks; 408 cyl = blkno; 409 head |= WDSD_CHS; 410 } 411 if (xfer->c_flags & C_DMA) { 412 ata_bio->nblks = nblks; 413 ata_bio->nbytes = xfer->c_bcount; 414 cmd = (ata_bio->flags & ATA_READ) ? 415 WDCC_READDMA : WDCC_WRITEDMA; 416 /* Init the DMA channel. */ 417 if ((*wdc->dma_init)(wdc->dma_arg, 418 chp->ch_channel, xfer->c_drive, 419 (char *)xfer->c_databuf + xfer->c_skip, 420 ata_bio->nbytes, dma_flags) != 0) { 421 ata_bio->error = ERR_DMA; 422 ata_bio->r_error = 0; 423 wdc_ata_bio_done(chp, xfer); 424 return; 425 } 426 /* Initiate command */ 427 if (wdc->cap & WDC_CAPABILITY_SELECT) 428 wdc->select(chp, xfer->c_drive); 429 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 430 0, WDSD_IBM | (xfer->c_drive << 4)); 431 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 432 case WDCWAIT_OK: 433 break; 434 case WDCWAIT_TOUT: 435 goto timeout; 436 case WDCWAIT_THR: 437 return; 438 } 439 if (ata_bio->flags & ATA_LBA48) { 440 wdccommandext(chp, xfer->c_drive, to48(cmd), 441 (u_int64_t)ata_bio->blkno, nblks); 442 } else { 443 wdccommand(chp, xfer->c_drive, cmd, cyl, 444 head, sect, nblks, 0); 445 } 446 /* start the DMA channel */ 447 (*wdc->dma_start)(wdc->dma_arg, 448 chp->ch_channel, xfer->c_drive); 449 chp->ch_flags |= WDCF_DMA_WAIT; 450 /* start timeout machinery */ 451 if ((xfer->c_flags & C_POLL) == 0) 452 callout_reset(&chp->ch_callout, 453 ATA_DELAY / 1000 * hz, wdctimeout, chp); 454 /* wait for irq */ 455 goto intr; 456 } /* else not DMA */ 457 ata_bio->nblks = min(nblks, ata_bio->multi); 458 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 459 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 460 cmd = (ata_bio->flags & ATA_READ) ? 461 WDCC_READMULTI : WDCC_WRITEMULTI; 462 } else { 463 cmd = (ata_bio->flags & ATA_READ) ? 464 WDCC_READ : WDCC_WRITE; 465 } 466 /* Initiate command! */ 467 if (wdc->cap & WDC_CAPABILITY_SELECT) 468 wdc->select(chp, xfer->c_drive); 469 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 470 WDSD_IBM | (xfer->c_drive << 4)); 471 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 472 case WDCWAIT_OK: 473 break; 474 case WDCWAIT_TOUT: 475 goto timeout; 476 case WDCWAIT_THR: 477 return; 478 } 479 if (ata_bio->flags & ATA_LBA48) { 480 wdccommandext(chp, xfer->c_drive, to48(cmd), 481 (u_int64_t) ata_bio->blkno, nblks); 482 } else { 483 wdccommand(chp, xfer->c_drive, cmd, cyl, 484 head, sect, nblks, 485 (ata_bio->lp->d_type == DTYPE_ST506) ? 486 ata_bio->lp->d_precompcyl / 4 : 0); 487 } 488 /* start timeout machinery */ 489 if ((xfer->c_flags & C_POLL) == 0) 490 callout_reset(&chp->ch_callout, 491 ATA_DELAY / 1000 * hz, wdctimeout, chp); 492 } else if (ata_bio->nblks > 1) { 493 /* The number of blocks in the last stretch may be smaller. */ 494 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 495 if (ata_bio->nblks > nblks) { 496 ata_bio->nblks = nblks; 497 ata_bio->nbytes = xfer->c_bcount; 498 } 499 } 500 /* If this was a write and not using DMA, push the data. */ 501 if ((ata_bio->flags & ATA_READ) == 0) { 502 /* 503 * we have to busy-wait here, we can't rely on running in 504 * thread context. 505 */ 506 if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 507 printf("%s:%d:%d: timeout waiting for DRQ, " 508 "st=0x%02x, err=0x%02x\n", 509 wdc->sc_dev.dv_xname, chp->ch_channel, 510 xfer->c_drive, chp->ch_status, chp->ch_error); 511 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 512 ata_bio->error = TIMEOUT; 513 wdc_ata_bio_done(chp, xfer); 514 return; 515 } 516 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 517 wdc_ata_bio_done(chp, xfer); 518 return; 519 } 520 if ((wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 521 if (drvp->drive_flags & DRIVE_CAP32) { 522 bus_space_write_multi_4(chp->data32iot, 523 chp->data32ioh, 0, 524 (u_int32_t *)((char *)xfer->c_databuf + 525 xfer->c_skip), 526 ata_bio->nbytes >> 2); 527 } else { 528 bus_space_write_multi_2(chp->cmd_iot, 529 chp->cmd_iohs[wd_data], 0, 530 (u_int16_t *)((char *)xfer->c_databuf + 531 xfer->c_skip), 532 ata_bio->nbytes >> 1); 533 } 534 } else { 535 if (drvp->drive_flags & DRIVE_CAP32) { 536 bus_space_write_multi_stream_4(chp->data32iot, 537 chp->data32ioh, 0, 538 (u_int32_t *)((char *)xfer->c_databuf + 539 xfer->c_skip), 540 ata_bio->nbytes >> 2); 541 } else { 542 bus_space_write_multi_stream_2(chp->cmd_iot, 543 chp->cmd_iohs[wd_data], 0, 544 (u_int16_t *)((char *)xfer->c_databuf + 545 xfer->c_skip), 546 ata_bio->nbytes >> 1); 547 } 548 } 549 } 550 551 intr: /* Wait for IRQ (either real or polled) */ 552 if ((ata_bio->flags & ATA_POLL) == 0) { 553 chp->ch_flags |= WDCF_IRQ_WAIT; 554 } else { 555 /* Wait for at last 400ns for status bit to be valid */ 556 delay(1); 557 if (chp->ch_flags & WDCF_DMA_WAIT) { 558 wdc_dmawait(chp, xfer, ATA_DELAY); 559 chp->ch_flags &= ~WDCF_DMA_WAIT; 560 } 561 wdc_ata_bio_intr(chp, xfer, 0); 562 if ((ata_bio->flags & ATA_ITSDONE) == 0) 563 goto again; 564 } 565 return; 566 timeout: 567 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 568 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 569 chp->ch_status, chp->ch_error); 570 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 571 ata_bio->error = TIMEOUT; 572 wdc_ata_bio_done(chp, xfer); 573 return; 574 } 575 576 static int 577 wdc_ata_bio_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq) 578 { 579 struct wdc_softc *wdc = chp->ch_wdc; 580 struct ata_bio *ata_bio = xfer->c_cmd; 581 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 582 int drv_err; 583 584 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 585 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive), 586 DEBUG_INTR | DEBUG_XFERS); 587 588 589 /* Is it not a transfer, but a control operation? */ 590 if (drvp->state < READY) { 591 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 592 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 593 drvp->state); 594 panic("wdc_ata_bio_intr: bad state"); 595 } 596 597 /* 598 * if we missed an interrupt in a PIO transfer, reset and restart. 599 * Don't try to continue transfer, we may have missed cycles. 600 */ 601 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 602 ata_bio->error = TIMEOUT; 603 wdc_ata_bio_done(chp, xfer); 604 return 1; 605 } 606 607 /* Ack interrupt done by wdc_wait_for_unbusy */ 608 if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 609 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 610 return 0; /* IRQ was not for us */ 611 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 612 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 613 xfer->c_bcount, xfer->c_skip); 614 /* if we were using DMA, flag a DMA error */ 615 if (xfer->c_flags & C_DMA) { 616 ata_dmaerr(drvp, 617 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 618 } 619 ata_bio->error = TIMEOUT; 620 wdc_ata_bio_done(chp, xfer); 621 return 1; 622 } 623 if (wdc->cap & WDC_CAPABILITY_IRQACK) 624 wdc->irqack(chp); 625 626 drv_err = wdc_ata_err(drvp, ata_bio); 627 628 /* If we were using DMA, Turn off the DMA channel and check for error */ 629 if (xfer->c_flags & C_DMA) { 630 if (ata_bio->flags & ATA_POLL) { 631 /* 632 * IDE drives deassert WDCS_BSY before transfer is 633 * complete when using DMA. Polling for DRQ to deassert 634 * is not enough DRQ is not required to be 635 * asserted for DMA transfers, so poll for DRDY. 636 */ 637 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 638 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 639 printf("%s:%d:%d: polled transfer timed out " 640 "(st=0x%x)\n", wdc->sc_dev.dv_xname, 641 chp->ch_channel, xfer->c_drive, 642 chp->ch_status); 643 ata_bio->error = TIMEOUT; 644 drv_err = WDC_ATA_ERR; 645 } 646 } 647 if (wdc->dma_status != 0) { 648 if (drv_err != WDC_ATA_ERR) { 649 ata_bio->error = ERR_DMA; 650 drv_err = WDC_ATA_ERR; 651 } 652 } 653 if (chp->ch_status & WDCS_DRQ) { 654 if (drv_err != WDC_ATA_ERR) { 655 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 656 wdc->sc_dev.dv_xname, chp->ch_channel, 657 xfer->c_drive, chp->ch_status); 658 ata_bio->error = TIMEOUT; 659 drv_err = WDC_ATA_ERR; 660 } 661 } 662 if (drv_err != WDC_ATA_ERR) 663 goto end; 664 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 665 } 666 667 /* if we had an error, end */ 668 if (drv_err == WDC_ATA_ERR) { 669 wdc_ata_bio_done(chp, xfer); 670 return 1; 671 } 672 673 /* If this was a read and not using DMA, fetch the data. */ 674 if ((ata_bio->flags & ATA_READ) != 0) { 675 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 676 printf("%s:%d:%d: read intr before drq\n", 677 wdc->sc_dev.dv_xname, chp->ch_channel, 678 xfer->c_drive); 679 ata_bio->error = TIMEOUT; 680 wdc_ata_bio_done(chp, xfer); 681 return 1; 682 } 683 if ((wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 684 if (drvp->drive_flags & DRIVE_CAP32) { 685 bus_space_read_multi_4(chp->data32iot, 686 chp->data32ioh, 0, 687 (u_int32_t *)((char *)xfer->c_databuf + 688 xfer->c_skip), 689 ata_bio->nbytes >> 2); 690 } else { 691 bus_space_read_multi_2(chp->cmd_iot, 692 chp->cmd_iohs[wd_data], 0, 693 (u_int16_t *)((char *)xfer->c_databuf + 694 xfer->c_skip), 695 ata_bio->nbytes >> 1); 696 } 697 } else { 698 if (drvp->drive_flags & DRIVE_CAP32) { 699 bus_space_read_multi_stream_4(chp->data32iot, 700 chp->data32ioh, 0, 701 (u_int32_t *)((char *)xfer->c_databuf + 702 xfer->c_skip), 703 ata_bio->nbytes >> 2); 704 } else { 705 bus_space_read_multi_stream_2(chp->cmd_iot, 706 chp->cmd_iohs[wd_data], 0, 707 (u_int16_t *)((char *)xfer->c_databuf + 708 xfer->c_skip), 709 ata_bio->nbytes >> 1); 710 } 711 } 712 } 713 714 end: 715 ata_bio->blkno += ata_bio->nblks; 716 ata_bio->blkdone += ata_bio->nblks; 717 xfer->c_skip += ata_bio->nbytes; 718 xfer->c_bcount -= ata_bio->nbytes; 719 /* See if this transfer is complete. */ 720 if (xfer->c_bcount > 0) { 721 if ((ata_bio->flags & ATA_POLL) == 0) { 722 /* Start the next operation */ 723 _wdc_ata_bio_start(chp, xfer); 724 } else { 725 /* Let _wdc_ata_bio_start do the loop */ 726 return 1; 727 } 728 } else { /* Done with this transfer */ 729 ata_bio->error = NOERROR; 730 wdc_ata_bio_done(chp, xfer); 731 } 732 return 1; 733 } 734 735 static void 736 wdc_ata_kill_pending(struct ata_drive_datas *drvp) 737 { 738 struct wdc_channel *chp = drvp->chnl_softc; 739 740 wdc_kill_pending(chp); 741 } 742 743 static void 744 wdc_ata_bio_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 745 { 746 struct ata_bio *ata_bio = xfer->c_cmd; 747 int drive = xfer->c_drive; 748 749 callout_stop(&chp->ch_callout); 750 /* remove this command from xfer queue */ 751 wdc_free_xfer(chp, xfer); 752 753 ata_bio->flags |= ATA_ITSDONE; 754 ata_bio->error = ERR_NODEV; 755 ata_bio->r_error = WDCE_ABRT; 756 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 757 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 758 } 759 760 static void 761 wdc_ata_bio_done(struct wdc_channel *chp, struct ata_xfer *xfer) 762 { 763 struct wdc_softc *wdc = chp->ch_wdc; 764 struct ata_bio *ata_bio = xfer->c_cmd; 765 int drive = xfer->c_drive; 766 767 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 768 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 769 (u_int)xfer->c_flags), 770 DEBUG_XFERS); 771 772 callout_stop(&chp->ch_callout); 773 774 /* feed back residual bcount to our caller */ 775 ata_bio->bcount = xfer->c_bcount; 776 777 /* remove this command from xfer queue */ 778 wdc_free_xfer(chp, xfer); 779 780 ata_bio->flags |= ATA_ITSDONE; 781 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 782 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 783 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 784 chp->ch_flags), DEBUG_XFERS); 785 wdcstart(chp); 786 } 787 788 static int 789 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 790 { 791 struct wdc_channel *chp = drvp->chnl_softc; 792 ata_bio->error = 0; 793 if (chp->ch_status & WDCS_BSY) { 794 ata_bio->error = TIMEOUT; 795 return WDC_ATA_ERR; 796 } 797 798 if (chp->ch_status & WDCS_DWF) { 799 ata_bio->error = ERR_DF; 800 return WDC_ATA_ERR; 801 } 802 803 if (chp->ch_status & WDCS_ERR) { 804 ata_bio->error = ERROR; 805 ata_bio->r_error = chp->ch_error; 806 if (drvp->drive_flags & DRIVE_UDMA && 807 (ata_bio->r_error & WDCE_CRC)) { 808 /* 809 * Record the CRC error, to avoid downgrading to 810 * multiword DMA 811 */ 812 drvp->drive_flags |= DRIVE_DMAERR; 813 } 814 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 815 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 816 return WDC_ATA_ERR; 817 return WDC_ATA_NOERR; 818 } 819 820 if (chp->ch_status & WDCS_CORR) 821 ata_bio->flags |= ATA_CORR; 822 return WDC_ATA_NOERR; 823 } 824 825 static int 826 wdc_ata_addref(struct ata_drive_datas *drvp) 827 { 828 struct wdc_channel *chp = drvp->chnl_softc; 829 830 return (wdc_addref(chp)); 831 } 832 833 static void 834 wdc_ata_delref(struct ata_drive_datas *drvp) 835 { 836 struct wdc_channel *chp = drvp->chnl_softc; 837 838 wdc_delref(chp); 839 } 840
Indexes created Mon Sep 29 21:09:56 GMT 2025