ata_wdc.c revision 1.53
1 /* $NetBSD: ata_wdc.c,v 1.53 2004/03/02 13:13:57 fvdl Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.53 2004/03/02 13:13:57 fvdl Exp $"); 70 71 #ifndef WDCDEBUG 72 #define WDCDEBUG 73 #endif /* WDCDEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef WDCDEBUG 107 extern int wdcdebug_wd_mask; /* inited in wd.c */ 108 #define WDCDEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define WDCDEBUG_PRINT(args, level) 113 #endif 114 115 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 116 117 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 118 static void wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *); 119 static void _wdc_ata_bio_start(struct wdc_channel *,struct ata_xfer *); 120 static int wdc_ata_bio_intr(struct wdc_channel *, struct ata_xfer *, 121 int); 122 static void wdc_ata_bio_kill_xfer(struct wdc_channel *,struct ata_xfer *); 123 static void wdc_ata_bio_done(struct wdc_channel *, struct ata_xfer *); 124 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 125 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 126 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 127 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 128 static int wdc_ata_addref(struct ata_drive_datas *); 129 static void wdc_ata_delref(struct ata_drive_datas *); 130 static void wdc_ata_kill_pending(struct ata_drive_datas *); 131 132 const struct ata_bustype wdc_ata_bustype = { 133 SCSIPI_BUSTYPE_ATA, 134 wdc_ata_bio, 135 wdc_reset_channel, 136 wdc_exec_command, 137 ata_get_params, 138 wdc_ata_addref, 139 wdc_ata_delref, 140 wdc_ata_kill_pending, 141 }; 142 143 /* 144 * Convert a 32 bit command to a 48 bit command. 145 */ 146 static __inline 147 int to48(int cmd32) 148 { 149 switch (cmd32) { 150 case WDCC_READ: 151 return WDCC_READ_EXT; 152 case WDCC_WRITE: 153 return WDCC_WRITE_EXT; 154 case WDCC_READMULTI: 155 return WDCC_READMULTI_EXT; 156 case WDCC_WRITEMULTI: 157 return WDCC_WRITEMULTI_EXT; 158 case WDCC_READDMA: 159 return WDCC_READDMA_EXT; 160 case WDCC_WRITEDMA: 161 return WDCC_WRITEDMA_EXT; 162 default: 163 panic("ata_wdc: illegal 32 bit command %d", cmd32); 164 /*NOTREACHED*/ 165 } 166 } 167 168 /* 169 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 170 * WDC_TRY_AGAIN. Must be called at splbio(). 171 */ 172 static int 173 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 174 { 175 struct ata_xfer *xfer; 176 struct wdc_channel *chp = drvp->chnl_softc; 177 struct wdc_softc *wdc = chp->ch_wdc; 178 179 xfer = wdc_get_xfer(WDC_NOSLEEP); 180 if (xfer == NULL) 181 return WDC_TRY_AGAIN; 182 if (wdc->cap & WDC_CAPABILITY_NOIRQ) 183 ata_bio->flags |= ATA_POLL; 184 if (ata_bio->flags & ATA_POLL) 185 xfer->c_flags |= C_POLL; 186 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 187 (ata_bio->flags & ATA_SINGLE) == 0) 188 xfer->c_flags |= C_DMA; 189 xfer->c_drive = drvp->drive; 190 xfer->c_cmd = ata_bio; 191 xfer->c_databuf = ata_bio->databuf; 192 xfer->c_bcount = ata_bio->bcount; 193 xfer->c_start = wdc_ata_bio_start; 194 xfer->c_intr = wdc_ata_bio_intr; 195 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 196 wdc_exec_xfer(chp, xfer); 197 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 198 } 199 200 static void 201 wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer) 202 { 203 struct wdc_softc *wdc = chp->ch_wdc; 204 struct ata_bio *ata_bio = xfer->c_cmd; 205 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 206 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 207 char *errstring; 208 209 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 210 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive), 211 DEBUG_XFERS); 212 213 /* Do control operations specially. */ 214 if (__predict_false(drvp->state < READY)) { 215 /* 216 * Actually, we want to be careful not to mess with the control 217 * state if the device is currently busy, but we can assume 218 * that we never get to this point if that's the case. 219 */ 220 /* If it's not a polled command, we need the kenrel thread */ 221 if ((xfer->c_flags & C_POLL) == 0 && 222 (chp->ch_flags & WDCF_TH_RUN) == 0) { 223 chp->ch_queue->queue_freeze++; 224 wakeup(&chp->ch_thread); 225 return; 226 } 227 /* 228 * disable interrupts, all commands here should be quick 229 * enouth to be able to poll, and we don't go here that often 230 */ 231 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 232 WDCTL_4BIT | WDCTL_IDS); 233 if (wdc->cap & WDC_CAPABILITY_SELECT) 234 wdc->select(chp, xfer->c_drive); 235 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 236 WDSD_IBM | (xfer->c_drive << 4)); 237 DELAY(10); 238 errstring = "wait"; 239 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 240 goto ctrltimeout; 241 wdccommandshort(chp, xfer->c_drive, WDCC_RECAL); 242 /* Wait for at last 400ns for status bit to be valid */ 243 DELAY(1); 244 errstring = "recal"; 245 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 246 goto ctrltimeout; 247 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 248 goto ctrlerror; 249 /* Don't try to set modes if controller can't be adjusted */ 250 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0) 251 goto geometry; 252 /* Also don't try if the drive didn't report its mode */ 253 if ((drvp->drive_flags & DRIVE_MODE) == 0) 254 goto geometry; 255 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 256 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 257 errstring = "piomode"; 258 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 259 goto ctrltimeout; 260 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 261 goto ctrlerror; 262 if (drvp->drive_flags & DRIVE_UDMA) { 263 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 264 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 265 } else if (drvp->drive_flags & DRIVE_DMA) { 266 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 267 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 268 } else { 269 goto geometry; 270 } 271 errstring = "dmamode"; 272 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 273 goto ctrltimeout; 274 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 275 goto ctrlerror; 276 geometry: 277 if (ata_bio->flags & ATA_LBA) 278 goto multimode; 279 wdccommand(chp, xfer->c_drive, WDCC_IDP, 280 ata_bio->lp->d_ncylinders, 281 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 282 (ata_bio->lp->d_type == DTYPE_ST506) ? 283 ata_bio->lp->d_precompcyl / 4 : 0); 284 errstring = "geometry"; 285 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 286 goto ctrltimeout; 287 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 288 goto ctrlerror; 289 multimode: 290 if (ata_bio->multi == 1) 291 goto ready; 292 wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0, 293 ata_bio->multi, 0); 294 errstring = "setmulti"; 295 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 296 goto ctrltimeout; 297 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 298 goto ctrlerror; 299 ready: 300 drvp->state = READY; 301 /* 302 * The drive is usable now 303 */ 304 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 305 WDCTL_4BIT); 306 } 307 308 _wdc_ata_bio_start(chp, xfer); 309 return; 310 ctrltimeout: 311 printf("%s:%d:%d: %s timed out\n", 312 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 313 errstring); 314 ata_bio->error = TIMEOUT; 315 goto ctrldone; 316 ctrlerror: 317 printf("%s:%d:%d: %s ", 318 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 319 errstring); 320 if (chp->ch_status & WDCS_DWF) { 321 printf("drive fault\n"); 322 ata_bio->error = ERR_DF; 323 } else { 324 printf("error (%x)\n", chp->ch_error); 325 ata_bio->r_error = chp->ch_error; 326 ata_bio->error = ERROR; 327 } 328 ctrldone: 329 drvp->state = 0; 330 wdc_ata_bio_done(chp, xfer); 331 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 332 return; 333 } 334 335 static void 336 _wdc_ata_bio_start(struct wdc_channel *chp, struct ata_xfer *xfer) 337 { 338 struct wdc_softc *wdc = chp->ch_wdc; 339 struct ata_bio *ata_bio = xfer->c_cmd; 340 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 341 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 342 u_int16_t cyl; 343 u_int8_t head, sect, cmd = 0; 344 int nblks; 345 int dma_flags = 0; 346 347 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 348 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive), 349 DEBUG_INTR | DEBUG_XFERS); 350 351 if (xfer->c_flags & C_DMA) { 352 if (drvp->n_xfers <= NXFER) 353 drvp->n_xfers++; 354 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 355 if (ata_bio->flags & ATA_LBA48) 356 dma_flags |= WDC_DMA_LBA48; 357 } 358 again: 359 /* 360 * 361 * When starting a multi-sector transfer, or doing single-sector 362 * transfers... 363 */ 364 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 365 if (ata_bio->flags & ATA_SINGLE) 366 nblks = 1; 367 else 368 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 369 /* Check for bad sectors and adjust transfer, if necessary. */ 370 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 371 long blkdiff; 372 int i; 373 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 374 i++) { 375 blkdiff -= ata_bio->blkno; 376 if (blkdiff < 0) 377 continue; 378 if (blkdiff == 0) { 379 /* Replace current block of transfer. */ 380 ata_bio->blkno = 381 ata_bio->lp->d_secperunit - 382 ata_bio->lp->d_nsectors - i - 1; 383 } 384 if (blkdiff < nblks) { 385 /* Bad block inside transfer. */ 386 ata_bio->flags |= ATA_SINGLE; 387 nblks = 1; 388 } 389 break; 390 } 391 /* Transfer is okay now. */ 392 } 393 if (ata_bio->flags & ATA_LBA48) { 394 sect = 0; 395 cyl = 0; 396 head = 0; 397 } else if (ata_bio->flags & ATA_LBA) { 398 sect = (ata_bio->blkno >> 0) & 0xff; 399 cyl = (ata_bio->blkno >> 8) & 0xffff; 400 head = (ata_bio->blkno >> 24) & 0x0f; 401 head |= WDSD_LBA; 402 } else { 403 int blkno = ata_bio->blkno; 404 sect = blkno % ata_bio->lp->d_nsectors; 405 sect++; /* Sectors begin with 1, not 0. */ 406 blkno /= ata_bio->lp->d_nsectors; 407 head = blkno % ata_bio->lp->d_ntracks; 408 blkno /= ata_bio->lp->d_ntracks; 409 cyl = blkno; 410 head |= WDSD_CHS; 411 } 412 if (xfer->c_flags & C_DMA) { 413 ata_bio->nblks = nblks; 414 ata_bio->nbytes = xfer->c_bcount; 415 cmd = (ata_bio->flags & ATA_READ) ? 416 WDCC_READDMA : WDCC_WRITEDMA; 417 /* Init the DMA channel. */ 418 if ((*wdc->dma_init)(wdc->dma_arg, 419 chp->ch_channel, xfer->c_drive, 420 (char *)xfer->c_databuf + xfer->c_skip, 421 ata_bio->nbytes, dma_flags) != 0) { 422 ata_bio->error = ERR_DMA; 423 ata_bio->r_error = 0; 424 wdc_ata_bio_done(chp, xfer); 425 return; 426 } 427 /* Initiate command */ 428 if (wdc->cap & WDC_CAPABILITY_SELECT) 429 wdc->select(chp, xfer->c_drive); 430 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 431 0, WDSD_IBM | (xfer->c_drive << 4)); 432 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 433 case WDCWAIT_OK: 434 break; 435 case WDCWAIT_TOUT: 436 goto timeout; 437 case WDCWAIT_THR: 438 return; 439 } 440 if (ata_bio->flags & ATA_LBA48) { 441 wdccommandext(chp, xfer->c_drive, to48(cmd), 442 (u_int64_t)ata_bio->blkno, nblks); 443 } else { 444 wdccommand(chp, xfer->c_drive, cmd, cyl, 445 head, sect, nblks, 0); 446 } 447 /* start the DMA channel */ 448 (*wdc->dma_start)(wdc->dma_arg, 449 chp->ch_channel, xfer->c_drive); 450 chp->ch_flags |= WDCF_DMA_WAIT; 451 /* start timeout machinery */ 452 if ((xfer->c_flags & C_POLL) == 0) 453 callout_reset(&chp->ch_callout, 454 ATA_DELAY / 1000 * hz, wdctimeout, chp); 455 /* wait for irq */ 456 goto intr; 457 } /* else not DMA */ 458 ata_bio->nblks = min(nblks, ata_bio->multi); 459 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 460 if (ata_bio->nblks > 1 && (ata_bio->flags & ATA_SINGLE) == 0) { 461 cmd = (ata_bio->flags & ATA_READ) ? 462 WDCC_READMULTI : WDCC_WRITEMULTI; 463 } else { 464 cmd = (ata_bio->flags & ATA_READ) ? 465 WDCC_READ : WDCC_WRITE; 466 } 467 /* Initiate command! */ 468 if (wdc->cap & WDC_CAPABILITY_SELECT) 469 wdc->select(chp, xfer->c_drive); 470 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 471 WDSD_IBM | (xfer->c_drive << 4)); 472 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 473 case WDCWAIT_OK: 474 break; 475 case WDCWAIT_TOUT: 476 goto timeout; 477 case WDCWAIT_THR: 478 return; 479 } 480 if (ata_bio->flags & ATA_LBA48) { 481 wdccommandext(chp, xfer->c_drive, to48(cmd), 482 (u_int64_t) ata_bio->blkno, nblks); 483 } else { 484 wdccommand(chp, xfer->c_drive, cmd, cyl, 485 head, sect, nblks, 486 (ata_bio->lp->d_type == DTYPE_ST506) ? 487 ata_bio->lp->d_precompcyl / 4 : 0); 488 } 489 /* start timeout machinery */ 490 if ((xfer->c_flags & C_POLL) == 0) 491 callout_reset(&chp->ch_callout, 492 ATA_DELAY / 1000 * hz, wdctimeout, chp); 493 } else if (ata_bio->nblks > 1) { 494 /* The number of blocks in the last stretch may be smaller. */ 495 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 496 if (ata_bio->nblks > nblks) { 497 ata_bio->nblks = nblks; 498 ata_bio->nbytes = xfer->c_bcount; 499 } 500 } 501 /* If this was a write and not using DMA, push the data. */ 502 if ((ata_bio->flags & ATA_READ) == 0) { 503 /* 504 * we have to busy-wait here, we can't rely on running in 505 * thread context. 506 */ 507 if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 508 printf("%s:%d:%d: timeout waiting for DRQ, " 509 "st=0x%02x, err=0x%02x\n", 510 wdc->sc_dev.dv_xname, chp->ch_channel, 511 xfer->c_drive, chp->ch_status, chp->ch_error); 512 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 513 ata_bio->error = TIMEOUT; 514 wdc_ata_bio_done(chp, xfer); 515 return; 516 } 517 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 518 wdc_ata_bio_done(chp, xfer); 519 return; 520 } 521 if ((wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 522 if (drvp->drive_flags & DRIVE_CAP32) { 523 bus_space_write_multi_4(chp->data32iot, 524 chp->data32ioh, 0, 525 (u_int32_t *)((char *)xfer->c_databuf + 526 xfer->c_skip), 527 ata_bio->nbytes >> 2); 528 } else { 529 bus_space_write_multi_2(chp->cmd_iot, 530 chp->cmd_iohs[wd_data], 0, 531 (u_int16_t *)((char *)xfer->c_databuf + 532 xfer->c_skip), 533 ata_bio->nbytes >> 1); 534 } 535 } else { 536 if (drvp->drive_flags & DRIVE_CAP32) { 537 bus_space_write_multi_stream_4(chp->data32iot, 538 chp->data32ioh, 0, 539 (u_int32_t *)((char *)xfer->c_databuf + 540 xfer->c_skip), 541 ata_bio->nbytes >> 2); 542 } else { 543 bus_space_write_multi_stream_2(chp->cmd_iot, 544 chp->cmd_iohs[wd_data], 0, 545 (u_int16_t *)((char *)xfer->c_databuf + 546 xfer->c_skip), 547 ata_bio->nbytes >> 1); 548 } 549 } 550 } 551 552 intr: /* Wait for IRQ (either real or polled) */ 553 if ((ata_bio->flags & ATA_POLL) == 0) { 554 chp->ch_flags |= WDCF_IRQ_WAIT; 555 } else { 556 /* Wait for at last 400ns for status bit to be valid */ 557 delay(1); 558 if (chp->ch_flags & WDCF_DMA_WAIT) { 559 wdc_dmawait(chp, xfer, ATA_DELAY); 560 chp->ch_flags &= ~WDCF_DMA_WAIT; 561 } 562 wdc_ata_bio_intr(chp, xfer, 0); 563 if ((ata_bio->flags & ATA_ITSDONE) == 0) 564 goto again; 565 } 566 return; 567 timeout: 568 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 569 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 570 chp->ch_status, chp->ch_error); 571 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 572 ata_bio->error = TIMEOUT; 573 wdc_ata_bio_done(chp, xfer); 574 return; 575 } 576 577 static int 578 wdc_ata_bio_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq) 579 { 580 struct wdc_softc *wdc = chp->ch_wdc; 581 struct ata_bio *ata_bio = xfer->c_cmd; 582 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 583 int drv_err; 584 585 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 586 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive), 587 DEBUG_INTR | DEBUG_XFERS); 588 589 590 /* Is it not a transfer, but a control operation? */ 591 if (drvp->state < READY) { 592 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 593 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 594 drvp->state); 595 panic("wdc_ata_bio_intr: bad state"); 596 } 597 598 /* 599 * if we missed an interrupt in a PIO transfer, reset and restart. 600 * Don't try to continue transfer, we may have missed cycles. 601 */ 602 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 603 ata_bio->error = TIMEOUT; 604 wdc_ata_bio_done(chp, xfer); 605 return 1; 606 } 607 608 /* Ack interrupt done by wdc_wait_for_unbusy */ 609 if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 610 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 611 return 0; /* IRQ was not for us */ 612 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 613 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 614 xfer->c_bcount, xfer->c_skip); 615 /* if we were using DMA, flag a DMA error */ 616 if (xfer->c_flags & C_DMA) { 617 ata_dmaerr(drvp, 618 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 619 } 620 ata_bio->error = TIMEOUT; 621 wdc_ata_bio_done(chp, xfer); 622 return 1; 623 } 624 if (wdc->cap & WDC_CAPABILITY_IRQACK) 625 wdc->irqack(chp); 626 627 drv_err = wdc_ata_err(drvp, ata_bio); 628 629 /* If we were using DMA, Turn off the DMA channel and check for error */ 630 if (xfer->c_flags & C_DMA) { 631 if (ata_bio->flags & ATA_POLL) { 632 /* 633 * IDE drives deassert WDCS_BSY before transfer is 634 * complete when using DMA. Polling for DRQ to deassert 635 * is not enough DRQ is not required to be 636 * asserted for DMA transfers, so poll for DRDY. 637 */ 638 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 639 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 640 printf("%s:%d:%d: polled transfer timed out " 641 "(st=0x%x)\n", wdc->sc_dev.dv_xname, 642 chp->ch_channel, xfer->c_drive, 643 chp->ch_status); 644 ata_bio->error = TIMEOUT; 645 drv_err = WDC_ATA_ERR; 646 } 647 } 648 if (wdc->dma_status != 0) { 649 if (drv_err != WDC_ATA_ERR) { 650 ata_bio->error = ERR_DMA; 651 drv_err = WDC_ATA_ERR; 652 } 653 } 654 if (chp->ch_status & WDCS_DRQ) { 655 if (drv_err != WDC_ATA_ERR) { 656 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 657 wdc->sc_dev.dv_xname, chp->ch_channel, 658 xfer->c_drive, chp->ch_status); 659 ata_bio->error = TIMEOUT; 660 drv_err = WDC_ATA_ERR; 661 } 662 } 663 if (drv_err != WDC_ATA_ERR) 664 goto end; 665 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 666 } 667 668 /* if we had an error, end */ 669 if (drv_err == WDC_ATA_ERR) { 670 wdc_ata_bio_done(chp, xfer); 671 return 1; 672 } 673 674 /* If this was a read and not using DMA, fetch the data. */ 675 if ((ata_bio->flags & ATA_READ) != 0) { 676 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 677 printf("%s:%d:%d: read intr before drq\n", 678 wdc->sc_dev.dv_xname, chp->ch_channel, 679 xfer->c_drive); 680 ata_bio->error = TIMEOUT; 681 wdc_ata_bio_done(chp, xfer); 682 return 1; 683 } 684 if ((wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)) { 685 if (drvp->drive_flags & DRIVE_CAP32) { 686 bus_space_read_multi_4(chp->data32iot, 687 chp->data32ioh, 0, 688 (u_int32_t *)((char *)xfer->c_databuf + 689 xfer->c_skip), 690 ata_bio->nbytes >> 2); 691 } else { 692 bus_space_read_multi_2(chp->cmd_iot, 693 chp->cmd_iohs[wd_data], 0, 694 (u_int16_t *)((char *)xfer->c_databuf + 695 xfer->c_skip), 696 ata_bio->nbytes >> 1); 697 } 698 } else { 699 if (drvp->drive_flags & DRIVE_CAP32) { 700 bus_space_read_multi_stream_4(chp->data32iot, 701 chp->data32ioh, 0, 702 (u_int32_t *)((char *)xfer->c_databuf + 703 xfer->c_skip), 704 ata_bio->nbytes >> 2); 705 } else { 706 bus_space_read_multi_stream_2(chp->cmd_iot, 707 chp->cmd_iohs[wd_data], 0, 708 (u_int16_t *)((char *)xfer->c_databuf + 709 xfer->c_skip), 710 ata_bio->nbytes >> 1); 711 } 712 } 713 } 714 715 end: 716 ata_bio->blkno += ata_bio->nblks; 717 ata_bio->blkdone += ata_bio->nblks; 718 xfer->c_skip += ata_bio->nbytes; 719 xfer->c_bcount -= ata_bio->nbytes; 720 /* See if this transfer is complete. */ 721 if (xfer->c_bcount > 0) { 722 if ((ata_bio->flags & ATA_POLL) == 0) { 723 /* Start the next operation */ 724 _wdc_ata_bio_start(chp, xfer); 725 } else { 726 /* Let _wdc_ata_bio_start do the loop */ 727 return 1; 728 } 729 } else { /* Done with this transfer */ 730 ata_bio->error = NOERROR; 731 wdc_ata_bio_done(chp, xfer); 732 } 733 return 1; 734 } 735 736 static void 737 wdc_ata_kill_pending(struct ata_drive_datas *drvp) 738 { 739 struct wdc_channel *chp = drvp->chnl_softc; 740 741 wdc_kill_pending(chp); 742 } 743 744 static void 745 wdc_ata_bio_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 746 { 747 struct ata_bio *ata_bio = xfer->c_cmd; 748 int drive = xfer->c_drive; 749 750 callout_stop(&chp->ch_callout); 751 /* remove this command from xfer queue */ 752 wdc_free_xfer(chp, xfer); 753 754 ata_bio->flags |= ATA_ITSDONE; 755 ata_bio->error = ERR_NODEV; 756 ata_bio->r_error = WDCE_ABRT; 757 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 758 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 759 } 760 761 static void 762 wdc_ata_bio_done(struct wdc_channel *chp, struct ata_xfer *xfer) 763 { 764 struct wdc_softc *wdc = chp->ch_wdc; 765 struct ata_bio *ata_bio = xfer->c_cmd; 766 int drive = xfer->c_drive; 767 768 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 769 wdc->sc_dev.dv_xname, chp->ch_channel, xfer->c_drive, 770 (u_int)xfer->c_flags), 771 DEBUG_XFERS); 772 773 callout_stop(&chp->ch_callout); 774 775 /* feed back residual bcount to our caller */ 776 ata_bio->bcount = xfer->c_bcount; 777 778 /* remove this command from xfer queue */ 779 wdc_free_xfer(chp, xfer); 780 781 ata_bio->flags |= ATA_ITSDONE; 782 WDCDEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 783 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 784 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 785 chp->ch_flags), DEBUG_XFERS); 786 wdcstart(chp); 787 } 788 789 static int 790 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 791 { 792 struct wdc_channel *chp = drvp->chnl_softc; 793 ata_bio->error = 0; 794 if (chp->ch_status & WDCS_BSY) { 795 ata_bio->error = TIMEOUT; 796 return WDC_ATA_ERR; 797 } 798 799 if (chp->ch_status & WDCS_DWF) { 800 ata_bio->error = ERR_DF; 801 return WDC_ATA_ERR; 802 } 803 804 if (chp->ch_status & WDCS_ERR) { 805 ata_bio->error = ERROR; 806 ata_bio->r_error = chp->ch_error; 807 if (drvp->drive_flags & DRIVE_UDMA && 808 (ata_bio->r_error & WDCE_CRC)) { 809 /* 810 * Record the CRC error, to avoid downgrading to 811 * multiword DMA 812 */ 813 drvp->drive_flags |= DRIVE_DMAERR; 814 } 815 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 816 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 817 return WDC_ATA_ERR; 818 return WDC_ATA_NOERR; 819 } 820 821 if (chp->ch_status & WDCS_CORR) 822 ata_bio->flags |= ATA_CORR; 823 return WDC_ATA_NOERR; 824 } 825 826 static int 827 wdc_ata_addref(struct ata_drive_datas *drvp) 828 { 829 struct wdc_channel *chp = drvp->chnl_softc; 830 831 return (wdc_addref(chp)); 832 } 833 834 static void 835 wdc_ata_delref(struct ata_drive_datas *drvp) 836 { 837 struct wdc_channel *chp = drvp->chnl_softc; 838 839 wdc_delref(chp); 840 } 841
Indexes created Tue Sep 30 10:09:55 GMT 2025