ata_wdc.c revision 1.73
1 /* $NetBSD: ata_wdc.c,v 1.73 2004/08/20 06:39:38 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.73 2004/08/20 06:39:38 thorpej Exp $"); 70 71 #ifndef ATADEBUG 72 #define ATADEBUG 73 #endif /* ATADEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef ATADEBUG 107 extern int wdcdebug_wd_mask; /* inited in wd.c */ 108 #define ATADEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define ATADEBUG_PRINT(args, level) 113 #endif 114 115 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 116 117 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 118 static void wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *); 119 static void _wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *); 120 static int wdc_ata_bio_intr(struct ata_channel *, struct ata_xfer *, 121 int); 122 static void wdc_ata_bio_kill_xfer(struct ata_channel *, 123 struct ata_xfer *, int); 124 static void wdc_ata_bio_done(struct ata_channel *, struct ata_xfer *); 125 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 128 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 129 static int wdc_ata_addref(struct ata_drive_datas *); 130 static void wdc_ata_delref(struct ata_drive_datas *); 131 132 const struct ata_bustype wdc_ata_bustype = { 133 SCSIPI_BUSTYPE_ATA, 134 wdc_ata_bio, 135 wdc_reset_drive, 136 wdc_exec_command, 137 ata_get_params, 138 wdc_ata_addref, 139 wdc_ata_delref, 140 ata_kill_pending, 141 }; 142 143 /* 144 * Convert a 32 bit command to a 48 bit command. 145 */ 146 static __inline 147 int to48(int cmd32) 148 { 149 switch (cmd32) { 150 case WDCC_READ: 151 return WDCC_READ_EXT; 152 case WDCC_WRITE: 153 return WDCC_WRITE_EXT; 154 case WDCC_READMULTI: 155 return WDCC_READMULTI_EXT; 156 case WDCC_WRITEMULTI: 157 return WDCC_WRITEMULTI_EXT; 158 case WDCC_READDMA: 159 return WDCC_READDMA_EXT; 160 case WDCC_WRITEDMA: 161 return WDCC_WRITEDMA_EXT; 162 default: 163 panic("ata_wdc: illegal 32 bit command %d", cmd32); 164 /*NOTREACHED*/ 165 } 166 } 167 168 /* 169 * Handle block I/O operation. Return ATACMD_COMPLETE, ATACMD_QUEUED, or 170 * ATACMD_TRY_AGAIN. Must be called at splbio(). 171 */ 172 static int 173 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 174 { 175 struct ata_xfer *xfer; 176 struct ata_channel *chp = drvp->chnl_softc; 177 struct atac_softc *atac = chp->ch_atac; 178 179 xfer = ata_get_xfer(ATAXF_NOSLEEP); 180 if (xfer == NULL) 181 return ATACMD_TRY_AGAIN; 182 if (atac->atac_cap & ATAC_CAP_NOIRQ) 183 ata_bio->flags |= ATA_POLL; 184 if (ata_bio->flags & ATA_POLL) 185 xfer->c_flags |= C_POLL; 186 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 187 (ata_bio->flags & ATA_SINGLE) == 0) 188 xfer->c_flags |= C_DMA; 189 xfer->c_drive = drvp->drive; 190 xfer->c_cmd = ata_bio; 191 xfer->c_databuf = ata_bio->databuf; 192 xfer->c_bcount = ata_bio->bcount; 193 xfer->c_start = wdc_ata_bio_start; 194 xfer->c_intr = wdc_ata_bio_intr; 195 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 196 ata_exec_xfer(chp, xfer); 197 return (ata_bio->flags & ATA_ITSDONE) ? ATACMD_COMPLETE : ATACMD_QUEUED; 198 } 199 200 static void 201 wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 202 { 203 struct atac_softc *atac = chp->ch_atac; 204 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 205 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 206 struct ata_bio *ata_bio = xfer->c_cmd; 207 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 208 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 209 char *errstring; 210 211 ATADEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 212 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 213 DEBUG_XFERS); 214 215 /* Do control operations specially. */ 216 if (__predict_false(drvp->state < READY)) { 217 /* 218 * Actually, we want to be careful not to mess with the control 219 * state if the device is currently busy, but we can assume 220 * that we never get to this point if that's the case. 221 */ 222 /* If it's not a polled command, we need the kenrel thread */ 223 if ((xfer->c_flags & C_POLL) == 0 && 224 (chp->ch_flags & ATACH_TH_RUN) == 0) { 225 chp->ch_queue->queue_freeze++; 226 wakeup(&chp->ch_thread); 227 return; 228 } 229 /* 230 * disable interrupts, all commands here should be quick 231 * enouth to be able to poll, and we don't go here that often 232 */ 233 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 234 WDCTL_4BIT | WDCTL_IDS); 235 if (wdc->select) 236 wdc->select(chp, xfer->c_drive); 237 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 238 WDSD_IBM | (xfer->c_drive << 4)); 239 DELAY(10); 240 errstring = "wait"; 241 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 242 goto ctrltimeout; 243 wdccommandshort(chp, xfer->c_drive, WDCC_RECAL); 244 /* Wait for at last 400ns for status bit to be valid */ 245 DELAY(1); 246 errstring = "recal"; 247 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 248 goto ctrltimeout; 249 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 250 goto ctrlerror; 251 /* Don't try to set modes if controller can't be adjusted */ 252 if (atac->atac_set_modes == NULL) 253 goto geometry; 254 /* Also don't try if the drive didn't report its mode */ 255 if ((drvp->drive_flags & DRIVE_MODE) == 0) 256 goto geometry; 257 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 258 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 259 errstring = "piomode"; 260 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 261 goto ctrltimeout; 262 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 263 goto ctrlerror; 264 if (drvp->drive_flags & DRIVE_UDMA) { 265 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 266 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 267 } else if (drvp->drive_flags & DRIVE_DMA) { 268 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 269 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 270 } else { 271 goto geometry; 272 } 273 errstring = "dmamode"; 274 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 275 goto ctrltimeout; 276 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 277 goto ctrlerror; 278 geometry: 279 if (ata_bio->flags & ATA_LBA) 280 goto multimode; 281 wdccommand(chp, xfer->c_drive, WDCC_IDP, 282 ata_bio->lp->d_ncylinders, 283 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 284 (ata_bio->lp->d_type == DTYPE_ST506) ? 285 ata_bio->lp->d_precompcyl / 4 : 0); 286 errstring = "geometry"; 287 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 288 goto ctrltimeout; 289 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 290 goto ctrlerror; 291 multimode: 292 if (ata_bio->multi == 1) 293 goto ready; 294 wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0, 295 ata_bio->multi, 0); 296 errstring = "setmulti"; 297 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 298 goto ctrltimeout; 299 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 300 goto ctrlerror; 301 ready: 302 drvp->state = READY; 303 /* 304 * The drive is usable now 305 */ 306 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 307 WDCTL_4BIT); 308 delay(10); /* some drives need a little delay here */ 309 } 310 311 _wdc_ata_bio_start(chp, xfer); 312 return; 313 ctrltimeout: 314 printf("%s:%d:%d: %s timed out\n", 315 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 316 errstring); 317 ata_bio->error = TIMEOUT; 318 goto ctrldone; 319 ctrlerror: 320 printf("%s:%d:%d: %s ", 321 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 322 errstring); 323 if (chp->ch_status & WDCS_DWF) { 324 printf("drive fault\n"); 325 ata_bio->error = ERR_DF; 326 } else { 327 printf("error (%x)\n", chp->ch_error); 328 ata_bio->r_error = chp->ch_error; 329 ata_bio->error = ERROR; 330 } 331 ctrldone: 332 drvp->state = 0; 333 wdc_ata_bio_done(chp, xfer); 334 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 335 return; 336 } 337 338 static void 339 _wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 340 { 341 struct atac_softc *atac = chp->ch_atac; 342 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 343 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 344 struct ata_bio *ata_bio = xfer->c_cmd; 345 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 346 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 347 u_int16_t cyl; 348 u_int8_t head, sect, cmd = 0; 349 int nblks; 350 int dma_flags = 0; 351 352 ATADEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 353 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 354 DEBUG_INTR | DEBUG_XFERS); 355 356 if (xfer->c_flags & C_DMA) { 357 if (drvp->n_xfers <= NXFER) 358 drvp->n_xfers++; 359 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 360 if (ata_bio->flags & ATA_LBA48) 361 dma_flags |= WDC_DMA_LBA48; 362 } 363 again: 364 /* 365 * 366 * When starting a multi-sector transfer, or doing single-sector 367 * transfers... 368 */ 369 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 370 if (ata_bio->flags & ATA_SINGLE) 371 nblks = 1; 372 else 373 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 374 /* Check for bad sectors and adjust transfer, if necessary. */ 375 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 376 long blkdiff; 377 int i; 378 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 379 i++) { 380 blkdiff -= ata_bio->blkno; 381 if (blkdiff < 0) 382 continue; 383 if (blkdiff == 0) { 384 /* Replace current block of transfer. */ 385 ata_bio->blkno = 386 ata_bio->lp->d_secperunit - 387 ata_bio->lp->d_nsectors - i - 1; 388 } 389 if (blkdiff < nblks) { 390 /* Bad block inside transfer. */ 391 ata_bio->flags |= ATA_SINGLE; 392 nblks = 1; 393 } 394 break; 395 } 396 /* Transfer is okay now. */ 397 } 398 if (ata_bio->flags & ATA_LBA48) { 399 sect = 0; 400 cyl = 0; 401 head = 0; 402 } else if (ata_bio->flags & ATA_LBA) { 403 sect = (ata_bio->blkno >> 0) & 0xff; 404 cyl = (ata_bio->blkno >> 8) & 0xffff; 405 head = (ata_bio->blkno >> 24) & 0x0f; 406 head |= WDSD_LBA; 407 } else { 408 int blkno = ata_bio->blkno; 409 sect = blkno % ata_bio->lp->d_nsectors; 410 sect++; /* Sectors begin with 1, not 0. */ 411 blkno /= ata_bio->lp->d_nsectors; 412 head = blkno % ata_bio->lp->d_ntracks; 413 blkno /= ata_bio->lp->d_ntracks; 414 cyl = blkno; 415 head |= WDSD_CHS; 416 } 417 if (xfer->c_flags & C_DMA) { 418 ata_bio->nblks = nblks; 419 ata_bio->nbytes = xfer->c_bcount; 420 cmd = (ata_bio->flags & ATA_READ) ? 421 WDCC_READDMA : WDCC_WRITEDMA; 422 /* Init the DMA channel. */ 423 if ((*wdc->dma_init)(wdc->dma_arg, 424 chp->ch_channel, xfer->c_drive, 425 (char *)xfer->c_databuf + xfer->c_skip, 426 ata_bio->nbytes, dma_flags) != 0) { 427 ata_bio->error = ERR_DMA; 428 ata_bio->r_error = 0; 429 wdc_ata_bio_done(chp, xfer); 430 return; 431 } 432 /* Initiate command */ 433 if (wdc->select) 434 wdc->select(chp, xfer->c_drive); 435 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 436 0, WDSD_IBM | (xfer->c_drive << 4)); 437 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 438 case WDCWAIT_OK: 439 break; 440 case WDCWAIT_TOUT: 441 goto timeout; 442 case WDCWAIT_THR: 443 return; 444 } 445 if (ata_bio->flags & ATA_LBA48) { 446 wdccommandext(chp, xfer->c_drive, to48(cmd), 447 (u_int64_t)ata_bio->blkno, nblks); 448 } else { 449 wdccommand(chp, xfer->c_drive, cmd, cyl, 450 head, sect, nblks, 0); 451 } 452 /* start the DMA channel */ 453 (*wdc->dma_start)(wdc->dma_arg, 454 chp->ch_channel, xfer->c_drive); 455 chp->ch_flags |= ATACH_DMA_WAIT; 456 /* start timeout machinery */ 457 if ((xfer->c_flags & C_POLL) == 0) 458 callout_reset(&chp->ch_callout, 459 ATA_DELAY / 1000 * hz, wdctimeout, chp); 460 /* wait for irq */ 461 goto intr; 462 } /* else not DMA */ 463 ata_bio->nblks = min(nblks, ata_bio->multi); 464 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 465 KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0); 466 if (ata_bio->nblks > 1) { 467 cmd = (ata_bio->flags & ATA_READ) ? 468 WDCC_READMULTI : WDCC_WRITEMULTI; 469 } else { 470 cmd = (ata_bio->flags & ATA_READ) ? 471 WDCC_READ : WDCC_WRITE; 472 } 473 /* Initiate command! */ 474 if (wdc->select) 475 wdc->select(chp, xfer->c_drive); 476 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 477 WDSD_IBM | (xfer->c_drive << 4)); 478 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 479 case WDCWAIT_OK: 480 break; 481 case WDCWAIT_TOUT: 482 goto timeout; 483 case WDCWAIT_THR: 484 return; 485 } 486 if (ata_bio->flags & ATA_LBA48) { 487 wdccommandext(chp, xfer->c_drive, to48(cmd), 488 (u_int64_t) ata_bio->blkno, nblks); 489 } else { 490 wdccommand(chp, xfer->c_drive, cmd, cyl, 491 head, sect, nblks, 492 (ata_bio->lp->d_type == DTYPE_ST506) ? 493 ata_bio->lp->d_precompcyl / 4 : 0); 494 } 495 /* start timeout machinery */ 496 if ((xfer->c_flags & C_POLL) == 0) 497 callout_reset(&chp->ch_callout, 498 ATA_DELAY / 1000 * hz, wdctimeout, chp); 499 } else if (ata_bio->nblks > 1) { 500 /* The number of blocks in the last stretch may be smaller. */ 501 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 502 if (ata_bio->nblks > nblks) { 503 ata_bio->nblks = nblks; 504 ata_bio->nbytes = xfer->c_bcount; 505 } 506 } 507 /* If this was a write and not using DMA, push the data. */ 508 if ((ata_bio->flags & ATA_READ) == 0) { 509 /* 510 * we have to busy-wait here, we can't rely on running in 511 * thread context. 512 */ 513 if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 514 printf("%s:%d:%d: timeout waiting for DRQ, " 515 "st=0x%02x, err=0x%02x\n", 516 atac->atac_dev.dv_xname, chp->ch_channel, 517 xfer->c_drive, chp->ch_status, chp->ch_error); 518 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 519 ata_bio->error = TIMEOUT; 520 wdc_ata_bio_done(chp, xfer); 521 return; 522 } 523 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 524 wdc_ata_bio_done(chp, xfer); 525 return; 526 } 527 wdc->dataout_pio(chp, drvp->drive_flags, 528 (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes); 529 } 530 531 intr: /* Wait for IRQ (either real or polled) */ 532 if ((ata_bio->flags & ATA_POLL) == 0) { 533 chp->ch_flags |= ATACH_IRQ_WAIT; 534 } else { 535 /* Wait for at last 400ns for status bit to be valid */ 536 delay(1); 537 if (chp->ch_flags & ATACH_DMA_WAIT) { 538 wdc_dmawait(chp, xfer, ATA_DELAY); 539 chp->ch_flags &= ~ATACH_DMA_WAIT; 540 } 541 wdc_ata_bio_intr(chp, xfer, 0); 542 if ((ata_bio->flags & ATA_ITSDONE) == 0) 543 goto again; 544 } 545 return; 546 timeout: 547 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 548 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 549 chp->ch_status, chp->ch_error); 550 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 551 ata_bio->error = TIMEOUT; 552 wdc_ata_bio_done(chp, xfer); 553 return; 554 } 555 556 static int 557 wdc_ata_bio_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 558 { 559 struct atac_softc *atac = chp->ch_atac; 560 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 561 struct ata_bio *ata_bio = xfer->c_cmd; 562 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 563 int drv_err; 564 565 ATADEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 566 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 567 DEBUG_INTR | DEBUG_XFERS); 568 569 570 /* Is it not a transfer, but a control operation? */ 571 if (drvp->state < READY) { 572 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 573 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 574 drvp->state); 575 panic("wdc_ata_bio_intr: bad state"); 576 } 577 578 /* 579 * if we missed an interrupt in a PIO transfer, reset and restart. 580 * Don't try to continue transfer, we may have missed cycles. 581 */ 582 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 583 ata_bio->error = TIMEOUT; 584 wdc_ata_bio_done(chp, xfer); 585 return 1; 586 } 587 588 /* Ack interrupt done by wdc_wait_for_unbusy */ 589 if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 590 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 591 return 0; /* IRQ was not for us */ 592 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 593 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 594 xfer->c_bcount, xfer->c_skip); 595 ata_bio->error = TIMEOUT; 596 wdc_ata_bio_done(chp, xfer); 597 return 1; 598 } 599 if (wdc->irqack) 600 wdc->irqack(chp); 601 602 drv_err = wdc_ata_err(drvp, ata_bio); 603 604 /* If we were using DMA, Turn off the DMA channel and check for error */ 605 if (xfer->c_flags & C_DMA) { 606 if (ata_bio->flags & ATA_POLL) { 607 /* 608 * IDE drives deassert WDCS_BSY before transfer is 609 * complete when using DMA. Polling for DRQ to deassert 610 * is not enough DRQ is not required to be 611 * asserted for DMA transfers, so poll for DRDY. 612 */ 613 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 614 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 615 printf("%s:%d:%d: polled transfer timed out " 616 "(st=0x%x)\n", atac->atac_dev.dv_xname, 617 chp->ch_channel, xfer->c_drive, 618 chp->ch_status); 619 ata_bio->error = TIMEOUT; 620 drv_err = WDC_ATA_ERR; 621 } 622 } 623 if (wdc->dma_status != 0) { 624 if (drv_err != WDC_ATA_ERR) { 625 ata_bio->error = ERR_DMA; 626 drv_err = WDC_ATA_ERR; 627 } 628 } 629 if (chp->ch_status & WDCS_DRQ) { 630 if (drv_err != WDC_ATA_ERR) { 631 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 632 atac->atac_dev.dv_xname, chp->ch_channel, 633 xfer->c_drive, chp->ch_status); 634 ata_bio->error = TIMEOUT; 635 drv_err = WDC_ATA_ERR; 636 } 637 } 638 if (ata_bio->r_error & WDCE_CRC) 639 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 640 if (drv_err != WDC_ATA_ERR) 641 goto end; 642 } 643 644 /* if we had an error, end */ 645 if (drv_err == WDC_ATA_ERR) { 646 wdc_ata_bio_done(chp, xfer); 647 return 1; 648 } 649 650 /* If this was a read and not using DMA, fetch the data. */ 651 if ((ata_bio->flags & ATA_READ) != 0) { 652 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 653 printf("%s:%d:%d: read intr before drq\n", 654 atac->atac_dev.dv_xname, chp->ch_channel, 655 xfer->c_drive); 656 ata_bio->error = TIMEOUT; 657 wdc_ata_bio_done(chp, xfer); 658 return 1; 659 } 660 wdc->datain_pio(chp, drvp->drive_flags, 661 (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes); 662 } 663 664 end: 665 ata_bio->blkno += ata_bio->nblks; 666 ata_bio->blkdone += ata_bio->nblks; 667 xfer->c_skip += ata_bio->nbytes; 668 xfer->c_bcount -= ata_bio->nbytes; 669 /* See if this transfer is complete. */ 670 if (xfer->c_bcount > 0) { 671 if ((ata_bio->flags & ATA_POLL) == 0) { 672 /* Start the next operation */ 673 _wdc_ata_bio_start(chp, xfer); 674 } else { 675 /* Let _wdc_ata_bio_start do the loop */ 676 return 1; 677 } 678 } else { /* Done with this transfer */ 679 ata_bio->error = NOERROR; 680 wdc_ata_bio_done(chp, xfer); 681 } 682 return 1; 683 } 684 685 static void 686 wdc_ata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 687 int reason) 688 { 689 struct ata_bio *ata_bio = xfer->c_cmd; 690 int drive = xfer->c_drive; 691 692 ata_free_xfer(chp, xfer); 693 694 ata_bio->flags |= ATA_ITSDONE; 695 switch (reason) { 696 case KILL_GONE: 697 ata_bio->error = ERR_NODEV; 698 break; 699 case KILL_RESET: 700 ata_bio->error = ERR_RESET; 701 break; 702 default: 703 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 704 reason); 705 panic("wdc_ata_bio_kill_xfer"); 706 } 707 ata_bio->r_error = WDCE_ABRT; 708 ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 709 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 710 } 711 712 static void 713 wdc_ata_bio_done(struct ata_channel *chp, struct ata_xfer *xfer) 714 { 715 struct atac_softc *atac = chp->ch_atac; 716 struct ata_bio *ata_bio = xfer->c_cmd; 717 int drive = xfer->c_drive; 718 719 ATADEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 720 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 721 (u_int)xfer->c_flags), 722 DEBUG_XFERS); 723 724 callout_stop(&chp->ch_callout); 725 726 /* feed back residual bcount to our caller */ 727 ata_bio->bcount = xfer->c_bcount; 728 729 /* mark controller inactive and free xfer */ 730 chp->ch_queue->active_xfer = NULL; 731 ata_free_xfer(chp, xfer); 732 733 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 734 ata_bio->error = ERR_NODEV; 735 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 736 wakeup(&chp->ch_queue->active_xfer); 737 } 738 ata_bio->flags |= ATA_ITSDONE; 739 ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 740 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 741 ATADEBUG_PRINT(("atastart from wdc_ata_done, flags 0x%x\n", 742 chp->ch_flags), DEBUG_XFERS); 743 atastart(chp); 744 } 745 746 static int 747 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 748 { 749 struct ata_channel *chp = drvp->chnl_softc; 750 ata_bio->error = 0; 751 if (chp->ch_status & WDCS_BSY) { 752 ata_bio->error = TIMEOUT; 753 return WDC_ATA_ERR; 754 } 755 756 if (chp->ch_status & WDCS_DWF) { 757 ata_bio->error = ERR_DF; 758 return WDC_ATA_ERR; 759 } 760 761 if (chp->ch_status & WDCS_ERR) { 762 ata_bio->error = ERROR; 763 ata_bio->r_error = chp->ch_error; 764 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 765 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 766 return WDC_ATA_ERR; 767 return WDC_ATA_NOERR; 768 } 769 770 if (chp->ch_status & WDCS_CORR) 771 ata_bio->flags |= ATA_CORR; 772 return WDC_ATA_NOERR; 773 } 774 775 static int 776 wdc_ata_addref(struct ata_drive_datas *drvp) 777 { 778 struct ata_channel *chp = drvp->chnl_softc; 779 780 return (ata_addref(chp)); 781 } 782 783 static void 784 wdc_ata_delref(struct ata_drive_datas *drvp) 785 { 786 struct ata_channel *chp = drvp->chnl_softc; 787 788 ata_delref(chp); 789 } 790
Indexes created Mon Sep 29 21:09:56 GMT 2025