ata_wdc.c revision 1.74
1 /* $NetBSD: ata_wdc.c,v 1.74 2004/08/20 23:26:53 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.74 2004/08/20 23:26:53 thorpej Exp $"); 70 71 #ifndef ATADEBUG 72 #define ATADEBUG 73 #endif /* ATADEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/malloc.h> 82 #include <sys/device.h> 83 #include <sys/disklabel.h> 84 #include <sys/syslog.h> 85 #include <sys/proc.h> 86 87 #include <machine/intr.h> 88 #include <machine/bus.h> 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 91 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 95 96 #include <dev/ata/atareg.h> 97 #include <dev/ata/atavar.h> 98 #include <dev/ic/wdcreg.h> 99 #include <dev/ic/wdcvar.h> 100 101 #define DEBUG_INTR 0x01 102 #define DEBUG_XFERS 0x02 103 #define DEBUG_STATUS 0x04 104 #define DEBUG_FUNCS 0x08 105 #define DEBUG_PROBE 0x10 106 #ifdef ATADEBUG 107 extern int wdcdebug_wd_mask; /* inited in wd.c */ 108 #define ATADEBUG_PRINT(args, level) \ 109 if (wdcdebug_wd_mask & (level)) \ 110 printf args 111 #else 112 #define ATADEBUG_PRINT(args, level) 113 #endif 114 115 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 116 117 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 118 static void wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *); 119 static void _wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *); 120 static int wdc_ata_bio_intr(struct ata_channel *, struct ata_xfer *, 121 int); 122 static void wdc_ata_bio_kill_xfer(struct ata_channel *, 123 struct ata_xfer *, int); 124 static void wdc_ata_bio_done(struct ata_channel *, struct ata_xfer *); 125 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 128 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 129 static int wdc_ata_addref(struct ata_drive_datas *); 130 static void wdc_ata_delref(struct ata_drive_datas *); 131 132 const struct ata_bustype wdc_ata_bustype = { 133 SCSIPI_BUSTYPE_ATA, 134 wdc_ata_bio, 135 wdc_reset_drive, 136 wdc_reset_channel, 137 wdc_exec_command, 138 ata_get_params, 139 wdc_ata_addref, 140 wdc_ata_delref, 141 ata_kill_pending, 142 }; 143 144 /* 145 * Convert a 32 bit command to a 48 bit command. 146 */ 147 static __inline 148 int to48(int cmd32) 149 { 150 switch (cmd32) { 151 case WDCC_READ: 152 return WDCC_READ_EXT; 153 case WDCC_WRITE: 154 return WDCC_WRITE_EXT; 155 case WDCC_READMULTI: 156 return WDCC_READMULTI_EXT; 157 case WDCC_WRITEMULTI: 158 return WDCC_WRITEMULTI_EXT; 159 case WDCC_READDMA: 160 return WDCC_READDMA_EXT; 161 case WDCC_WRITEDMA: 162 return WDCC_WRITEDMA_EXT; 163 default: 164 panic("ata_wdc: illegal 32 bit command %d", cmd32); 165 /*NOTREACHED*/ 166 } 167 } 168 169 /* 170 * Handle block I/O operation. Return ATACMD_COMPLETE, ATACMD_QUEUED, or 171 * ATACMD_TRY_AGAIN. Must be called at splbio(). 172 */ 173 static int 174 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 175 { 176 struct ata_xfer *xfer; 177 struct ata_channel *chp = drvp->chnl_softc; 178 struct atac_softc *atac = chp->ch_atac; 179 180 xfer = ata_get_xfer(ATAXF_NOSLEEP); 181 if (xfer == NULL) 182 return ATACMD_TRY_AGAIN; 183 if (atac->atac_cap & ATAC_CAP_NOIRQ) 184 ata_bio->flags |= ATA_POLL; 185 if (ata_bio->flags & ATA_POLL) 186 xfer->c_flags |= C_POLL; 187 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 188 (ata_bio->flags & ATA_SINGLE) == 0) 189 xfer->c_flags |= C_DMA; 190 xfer->c_drive = drvp->drive; 191 xfer->c_cmd = ata_bio; 192 xfer->c_databuf = ata_bio->databuf; 193 xfer->c_bcount = ata_bio->bcount; 194 xfer->c_start = wdc_ata_bio_start; 195 xfer->c_intr = wdc_ata_bio_intr; 196 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 197 ata_exec_xfer(chp, xfer); 198 return (ata_bio->flags & ATA_ITSDONE) ? ATACMD_COMPLETE : ATACMD_QUEUED; 199 } 200 201 static void 202 wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 203 { 204 struct atac_softc *atac = chp->ch_atac; 205 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 206 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 207 struct ata_bio *ata_bio = xfer->c_cmd; 208 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 209 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 210 char *errstring; 211 212 ATADEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 213 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 214 DEBUG_XFERS); 215 216 /* Do control operations specially. */ 217 if (__predict_false(drvp->state < READY)) { 218 /* 219 * Actually, we want to be careful not to mess with the control 220 * state if the device is currently busy, but we can assume 221 * that we never get to this point if that's the case. 222 */ 223 /* If it's not a polled command, we need the kenrel thread */ 224 if ((xfer->c_flags & C_POLL) == 0 && 225 (chp->ch_flags & ATACH_TH_RUN) == 0) { 226 chp->ch_queue->queue_freeze++; 227 wakeup(&chp->ch_thread); 228 return; 229 } 230 /* 231 * disable interrupts, all commands here should be quick 232 * enouth to be able to poll, and we don't go here that often 233 */ 234 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 235 WDCTL_4BIT | WDCTL_IDS); 236 if (wdc->select) 237 wdc->select(chp, xfer->c_drive); 238 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 239 WDSD_IBM | (xfer->c_drive << 4)); 240 DELAY(10); 241 errstring = "wait"; 242 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 243 goto ctrltimeout; 244 wdccommandshort(chp, xfer->c_drive, WDCC_RECAL); 245 /* Wait for at last 400ns for status bit to be valid */ 246 DELAY(1); 247 errstring = "recal"; 248 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 249 goto ctrltimeout; 250 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 251 goto ctrlerror; 252 /* Don't try to set modes if controller can't be adjusted */ 253 if (atac->atac_set_modes == NULL) 254 goto geometry; 255 /* Also don't try if the drive didn't report its mode */ 256 if ((drvp->drive_flags & DRIVE_MODE) == 0) 257 goto geometry; 258 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 259 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 260 errstring = "piomode"; 261 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 262 goto ctrltimeout; 263 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 264 goto ctrlerror; 265 if (drvp->drive_flags & DRIVE_UDMA) { 266 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 267 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 268 } else if (drvp->drive_flags & DRIVE_DMA) { 269 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 270 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 271 } else { 272 goto geometry; 273 } 274 errstring = "dmamode"; 275 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 276 goto ctrltimeout; 277 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 278 goto ctrlerror; 279 geometry: 280 if (ata_bio->flags & ATA_LBA) 281 goto multimode; 282 wdccommand(chp, xfer->c_drive, WDCC_IDP, 283 ata_bio->lp->d_ncylinders, 284 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 285 (ata_bio->lp->d_type == DTYPE_ST506) ? 286 ata_bio->lp->d_precompcyl / 4 : 0); 287 errstring = "geometry"; 288 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 289 goto ctrltimeout; 290 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 291 goto ctrlerror; 292 multimode: 293 if (ata_bio->multi == 1) 294 goto ready; 295 wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0, 296 ata_bio->multi, 0); 297 errstring = "setmulti"; 298 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 299 goto ctrltimeout; 300 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 301 goto ctrlerror; 302 ready: 303 drvp->state = READY; 304 /* 305 * The drive is usable now 306 */ 307 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 308 WDCTL_4BIT); 309 delay(10); /* some drives need a little delay here */ 310 } 311 312 _wdc_ata_bio_start(chp, xfer); 313 return; 314 ctrltimeout: 315 printf("%s:%d:%d: %s timed out\n", 316 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 317 errstring); 318 ata_bio->error = TIMEOUT; 319 goto ctrldone; 320 ctrlerror: 321 printf("%s:%d:%d: %s ", 322 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 323 errstring); 324 if (chp->ch_status & WDCS_DWF) { 325 printf("drive fault\n"); 326 ata_bio->error = ERR_DF; 327 } else { 328 printf("error (%x)\n", chp->ch_error); 329 ata_bio->r_error = chp->ch_error; 330 ata_bio->error = ERROR; 331 } 332 ctrldone: 333 drvp->state = 0; 334 wdc_ata_bio_done(chp, xfer); 335 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 336 return; 337 } 338 339 static void 340 _wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 341 { 342 struct atac_softc *atac = chp->ch_atac; 343 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 344 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 345 struct ata_bio *ata_bio = xfer->c_cmd; 346 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 347 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 348 u_int16_t cyl; 349 u_int8_t head, sect, cmd = 0; 350 int nblks; 351 int dma_flags = 0; 352 353 ATADEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 354 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 355 DEBUG_INTR | DEBUG_XFERS); 356 357 if (xfer->c_flags & C_DMA) { 358 if (drvp->n_xfers <= NXFER) 359 drvp->n_xfers++; 360 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 361 if (ata_bio->flags & ATA_LBA48) 362 dma_flags |= WDC_DMA_LBA48; 363 } 364 again: 365 /* 366 * 367 * When starting a multi-sector transfer, or doing single-sector 368 * transfers... 369 */ 370 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 371 if (ata_bio->flags & ATA_SINGLE) 372 nblks = 1; 373 else 374 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 375 /* Check for bad sectors and adjust transfer, if necessary. */ 376 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 377 long blkdiff; 378 int i; 379 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 380 i++) { 381 blkdiff -= ata_bio->blkno; 382 if (blkdiff < 0) 383 continue; 384 if (blkdiff == 0) { 385 /* Replace current block of transfer. */ 386 ata_bio->blkno = 387 ata_bio->lp->d_secperunit - 388 ata_bio->lp->d_nsectors - i - 1; 389 } 390 if (blkdiff < nblks) { 391 /* Bad block inside transfer. */ 392 ata_bio->flags |= ATA_SINGLE; 393 nblks = 1; 394 } 395 break; 396 } 397 /* Transfer is okay now. */ 398 } 399 if (ata_bio->flags & ATA_LBA48) { 400 sect = 0; 401 cyl = 0; 402 head = 0; 403 } else if (ata_bio->flags & ATA_LBA) { 404 sect = (ata_bio->blkno >> 0) & 0xff; 405 cyl = (ata_bio->blkno >> 8) & 0xffff; 406 head = (ata_bio->blkno >> 24) & 0x0f; 407 head |= WDSD_LBA; 408 } else { 409 int blkno = ata_bio->blkno; 410 sect = blkno % ata_bio->lp->d_nsectors; 411 sect++; /* Sectors begin with 1, not 0. */ 412 blkno /= ata_bio->lp->d_nsectors; 413 head = blkno % ata_bio->lp->d_ntracks; 414 blkno /= ata_bio->lp->d_ntracks; 415 cyl = blkno; 416 head |= WDSD_CHS; 417 } 418 if (xfer->c_flags & C_DMA) { 419 ata_bio->nblks = nblks; 420 ata_bio->nbytes = xfer->c_bcount; 421 cmd = (ata_bio->flags & ATA_READ) ? 422 WDCC_READDMA : WDCC_WRITEDMA; 423 /* Init the DMA channel. */ 424 if ((*wdc->dma_init)(wdc->dma_arg, 425 chp->ch_channel, xfer->c_drive, 426 (char *)xfer->c_databuf + xfer->c_skip, 427 ata_bio->nbytes, dma_flags) != 0) { 428 ata_bio->error = ERR_DMA; 429 ata_bio->r_error = 0; 430 wdc_ata_bio_done(chp, xfer); 431 return; 432 } 433 /* Initiate command */ 434 if (wdc->select) 435 wdc->select(chp, xfer->c_drive); 436 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 437 0, WDSD_IBM | (xfer->c_drive << 4)); 438 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 439 case WDCWAIT_OK: 440 break; 441 case WDCWAIT_TOUT: 442 goto timeout; 443 case WDCWAIT_THR: 444 return; 445 } 446 if (ata_bio->flags & ATA_LBA48) { 447 wdccommandext(chp, xfer->c_drive, to48(cmd), 448 (u_int64_t)ata_bio->blkno, nblks); 449 } else { 450 wdccommand(chp, xfer->c_drive, cmd, cyl, 451 head, sect, nblks, 0); 452 } 453 /* start the DMA channel */ 454 (*wdc->dma_start)(wdc->dma_arg, 455 chp->ch_channel, xfer->c_drive); 456 chp->ch_flags |= ATACH_DMA_WAIT; 457 /* start timeout machinery */ 458 if ((xfer->c_flags & C_POLL) == 0) 459 callout_reset(&chp->ch_callout, 460 ATA_DELAY / 1000 * hz, wdctimeout, chp); 461 /* wait for irq */ 462 goto intr; 463 } /* else not DMA */ 464 ata_bio->nblks = min(nblks, ata_bio->multi); 465 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 466 KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0); 467 if (ata_bio->nblks > 1) { 468 cmd = (ata_bio->flags & ATA_READ) ? 469 WDCC_READMULTI : WDCC_WRITEMULTI; 470 } else { 471 cmd = (ata_bio->flags & ATA_READ) ? 472 WDCC_READ : WDCC_WRITE; 473 } 474 /* Initiate command! */ 475 if (wdc->select) 476 wdc->select(chp, xfer->c_drive); 477 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 478 WDSD_IBM | (xfer->c_drive << 4)); 479 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 480 case WDCWAIT_OK: 481 break; 482 case WDCWAIT_TOUT: 483 goto timeout; 484 case WDCWAIT_THR: 485 return; 486 } 487 if (ata_bio->flags & ATA_LBA48) { 488 wdccommandext(chp, xfer->c_drive, to48(cmd), 489 (u_int64_t) ata_bio->blkno, nblks); 490 } else { 491 wdccommand(chp, xfer->c_drive, cmd, cyl, 492 head, sect, nblks, 493 (ata_bio->lp->d_type == DTYPE_ST506) ? 494 ata_bio->lp->d_precompcyl / 4 : 0); 495 } 496 /* start timeout machinery */ 497 if ((xfer->c_flags & C_POLL) == 0) 498 callout_reset(&chp->ch_callout, 499 ATA_DELAY / 1000 * hz, wdctimeout, chp); 500 } else if (ata_bio->nblks > 1) { 501 /* The number of blocks in the last stretch may be smaller. */ 502 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 503 if (ata_bio->nblks > nblks) { 504 ata_bio->nblks = nblks; 505 ata_bio->nbytes = xfer->c_bcount; 506 } 507 } 508 /* If this was a write and not using DMA, push the data. */ 509 if ((ata_bio->flags & ATA_READ) == 0) { 510 /* 511 * we have to busy-wait here, we can't rely on running in 512 * thread context. 513 */ 514 if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 515 printf("%s:%d:%d: timeout waiting for DRQ, " 516 "st=0x%02x, err=0x%02x\n", 517 atac->atac_dev.dv_xname, chp->ch_channel, 518 xfer->c_drive, chp->ch_status, chp->ch_error); 519 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 520 ata_bio->error = TIMEOUT; 521 wdc_ata_bio_done(chp, xfer); 522 return; 523 } 524 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 525 wdc_ata_bio_done(chp, xfer); 526 return; 527 } 528 wdc->dataout_pio(chp, drvp->drive_flags, 529 (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes); 530 } 531 532 intr: /* Wait for IRQ (either real or polled) */ 533 if ((ata_bio->flags & ATA_POLL) == 0) { 534 chp->ch_flags |= ATACH_IRQ_WAIT; 535 } else { 536 /* Wait for at last 400ns for status bit to be valid */ 537 delay(1); 538 if (chp->ch_flags & ATACH_DMA_WAIT) { 539 wdc_dmawait(chp, xfer, ATA_DELAY); 540 chp->ch_flags &= ~ATACH_DMA_WAIT; 541 } 542 wdc_ata_bio_intr(chp, xfer, 0); 543 if ((ata_bio->flags & ATA_ITSDONE) == 0) 544 goto again; 545 } 546 return; 547 timeout: 548 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 549 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 550 chp->ch_status, chp->ch_error); 551 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 552 ata_bio->error = TIMEOUT; 553 wdc_ata_bio_done(chp, xfer); 554 return; 555 } 556 557 static int 558 wdc_ata_bio_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 559 { 560 struct atac_softc *atac = chp->ch_atac; 561 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 562 struct ata_bio *ata_bio = xfer->c_cmd; 563 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 564 int drv_err; 565 566 ATADEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 567 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 568 DEBUG_INTR | DEBUG_XFERS); 569 570 571 /* Is it not a transfer, but a control operation? */ 572 if (drvp->state < READY) { 573 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 574 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 575 drvp->state); 576 panic("wdc_ata_bio_intr: bad state"); 577 } 578 579 /* 580 * if we missed an interrupt in a PIO transfer, reset and restart. 581 * Don't try to continue transfer, we may have missed cycles. 582 */ 583 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 584 ata_bio->error = TIMEOUT; 585 wdc_ata_bio_done(chp, xfer); 586 return 1; 587 } 588 589 /* Ack interrupt done by wdc_wait_for_unbusy */ 590 if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 591 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 592 return 0; /* IRQ was not for us */ 593 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 594 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 595 xfer->c_bcount, xfer->c_skip); 596 ata_bio->error = TIMEOUT; 597 wdc_ata_bio_done(chp, xfer); 598 return 1; 599 } 600 if (wdc->irqack) 601 wdc->irqack(chp); 602 603 drv_err = wdc_ata_err(drvp, ata_bio); 604 605 /* If we were using DMA, Turn off the DMA channel and check for error */ 606 if (xfer->c_flags & C_DMA) { 607 if (ata_bio->flags & ATA_POLL) { 608 /* 609 * IDE drives deassert WDCS_BSY before transfer is 610 * complete when using DMA. Polling for DRQ to deassert 611 * is not enough DRQ is not required to be 612 * asserted for DMA transfers, so poll for DRDY. 613 */ 614 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 615 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 616 printf("%s:%d:%d: polled transfer timed out " 617 "(st=0x%x)\n", atac->atac_dev.dv_xname, 618 chp->ch_channel, xfer->c_drive, 619 chp->ch_status); 620 ata_bio->error = TIMEOUT; 621 drv_err = WDC_ATA_ERR; 622 } 623 } 624 if (wdc->dma_status != 0) { 625 if (drv_err != WDC_ATA_ERR) { 626 ata_bio->error = ERR_DMA; 627 drv_err = WDC_ATA_ERR; 628 } 629 } 630 if (chp->ch_status & WDCS_DRQ) { 631 if (drv_err != WDC_ATA_ERR) { 632 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 633 atac->atac_dev.dv_xname, chp->ch_channel, 634 xfer->c_drive, chp->ch_status); 635 ata_bio->error = TIMEOUT; 636 drv_err = WDC_ATA_ERR; 637 } 638 } 639 if (ata_bio->r_error & WDCE_CRC) 640 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 641 if (drv_err != WDC_ATA_ERR) 642 goto end; 643 } 644 645 /* if we had an error, end */ 646 if (drv_err == WDC_ATA_ERR) { 647 wdc_ata_bio_done(chp, xfer); 648 return 1; 649 } 650 651 /* If this was a read and not using DMA, fetch the data. */ 652 if ((ata_bio->flags & ATA_READ) != 0) { 653 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 654 printf("%s:%d:%d: read intr before drq\n", 655 atac->atac_dev.dv_xname, chp->ch_channel, 656 xfer->c_drive); 657 ata_bio->error = TIMEOUT; 658 wdc_ata_bio_done(chp, xfer); 659 return 1; 660 } 661 wdc->datain_pio(chp, drvp->drive_flags, 662 (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes); 663 } 664 665 end: 666 ata_bio->blkno += ata_bio->nblks; 667 ata_bio->blkdone += ata_bio->nblks; 668 xfer->c_skip += ata_bio->nbytes; 669 xfer->c_bcount -= ata_bio->nbytes; 670 /* See if this transfer is complete. */ 671 if (xfer->c_bcount > 0) { 672 if ((ata_bio->flags & ATA_POLL) == 0) { 673 /* Start the next operation */ 674 _wdc_ata_bio_start(chp, xfer); 675 } else { 676 /* Let _wdc_ata_bio_start do the loop */ 677 return 1; 678 } 679 } else { /* Done with this transfer */ 680 ata_bio->error = NOERROR; 681 wdc_ata_bio_done(chp, xfer); 682 } 683 return 1; 684 } 685 686 static void 687 wdc_ata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 688 int reason) 689 { 690 struct ata_bio *ata_bio = xfer->c_cmd; 691 int drive = xfer->c_drive; 692 693 ata_free_xfer(chp, xfer); 694 695 ata_bio->flags |= ATA_ITSDONE; 696 switch (reason) { 697 case KILL_GONE: 698 ata_bio->error = ERR_NODEV; 699 break; 700 case KILL_RESET: 701 ata_bio->error = ERR_RESET; 702 break; 703 default: 704 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 705 reason); 706 panic("wdc_ata_bio_kill_xfer"); 707 } 708 ata_bio->r_error = WDCE_ABRT; 709 ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 710 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 711 } 712 713 static void 714 wdc_ata_bio_done(struct ata_channel *chp, struct ata_xfer *xfer) 715 { 716 struct atac_softc *atac = chp->ch_atac; 717 struct ata_bio *ata_bio = xfer->c_cmd; 718 int drive = xfer->c_drive; 719 720 ATADEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 721 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 722 (u_int)xfer->c_flags), 723 DEBUG_XFERS); 724 725 callout_stop(&chp->ch_callout); 726 727 /* feed back residual bcount to our caller */ 728 ata_bio->bcount = xfer->c_bcount; 729 730 /* mark controller inactive and free xfer */ 731 chp->ch_queue->active_xfer = NULL; 732 ata_free_xfer(chp, xfer); 733 734 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 735 ata_bio->error = ERR_NODEV; 736 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 737 wakeup(&chp->ch_queue->active_xfer); 738 } 739 ata_bio->flags |= ATA_ITSDONE; 740 ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 741 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 742 ATADEBUG_PRINT(("atastart from wdc_ata_done, flags 0x%x\n", 743 chp->ch_flags), DEBUG_XFERS); 744 atastart(chp); 745 } 746 747 static int 748 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 749 { 750 struct ata_channel *chp = drvp->chnl_softc; 751 ata_bio->error = 0; 752 if (chp->ch_status & WDCS_BSY) { 753 ata_bio->error = TIMEOUT; 754 return WDC_ATA_ERR; 755 } 756 757 if (chp->ch_status & WDCS_DWF) { 758 ata_bio->error = ERR_DF; 759 return WDC_ATA_ERR; 760 } 761 762 if (chp->ch_status & WDCS_ERR) { 763 ata_bio->error = ERROR; 764 ata_bio->r_error = chp->ch_error; 765 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 766 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 767 return WDC_ATA_ERR; 768 return WDC_ATA_NOERR; 769 } 770 771 if (chp->ch_status & WDCS_CORR) 772 ata_bio->flags |= ATA_CORR; 773 return WDC_ATA_NOERR; 774 } 775 776 static int 777 wdc_ata_addref(struct ata_drive_datas *drvp) 778 { 779 struct ata_channel *chp = drvp->chnl_softc; 780 781 return (ata_addref(chp)); 782 } 783 784 static void 785 wdc_ata_delref(struct ata_drive_datas *drvp) 786 { 787 struct ata_channel *chp = drvp->chnl_softc; 788 789 ata_delref(chp); 790 } 791
Indexes created Tue Sep 30 11:09:46 GMT 2025