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ata_wdc.c revision 1.75
      1 /*	$NetBSD: ata_wdc.c,v 1.75 2004/08/21 02:17:07 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2001, 2003 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*-
     33  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
     34  * All rights reserved.
     35  *
     36  * This code is derived from software contributed to The NetBSD Foundation
     37  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. All advertising materials mentioning features or use of this software
     48  *    must display the following acknowledgement:
     49  *        This product includes software developed by the NetBSD
     50  *        Foundation, Inc. and its contributors.
     51  * 4. Neither the name of The NetBSD Foundation nor the names of its
     52  *    contributors may be used to endorse or promote products derived
     53  *    from this software without specific prior written permission.
     54  *
     55  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     56  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     57  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     58  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     59  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     60  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     61  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     62  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     63  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     64  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     65  * POSSIBILITY OF SUCH DAMAGE.
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.75 2004/08/21 02:17:07 thorpej Exp $");
     70 
     71 #ifndef ATADEBUG
     72 #define ATADEBUG
     73 #endif /* ATADEBUG */
     74 
     75 #include <sys/param.h>
     76 #include <sys/systm.h>
     77 #include <sys/kernel.h>
     78 #include <sys/file.h>
     79 #include <sys/stat.h>
     80 #include <sys/buf.h>
     81 #include <sys/malloc.h>
     82 #include <sys/device.h>
     83 #include <sys/disklabel.h>
     84 #include <sys/syslog.h>
     85 #include <sys/proc.h>
     86 
     87 #include <machine/intr.h>
     88 #include <machine/bus.h>
     89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     90 #define    bus_space_write_multi_stream_2    bus_space_write_multi_2
     91 #define    bus_space_write_multi_stream_4    bus_space_write_multi_4
     92 #define    bus_space_read_multi_stream_2    bus_space_read_multi_2
     93 #define    bus_space_read_multi_stream_4    bus_space_read_multi_4
     94 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     95 
     96 #include <dev/ata/atareg.h>
     97 #include <dev/ata/atavar.h>
     98 #include <dev/ic/wdcreg.h>
     99 #include <dev/ic/wdcvar.h>
    100 
    101 #define DEBUG_INTR   0x01
    102 #define DEBUG_XFERS  0x02
    103 #define DEBUG_STATUS 0x04
    104 #define DEBUG_FUNCS  0x08
    105 #define DEBUG_PROBE  0x10
    106 #ifdef ATADEBUG
    107 extern int wdcdebug_wd_mask; /* inited in wd.c */
    108 #define ATADEBUG_PRINT(args, level) \
    109 	if (wdcdebug_wd_mask & (level)) \
    110 		printf args
    111 #else
    112 #define ATADEBUG_PRINT(args, level)
    113 #endif
    114 
    115 #define ATA_DELAY 10000 /* 10s for a drive I/O */
    116 
    117 static int	wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*);
    118 static void	wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *);
    119 static void	_wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *);
    120 static int	wdc_ata_bio_intr(struct ata_channel *, struct ata_xfer *,
    121 				 int);
    122 static void	wdc_ata_bio_kill_xfer(struct ata_channel *,
    123 				      struct ata_xfer *, int);
    124 static void	wdc_ata_bio_done(struct ata_channel *, struct ata_xfer *);
    125 static int	wdc_ata_err(struct ata_drive_datas *, struct ata_bio *);
    126 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
    127 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
    128 #define WDC_ATA_ERR   0x02 /* Drive reports an error */
    129 static int	wdc_ata_addref(struct ata_drive_datas *);
    130 static void	wdc_ata_delref(struct ata_drive_datas *);
    131 
    132 const struct ata_bustype wdc_ata_bustype = {
    133 	SCSIPI_BUSTYPE_ATA,
    134 	wdc_ata_bio,
    135 	wdc_reset_drive,
    136 	wdc_reset_channel,
    137 	wdc_exec_command,
    138 	ata_get_params,
    139 	wdc_ata_addref,
    140 	wdc_ata_delref,
    141 	ata_kill_pending,
    142 };
    143 
    144 /*
    145  * Handle block I/O operation. Return ATACMD_COMPLETE, ATACMD_QUEUED, or
    146  * ATACMD_TRY_AGAIN. Must be called at splbio().
    147  */
    148 static int
    149 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
    150 {
    151 	struct ata_xfer *xfer;
    152 	struct ata_channel *chp = drvp->chnl_softc;
    153 	struct atac_softc *atac = chp->ch_atac;
    154 
    155 	xfer = ata_get_xfer(ATAXF_NOSLEEP);
    156 	if (xfer == NULL)
    157 		return ATACMD_TRY_AGAIN;
    158 	if (atac->atac_cap & ATAC_CAP_NOIRQ)
    159 		ata_bio->flags |= ATA_POLL;
    160 	if (ata_bio->flags & ATA_POLL)
    161 		xfer->c_flags |= C_POLL;
    162 	if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
    163 	    (ata_bio->flags & ATA_SINGLE) == 0)
    164 		xfer->c_flags |= C_DMA;
    165 	xfer->c_drive = drvp->drive;
    166 	xfer->c_cmd = ata_bio;
    167 	xfer->c_databuf = ata_bio->databuf;
    168 	xfer->c_bcount = ata_bio->bcount;
    169 	xfer->c_start = wdc_ata_bio_start;
    170 	xfer->c_intr = wdc_ata_bio_intr;
    171 	xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
    172 	ata_exec_xfer(chp, xfer);
    173 	return (ata_bio->flags & ATA_ITSDONE) ? ATACMD_COMPLETE : ATACMD_QUEUED;
    174 }
    175 
    176 static void
    177 wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
    178 {
    179 	struct atac_softc *atac = chp->ch_atac;
    180 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
    181 	struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
    182 	struct ata_bio *ata_bio = xfer->c_cmd;
    183 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    184 	int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
    185 	char *errstring;
    186 
    187 	ATADEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
    188 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    189 	    DEBUG_XFERS);
    190 
    191 	/* Do control operations specially. */
    192 	if (__predict_false(drvp->state < READY)) {
    193 		/*
    194 		 * Actually, we want to be careful not to mess with the control
    195 		 * state if the device is currently busy, but we can assume
    196 		 * that we never get to this point if that's the case.
    197 		 */
    198 		/* If it's not a polled command, we need the kenrel thread */
    199 		if ((xfer->c_flags & C_POLL) == 0 &&
    200 		    (chp->ch_flags & ATACH_TH_RUN) == 0) {
    201 			chp->ch_queue->queue_freeze++;
    202 			wakeup(&chp->ch_thread);
    203 			return;
    204 		}
    205 		/*
    206 		 * disable interrupts, all commands here should be quick
    207 		 * enouth to be able to poll, and we don't go here that often
    208 		 */
    209 		bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
    210 		    WDCTL_4BIT | WDCTL_IDS);
    211 		if (wdc->select)
    212 			wdc->select(chp, xfer->c_drive);
    213 		bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
    214 		    WDSD_IBM | (xfer->c_drive << 4));
    215 		DELAY(10);
    216 		errstring = "wait";
    217 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    218 			goto ctrltimeout;
    219 		wdccommandshort(chp, xfer->c_drive, WDCC_RECAL);
    220 		/* Wait for at last 400ns for status bit to be valid */
    221 		DELAY(1);
    222 		errstring = "recal";
    223 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    224 			goto ctrltimeout;
    225 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    226 			goto ctrlerror;
    227 		/* Don't try to set modes if controller can't be adjusted */
    228 		if (atac->atac_set_modes == NULL)
    229 			goto geometry;
    230 		/* Also don't try if the drive didn't report its mode */
    231 		if ((drvp->drive_flags & DRIVE_MODE) == 0)
    232 			goto geometry;
    233 		wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    234 		    0x08 | drvp->PIO_mode, WDSF_SET_MODE);
    235 		errstring = "piomode";
    236 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    237 			goto ctrltimeout;
    238 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    239 			goto ctrlerror;
    240 		if (drvp->drive_flags & DRIVE_UDMA) {
    241 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    242 			    0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
    243 		} else if (drvp->drive_flags & DRIVE_DMA) {
    244 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    245 			    0x20 | drvp->DMA_mode, WDSF_SET_MODE);
    246 		} else {
    247 			goto geometry;
    248 		}
    249 		errstring = "dmamode";
    250 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    251 			goto ctrltimeout;
    252 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    253 			goto ctrlerror;
    254 geometry:
    255 		if (ata_bio->flags & ATA_LBA)
    256 			goto multimode;
    257 		wdccommand(chp, xfer->c_drive, WDCC_IDP,
    258 		    ata_bio->lp->d_ncylinders,
    259 		    ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
    260 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    261 			ata_bio->lp->d_precompcyl / 4 : 0);
    262 		errstring = "geometry";
    263 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    264 			goto ctrltimeout;
    265 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    266 			goto ctrlerror;
    267 multimode:
    268 		if (ata_bio->multi == 1)
    269 			goto ready;
    270 		wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0,
    271 		    ata_bio->multi, 0);
    272 		errstring = "setmulti";
    273 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    274 			goto ctrltimeout;
    275 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    276 			goto ctrlerror;
    277 ready:
    278 		drvp->state = READY;
    279 		/*
    280 		 * The drive is usable now
    281 		 */
    282 		bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
    283 		    WDCTL_4BIT);
    284 		delay(10); /* some drives need a little delay here */
    285 	}
    286 
    287 	_wdc_ata_bio_start(chp, xfer);
    288 	return;
    289 ctrltimeout:
    290 	printf("%s:%d:%d: %s timed out\n",
    291 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    292 	    errstring);
    293 	ata_bio->error = TIMEOUT;
    294 	goto ctrldone;
    295 ctrlerror:
    296 	printf("%s:%d:%d: %s ",
    297 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    298 	    errstring);
    299 	if (chp->ch_status & WDCS_DWF) {
    300 		printf("drive fault\n");
    301 		ata_bio->error = ERR_DF;
    302 	} else {
    303 		printf("error (%x)\n", chp->ch_error);
    304 		ata_bio->r_error = chp->ch_error;
    305 		ata_bio->error = ERROR;
    306 	}
    307 ctrldone:
    308 	drvp->state = 0;
    309 	wdc_ata_bio_done(chp, xfer);
    310 	bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
    311 	return;
    312 }
    313 
    314 static void
    315 _wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
    316 {
    317 	struct atac_softc *atac = chp->ch_atac;
    318 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
    319 	struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
    320 	struct ata_bio *ata_bio = xfer->c_cmd;
    321 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    322 	int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
    323 	u_int16_t cyl;
    324 	u_int8_t head, sect, cmd = 0;
    325 	int nblks;
    326 	int dma_flags = 0;
    327 
    328 	ATADEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
    329 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    330 	    DEBUG_INTR | DEBUG_XFERS);
    331 
    332 	if (xfer->c_flags & C_DMA) {
    333 		if (drvp->n_xfers <= NXFER)
    334 			drvp->n_xfers++;
    335 		dma_flags = (ata_bio->flags & ATA_READ) ?  WDC_DMA_READ : 0;
    336 		if (ata_bio->flags & ATA_LBA48)
    337 			dma_flags |= WDC_DMA_LBA48;
    338 	}
    339 again:
    340 	/*
    341 	 *
    342 	 * When starting a multi-sector transfer, or doing single-sector
    343 	 * transfers...
    344 	 */
    345 	if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
    346 		if (ata_bio->flags & ATA_SINGLE)
    347 			nblks = 1;
    348 		else
    349 			nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    350 		/* Check for bad sectors and adjust transfer, if necessary. */
    351 		if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
    352 			long blkdiff;
    353 			int i;
    354 			for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
    355 			    i++) {
    356 				blkdiff -= ata_bio->blkno;
    357 				if (blkdiff < 0)
    358 					continue;
    359 				if (blkdiff == 0) {
    360 					/* Replace current block of transfer. */
    361 					ata_bio->blkno =
    362 					    ata_bio->lp->d_secperunit -
    363 					    ata_bio->lp->d_nsectors - i - 1;
    364 				}
    365 				if (blkdiff < nblks) {
    366 					/* Bad block inside transfer. */
    367 					ata_bio->flags |= ATA_SINGLE;
    368 					nblks = 1;
    369 				}
    370 				break;
    371 			}
    372 		/* Transfer is okay now. */
    373 		}
    374 		if (ata_bio->flags & ATA_LBA48) {
    375 			sect = 0;
    376 			cyl =  0;
    377 			head = 0;
    378 		} else if (ata_bio->flags & ATA_LBA) {
    379 			sect = (ata_bio->blkno >> 0) & 0xff;
    380 			cyl = (ata_bio->blkno >> 8) & 0xffff;
    381 			head = (ata_bio->blkno >> 24) & 0x0f;
    382 			head |= WDSD_LBA;
    383 		} else {
    384 			int blkno = ata_bio->blkno;
    385 			sect = blkno % ata_bio->lp->d_nsectors;
    386 			sect++;    /* Sectors begin with 1, not 0. */
    387 			blkno /= ata_bio->lp->d_nsectors;
    388 			head = blkno % ata_bio->lp->d_ntracks;
    389 			blkno /= ata_bio->lp->d_ntracks;
    390 			cyl = blkno;
    391 			head |= WDSD_CHS;
    392 		}
    393 		if (xfer->c_flags & C_DMA) {
    394 			ata_bio->nblks = nblks;
    395 			ata_bio->nbytes = xfer->c_bcount;
    396 			cmd = (ata_bio->flags & ATA_READ) ?
    397 			    WDCC_READDMA : WDCC_WRITEDMA;
    398 	    		/* Init the DMA channel. */
    399 			if ((*wdc->dma_init)(wdc->dma_arg,
    400 			    chp->ch_channel, xfer->c_drive,
    401 			    (char *)xfer->c_databuf + xfer->c_skip,
    402 			    ata_bio->nbytes, dma_flags) != 0) {
    403 				ata_bio->error = ERR_DMA;
    404 				ata_bio->r_error = 0;
    405 				wdc_ata_bio_done(chp, xfer);
    406 				return;
    407 			}
    408 			/* Initiate command */
    409 			if (wdc->select)
    410 				wdc->select(chp, xfer->c_drive);
    411 			bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
    412 			    0, WDSD_IBM | (xfer->c_drive << 4));
    413 			switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
    414 			case WDCWAIT_OK:
    415 				break;
    416 			case WDCWAIT_TOUT:
    417 				goto timeout;
    418 			case WDCWAIT_THR:
    419 				return;
    420 			}
    421 			if (ata_bio->flags & ATA_LBA48) {
    422 			    wdccommandext(chp, xfer->c_drive, atacmd_to48(cmd),
    423 				(u_int64_t)ata_bio->blkno, nblks);
    424 			} else {
    425 			    wdccommand(chp, xfer->c_drive, cmd, cyl,
    426 				head, sect, nblks, 0);
    427 			}
    428 			/* start the DMA channel */
    429 			(*wdc->dma_start)(wdc->dma_arg,
    430 			    chp->ch_channel, xfer->c_drive);
    431 			chp->ch_flags |= ATACH_DMA_WAIT;
    432 			/* start timeout machinery */
    433 			if ((xfer->c_flags & C_POLL) == 0)
    434 				callout_reset(&chp->ch_callout,
    435 				    ATA_DELAY / 1000 * hz, wdctimeout, chp);
    436 			/* wait for irq */
    437 			goto intr;
    438 		} /* else not DMA */
    439 		ata_bio->nblks = min(nblks, ata_bio->multi);
    440 		ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
    441 		KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0);
    442 		if (ata_bio->nblks > 1) {
    443 			cmd = (ata_bio->flags & ATA_READ) ?
    444 			    WDCC_READMULTI : WDCC_WRITEMULTI;
    445 		} else {
    446 			cmd = (ata_bio->flags & ATA_READ) ?
    447 			    WDCC_READ : WDCC_WRITE;
    448 		}
    449 		/* Initiate command! */
    450 		if (wdc->select)
    451 			wdc->select(chp, xfer->c_drive);
    452 		bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
    453 		    WDSD_IBM | (xfer->c_drive << 4));
    454 		switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
    455 		case WDCWAIT_OK:
    456 			break;
    457 		case WDCWAIT_TOUT:
    458 			goto timeout;
    459 		case WDCWAIT_THR:
    460 			return;
    461 		}
    462 		if (ata_bio->flags & ATA_LBA48) {
    463 		    wdccommandext(chp, xfer->c_drive, atacmd_to48(cmd),
    464 			(u_int64_t) ata_bio->blkno, nblks);
    465 		} else {
    466 		    wdccommand(chp, xfer->c_drive, cmd, cyl,
    467 			head, sect, nblks,
    468 			(ata_bio->lp->d_type == DTYPE_ST506) ?
    469 			ata_bio->lp->d_precompcyl / 4 : 0);
    470 		}
    471 		/* start timeout machinery */
    472 		if ((xfer->c_flags & C_POLL) == 0)
    473 			callout_reset(&chp->ch_callout,
    474 			    ATA_DELAY / 1000 * hz, wdctimeout, chp);
    475 	} else if (ata_bio->nblks > 1) {
    476 		/* The number of blocks in the last stretch may be smaller. */
    477 		nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    478 		if (ata_bio->nblks > nblks) {
    479 		ata_bio->nblks = nblks;
    480 		ata_bio->nbytes = xfer->c_bcount;
    481 		}
    482 	}
    483 	/* If this was a write and not using DMA, push the data. */
    484 	if ((ata_bio->flags & ATA_READ) == 0) {
    485 		/*
    486 		 * we have to busy-wait here, we can't rely on running in
    487 		 * thread context.
    488 		 */
    489 		if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) {
    490 			printf("%s:%d:%d: timeout waiting for DRQ, "
    491 			    "st=0x%02x, err=0x%02x\n",
    492 			    atac->atac_dev.dv_xname, chp->ch_channel,
    493 			    xfer->c_drive, chp->ch_status, chp->ch_error);
    494 			if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    495 				ata_bio->error = TIMEOUT;
    496 			wdc_ata_bio_done(chp, xfer);
    497 			return;
    498 		}
    499 		if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
    500 			wdc_ata_bio_done(chp, xfer);
    501 			return;
    502 		}
    503 		wdc->dataout_pio(chp, drvp->drive_flags,
    504 		    (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes);
    505 	}
    506 
    507 intr:	/* Wait for IRQ (either real or polled) */
    508 	if ((ata_bio->flags & ATA_POLL) == 0) {
    509 		chp->ch_flags |= ATACH_IRQ_WAIT;
    510 	} else {
    511 		/* Wait for at last 400ns for status bit to be valid */
    512 		delay(1);
    513 		if (chp->ch_flags & ATACH_DMA_WAIT) {
    514 			wdc_dmawait(chp, xfer, ATA_DELAY);
    515 			chp->ch_flags &= ~ATACH_DMA_WAIT;
    516 		}
    517 		wdc_ata_bio_intr(chp, xfer, 0);
    518 		if ((ata_bio->flags & ATA_ITSDONE) == 0)
    519 			goto again;
    520 	}
    521 	return;
    522 timeout:
    523 	printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
    524 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    525 	    chp->ch_status, chp->ch_error);
    526 	if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    527 		ata_bio->error = TIMEOUT;
    528 	wdc_ata_bio_done(chp, xfer);
    529 	return;
    530 }
    531 
    532 static int
    533 wdc_ata_bio_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq)
    534 {
    535 	struct atac_softc *atac = chp->ch_atac;
    536 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
    537 	struct ata_bio *ata_bio = xfer->c_cmd;
    538 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    539 	int drv_err;
    540 
    541 	ATADEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
    542 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    543 	    DEBUG_INTR | DEBUG_XFERS);
    544 
    545 
    546 	/* Is it not a transfer, but a control operation? */
    547 	if (drvp->state < READY) {
    548 		printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
    549 		    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    550 		    drvp->state);
    551 		panic("wdc_ata_bio_intr: bad state");
    552 	}
    553 
    554 	/*
    555 	 * if we missed an interrupt in a PIO transfer, reset and restart.
    556 	 * Don't try to continue transfer, we may have missed cycles.
    557 	 */
    558 	if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
    559 		ata_bio->error = TIMEOUT;
    560 		wdc_ata_bio_done(chp, xfer);
    561 		return 1;
    562 	}
    563 
    564 	/* Ack interrupt done by wdc_wait_for_unbusy */
    565 	if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) {
    566 		if (irq && (xfer->c_flags & C_TIMEOU) == 0)
    567 			return 0; /* IRQ was not for us */
    568 		printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
    569 		    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    570 		    xfer->c_bcount, xfer->c_skip);
    571 		ata_bio->error = TIMEOUT;
    572 		wdc_ata_bio_done(chp, xfer);
    573 		return 1;
    574 	}
    575 	if (wdc->irqack)
    576 		wdc->irqack(chp);
    577 
    578 	drv_err = wdc_ata_err(drvp, ata_bio);
    579 
    580 	/* If we were using DMA, Turn off the DMA channel and check for error */
    581 	if (xfer->c_flags & C_DMA) {
    582 		if (ata_bio->flags & ATA_POLL) {
    583 			/*
    584 			 * IDE drives deassert WDCS_BSY before transfer is
    585 			 * complete when using DMA. Polling for DRQ to deassert
    586 			 * is not enough DRQ is not required to be
    587 			 * asserted for DMA transfers, so poll for DRDY.
    588 			 */
    589 			if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
    590 			    ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) {
    591 				printf("%s:%d:%d: polled transfer timed out "
    592 				    "(st=0x%x)\n", atac->atac_dev.dv_xname,
    593 				    chp->ch_channel, xfer->c_drive,
    594 				    chp->ch_status);
    595 				ata_bio->error = TIMEOUT;
    596 				drv_err = WDC_ATA_ERR;
    597 			}
    598 		}
    599 		if (wdc->dma_status != 0) {
    600 			if (drv_err != WDC_ATA_ERR) {
    601 				ata_bio->error = ERR_DMA;
    602 				drv_err = WDC_ATA_ERR;
    603 			}
    604 		}
    605 		if (chp->ch_status & WDCS_DRQ) {
    606 			if (drv_err != WDC_ATA_ERR) {
    607 				printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
    608 				    atac->atac_dev.dv_xname, chp->ch_channel,
    609 				    xfer->c_drive, chp->ch_status);
    610 				ata_bio->error = TIMEOUT;
    611 				drv_err = WDC_ATA_ERR;
    612 			}
    613 		}
    614 		if (ata_bio->r_error & WDCE_CRC)
    615 			ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0);
    616 		if (drv_err != WDC_ATA_ERR)
    617 			goto end;
    618 	}
    619 
    620 	/* if we had an error, end */
    621 	if (drv_err == WDC_ATA_ERR) {
    622 		wdc_ata_bio_done(chp, xfer);
    623 		return 1;
    624 	}
    625 
    626 	/* If this was a read and not using DMA, fetch the data. */
    627 	if ((ata_bio->flags & ATA_READ) != 0) {
    628 		if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
    629 			printf("%s:%d:%d: read intr before drq\n",
    630 			    atac->atac_dev.dv_xname, chp->ch_channel,
    631 			    xfer->c_drive);
    632 			ata_bio->error = TIMEOUT;
    633 			wdc_ata_bio_done(chp, xfer);
    634 			return 1;
    635 		}
    636 		wdc->datain_pio(chp, drvp->drive_flags,
    637 		    (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes);
    638 	}
    639 
    640 end:
    641 	ata_bio->blkno += ata_bio->nblks;
    642 	ata_bio->blkdone += ata_bio->nblks;
    643 	xfer->c_skip += ata_bio->nbytes;
    644 	xfer->c_bcount -= ata_bio->nbytes;
    645 	/* See if this transfer is complete. */
    646 	if (xfer->c_bcount > 0) {
    647 		if ((ata_bio->flags & ATA_POLL) == 0) {
    648 			/* Start the next operation */
    649 			_wdc_ata_bio_start(chp, xfer);
    650 		} else {
    651 			/* Let _wdc_ata_bio_start do the loop */
    652 			return 1;
    653 		}
    654 	} else { /* Done with this transfer */
    655 		ata_bio->error = NOERROR;
    656 		wdc_ata_bio_done(chp, xfer);
    657 	}
    658 	return 1;
    659 }
    660 
    661 static void
    662 wdc_ata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
    663     int reason)
    664 {
    665 	struct ata_bio *ata_bio = xfer->c_cmd;
    666 	int drive = xfer->c_drive;
    667 
    668 	ata_free_xfer(chp, xfer);
    669 
    670 	ata_bio->flags |= ATA_ITSDONE;
    671 	switch (reason) {
    672 	case KILL_GONE:
    673 		ata_bio->error = ERR_NODEV;
    674 		break;
    675 	case KILL_RESET:
    676 		ata_bio->error = ERR_RESET;
    677 		break;
    678 	default:
    679 		printf("wdc_ata_bio_kill_xfer: unknown reason %d\n",
    680 		    reason);
    681 		panic("wdc_ata_bio_kill_xfer");
    682 	}
    683 	ata_bio->r_error = WDCE_ABRT;
    684 	ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
    685 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
    686 }
    687 
    688 static void
    689 wdc_ata_bio_done(struct ata_channel *chp, struct ata_xfer *xfer)
    690 {
    691 	struct atac_softc *atac = chp->ch_atac;
    692 	struct ata_bio *ata_bio = xfer->c_cmd;
    693 	int drive = xfer->c_drive;
    694 
    695 	ATADEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
    696 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    697 	    (u_int)xfer->c_flags),
    698 	    DEBUG_XFERS);
    699 
    700 	callout_stop(&chp->ch_callout);
    701 
    702 	/* feed back residual bcount to our caller */
    703 	ata_bio->bcount = xfer->c_bcount;
    704 
    705 	/* mark controller inactive and free xfer */
    706 	chp->ch_queue->active_xfer = NULL;
    707 	ata_free_xfer(chp, xfer);
    708 
    709 	if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) {
    710 		ata_bio->error = ERR_NODEV;
    711 		chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN;
    712 		wakeup(&chp->ch_queue->active_xfer);
    713 	}
    714 	ata_bio->flags |= ATA_ITSDONE;
    715 	ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
    716 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
    717 	ATADEBUG_PRINT(("atastart from wdc_ata_done, flags 0x%x\n",
    718 	    chp->ch_flags), DEBUG_XFERS);
    719 	atastart(chp);
    720 }
    721 
    722 static int
    723 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
    724 {
    725 	struct ata_channel *chp = drvp->chnl_softc;
    726 	ata_bio->error = 0;
    727 	if (chp->ch_status & WDCS_BSY) {
    728 		ata_bio->error = TIMEOUT;
    729 		return WDC_ATA_ERR;
    730 	}
    731 
    732 	if (chp->ch_status & WDCS_DWF) {
    733 		ata_bio->error = ERR_DF;
    734 		return WDC_ATA_ERR;
    735 	}
    736 
    737 	if (chp->ch_status & WDCS_ERR) {
    738 		ata_bio->error = ERROR;
    739 		ata_bio->r_error = chp->ch_error;
    740 		if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
    741 		    WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
    742 			return WDC_ATA_ERR;
    743 		return WDC_ATA_NOERR;
    744 	}
    745 
    746 	if (chp->ch_status & WDCS_CORR)
    747 		ata_bio->flags |= ATA_CORR;
    748 	return WDC_ATA_NOERR;
    749 }
    750 
    751 static int
    752 wdc_ata_addref(struct ata_drive_datas *drvp)
    753 {
    754 	struct ata_channel *chp = drvp->chnl_softc;
    755 
    756 	return (ata_addref(chp));
    757 }
    758 
    759 static void
    760 wdc_ata_delref(struct ata_drive_datas *drvp)
    761 {
    762 	struct ata_channel *chp = drvp->chnl_softc;
    763 
    764 	ata_delref(chp);
    765 }
    766