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ata_wdc.c revision 1.81
      1 /*	$NetBSD: ata_wdc.c,v 1.81 2005/06/07 13:45:11 peter Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2001, 2003 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*-
     33  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
     34  * All rights reserved.
     35  *
     36  * This code is derived from software contributed to The NetBSD Foundation
     37  * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. All advertising materials mentioning features or use of this software
     48  *    must display the following acknowledgement:
     49  *        This product includes software developed by the NetBSD
     50  *        Foundation, Inc. and its contributors.
     51  * 4. Neither the name of The NetBSD Foundation nor the names of its
     52  *    contributors may be used to endorse or promote products derived
     53  *    from this software without specific prior written permission.
     54  *
     55  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     56  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     57  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     58  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     59  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     60  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     61  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     62  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     63  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     64  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     65  * POSSIBILITY OF SUCH DAMAGE.
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.81 2005/06/07 13:45:11 peter Exp $");
     70 
     71 #ifndef ATADEBUG
     72 #define ATADEBUG
     73 #endif /* ATADEBUG */
     74 
     75 #include <sys/param.h>
     76 #include <sys/systm.h>
     77 #include <sys/kernel.h>
     78 #include <sys/file.h>
     79 #include <sys/stat.h>
     80 #include <sys/buf.h>
     81 #include <sys/bufq.h>
     82 #include <sys/malloc.h>
     83 #include <sys/device.h>
     84 #include <sys/disklabel.h>
     85 #include <sys/syslog.h>
     86 #include <sys/proc.h>
     87 
     88 #include <machine/intr.h>
     89 #include <machine/bus.h>
     90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     91 #define    bus_space_write_multi_stream_2    bus_space_write_multi_2
     92 #define    bus_space_write_multi_stream_4    bus_space_write_multi_4
     93 #define    bus_space_read_multi_stream_2    bus_space_read_multi_2
     94 #define    bus_space_read_multi_stream_4    bus_space_read_multi_4
     95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     96 
     97 #include <dev/ata/atareg.h>
     98 #include <dev/ata/atavar.h>
     99 #include <dev/ic/wdcreg.h>
    100 #include <dev/ic/wdcvar.h>
    101 
    102 #define DEBUG_INTR   0x01
    103 #define DEBUG_XFERS  0x02
    104 #define DEBUG_STATUS 0x04
    105 #define DEBUG_FUNCS  0x08
    106 #define DEBUG_PROBE  0x10
    107 #ifdef ATADEBUG
    108 extern int wdcdebug_wd_mask; /* inited in wd.c */
    109 #define ATADEBUG_PRINT(args, level) \
    110 	if (wdcdebug_wd_mask & (level)) \
    111 		printf args
    112 #else
    113 #define ATADEBUG_PRINT(args, level)
    114 #endif
    115 
    116 #define ATA_DELAY 10000 /* 10s for a drive I/O */
    117 
    118 static int	wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*);
    119 static void	wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *);
    120 static void	_wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *);
    121 static int	wdc_ata_bio_intr(struct ata_channel *, struct ata_xfer *,
    122 				 int);
    123 static void	wdc_ata_bio_kill_xfer(struct ata_channel *,
    124 				      struct ata_xfer *, int);
    125 static void	wdc_ata_bio_done(struct ata_channel *, struct ata_xfer *);
    126 static int	wdc_ata_err(struct ata_drive_datas *, struct ata_bio *);
    127 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
    128 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
    129 #define WDC_ATA_ERR   0x02 /* Drive reports an error */
    130 static int	wdc_ata_addref(struct ata_drive_datas *);
    131 static void	wdc_ata_delref(struct ata_drive_datas *);
    132 
    133 const struct ata_bustype wdc_ata_bustype = {
    134 	SCSIPI_BUSTYPE_ATA,
    135 	wdc_ata_bio,
    136 	wdc_reset_drive,
    137 	wdc_reset_channel,
    138 	wdc_exec_command,
    139 	ata_get_params,
    140 	wdc_ata_addref,
    141 	wdc_ata_delref,
    142 	ata_kill_pending,
    143 };
    144 
    145 /*
    146  * Handle block I/O operation. Return ATACMD_COMPLETE, ATACMD_QUEUED, or
    147  * ATACMD_TRY_AGAIN. Must be called at splbio().
    148  */
    149 static int
    150 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
    151 {
    152 	struct ata_xfer *xfer;
    153 	struct ata_channel *chp = drvp->chnl_softc;
    154 	struct atac_softc *atac = chp->ch_atac;
    155 
    156 	xfer = ata_get_xfer(ATAXF_NOSLEEP);
    157 	if (xfer == NULL)
    158 		return ATACMD_TRY_AGAIN;
    159 	if (atac->atac_cap & ATAC_CAP_NOIRQ)
    160 		ata_bio->flags |= ATA_POLL;
    161 	if (ata_bio->flags & ATA_POLL)
    162 		xfer->c_flags |= C_POLL;
    163 	if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
    164 	    (ata_bio->flags & ATA_SINGLE) == 0)
    165 		xfer->c_flags |= C_DMA;
    166 	xfer->c_drive = drvp->drive;
    167 	xfer->c_cmd = ata_bio;
    168 	xfer->c_databuf = ata_bio->databuf;
    169 	xfer->c_bcount = ata_bio->bcount;
    170 	xfer->c_start = wdc_ata_bio_start;
    171 	xfer->c_intr = wdc_ata_bio_intr;
    172 	xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
    173 	ata_exec_xfer(chp, xfer);
    174 	return (ata_bio->flags & ATA_ITSDONE) ? ATACMD_COMPLETE : ATACMD_QUEUED;
    175 }
    176 
    177 static void
    178 wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
    179 {
    180 	struct atac_softc *atac = chp->ch_atac;
    181 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
    182 	struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
    183 	struct ata_bio *ata_bio = xfer->c_cmd;
    184 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    185 	int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
    186 	const char *errstring;
    187 
    188 	ATADEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
    189 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    190 	    DEBUG_XFERS);
    191 
    192 	/* Do control operations specially. */
    193 	if (__predict_false(drvp->state < READY)) {
    194 		/*
    195 		 * Actually, we want to be careful not to mess with the control
    196 		 * state if the device is currently busy, but we can assume
    197 		 * that we never get to this point if that's the case.
    198 		 */
    199 		/* If it's not a polled command, we need the kernel thread */
    200 		if ((xfer->c_flags & C_POLL) == 0 &&
    201 		    (chp->ch_flags & ATACH_TH_RUN) == 0) {
    202 			chp->ch_queue->queue_freeze++;
    203 			wakeup(&chp->ch_thread);
    204 			return;
    205 		}
    206 		/*
    207 		 * disable interrupts, all commands here should be quick
    208 		 * enouth to be able to poll, and we don't go here that often
    209 		 */
    210 		bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
    211 		    WDCTL_4BIT | WDCTL_IDS);
    212 		if (wdc->select)
    213 			wdc->select(chp, xfer->c_drive);
    214 		bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
    215 		    WDSD_IBM | (xfer->c_drive << 4));
    216 		DELAY(10);
    217 		errstring = "wait";
    218 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    219 			goto ctrltimeout;
    220 		wdccommandshort(chp, xfer->c_drive, WDCC_RECAL);
    221 		/* Wait for at last 400ns for status bit to be valid */
    222 		DELAY(1);
    223 		errstring = "recal";
    224 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    225 			goto ctrltimeout;
    226 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    227 			goto ctrlerror;
    228 		/* Don't try to set modes if controller can't be adjusted */
    229 		if (atac->atac_set_modes == NULL)
    230 			goto geometry;
    231 		/* Also don't try if the drive didn't report its mode */
    232 		if ((drvp->drive_flags & DRIVE_MODE) == 0)
    233 			goto geometry;
    234 		wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    235 		    0x08 | drvp->PIO_mode, WDSF_SET_MODE);
    236 		errstring = "piomode";
    237 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    238 			goto ctrltimeout;
    239 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    240 			goto ctrlerror;
    241 		if (drvp->drive_flags & DRIVE_UDMA) {
    242 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    243 			    0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
    244 		} else if (drvp->drive_flags & DRIVE_DMA) {
    245 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    246 			    0x20 | drvp->DMA_mode, WDSF_SET_MODE);
    247 		} else {
    248 			goto geometry;
    249 		}
    250 		errstring = "dmamode";
    251 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    252 			goto ctrltimeout;
    253 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    254 			goto ctrlerror;
    255 geometry:
    256 		if (ata_bio->flags & ATA_LBA)
    257 			goto multimode;
    258 		wdccommand(chp, xfer->c_drive, WDCC_IDP,
    259 		    ata_bio->lp->d_ncylinders,
    260 		    ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
    261 		    (ata_bio->lp->d_type == DTYPE_ST506) ?
    262 			ata_bio->lp->d_precompcyl / 4 : 0);
    263 		errstring = "geometry";
    264 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    265 			goto ctrltimeout;
    266 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    267 			goto ctrlerror;
    268 multimode:
    269 		if (ata_bio->multi == 1)
    270 			goto ready;
    271 		wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0,
    272 		    ata_bio->multi, 0);
    273 		errstring = "setmulti";
    274 		if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags))
    275 			goto ctrltimeout;
    276 		if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
    277 			goto ctrlerror;
    278 ready:
    279 		drvp->state = READY;
    280 		/*
    281 		 * The drive is usable now
    282 		 */
    283 		bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr,
    284 		    WDCTL_4BIT);
    285 		delay(10); /* some drives need a little delay here */
    286 	}
    287 
    288 	_wdc_ata_bio_start(chp, xfer);
    289 	return;
    290 ctrltimeout:
    291 	printf("%s:%d:%d: %s timed out\n",
    292 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    293 	    errstring);
    294 	ata_bio->error = TIMEOUT;
    295 	goto ctrldone;
    296 ctrlerror:
    297 	printf("%s:%d:%d: %s ",
    298 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    299 	    errstring);
    300 	if (chp->ch_status & WDCS_DWF) {
    301 		printf("drive fault\n");
    302 		ata_bio->error = ERR_DF;
    303 	} else {
    304 		printf("error (%x)\n", chp->ch_error);
    305 		ata_bio->r_error = chp->ch_error;
    306 		ata_bio->error = ERROR;
    307 	}
    308 ctrldone:
    309 	drvp->state = 0;
    310 	wdc_ata_bio_done(chp, xfer);
    311 	bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT);
    312 	return;
    313 }
    314 
    315 static void
    316 _wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
    317 {
    318 	struct atac_softc *atac = chp->ch_atac;
    319 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
    320 	struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
    321 	struct ata_bio *ata_bio = xfer->c_cmd;
    322 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    323 	int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
    324 	u_int16_t cyl;
    325 	u_int8_t head, sect, cmd = 0;
    326 	int nblks;
    327 	int dma_flags = 0;
    328 
    329 	ATADEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
    330 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    331 	    DEBUG_INTR | DEBUG_XFERS);
    332 
    333 	if (xfer->c_flags & C_DMA) {
    334 		if (drvp->n_xfers <= NXFER)
    335 			drvp->n_xfers++;
    336 		dma_flags = (ata_bio->flags & ATA_READ) ?  WDC_DMA_READ : 0;
    337 		if (ata_bio->flags & ATA_LBA48)
    338 			dma_flags |= WDC_DMA_LBA48;
    339 	}
    340 again:
    341 	/*
    342 	 *
    343 	 * When starting a multi-sector transfer, or doing single-sector
    344 	 * transfers...
    345 	 */
    346 	if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
    347 		if (ata_bio->flags & ATA_SINGLE)
    348 			nblks = 1;
    349 		else
    350 			nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    351 		/* Check for bad sectors and adjust transfer, if necessary. */
    352 		if ((ata_bio->lp->d_flags & D_BADSECT) != 0) {
    353 			long blkdiff;
    354 			int i;
    355 			for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1;
    356 			    i++) {
    357 				blkdiff -= ata_bio->blkno;
    358 				if (blkdiff < 0)
    359 					continue;
    360 				if (blkdiff == 0) {
    361 					/* Replace current block of transfer. */
    362 					ata_bio->blkno =
    363 					    ata_bio->lp->d_secperunit -
    364 					    ata_bio->lp->d_nsectors - i - 1;
    365 				}
    366 				if (blkdiff < nblks) {
    367 					/* Bad block inside transfer. */
    368 					ata_bio->flags |= ATA_SINGLE;
    369 					nblks = 1;
    370 				}
    371 				break;
    372 			}
    373 		/* Transfer is okay now. */
    374 		}
    375 		if (ata_bio->flags & ATA_LBA48) {
    376 			sect = 0;
    377 			cyl =  0;
    378 			head = 0;
    379 		} else if (ata_bio->flags & ATA_LBA) {
    380 			sect = (ata_bio->blkno >> 0) & 0xff;
    381 			cyl = (ata_bio->blkno >> 8) & 0xffff;
    382 			head = (ata_bio->blkno >> 24) & 0x0f;
    383 			head |= WDSD_LBA;
    384 		} else {
    385 			int blkno = ata_bio->blkno;
    386 			sect = blkno % ata_bio->lp->d_nsectors;
    387 			sect++;    /* Sectors begin with 1, not 0. */
    388 			blkno /= ata_bio->lp->d_nsectors;
    389 			head = blkno % ata_bio->lp->d_ntracks;
    390 			blkno /= ata_bio->lp->d_ntracks;
    391 			cyl = blkno;
    392 			head |= WDSD_CHS;
    393 		}
    394 		if (xfer->c_flags & C_DMA) {
    395 			ata_bio->nblks = nblks;
    396 			ata_bio->nbytes = xfer->c_bcount;
    397 			cmd = (ata_bio->flags & ATA_READ) ?
    398 			    WDCC_READDMA : WDCC_WRITEDMA;
    399 	    		/* Init the DMA channel. */
    400 			if ((*wdc->dma_init)(wdc->dma_arg,
    401 			    chp->ch_channel, xfer->c_drive,
    402 			    (char *)xfer->c_databuf + xfer->c_skip,
    403 			    ata_bio->nbytes, dma_flags) != 0) {
    404 				ata_bio->error = ERR_DMA;
    405 				ata_bio->r_error = 0;
    406 				wdc_ata_bio_done(chp, xfer);
    407 				return;
    408 			}
    409 			/* Initiate command */
    410 			if (wdc->select)
    411 				wdc->select(chp, xfer->c_drive);
    412 			bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
    413 			    0, WDSD_IBM | (xfer->c_drive << 4));
    414 			switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
    415 			case WDCWAIT_OK:
    416 				break;
    417 			case WDCWAIT_TOUT:
    418 				goto timeout;
    419 			case WDCWAIT_THR:
    420 				return;
    421 			}
    422 			if (ata_bio->flags & ATA_LBA48) {
    423 			    wdccommandext(chp, xfer->c_drive, atacmd_to48(cmd),
    424 				(u_int64_t)ata_bio->blkno, nblks);
    425 			} else {
    426 			    wdccommand(chp, xfer->c_drive, cmd, cyl,
    427 				head, sect, nblks, 0);
    428 			}
    429 			/* start the DMA channel */
    430 			(*wdc->dma_start)(wdc->dma_arg,
    431 			    chp->ch_channel, xfer->c_drive);
    432 			chp->ch_flags |= ATACH_DMA_WAIT;
    433 			/* start timeout machinery */
    434 			if ((xfer->c_flags & C_POLL) == 0)
    435 				callout_reset(&chp->ch_callout,
    436 				    ATA_DELAY / 1000 * hz, wdctimeout, chp);
    437 			/* wait for irq */
    438 			goto intr;
    439 		} /* else not DMA */
    440 		ata_bio->nblks = min(nblks, ata_bio->multi);
    441 		ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
    442 		KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0);
    443 		if (ata_bio->nblks > 1) {
    444 			cmd = (ata_bio->flags & ATA_READ) ?
    445 			    WDCC_READMULTI : WDCC_WRITEMULTI;
    446 		} else {
    447 			cmd = (ata_bio->flags & ATA_READ) ?
    448 			    WDCC_READ : WDCC_WRITE;
    449 		}
    450 		/* Initiate command! */
    451 		if (wdc->select)
    452 			wdc->select(chp, xfer->c_drive);
    453 		bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
    454 		    WDSD_IBM | (xfer->c_drive << 4));
    455 		switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) {
    456 		case WDCWAIT_OK:
    457 			break;
    458 		case WDCWAIT_TOUT:
    459 			goto timeout;
    460 		case WDCWAIT_THR:
    461 			return;
    462 		}
    463 		if (ata_bio->flags & ATA_LBA48) {
    464 		    wdccommandext(chp, xfer->c_drive, atacmd_to48(cmd),
    465 			(u_int64_t) ata_bio->blkno, nblks);
    466 		} else {
    467 		    wdccommand(chp, xfer->c_drive, cmd, cyl,
    468 			head, sect, nblks,
    469 			(ata_bio->lp->d_type == DTYPE_ST506) ?
    470 			ata_bio->lp->d_precompcyl / 4 : 0);
    471 		}
    472 		/* start timeout machinery */
    473 		if ((xfer->c_flags & C_POLL) == 0)
    474 			callout_reset(&chp->ch_callout,
    475 			    ATA_DELAY / 1000 * hz, wdctimeout, chp);
    476 	} else if (ata_bio->nblks > 1) {
    477 		/* The number of blocks in the last stretch may be smaller. */
    478 		nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
    479 		if (ata_bio->nblks > nblks) {
    480 		ata_bio->nblks = nblks;
    481 		ata_bio->nbytes = xfer->c_bcount;
    482 		}
    483 	}
    484 	/* If this was a write and not using DMA, push the data. */
    485 	if ((ata_bio->flags & ATA_READ) == 0) {
    486 		/*
    487 		 * we have to busy-wait here, we can't rely on running in
    488 		 * thread context.
    489 		 */
    490 		if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) {
    491 			printf("%s:%d:%d: timeout waiting for DRQ, "
    492 			    "st=0x%02x, err=0x%02x\n",
    493 			    atac->atac_dev.dv_xname, chp->ch_channel,
    494 			    xfer->c_drive, chp->ch_status, chp->ch_error);
    495 			if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    496 				ata_bio->error = TIMEOUT;
    497 			wdc_ata_bio_done(chp, xfer);
    498 			return;
    499 		}
    500 		if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
    501 			wdc_ata_bio_done(chp, xfer);
    502 			return;
    503 		}
    504 		wdc->dataout_pio(chp, drvp->drive_flags,
    505 		    (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes);
    506 	}
    507 
    508 intr:	/* Wait for IRQ (either real or polled) */
    509 	if ((ata_bio->flags & ATA_POLL) == 0) {
    510 		chp->ch_flags |= ATACH_IRQ_WAIT;
    511 	} else {
    512 		/* Wait for at last 400ns for status bit to be valid */
    513 		delay(1);
    514 		if (chp->ch_flags & ATACH_DMA_WAIT) {
    515 			wdc_dmawait(chp, xfer, ATA_DELAY);
    516 			chp->ch_flags &= ~ATACH_DMA_WAIT;
    517 		}
    518 		wdc_ata_bio_intr(chp, xfer, 0);
    519 		if ((ata_bio->flags & ATA_ITSDONE) == 0)
    520 			goto again;
    521 	}
    522 	return;
    523 timeout:
    524 	printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n",
    525 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    526 	    chp->ch_status, chp->ch_error);
    527 	if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
    528 		ata_bio->error = TIMEOUT;
    529 	wdc_ata_bio_done(chp, xfer);
    530 	return;
    531 }
    532 
    533 static int
    534 wdc_ata_bio_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq)
    535 {
    536 	struct atac_softc *atac = chp->ch_atac;
    537 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
    538 	struct ata_bio *ata_bio = xfer->c_cmd;
    539 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
    540 	int drv_err;
    541 
    542 	ATADEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
    543 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive),
    544 	    DEBUG_INTR | DEBUG_XFERS);
    545 
    546 
    547 	/* Is it not a transfer, but a control operation? */
    548 	if (drvp->state < READY) {
    549 		printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
    550 		    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    551 		    drvp->state);
    552 		panic("wdc_ata_bio_intr: bad state");
    553 	}
    554 
    555 	/*
    556 	 * if we missed an interrupt in a PIO transfer, reset and restart.
    557 	 * Don't try to continue transfer, we may have missed cycles.
    558 	 */
    559 	if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
    560 		ata_bio->error = TIMEOUT;
    561 		wdc_ata_bio_done(chp, xfer);
    562 		return 1;
    563 	}
    564 
    565 	/* Ack interrupt done by wdc_wait_for_unbusy */
    566 	if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) {
    567 		if (irq && (xfer->c_flags & C_TIMEOU) == 0)
    568 			return 0; /* IRQ was not for us */
    569 		printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
    570 		    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    571 		    xfer->c_bcount, xfer->c_skip);
    572 		ata_bio->error = TIMEOUT;
    573 		wdc_ata_bio_done(chp, xfer);
    574 		return 1;
    575 	}
    576 	if (wdc->irqack)
    577 		wdc->irqack(chp);
    578 
    579 	drv_err = wdc_ata_err(drvp, ata_bio);
    580 
    581 	/* If we were using DMA, Turn off the DMA channel and check for error */
    582 	if (xfer->c_flags & C_DMA) {
    583 		if (ata_bio->flags & ATA_POLL) {
    584 			/*
    585 			 * IDE drives deassert WDCS_BSY before transfer is
    586 			 * complete when using DMA. Polling for DRQ to deassert
    587 			 * is not enough DRQ is not required to be
    588 			 * asserted for DMA transfers, so poll for DRDY.
    589 			 */
    590 			if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY,
    591 			    ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) {
    592 				printf("%s:%d:%d: polled transfer timed out "
    593 				    "(st=0x%x)\n", atac->atac_dev.dv_xname,
    594 				    chp->ch_channel, xfer->c_drive,
    595 				    chp->ch_status);
    596 				ata_bio->error = TIMEOUT;
    597 				drv_err = WDC_ATA_ERR;
    598 			}
    599 		}
    600 		if (wdc->dma_status != 0) {
    601 			if (drv_err != WDC_ATA_ERR) {
    602 				ata_bio->error = ERR_DMA;
    603 				drv_err = WDC_ATA_ERR;
    604 			}
    605 		}
    606 		if (chp->ch_status & WDCS_DRQ) {
    607 			if (drv_err != WDC_ATA_ERR) {
    608 				printf("%s:%d:%d: intr with DRQ (st=0x%x)\n",
    609 				    atac->atac_dev.dv_xname, chp->ch_channel,
    610 				    xfer->c_drive, chp->ch_status);
    611 				ata_bio->error = TIMEOUT;
    612 				drv_err = WDC_ATA_ERR;
    613 			}
    614 		}
    615 		if (drv_err != WDC_ATA_ERR)
    616 			goto end;
    617 		if (ata_bio->r_error & WDCE_CRC || ata_bio->error == ERR_DMA)
    618 			ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0);
    619 	}
    620 
    621 	/* if we had an error, end */
    622 	if (drv_err == WDC_ATA_ERR) {
    623 		wdc_ata_bio_done(chp, xfer);
    624 		return 1;
    625 	}
    626 
    627 	/* If this was a read and not using DMA, fetch the data. */
    628 	if ((ata_bio->flags & ATA_READ) != 0) {
    629 		if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
    630 			printf("%s:%d:%d: read intr before drq\n",
    631 			    atac->atac_dev.dv_xname, chp->ch_channel,
    632 			    xfer->c_drive);
    633 			ata_bio->error = TIMEOUT;
    634 			wdc_ata_bio_done(chp, xfer);
    635 			return 1;
    636 		}
    637 		wdc->datain_pio(chp, drvp->drive_flags,
    638 		    (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes);
    639 	}
    640 
    641 end:
    642 	ata_bio->blkno += ata_bio->nblks;
    643 	ata_bio->blkdone += ata_bio->nblks;
    644 	xfer->c_skip += ata_bio->nbytes;
    645 	xfer->c_bcount -= ata_bio->nbytes;
    646 	/* See if this transfer is complete. */
    647 	if (xfer->c_bcount > 0) {
    648 		if ((ata_bio->flags & ATA_POLL) == 0) {
    649 			/* Start the next operation */
    650 			_wdc_ata_bio_start(chp, xfer);
    651 		} else {
    652 			/* Let _wdc_ata_bio_start do the loop */
    653 			return 1;
    654 		}
    655 	} else { /* Done with this transfer */
    656 		ata_bio->error = NOERROR;
    657 		wdc_ata_bio_done(chp, xfer);
    658 	}
    659 	return 1;
    660 }
    661 
    662 static void
    663 wdc_ata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
    664     int reason)
    665 {
    666 	struct ata_bio *ata_bio = xfer->c_cmd;
    667 	int drive = xfer->c_drive;
    668 
    669 	ata_free_xfer(chp, xfer);
    670 
    671 	ata_bio->flags |= ATA_ITSDONE;
    672 	switch (reason) {
    673 	case KILL_GONE:
    674 		ata_bio->error = ERR_NODEV;
    675 		break;
    676 	case KILL_RESET:
    677 		ata_bio->error = ERR_RESET;
    678 		break;
    679 	default:
    680 		printf("wdc_ata_bio_kill_xfer: unknown reason %d\n",
    681 		    reason);
    682 		panic("wdc_ata_bio_kill_xfer");
    683 	}
    684 	ata_bio->r_error = WDCE_ABRT;
    685 	ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
    686 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
    687 }
    688 
    689 static void
    690 wdc_ata_bio_done(struct ata_channel *chp, struct ata_xfer *xfer)
    691 {
    692 	struct atac_softc *atac = chp->ch_atac;
    693 	struct ata_bio *ata_bio = xfer->c_cmd;
    694 	int drive = xfer->c_drive;
    695 
    696 	ATADEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
    697 	    atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive,
    698 	    (u_int)xfer->c_flags),
    699 	    DEBUG_XFERS);
    700 
    701 	callout_stop(&chp->ch_callout);
    702 
    703 	/* feed back residual bcount to our caller */
    704 	ata_bio->bcount = xfer->c_bcount;
    705 
    706 	/* mark controller inactive and free xfer */
    707 	chp->ch_queue->active_xfer = NULL;
    708 	ata_free_xfer(chp, xfer);
    709 
    710 	if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) {
    711 		ata_bio->error = ERR_NODEV;
    712 		chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN;
    713 		wakeup(&chp->ch_queue->active_xfer);
    714 	}
    715 	ata_bio->flags |= ATA_ITSDONE;
    716 	ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS);
    717 	(*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
    718 	ATADEBUG_PRINT(("atastart from wdc_ata_done, flags 0x%x\n",
    719 	    chp->ch_flags), DEBUG_XFERS);
    720 	atastart(chp);
    721 }
    722 
    723 static int
    724 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
    725 {
    726 	struct ata_channel *chp = drvp->chnl_softc;
    727 	ata_bio->error = 0;
    728 	if (chp->ch_status & WDCS_BSY) {
    729 		ata_bio->error = TIMEOUT;
    730 		return WDC_ATA_ERR;
    731 	}
    732 
    733 	if (chp->ch_status & WDCS_DWF) {
    734 		ata_bio->error = ERR_DF;
    735 		return WDC_ATA_ERR;
    736 	}
    737 
    738 	if (chp->ch_status & WDCS_ERR) {
    739 		ata_bio->error = ERROR;
    740 		ata_bio->r_error = chp->ch_error;
    741 		if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
    742 		    WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
    743 			return WDC_ATA_ERR;
    744 		return WDC_ATA_NOERR;
    745 	}
    746 
    747 	if (chp->ch_status & WDCS_CORR)
    748 		ata_bio->flags |= ATA_CORR;
    749 	return WDC_ATA_NOERR;
    750 }
    751 
    752 static int
    753 wdc_ata_addref(struct ata_drive_datas *drvp)
    754 {
    755 	struct ata_channel *chp = drvp->chnl_softc;
    756 
    757 	return (ata_addref(chp));
    758 }
    759 
    760 static void
    761 wdc_ata_delref(struct ata_drive_datas *drvp)
    762 {
    763 	struct ata_channel *chp = drvp->chnl_softc;
    764 
    765 	ata_delref(chp);
    766 }
    767