ata_wdc.c revision 1.84
1 /* $NetBSD: ata_wdc.c,v 1.84 2006/09/07 12:34:42 itohy Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001, 2003 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 34 * All rights reserved. 35 * 36 * This code is derived from software contributed to The NetBSD Foundation 37 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the NetBSD 50 * Foundation, Inc. and its contributors. 51 * 4. Neither the name of The NetBSD Foundation nor the names of its 52 * contributors may be used to endorse or promote products derived 53 * from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 56 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 57 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 58 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 59 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 60 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 61 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 62 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 63 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 64 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 65 * POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.84 2006/09/07 12:34:42 itohy Exp $"); 70 71 #ifndef ATADEBUG 72 #define ATADEBUG 73 #endif /* ATADEBUG */ 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/file.h> 79 #include <sys/stat.h> 80 #include <sys/buf.h> 81 #include <sys/bufq.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 #include <sys/disklabel.h> 85 #include <sys/syslog.h> 86 #include <sys/proc.h> 87 88 #include <machine/intr.h> 89 #include <machine/bus.h> 90 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 93 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 94 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 95 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 96 97 #include <dev/ata/ataconf.h> 98 #include <dev/ata/atareg.h> 99 #include <dev/ata/atavar.h> 100 #include <dev/ic/wdcreg.h> 101 #include <dev/ic/wdcvar.h> 102 103 #define DEBUG_INTR 0x01 104 #define DEBUG_XFERS 0x02 105 #define DEBUG_STATUS 0x04 106 #define DEBUG_FUNCS 0x08 107 #define DEBUG_PROBE 0x10 108 #ifdef ATADEBUG 109 extern int wdcdebug_wd_mask; /* inited in wd.c */ 110 #define ATADEBUG_PRINT(args, level) \ 111 if (wdcdebug_wd_mask & (level)) \ 112 printf args 113 #else 114 #define ATADEBUG_PRINT(args, level) 115 #endif 116 117 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 118 119 static int wdc_ata_bio(struct ata_drive_datas*, struct ata_bio*); 120 static void wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *); 121 static void _wdc_ata_bio_start(struct ata_channel *,struct ata_xfer *); 122 static int wdc_ata_bio_intr(struct ata_channel *, struct ata_xfer *, 123 int); 124 static void wdc_ata_bio_kill_xfer(struct ata_channel *, 125 struct ata_xfer *, int); 126 static void wdc_ata_bio_done(struct ata_channel *, struct ata_xfer *); 127 static int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 128 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 129 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 130 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 131 static int wdc_ata_addref(struct ata_drive_datas *); 132 static void wdc_ata_delref(struct ata_drive_datas *); 133 134 const struct ata_bustype wdc_ata_bustype = { 135 SCSIPI_BUSTYPE_ATA, 136 wdc_ata_bio, 137 wdc_reset_drive, 138 wdc_reset_channel, 139 wdc_exec_command, 140 ata_get_params, 141 wdc_ata_addref, 142 wdc_ata_delref, 143 ata_kill_pending, 144 }; 145 146 /* 147 * Handle block I/O operation. Return ATACMD_COMPLETE, ATACMD_QUEUED, or 148 * ATACMD_TRY_AGAIN. Must be called at splbio(). 149 */ 150 static int 151 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 152 { 153 struct ata_xfer *xfer; 154 struct ata_channel *chp = drvp->chnl_softc; 155 struct atac_softc *atac = chp->ch_atac; 156 157 xfer = ata_get_xfer(ATAXF_NOSLEEP); 158 if (xfer == NULL) 159 return ATACMD_TRY_AGAIN; 160 if (atac->atac_cap & ATAC_CAP_NOIRQ) 161 ata_bio->flags |= ATA_POLL; 162 if (ata_bio->flags & ATA_POLL) 163 xfer->c_flags |= C_POLL; 164 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 165 (ata_bio->flags & ATA_SINGLE) == 0) 166 xfer->c_flags |= C_DMA; 167 #if NATA_PIOBM 168 else if (atac->atac_cap & ATAC_CAP_PIOBM) 169 xfer->c_flags |= C_PIOBM; 170 #endif 171 xfer->c_drive = drvp->drive; 172 xfer->c_cmd = ata_bio; 173 xfer->c_databuf = ata_bio->databuf; 174 xfer->c_bcount = ata_bio->bcount; 175 xfer->c_start = wdc_ata_bio_start; 176 xfer->c_intr = wdc_ata_bio_intr; 177 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 178 ata_exec_xfer(chp, xfer); 179 return (ata_bio->flags & ATA_ITSDONE) ? ATACMD_COMPLETE : ATACMD_QUEUED; 180 } 181 182 static void 183 wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 184 { 185 struct atac_softc *atac = chp->ch_atac; 186 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 187 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 188 struct ata_bio *ata_bio = xfer->c_cmd; 189 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 190 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 191 const char *errstring; 192 193 ATADEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 194 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 195 DEBUG_XFERS); 196 197 /* Do control operations specially. */ 198 if (__predict_false(drvp->state < READY)) { 199 /* 200 * Actually, we want to be careful not to mess with the control 201 * state if the device is currently busy, but we can assume 202 * that we never get to this point if that's the case. 203 */ 204 /* If it's not a polled command, we need the kernel thread */ 205 if ((xfer->c_flags & C_POLL) == 0 && 206 (chp->ch_flags & ATACH_TH_RUN) == 0) { 207 chp->ch_queue->queue_freeze++; 208 wakeup(&chp->ch_thread); 209 return; 210 } 211 /* 212 * disable interrupts, all commands here should be quick 213 * enouth to be able to poll, and we don't go here that often 214 */ 215 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 216 WDCTL_4BIT | WDCTL_IDS); 217 if (wdc->select) 218 wdc->select(chp, xfer->c_drive); 219 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 220 WDSD_IBM | (xfer->c_drive << 4)); 221 DELAY(10); 222 errstring = "wait"; 223 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 224 goto ctrltimeout; 225 wdccommandshort(chp, xfer->c_drive, WDCC_RECAL); 226 /* Wait for at last 400ns for status bit to be valid */ 227 DELAY(1); 228 errstring = "recal"; 229 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 230 goto ctrltimeout; 231 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 232 goto ctrlerror; 233 /* Don't try to set modes if controller can't be adjusted */ 234 if (atac->atac_set_modes == NULL) 235 goto geometry; 236 /* Also don't try if the drive didn't report its mode */ 237 if ((drvp->drive_flags & DRIVE_MODE) == 0) 238 goto geometry; 239 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 240 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 241 errstring = "piomode"; 242 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 243 goto ctrltimeout; 244 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 245 goto ctrlerror; 246 if (drvp->drive_flags & DRIVE_UDMA) { 247 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 248 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 249 } else if (drvp->drive_flags & DRIVE_DMA) { 250 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 251 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 252 } else { 253 goto geometry; 254 } 255 errstring = "dmamode"; 256 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 257 goto ctrltimeout; 258 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 259 goto ctrlerror; 260 geometry: 261 if (ata_bio->flags & ATA_LBA) 262 goto multimode; 263 wdccommand(chp, xfer->c_drive, WDCC_IDP, 264 ata_bio->lp->d_ncylinders, 265 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 266 (ata_bio->lp->d_type == DTYPE_ST506) ? 267 ata_bio->lp->d_precompcyl / 4 : 0); 268 errstring = "geometry"; 269 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 270 goto ctrltimeout; 271 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 272 goto ctrlerror; 273 multimode: 274 if (ata_bio->multi == 1) 275 goto ready; 276 wdccommand(chp, xfer->c_drive, WDCC_SETMULTI, 0, 0, 0, 277 ata_bio->multi, 0); 278 errstring = "setmulti"; 279 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY, wait_flags)) 280 goto ctrltimeout; 281 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 282 goto ctrlerror; 283 ready: 284 drvp->state = READY; 285 /* 286 * The drive is usable now 287 */ 288 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 289 WDCTL_4BIT); 290 delay(10); /* some drives need a little delay here */ 291 } 292 293 _wdc_ata_bio_start(chp, xfer); 294 return; 295 ctrltimeout: 296 printf("%s:%d:%d: %s timed out\n", 297 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 298 errstring); 299 ata_bio->error = TIMEOUT; 300 goto ctrldone; 301 ctrlerror: 302 printf("%s:%d:%d: %s ", 303 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 304 errstring); 305 if (chp->ch_status & WDCS_DWF) { 306 printf("drive fault\n"); 307 ata_bio->error = ERR_DF; 308 } else { 309 printf("error (%x)\n", chp->ch_error); 310 ata_bio->r_error = chp->ch_error; 311 ata_bio->error = ERROR; 312 } 313 ctrldone: 314 drvp->state = 0; 315 wdc_ata_bio_done(chp, xfer); 316 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 317 return; 318 } 319 320 static void 321 _wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 322 { 323 struct atac_softc *atac = chp->ch_atac; 324 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 325 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 326 struct ata_bio *ata_bio = xfer->c_cmd; 327 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 328 int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0; 329 u_int16_t cyl; 330 u_int8_t head, sect, cmd = 0; 331 int nblks, error; 332 int dma_flags = 0; 333 334 ATADEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 335 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 336 DEBUG_INTR | DEBUG_XFERS); 337 338 if (xfer->c_flags & (C_DMA | C_PIOBM)) { 339 if (drvp->n_xfers <= NXFER) 340 drvp->n_xfers++; 341 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 342 if (ata_bio->flags & ATA_LBA48) 343 dma_flags |= WDC_DMA_LBA48; 344 } 345 again: 346 /* 347 * 348 * When starting a multi-sector transfer, or doing single-sector 349 * transfers... 350 */ 351 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 352 if (ata_bio->flags & ATA_SINGLE) 353 nblks = 1; 354 else 355 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 356 /* Check for bad sectors and adjust transfer, if necessary. */ 357 if ((ata_bio->lp->d_flags & D_BADSECT) != 0) { 358 long blkdiff; 359 int i; 360 for (i = 0; (blkdiff = ata_bio->badsect[i]) != -1; 361 i++) { 362 blkdiff -= ata_bio->blkno; 363 if (blkdiff < 0) 364 continue; 365 if (blkdiff == 0) { 366 /* Replace current block of transfer. */ 367 ata_bio->blkno = 368 ata_bio->lp->d_secperunit - 369 ata_bio->lp->d_nsectors - i - 1; 370 } 371 if (blkdiff < nblks) { 372 /* Bad block inside transfer. */ 373 ata_bio->flags |= ATA_SINGLE; 374 nblks = 1; 375 } 376 break; 377 } 378 /* Transfer is okay now. */ 379 } 380 if (ata_bio->flags & ATA_LBA48) { 381 sect = 0; 382 cyl = 0; 383 head = 0; 384 } else if (ata_bio->flags & ATA_LBA) { 385 sect = (ata_bio->blkno >> 0) & 0xff; 386 cyl = (ata_bio->blkno >> 8) & 0xffff; 387 head = (ata_bio->blkno >> 24) & 0x0f; 388 head |= WDSD_LBA; 389 } else { 390 int blkno = ata_bio->blkno; 391 sect = blkno % ata_bio->lp->d_nsectors; 392 sect++; /* Sectors begin with 1, not 0. */ 393 blkno /= ata_bio->lp->d_nsectors; 394 head = blkno % ata_bio->lp->d_ntracks; 395 blkno /= ata_bio->lp->d_ntracks; 396 cyl = blkno; 397 head |= WDSD_CHS; 398 } 399 if (xfer->c_flags & C_DMA) { 400 ata_bio->nblks = nblks; 401 ata_bio->nbytes = xfer->c_bcount; 402 cmd = (ata_bio->flags & ATA_READ) ? 403 WDCC_READDMA : WDCC_WRITEDMA; 404 /* Init the DMA channel. */ 405 error = (*wdc->dma_init)(wdc->dma_arg, 406 chp->ch_channel, xfer->c_drive, 407 (char *)xfer->c_databuf + xfer->c_skip, 408 ata_bio->nbytes, dma_flags); 409 if (error) { 410 if (error == EINVAL) { 411 /* 412 * We can't do DMA on this transfer 413 * for some reason. Fall back to 414 * PIO. 415 */ 416 xfer->c_flags &= ~C_DMA; 417 error = 0; 418 goto do_pio; 419 } 420 ata_bio->error = ERR_DMA; 421 ata_bio->r_error = 0; 422 wdc_ata_bio_done(chp, xfer); 423 return; 424 } 425 /* Initiate command */ 426 if (wdc->select) 427 wdc->select(chp, xfer->c_drive); 428 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 429 0, WDSD_IBM | (xfer->c_drive << 4)); 430 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 431 case WDCWAIT_OK: 432 break; 433 case WDCWAIT_TOUT: 434 goto timeout; 435 case WDCWAIT_THR: 436 return; 437 } 438 if (ata_bio->flags & ATA_LBA48) { 439 wdccommandext(chp, xfer->c_drive, atacmd_to48(cmd), 440 (u_int64_t)ata_bio->blkno, nblks); 441 } else { 442 wdccommand(chp, xfer->c_drive, cmd, cyl, 443 head, sect, nblks, 0); 444 } 445 /* start the DMA channel */ 446 (*wdc->dma_start)(wdc->dma_arg, 447 chp->ch_channel, xfer->c_drive); 448 chp->ch_flags |= ATACH_DMA_WAIT; 449 /* start timeout machinery */ 450 if ((xfer->c_flags & C_POLL) == 0) 451 callout_reset(&chp->ch_callout, 452 ATA_DELAY / 1000 * hz, wdctimeout, chp); 453 /* wait for irq */ 454 goto intr; 455 } /* else not DMA */ 456 do_pio: 457 #if NATA_PIOBM 458 if ((xfer->c_flags & C_PIOBM) && xfer->c_skip == 0) { 459 if (ata_bio->flags & ATA_POLL) { 460 /* XXX not supported yet --- fall back to PIO */ 461 xfer->c_flags &= ~C_PIOBM; 462 } else { 463 /* Init the DMA channel. */ 464 error = (*wdc->dma_init)(wdc->dma_arg, 465 chp->ch_channel, xfer->c_drive, 466 (char *)xfer->c_databuf + xfer->c_skip, 467 xfer->c_bcount, 468 dma_flags | WDC_DMA_PIOBM_ATA); 469 if (error) { 470 if (error == EINVAL) { 471 /* 472 * We can't do DMA on this 473 * transfer for some reason. 474 * Fall back to PIO. 475 */ 476 xfer->c_flags &= ~C_PIOBM; 477 error = 0; 478 } else { 479 ata_bio->error = ERR_DMA; 480 ata_bio->r_error = 0; 481 wdc_ata_bio_done(chp, xfer); 482 return; 483 } 484 } 485 } 486 } 487 #endif 488 ata_bio->nblks = min(nblks, ata_bio->multi); 489 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 490 KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0); 491 if (ata_bio->nblks > 1) { 492 cmd = (ata_bio->flags & ATA_READ) ? 493 WDCC_READMULTI : WDCC_WRITEMULTI; 494 } else { 495 cmd = (ata_bio->flags & ATA_READ) ? 496 WDCC_READ : WDCC_WRITE; 497 } 498 /* Initiate command! */ 499 if (wdc->select) 500 wdc->select(chp, xfer->c_drive); 501 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 502 WDSD_IBM | (xfer->c_drive << 4)); 503 switch(wdc_wait_for_ready(chp, ATA_DELAY, wait_flags)) { 504 case WDCWAIT_OK: 505 break; 506 case WDCWAIT_TOUT: 507 goto timeout; 508 case WDCWAIT_THR: 509 return; 510 } 511 if (ata_bio->flags & ATA_LBA48) { 512 wdccommandext(chp, xfer->c_drive, atacmd_to48(cmd), 513 (u_int64_t) ata_bio->blkno, nblks); 514 } else { 515 wdccommand(chp, xfer->c_drive, cmd, cyl, 516 head, sect, nblks, 517 (ata_bio->lp->d_type == DTYPE_ST506) ? 518 ata_bio->lp->d_precompcyl / 4 : 0); 519 } 520 /* start timeout machinery */ 521 if ((xfer->c_flags & C_POLL) == 0) 522 callout_reset(&chp->ch_callout, 523 ATA_DELAY / 1000 * hz, wdctimeout, chp); 524 } else if (ata_bio->nblks > 1) { 525 /* The number of blocks in the last stretch may be smaller. */ 526 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 527 if (ata_bio->nblks > nblks) { 528 ata_bio->nblks = nblks; 529 ata_bio->nbytes = xfer->c_bcount; 530 } 531 } 532 /* If this was a write and not using DMA, push the data. */ 533 if ((ata_bio->flags & ATA_READ) == 0) { 534 /* 535 * we have to busy-wait here, we can't rely on running in 536 * thread context. 537 */ 538 if (wdc_wait_for_drq(chp, ATA_DELAY, AT_POLL) != 0) { 539 printf("%s:%d:%d: timeout waiting for DRQ, " 540 "st=0x%02x, err=0x%02x\n", 541 atac->atac_dev.dv_xname, chp->ch_channel, 542 xfer->c_drive, chp->ch_status, chp->ch_error); 543 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 544 ata_bio->error = TIMEOUT; 545 wdc_ata_bio_done(chp, xfer); 546 return; 547 } 548 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 549 wdc_ata_bio_done(chp, xfer); 550 return; 551 } 552 #if NATA_PIOBM 553 if (xfer->c_flags & C_PIOBM) { 554 /* start the busmastering PIO */ 555 (*wdc->piobm_start)(wdc->dma_arg, 556 chp->ch_channel, xfer->c_drive, 557 xfer->c_skip, ata_bio->nbytes, 0); 558 chp->ch_flags |= ATACH_DMA_WAIT; 559 } else 560 #endif 561 562 wdc->dataout_pio(chp, drvp->drive_flags, 563 (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes); 564 } 565 566 intr: /* Wait for IRQ (either real or polled) */ 567 if ((ata_bio->flags & ATA_POLL) == 0) { 568 chp->ch_flags |= ATACH_IRQ_WAIT; 569 } else { 570 /* Wait for at last 400ns for status bit to be valid */ 571 delay(1); 572 if (chp->ch_flags & ATACH_DMA_WAIT) { 573 wdc_dmawait(chp, xfer, ATA_DELAY); 574 chp->ch_flags &= ~ATACH_DMA_WAIT; 575 } 576 wdc_ata_bio_intr(chp, xfer, 0); 577 if ((ata_bio->flags & ATA_ITSDONE) == 0) 578 goto again; 579 } 580 return; 581 timeout: 582 printf("%s:%d:%d: not ready, st=0x%02x, err=0x%02x\n", 583 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 584 chp->ch_status, chp->ch_error); 585 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 586 ata_bio->error = TIMEOUT; 587 wdc_ata_bio_done(chp, xfer); 588 return; 589 } 590 591 static int 592 wdc_ata_bio_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 593 { 594 struct atac_softc *atac = chp->ch_atac; 595 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 596 struct ata_bio *ata_bio = xfer->c_cmd; 597 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 598 int drv_err; 599 600 ATADEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 601 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive), 602 DEBUG_INTR | DEBUG_XFERS); 603 604 605 /* Is it not a transfer, but a control operation? */ 606 if (drvp->state < READY) { 607 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 608 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 609 drvp->state); 610 panic("wdc_ata_bio_intr: bad state"); 611 } 612 613 /* 614 * if we missed an interrupt in a PIO transfer, reset and restart. 615 * Don't try to continue transfer, we may have missed cycles. 616 */ 617 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 618 ata_bio->error = TIMEOUT; 619 wdc_ata_bio_done(chp, xfer); 620 return 1; 621 } 622 623 #if NATA_PIOBM 624 /* Transfer-done interrupt for busmastering PIO read */ 625 if ((xfer->c_flags & C_PIOBM) && (chp->ch_flags & ATACH_PIOBM_WAIT)) { 626 chp->ch_flags &= ~ATACH_PIOBM_WAIT; 627 goto end; 628 } 629 #endif 630 631 /* Ack interrupt done by wdc_wait_for_unbusy */ 632 if (wdc_wait_for_unbusy(chp, (irq == 0) ? ATA_DELAY : 0, AT_POLL) < 0) { 633 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 634 return 0; /* IRQ was not for us */ 635 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 636 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 637 xfer->c_bcount, xfer->c_skip); 638 ata_bio->error = TIMEOUT; 639 wdc_ata_bio_done(chp, xfer); 640 return 1; 641 } 642 if (wdc->irqack) 643 wdc->irqack(chp); 644 645 drv_err = wdc_ata_err(drvp, ata_bio); 646 647 /* If we were using DMA, Turn off the DMA channel and check for error */ 648 if (xfer->c_flags & C_DMA) { 649 if (ata_bio->flags & ATA_POLL) { 650 /* 651 * IDE drives deassert WDCS_BSY before transfer is 652 * complete when using DMA. Polling for DRQ to deassert 653 * is not enough DRQ is not required to be 654 * asserted for DMA transfers, so poll for DRDY. 655 */ 656 if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 657 ATA_DELAY, ATA_POLL) == WDCWAIT_TOUT) { 658 printf("%s:%d:%d: polled transfer timed out " 659 "(st=0x%x)\n", atac->atac_dev.dv_xname, 660 chp->ch_channel, xfer->c_drive, 661 chp->ch_status); 662 ata_bio->error = TIMEOUT; 663 drv_err = WDC_ATA_ERR; 664 } 665 } 666 if (wdc->dma_status != 0) { 667 if (drv_err != WDC_ATA_ERR) { 668 ata_bio->error = ERR_DMA; 669 drv_err = WDC_ATA_ERR; 670 } 671 } 672 if (chp->ch_status & WDCS_DRQ) { 673 if (drv_err != WDC_ATA_ERR) { 674 printf("%s:%d:%d: intr with DRQ (st=0x%x)\n", 675 atac->atac_dev.dv_xname, chp->ch_channel, 676 xfer->c_drive, chp->ch_status); 677 ata_bio->error = TIMEOUT; 678 drv_err = WDC_ATA_ERR; 679 } 680 } 681 if (drv_err != WDC_ATA_ERR) 682 goto end; 683 if (ata_bio->r_error & WDCE_CRC || ata_bio->error == ERR_DMA) 684 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 685 } 686 687 /* if we had an error, end */ 688 if (drv_err == WDC_ATA_ERR) { 689 wdc_ata_bio_done(chp, xfer); 690 return 1; 691 } 692 693 /* If this was a read and not using DMA, fetch the data. */ 694 if ((ata_bio->flags & ATA_READ) != 0) { 695 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 696 printf("%s:%d:%d: read intr before drq\n", 697 atac->atac_dev.dv_xname, chp->ch_channel, 698 xfer->c_drive); 699 ata_bio->error = TIMEOUT; 700 wdc_ata_bio_done(chp, xfer); 701 return 1; 702 } 703 #if NATA_PIOBM 704 if (xfer->c_flags & C_PIOBM) { 705 /* start the busmastering PIO */ 706 (*wdc->piobm_start)(wdc->dma_arg, 707 chp->ch_channel, xfer->c_drive, 708 xfer->c_skip, ata_bio->nbytes, 709 WDC_PIOBM_XFER_IRQ); 710 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT; 711 return 1; 712 } else 713 #endif 714 wdc->datain_pio(chp, drvp->drive_flags, 715 (char *)xfer->c_databuf + xfer->c_skip, ata_bio->nbytes); 716 } 717 718 end: 719 ata_bio->blkno += ata_bio->nblks; 720 ata_bio->blkdone += ata_bio->nblks; 721 xfer->c_skip += ata_bio->nbytes; 722 xfer->c_bcount -= ata_bio->nbytes; 723 /* See if this transfer is complete. */ 724 if (xfer->c_bcount > 0) { 725 if ((ata_bio->flags & ATA_POLL) == 0) { 726 /* Start the next operation */ 727 _wdc_ata_bio_start(chp, xfer); 728 } else { 729 /* Let _wdc_ata_bio_start do the loop */ 730 return 1; 731 } 732 } else { /* Done with this transfer */ 733 ata_bio->error = NOERROR; 734 wdc_ata_bio_done(chp, xfer); 735 } 736 return 1; 737 } 738 739 static void 740 wdc_ata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 741 int reason) 742 { 743 struct ata_bio *ata_bio = xfer->c_cmd; 744 int drive = xfer->c_drive; 745 746 ata_free_xfer(chp, xfer); 747 748 ata_bio->flags |= ATA_ITSDONE; 749 switch (reason) { 750 case KILL_GONE: 751 ata_bio->error = ERR_NODEV; 752 break; 753 case KILL_RESET: 754 ata_bio->error = ERR_RESET; 755 break; 756 default: 757 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 758 reason); 759 panic("wdc_ata_bio_kill_xfer"); 760 } 761 ata_bio->r_error = WDCE_ABRT; 762 ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 763 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 764 } 765 766 static void 767 wdc_ata_bio_done(struct ata_channel *chp, struct ata_xfer *xfer) 768 { 769 struct atac_softc *atac = chp->ch_atac; 770 struct ata_bio *ata_bio = xfer->c_cmd; 771 int drive = xfer->c_drive; 772 773 ATADEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 774 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 775 (u_int)xfer->c_flags), 776 DEBUG_XFERS); 777 778 callout_stop(&chp->ch_callout); 779 780 /* feed back residual bcount to our caller */ 781 ata_bio->bcount = xfer->c_bcount; 782 783 /* mark controller inactive and free xfer */ 784 chp->ch_queue->active_xfer = NULL; 785 ata_free_xfer(chp, xfer); 786 787 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 788 ata_bio->error = ERR_NODEV; 789 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 790 wakeup(&chp->ch_queue->active_xfer); 791 } 792 ata_bio->flags |= ATA_ITSDONE; 793 ATADEBUG_PRINT(("wdc_ata_done: drv_done\n"), DEBUG_XFERS); 794 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 795 ATADEBUG_PRINT(("atastart from wdc_ata_done, flags 0x%x\n", 796 chp->ch_flags), DEBUG_XFERS); 797 atastart(chp); 798 } 799 800 static int 801 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 802 { 803 struct ata_channel *chp = drvp->chnl_softc; 804 ata_bio->error = 0; 805 if (chp->ch_status & WDCS_BSY) { 806 ata_bio->error = TIMEOUT; 807 return WDC_ATA_ERR; 808 } 809 810 if (chp->ch_status & WDCS_DWF) { 811 ata_bio->error = ERR_DF; 812 return WDC_ATA_ERR; 813 } 814 815 if (chp->ch_status & WDCS_ERR) { 816 ata_bio->error = ERROR; 817 ata_bio->r_error = chp->ch_error; 818 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 819 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 820 return WDC_ATA_ERR; 821 return WDC_ATA_NOERR; 822 } 823 824 if (chp->ch_status & WDCS_CORR) 825 ata_bio->flags |= ATA_CORR; 826 return WDC_ATA_NOERR; 827 } 828 829 static int 830 wdc_ata_addref(struct ata_drive_datas *drvp) 831 { 832 struct ata_channel *chp = drvp->chnl_softc; 833 834 return (ata_addref(chp)); 835 } 836 837 static void 838 wdc_ata_delref(struct ata_drive_datas *drvp) 839 { 840 struct ata_channel *chp = drvp->chnl_softc; 841 842 ata_delref(chp); 843 } 844
Indexes created Tue Sep 30 20:09:53 GMT 2025