atareg.h revision 1.5
1 1.5 bouyer /* $NetBSD: atareg.h,v 1.5 1999/01/18 20:06:24 bouyer Exp $ */ 2 1.2 bouyer 3 1.2 bouyer /* 4 1.2 bouyer * Drive parameter structure for ATA/ATAPI. 5 1.2 bouyer * Bit fields: WDC_* : common to ATA/ATAPI 6 1.2 bouyer * ATA_* : ATA only 7 1.2 bouyer * ATAPI_* : ATAPI only. 8 1.2 bouyer */ 9 1.2 bouyer struct ataparams { 10 1.2 bouyer /* drive info */ 11 1.2 bouyer u_int16_t atap_config; /* 0: general configuration */ 12 1.2 bouyer #define WDC_CFG_ATAPI_MASK 0xc000 13 1.2 bouyer #define WDC_CFG_ATAPI 0x8000 14 1.2 bouyer #define ATA_CFG_REMOVABLE 0x0080 15 1.2 bouyer #define ATA_CFG_FIXED 0x0040 16 1.2 bouyer #define ATAPI_CFG_TYPE_MASK 0x1f00 17 1.2 bouyer #define ATAPI_CFG_TYPE(x) (((x) & ATAPI_CFG_TYPE_MASK) >> 8) 18 1.2 bouyer #define ATAPI_CFG_REMOV 0x0080 19 1.2 bouyer #define ATAPI_CFG_DRQ_MASK 0x0060 20 1.2 bouyer #define ATAPI_CFG_STD_DRQ 0x0000 21 1.2 bouyer #define ATAPI_CFG_IRQ_DRQ 0x0020 22 1.2 bouyer #define ATAPI_CFG_ACCEL_DRQ 0x0040 23 1.2 bouyer #define ATAPI_CFG_CMD_MASK 0x0003 24 1.2 bouyer #define ATAPI_CFG_CMD_12 0x0000 25 1.2 bouyer #define ATAPI_CFG_CMD_16 0x0001 26 1.2 bouyer /* words 1-9 are ATA only */ 27 1.2 bouyer u_int16_t atap_cylinders; /* 1: # of non-removable cylinders */ 28 1.2 bouyer u_int16_t __reserved1; 29 1.2 bouyer u_int16_t atap_heads; /* 3: # of heads */ 30 1.2 bouyer u_int16_t __retired1[2]; /* 4-5: # of unform. bytes/track */ 31 1.2 bouyer u_int16_t atap_sectors; /* 6: # of sectors */ 32 1.2 bouyer u_int16_t __retired2[3]; 33 1.2 bouyer 34 1.2 bouyer u_int8_t atap_serial[20]; /* 10-19: serial number */ 35 1.2 bouyer u_int16_t __retired3[2]; 36 1.2 bouyer u_int16_t __obsolete1; 37 1.2 bouyer u_int8_t atap_revision[8]; /* 23-26: firmware revision */ 38 1.2 bouyer u_int8_t atap_model[40]; /* 27-46: model number */ 39 1.2 bouyer u_int16_t atap_multi; /* 47: maximum sectors per irq (ATA) */ 40 1.2 bouyer u_int16_t __reserved2; 41 1.2 bouyer u_int16_t atap_capabilities1; /* 49: capability flags */ 42 1.2 bouyer #define WDC_CAP_IORDY 0x0800 43 1.2 bouyer #define WDC_CAP_IORDY_DSBL 0x0400 44 1.2 bouyer #define WDC_CAP_LBA 0x0200 45 1.2 bouyer #define WDC_CAP_DMA 0x0100 46 1.2 bouyer #define ATA_CAP_STBY 0x2000 47 1.2 bouyer #define ATAPI_CAP_INTERL_DMA 0x8000 48 1.2 bouyer #define ATAPI_CAP_CMD_QUEUE 0x4000 49 1.2 bouyer #define ATAPI_CAP_OVERLP 0X2000 50 1.2 bouyer #define ATAPI_CAP_ATA_RST 0x1000 51 1.2 bouyer u_int16_t atap_capabilities2; /* 50: capability flags (ATA) */ 52 1.4 tsubai #if BYTE_ORDER == LITTLE_ENDIAN 53 1.2 bouyer u_int8_t __junk2; 54 1.2 bouyer u_int8_t atap_oldpiotiming; /* 51: old PIO timing mode */ 55 1.2 bouyer u_int8_t __junk3; 56 1.2 bouyer u_int8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */ 57 1.4 tsubai #else 58 1.4 tsubai u_int8_t atap_oldpiotiming; /* 51: old PIO timing mode */ 59 1.4 tsubai u_int8_t __junk2; 60 1.4 tsubai u_int8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */ 61 1.4 tsubai u_int8_t __junk3; 62 1.4 tsubai #endif 63 1.2 bouyer u_int16_t atap_extensions; /* 53: extentions supported */ 64 1.2 bouyer #define WDC_EXT_UDMA_MODES 0x0004 65 1.2 bouyer #define WDC_EXT_MODES 0x0002 66 1.2 bouyer #define WDC_EXT_GEOM 0x0001 67 1.2 bouyer /* words 54-62 are ATA only */ 68 1.2 bouyer u_int16_t atap_curcylinders; /* 54: current logical cyliners */ 69 1.2 bouyer u_int16_t atap_curheads; /* 55: current logical heads */ 70 1.2 bouyer u_int16_t atap_cursectors; /* 56: current logical sectors/tracks */ 71 1.2 bouyer u_int16_t atap_curcapacity[2]; /* 57-58: current capacity */ 72 1.2 bouyer u_int16_t atap_curmulti; /* 59: current multi-sector setting */ 73 1.2 bouyer #define WDC_MULTI_VALID 0x0100 74 1.2 bouyer #define WDC_MULTI_MASK 0x00ff 75 1.2 bouyer u_int16_t atap_capacity[2]; /* 60-61: total capacity (LBA only) */ 76 1.2 bouyer u_int16_t __retired4; 77 1.4 tsubai #if BYTE_ORDER == LITTLE_ENDIAN 78 1.2 bouyer u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */ 79 1.2 bouyer u_int8_t atap_dmamode_act; /* multiword DMA mode active */ 80 1.2 bouyer u_int8_t atap_piomode_supp; /* 64: PIO mode supported */ 81 1.2 bouyer u_int8_t __junk4; 82 1.4 tsubai #else 83 1.4 tsubai u_int8_t atap_dmamode_act; /* multiword DMA mode active */ 84 1.4 tsubai u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */ 85 1.4 tsubai u_int8_t __junk4; 86 1.4 tsubai u_int8_t atap_piomode_supp; /* 64: PIO mode supported */ 87 1.4 tsubai #endif 88 1.2 bouyer u_int16_t atap_dmatiming_mimi; /* 65: minimum DMA cycle time */ 89 1.2 bouyer u_int16_t atap_dmatiming_recom; /* 66: recomended DMA cycle time */ 90 1.2 bouyer u_int16_t atap_piotiming; /* 67: mini PIO cycle time without FC */ 91 1.2 bouyer u_int16_t atap_piotiming_iordy; /* 68: mini PIO cycle time with IORDY FC */ 92 1.2 bouyer u_int16_t __reserved3[2]; 93 1.2 bouyer /* words 71-72 are ATAPI only */ 94 1.2 bouyer u_int16_t atap_pkt_br; /* 71: time (ns) to bus release */ 95 1.2 bouyer u_int16_t atap_pkt_bsyclr; /* 72: tme to clear BSY after service */ 96 1.2 bouyer u_int16_t __reserved4[2]; 97 1.2 bouyer u_int16_t atap_queuedepth; /* 75: */ 98 1.2 bouyer #define WDC_QUEUE_DEPTH_MASK 0x0F 99 1.2 bouyer u_int16_t __reserved5[4]; 100 1.2 bouyer u_int16_t atap_ata_major; /* 80: Major version number */ 101 1.2 bouyer #define WDC_VER_ATA1 0x0002 102 1.2 bouyer #define WDC_VER_ATA2 0x0004 103 1.2 bouyer #define WDC_VER_ATA3 0x0008 104 1.2 bouyer #define WDC_VER_ATA4 0x0010 105 1.5 bouyer #define WDC_VER_ATA5 0x0020 106 1.2 bouyer u_int16_t atap_ata_minor; /* 81: Minor version number */ 107 1.2 bouyer u_int16_t atap_cmd_set1; /* 82: command set suported */ 108 1.2 bouyer #define WDC_CMD1_NOP 0x4000 109 1.2 bouyer #define WDC_CMD1_RB 0x2000 110 1.2 bouyer #define WDC_CMD1_WB 0x1000 111 1.2 bouyer #define WDC_CMD1_HPA 0x0400 112 1.2 bouyer #define WDC_CMD1_DVRST 0x0200 113 1.2 bouyer #define WDC_CMD1_SRV 0x0100 114 1.2 bouyer #define WDC_CMD1_RLSE 0x0080 115 1.2 bouyer #define WDC_CMD1_AHEAD 0x0040 116 1.2 bouyer #define WDC_CMD1_CACHE 0x0020 117 1.2 bouyer #define WDC_CMD1_PKT 0x0010 118 1.2 bouyer #define WDC_CMD1_PM 0x0008 119 1.2 bouyer #define WDC_CMD1_REMOV 0x0004 120 1.2 bouyer #define WDC_CMD1_SEC 0x0002 121 1.2 bouyer #define WDC_CMD1_SMART 0x0001 122 1.2 bouyer u_int16_t atap_cmd_set2; /* 83: command set suported */ 123 1.2 bouyer #define WDC_CMD2_RMSN 0x0010 124 1.2 bouyer #define WDC_CMD2_DM 0x0001 125 1.2 bouyer #define ATA_CMD2_APM 0x0008 126 1.2 bouyer #define ATA_CMD2_CFA 0x0004 127 1.2 bouyer #define ATA_CMD2_RWQ 0x0002 128 1.2 bouyer u_int16_t atap_cmd_ext; /* 84: command/features supp. ext. */ 129 1.2 bouyer u_int16_t atap_cmd1_en; /* 85: cmd/features enabled */ 130 1.2 bouyer /* bits are the same as atap_cmd_set1 */ 131 1.2 bouyer u_int16_t atap_cmd2_en; /* 86: cmd/features enabled */ 132 1.2 bouyer /* bits are the same as atap_cmd_set2 */ 133 1.2 bouyer u_int16_t atap_cmd_def; /* 87: cmd/features default */ 134 1.4 tsubai #if BYTE_ORDER == LITTLE_ENDIAN 135 1.2 bouyer u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */ 136 1.2 bouyer u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */ 137 1.4 tsubai #else 138 1.4 tsubai u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */ 139 1.4 tsubai u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */ 140 1.4 tsubai #endif 141 1.2 bouyer /* 89-92 are ATA-only */ 142 1.2 bouyer u_int16_t atap_seu_time; /* 89: Sec. Erase Unit compl. time */ 143 1.2 bouyer u_int16_t atap_eseu_time; /* 90: Enhanced SEU compl. time */ 144 1.2 bouyer u_int16_t atap_apm_val; /* 91: current APM value */ 145 1.2 bouyer u_int16_t __reserved6[35]; /* 92-126: reserved */ 146 1.2 bouyer u_int16_t atap_rmsn_supp; /* 127: remov. media status notif. */ 147 1.2 bouyer #define WDC_RMSN_SUPP_MASK 0x0003 148 1.2 bouyer #define WDC_RMSN_SUPP 0x0001 149 1.2 bouyer u_int16_t atap_sec_st; /* 128: security status */ 150 1.2 bouyer #define WDC_SEC_LEV_MAX 0x0100 151 1.2 bouyer #define WDC_SEC_ESE_SUPP 0x0020 152 1.2 bouyer #define WDC_SEC_EXP 0x0010 153 1.2 bouyer #define WDC_SEC_FROZEN 0x0008 154 1.2 bouyer #define WDC_SEC_LOCKED 0x0004 155 1.2 bouyer #define WDC_SEC_EN 0x0002 156 1.2 bouyer #define WDC_SEC_SUPP 0x0001 157 1.2 bouyer }; 158
Indexes created Mon Sep 29 21:09:56 GMT 2025