atareg.h revision 1.2
1 /* $NetBSD: atareg.h,v 1.2 1998/10/12 16:09:15 bouyer Exp $ */ 2 3 #ifdef _KERNEL 4 /* 5 * Drive parameter structure for ATA/ATAPI. 6 * Bit fields: WDC_* : common to ATA/ATAPI 7 * ATA_* : ATA only 8 * ATAPI_* : ATAPI only. 9 */ 10 struct ataparams { 11 /* drive info */ 12 u_int16_t atap_config; /* 0: general configuration */ 13 #define WDC_CFG_ATAPI_MASK 0xc000 14 #define WDC_CFG_ATAPI 0x8000 15 #define ATA_CFG_REMOVABLE 0x0080 16 #define ATA_CFG_FIXED 0x0040 17 #define ATAPI_CFG_TYPE_MASK 0x1f00 18 #define ATAPI_CFG_TYPE(x) (((x) & ATAPI_CFG_TYPE_MASK) >> 8) 19 #define ATAPI_CFG_REMOV 0x0080 20 #define ATAPI_CFG_DRQ_MASK 0x0060 21 #define ATAPI_CFG_STD_DRQ 0x0000 22 #define ATAPI_CFG_IRQ_DRQ 0x0020 23 #define ATAPI_CFG_ACCEL_DRQ 0x0040 24 #define ATAPI_CFG_CMD_MASK 0x0003 25 #define ATAPI_CFG_CMD_12 0x0000 26 #define ATAPI_CFG_CMD_16 0x0001 27 /* words 1-9 are ATA only */ 28 u_int16_t atap_cylinders; /* 1: # of non-removable cylinders */ 29 u_int16_t __reserved1; 30 u_int16_t atap_heads; /* 3: # of heads */ 31 u_int16_t __retired1[2]; /* 4-5: # of unform. bytes/track */ 32 u_int16_t atap_sectors; /* 6: # of sectors */ 33 u_int16_t __retired2[3]; 34 35 u_int8_t atap_serial[20]; /* 10-19: serial number */ 36 u_int16_t __retired3[2]; 37 u_int16_t __obsolete1; 38 u_int8_t atap_revision[8]; /* 23-26: firmware revision */ 39 u_int8_t atap_model[40]; /* 27-46: model number */ 40 u_int16_t atap_multi; /* 47: maximum sectors per irq (ATA) */ 41 u_int16_t __reserved2; 42 u_int16_t atap_capabilities1; /* 49: capability flags */ 43 #define WDC_CAP_IORDY 0x0800 44 #define WDC_CAP_IORDY_DSBL 0x0400 45 #define WDC_CAP_LBA 0x0200 46 #define WDC_CAP_DMA 0x0100 47 #define ATA_CAP_STBY 0x2000 48 #define ATAPI_CAP_INTERL_DMA 0x8000 49 #define ATAPI_CAP_CMD_QUEUE 0x4000 50 #define ATAPI_CAP_OVERLP 0X2000 51 #define ATAPI_CAP_ATA_RST 0x1000 52 u_int16_t atap_capabilities2; /* 50: capability flags (ATA) */ 53 u_int8_t __junk2; 54 u_int8_t atap_oldpiotiming; /* 51: old PIO timing mode */ 55 u_int8_t __junk3; 56 u_int8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */ 57 u_int16_t atap_extensions; /* 53: extentions supported */ 58 #define WDC_EXT_UDMA_MODES 0x0004 59 #define WDC_EXT_MODES 0x0002 60 #define WDC_EXT_GEOM 0x0001 61 /* words 54-62 are ATA only */ 62 u_int16_t atap_curcylinders; /* 54: current logical cyliners */ 63 u_int16_t atap_curheads; /* 55: current logical heads */ 64 u_int16_t atap_cursectors; /* 56: current logical sectors/tracks */ 65 u_int16_t atap_curcapacity[2]; /* 57-58: current capacity */ 66 u_int16_t atap_curmulti; /* 59: current multi-sector setting */ 67 #define WDC_MULTI_VALID 0x0100 68 #define WDC_MULTI_MASK 0x00ff 69 u_int16_t atap_capacity[2]; /* 60-61: total capacity (LBA only) */ 70 u_int16_t __retired4; 71 u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */ 72 u_int8_t atap_dmamode_act; /* multiword DMA mode active */ 73 u_int8_t atap_piomode_supp; /* 64: PIO mode supported */ 74 u_int8_t __junk4; 75 u_int16_t atap_dmatiming_mimi; /* 65: minimum DMA cycle time */ 76 u_int16_t atap_dmatiming_recom; /* 66: recomended DMA cycle time */ 77 u_int16_t atap_piotiming; /* 67: mini PIO cycle time without FC */ 78 u_int16_t atap_piotiming_iordy; /* 68: mini PIO cycle time with IORDY FC */ 79 u_int16_t __reserved3[2]; 80 /* words 71-72 are ATAPI only */ 81 u_int16_t atap_pkt_br; /* 71: time (ns) to bus release */ 82 u_int16_t atap_pkt_bsyclr; /* 72: tme to clear BSY after service */ 83 u_int16_t __reserved4[2]; 84 u_int16_t atap_queuedepth; /* 75: */ 85 #define WDC_QUEUE_DEPTH_MASK 0x0F 86 u_int16_t __reserved5[4]; 87 u_int16_t atap_ata_major; /* 80: Major version number */ 88 #define WDC_VER_ATA1 0x0002 89 #define WDC_VER_ATA2 0x0004 90 #define WDC_VER_ATA3 0x0008 91 #define WDC_VER_ATA4 0x0010 92 u_int16_t atap_ata_minor; /* 81: Minor version number */ 93 u_int16_t atap_cmd_set1; /* 82: command set suported */ 94 #define WDC_CMD1_NOP 0x4000 95 #define WDC_CMD1_RB 0x2000 96 #define WDC_CMD1_WB 0x1000 97 #define WDC_CMD1_HPA 0x0400 98 #define WDC_CMD1_DVRST 0x0200 99 #define WDC_CMD1_SRV 0x0100 100 #define WDC_CMD1_RLSE 0x0080 101 #define WDC_CMD1_AHEAD 0x0040 102 #define WDC_CMD1_CACHE 0x0020 103 #define WDC_CMD1_PKT 0x0010 104 #define WDC_CMD1_PM 0x0008 105 #define WDC_CMD1_REMOV 0x0004 106 #define WDC_CMD1_SEC 0x0002 107 #define WDC_CMD1_SMART 0x0001 108 u_int16_t atap_cmd_set2; /* 83: command set suported */ 109 #define WDC_CMD2_RMSN 0x0010 110 #define WDC_CMD2_DM 0x0001 111 #define ATA_CMD2_APM 0x0008 112 #define ATA_CMD2_CFA 0x0004 113 #define ATA_CMD2_RWQ 0x0002 114 u_int16_t atap_cmd_ext; /* 84: command/features supp. ext. */ 115 u_int16_t atap_cmd1_en; /* 85: cmd/features enabled */ 116 /* bits are the same as atap_cmd_set1 */ 117 u_int16_t atap_cmd2_en; /* 86: cmd/features enabled */ 118 /* bits are the same as atap_cmd_set2 */ 119 u_int16_t atap_cmd_def; /* 87: cmd/features default */ 120 u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */ 121 u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */ 122 /* 89-92 are ATA-only */ 123 u_int16_t atap_seu_time; /* 89: Sec. Erase Unit compl. time */ 124 u_int16_t atap_eseu_time; /* 90: Enhanced SEU compl. time */ 125 u_int16_t atap_apm_val; /* 91: current APM value */ 126 u_int16_t __reserved6[35]; /* 92-126: reserved */ 127 u_int16_t atap_rmsn_supp; /* 127: remov. media status notif. */ 128 #define WDC_RMSN_SUPP_MASK 0x0003 129 #define WDC_RMSN_SUPP 0x0001 130 u_int16_t atap_sec_st; /* 128: security status */ 131 #define WDC_SEC_LEV_MAX 0x0100 132 #define WDC_SEC_ESE_SUPP 0x0020 133 #define WDC_SEC_EXP 0x0010 134 #define WDC_SEC_FROZEN 0x0008 135 #define WDC_SEC_LOCKED 0x0004 136 #define WDC_SEC_EN 0x0002 137 #define WDC_SEC_SUPP 0x0001 138 }; 139 #endif /* _KERNEL */ 140
Indexes created Mon Sep 29 21:09:56 GMT 2025