atareg.h revision 1.3
1 /* $NetBSD: atareg.h,v 1.3 1998/11/18 16:32:29 kenh Exp $ */ 2 3 /* 4 * Drive parameter structure for ATA/ATAPI. 5 * Bit fields: WDC_* : common to ATA/ATAPI 6 * ATA_* : ATA only 7 * ATAPI_* : ATAPI only. 8 */ 9 struct ataparams { 10 /* drive info */ 11 u_int16_t atap_config; /* 0: general configuration */ 12 #define WDC_CFG_ATAPI_MASK 0xc000 13 #define WDC_CFG_ATAPI 0x8000 14 #define ATA_CFG_REMOVABLE 0x0080 15 #define ATA_CFG_FIXED 0x0040 16 #define ATAPI_CFG_TYPE_MASK 0x1f00 17 #define ATAPI_CFG_TYPE(x) (((x) & ATAPI_CFG_TYPE_MASK) >> 8) 18 #define ATAPI_CFG_REMOV 0x0080 19 #define ATAPI_CFG_DRQ_MASK 0x0060 20 #define ATAPI_CFG_STD_DRQ 0x0000 21 #define ATAPI_CFG_IRQ_DRQ 0x0020 22 #define ATAPI_CFG_ACCEL_DRQ 0x0040 23 #define ATAPI_CFG_CMD_MASK 0x0003 24 #define ATAPI_CFG_CMD_12 0x0000 25 #define ATAPI_CFG_CMD_16 0x0001 26 /* words 1-9 are ATA only */ 27 u_int16_t atap_cylinders; /* 1: # of non-removable cylinders */ 28 u_int16_t __reserved1; 29 u_int16_t atap_heads; /* 3: # of heads */ 30 u_int16_t __retired1[2]; /* 4-5: # of unform. bytes/track */ 31 u_int16_t atap_sectors; /* 6: # of sectors */ 32 u_int16_t __retired2[3]; 33 34 u_int8_t atap_serial[20]; /* 10-19: serial number */ 35 u_int16_t __retired3[2]; 36 u_int16_t __obsolete1; 37 u_int8_t atap_revision[8]; /* 23-26: firmware revision */ 38 u_int8_t atap_model[40]; /* 27-46: model number */ 39 u_int16_t atap_multi; /* 47: maximum sectors per irq (ATA) */ 40 u_int16_t __reserved2; 41 u_int16_t atap_capabilities1; /* 49: capability flags */ 42 #define WDC_CAP_IORDY 0x0800 43 #define WDC_CAP_IORDY_DSBL 0x0400 44 #define WDC_CAP_LBA 0x0200 45 #define WDC_CAP_DMA 0x0100 46 #define ATA_CAP_STBY 0x2000 47 #define ATAPI_CAP_INTERL_DMA 0x8000 48 #define ATAPI_CAP_CMD_QUEUE 0x4000 49 #define ATAPI_CAP_OVERLP 0X2000 50 #define ATAPI_CAP_ATA_RST 0x1000 51 u_int16_t atap_capabilities2; /* 50: capability flags (ATA) */ 52 u_int8_t __junk2; 53 u_int8_t atap_oldpiotiming; /* 51: old PIO timing mode */ 54 u_int8_t __junk3; 55 u_int8_t atap_olddmatiming; /* 52: old DMA timing mode (ATA) */ 56 u_int16_t atap_extensions; /* 53: extentions supported */ 57 #define WDC_EXT_UDMA_MODES 0x0004 58 #define WDC_EXT_MODES 0x0002 59 #define WDC_EXT_GEOM 0x0001 60 /* words 54-62 are ATA only */ 61 u_int16_t atap_curcylinders; /* 54: current logical cyliners */ 62 u_int16_t atap_curheads; /* 55: current logical heads */ 63 u_int16_t atap_cursectors; /* 56: current logical sectors/tracks */ 64 u_int16_t atap_curcapacity[2]; /* 57-58: current capacity */ 65 u_int16_t atap_curmulti; /* 59: current multi-sector setting */ 66 #define WDC_MULTI_VALID 0x0100 67 #define WDC_MULTI_MASK 0x00ff 68 u_int16_t atap_capacity[2]; /* 60-61: total capacity (LBA only) */ 69 u_int16_t __retired4; 70 u_int8_t atap_dmamode_supp; /* 63: multiword DMA mode supported */ 71 u_int8_t atap_dmamode_act; /* multiword DMA mode active */ 72 u_int8_t atap_piomode_supp; /* 64: PIO mode supported */ 73 u_int8_t __junk4; 74 u_int16_t atap_dmatiming_mimi; /* 65: minimum DMA cycle time */ 75 u_int16_t atap_dmatiming_recom; /* 66: recomended DMA cycle time */ 76 u_int16_t atap_piotiming; /* 67: mini PIO cycle time without FC */ 77 u_int16_t atap_piotiming_iordy; /* 68: mini PIO cycle time with IORDY FC */ 78 u_int16_t __reserved3[2]; 79 /* words 71-72 are ATAPI only */ 80 u_int16_t atap_pkt_br; /* 71: time (ns) to bus release */ 81 u_int16_t atap_pkt_bsyclr; /* 72: tme to clear BSY after service */ 82 u_int16_t __reserved4[2]; 83 u_int16_t atap_queuedepth; /* 75: */ 84 #define WDC_QUEUE_DEPTH_MASK 0x0F 85 u_int16_t __reserved5[4]; 86 u_int16_t atap_ata_major; /* 80: Major version number */ 87 #define WDC_VER_ATA1 0x0002 88 #define WDC_VER_ATA2 0x0004 89 #define WDC_VER_ATA3 0x0008 90 #define WDC_VER_ATA4 0x0010 91 u_int16_t atap_ata_minor; /* 81: Minor version number */ 92 u_int16_t atap_cmd_set1; /* 82: command set suported */ 93 #define WDC_CMD1_NOP 0x4000 94 #define WDC_CMD1_RB 0x2000 95 #define WDC_CMD1_WB 0x1000 96 #define WDC_CMD1_HPA 0x0400 97 #define WDC_CMD1_DVRST 0x0200 98 #define WDC_CMD1_SRV 0x0100 99 #define WDC_CMD1_RLSE 0x0080 100 #define WDC_CMD1_AHEAD 0x0040 101 #define WDC_CMD1_CACHE 0x0020 102 #define WDC_CMD1_PKT 0x0010 103 #define WDC_CMD1_PM 0x0008 104 #define WDC_CMD1_REMOV 0x0004 105 #define WDC_CMD1_SEC 0x0002 106 #define WDC_CMD1_SMART 0x0001 107 u_int16_t atap_cmd_set2; /* 83: command set suported */ 108 #define WDC_CMD2_RMSN 0x0010 109 #define WDC_CMD2_DM 0x0001 110 #define ATA_CMD2_APM 0x0008 111 #define ATA_CMD2_CFA 0x0004 112 #define ATA_CMD2_RWQ 0x0002 113 u_int16_t atap_cmd_ext; /* 84: command/features supp. ext. */ 114 u_int16_t atap_cmd1_en; /* 85: cmd/features enabled */ 115 /* bits are the same as atap_cmd_set1 */ 116 u_int16_t atap_cmd2_en; /* 86: cmd/features enabled */ 117 /* bits are the same as atap_cmd_set2 */ 118 u_int16_t atap_cmd_def; /* 87: cmd/features default */ 119 u_int8_t atap_udmamode_supp; /* 88: Ultra-DMA mode supported */ 120 u_int8_t atap_udmamode_act; /* Ultra-DMA mode active */ 121 /* 89-92 are ATA-only */ 122 u_int16_t atap_seu_time; /* 89: Sec. Erase Unit compl. time */ 123 u_int16_t atap_eseu_time; /* 90: Enhanced SEU compl. time */ 124 u_int16_t atap_apm_val; /* 91: current APM value */ 125 u_int16_t __reserved6[35]; /* 92-126: reserved */ 126 u_int16_t atap_rmsn_supp; /* 127: remov. media status notif. */ 127 #define WDC_RMSN_SUPP_MASK 0x0003 128 #define WDC_RMSN_SUPP 0x0001 129 u_int16_t atap_sec_st; /* 128: security status */ 130 #define WDC_SEC_LEV_MAX 0x0100 131 #define WDC_SEC_ESE_SUPP 0x0020 132 #define WDC_SEC_EXP 0x0010 133 #define WDC_SEC_FROZEN 0x0008 134 #define WDC_SEC_LOCKED 0x0004 135 #define WDC_SEC_EN 0x0002 136 #define WDC_SEC_SUPP 0x0001 137 }; 138
Indexes created Sun Oct 26 13:09:57 GMT 2025