atavar.h revision 1.32
1 /* $NetBSD: atavar.h,v 1.32 2003/12/14 05:03:28 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ATA_ATAVAR_H_ 33 #define _DEV_ATA_ATAVAR_H_ 34 35 /* High-level functions and structures used by both ATA and ATAPI devices */ 36 37 /* Datas common to drives and controller drivers */ 38 struct ata_drive_datas { 39 u_int8_t drive; /* drive number */ 40 int8_t ata_vers; /* ATA version supported */ 41 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 42 43 #define DRIVE_ATA 0x0001 44 #define DRIVE_ATAPI 0x0002 45 #define DRIVE_OLD 0x0004 46 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 47 #define DRIVE_CAP32 0x0008 48 #define DRIVE_DMA 0x0010 49 #define DRIVE_UDMA 0x0020 50 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 51 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 52 #define DRIVE_DMAERR 0x0100 /* Udma transfer had crc error, don't try DMA */ 53 #define DRIVE_ATAPIST 0x0100 /* device is an ATAPI tape drive */ 54 55 /* 56 * Current setting of drive's PIO, DMA and UDMA modes. 57 * Is initialised by the disks drivers at attach time, and may be 58 * changed later by the controller's code if needed 59 */ 60 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 61 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 62 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 63 64 /* Supported modes for this drive */ 65 u_int8_t PIO_cap; /* supported drive's PIO mode */ 66 u_int8_t DMA_cap; /* supported drive's DMA mode */ 67 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 68 69 /* 70 * Drive state. 71 * This is reset to 0 after a channel reset. 72 */ 73 u_int8_t state; 74 75 #define RESET 0 76 #define READY 1 77 78 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 79 u_int8_t n_dmaerrs; 80 u_int32_t n_xfers; 81 82 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 83 #define NERRS_MAX 4 84 #define NXFER 4000 85 86 struct device *drv_softc; /* ATA drives softc, if any */ 87 void *chnl_softc; /* channel softc */ 88 }; 89 90 /* User config flags that force (or disable) the use of a mode */ 91 #define ATA_CONFIG_PIO_MODES 0x0007 92 #define ATA_CONFIG_PIO_SET 0x0008 93 #define ATA_CONFIG_PIO_OFF 0 94 #define ATA_CONFIG_DMA_MODES 0x0070 95 #define ATA_CONFIG_DMA_SET 0x0080 96 #define ATA_CONFIG_DMA_DISABLE 0x0070 97 #define ATA_CONFIG_DMA_OFF 4 98 #define ATA_CONFIG_UDMA_MODES 0x0700 99 #define ATA_CONFIG_UDMA_SET 0x0800 100 #define ATA_CONFIG_UDMA_DISABLE 0x0700 101 #define ATA_CONFIG_UDMA_OFF 8 102 103 /* 104 * Parameters/state needed by the controller to perform an ATA bio. 105 */ 106 struct ata_bio { 107 volatile u_int16_t flags;/* cmd flags */ 108 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 109 #define ATA_POLL 0x0002 /* poll for completion */ 110 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 111 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 112 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 113 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 114 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 115 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 116 int multi; /* # of blocks to transfer in multi-mode */ 117 struct disklabel *lp; /* pointer to drive's label info */ 118 daddr_t blkno; /* block addr */ 119 daddr_t blkdone;/* number of blks transferred */ 120 daddr_t nblks; /* number of block currently transferring */ 121 int nbytes; /* number of bytes currently transferring */ 122 long bcount; /* total number of bytes */ 123 char *databuf;/* data buffer address */ 124 volatile int error; 125 #define NOERROR 0 /* There was no error (r_error invalid) */ 126 #define ERROR 1 /* check r_error */ 127 #define ERR_DF 2 /* Drive fault */ 128 #define ERR_DMA 3 /* DMA error */ 129 #define TIMEOUT 4 /* device timed out */ 130 #define ERR_NODEV 5 /* device has been gone */ 131 u_int8_t r_error;/* copy of error register */ 132 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 133 }; 134 135 /* 136 * ATA/ATAPI commands description 137 * 138 * This structure defines the interface between the ATA/ATAPI device driver 139 * and the controller for short commands. It contains the command's parameter, 140 * the len of data's to read/write (if any), and a function to call upon 141 * completion. 142 * If no sleep is allowed, the driver can poll for command completion. 143 * Once the command completed, if the error registed is valid, the flag 144 * AT_ERROR is set and the error register value is copied to r_error . 145 * A separate interface is needed for read/write or ATAPI packet commands 146 * (which need multiple interrupts per commands). 147 */ 148 struct wdc_command { 149 u_int8_t r_command; /* Parameters to upload to registers */ 150 u_int8_t r_head; 151 u_int16_t r_cyl; 152 u_int8_t r_sector; 153 u_int8_t r_count; 154 u_int8_t r_precomp; 155 u_int8_t r_st_bmask; /* status register mask to wait for before 156 command */ 157 u_int8_t r_st_pmask; /* status register mask to wait for after 158 command */ 159 u_int8_t r_error; /* error register after command done */ 160 volatile u_int16_t flags; 161 162 #define AT_READ 0x0001 /* There is data to read */ 163 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 164 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 165 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 166 #define AT_DONE 0x0020 /* command is done */ 167 #define AT_XFDONE 0x0040 /* data xfer is done */ 168 #define AT_ERROR 0x0080 /* command is done with error */ 169 #define AT_TIMEOU 0x0100 /* command timed out */ 170 #define AT_DF 0x0200 /* Drive fault */ 171 #define AT_READREG 0x0400 /* Read registers on completion */ 172 173 int timeout; /* timeout (in ms) */ 174 void *data; /* Data buffer address */ 175 int bcount; /* number of bytes to transfer */ 176 void (*callback)(void *); /* command to call once command completed */ 177 void *callback_arg; /* argument passed to *callback() */ 178 }; 179 180 /* 181 * If WDSM_ATTR_ADVISORY, device exceeded intended design life period. 182 * If not WDSM_ATTR_ADVISORY, imminent data loss predicted. 183 */ 184 #define WDSM_ATTR_ADVISORY 1 185 186 /* 187 * If WDSM_ATTR_COLLECTIVE, attribute only updated in off-line testing. 188 * If not WDSM_ATTR_COLLECTIVE, attribute updated also in on-line testing. 189 */ 190 #define WDSM_ATTR_COLLECTIVE 2 191 192 struct ata_smart_attr { 193 u_int8_t id; /* attribute id number */ 194 u_int16_t flags; 195 u_int8_t value; /* attribute value */ 196 u_int8_t vendor_specific[8]; 197 } __attribute__((packed)); 198 199 struct ata_smart_attributes { 200 u_int16_t data_structure_revision; 201 struct ata_smart_attr attributes[30]; 202 u_int8_t offline_data_collection_status; 203 u_int8_t self_test_exec_status; 204 u_int16_t total_time_to_complete_off_line; 205 u_int8_t vendor_specific_366; 206 u_int8_t offline_data_collection_capability; 207 u_int16_t smart_capability; 208 u_int8_t errorlog_capability; 209 u_int8_t vendor_specific_371; 210 u_int8_t short_test_completion_time; 211 u_int8_t extend_test_completion_time; 212 u_int8_t reserved_374_385[12]; 213 u_int8_t vendor_specific_386_509[125]; 214 int8_t checksum; 215 } __attribute__((packed)); 216 217 struct ata_smart_thresh { 218 u_int8_t id; 219 u_int8_t value; 220 u_int8_t reserved[10]; 221 } __attribute__((packed)); 222 223 struct ata_smart_thresholds { 224 u_int16_t data_structure_revision; 225 struct ata_smart_thresh thresholds[30]; 226 u_int8_t reserved[18]; 227 u_int8_t vendor_specific[131]; 228 int8_t checksum; 229 } __attribute__((packed)); 230 231 int wdc_downgrade_mode(struct ata_drive_datas *, int); 232 233 struct ataparams; 234 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 235 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 236 /* return code for these cmds */ 237 #define CMD_OK 0 238 #define CMD_ERR 1 239 #define CMD_AGAIN 2 240 241 void ata_dmaerr(struct ata_drive_datas *, int); 242 243 #endif /* _DEV_ATA_ATAVAR_H_ */ 244
Indexes created Mon Sep 29 21:09:56 GMT 2025